[linux-2.6-block.git] / drivers / infiniband / hw / cxgb4 / ev.c

/*
 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */
#include <linux/slab.h>
#include <linux/mman.h>
#include <net/sock.h>

#include "iw_cxgb4.h"

static void post_qp_event(struct c4iw_dev *dev, struct c4iw_cq *chp,
			  struct c4iw_qp *qhp,
			  struct t4_cqe *err_cqe,
			  enum ib_event_type ib_event)
{
	struct ib_event event;
	struct c4iw_qp_attributes attrs;
	unsigned long flag;

	printk(KERN_ERR MOD "AE qpid 0x%x opcode %d status 0x%x "
	       "type %d wrid.hi 0x%x wrid.lo 0x%x\n",
	       CQE_QPID(err_cqe), CQE_OPCODE(err_cqe),
	       CQE_STATUS(err_cqe), CQE_TYPE(err_cqe),
	       CQE_WRID_HI(err_cqe), CQE_WRID_LOW(err_cqe));

	if (qhp->attr.state == C4IW_QP_STATE_RTS) {
		attrs.next_state = C4IW_QP_STATE_TERMINATE;
		c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE,
			       &attrs, 0);
	}

	event.event = ib_event;
	event.device = chp->ibcq.device;
	if (ib_event == IB_EVENT_CQ_ERR)
		event.element.cq = &chp->ibcq;
	else
		event.element.qp = &qhp->ibqp;
	if (qhp->ibqp.event_handler)
		(*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context);

	spin_lock_irqsave(&chp->comp_handler_lock, flag);
	(*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
	spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
}

void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe)
{
	struct c4iw_cq *chp;
	struct c4iw_qp *qhp;
	u32 cqid;

	spin_lock_irq(&dev->lock);
	qhp = get_qhp(dev, CQE_QPID(err_cqe));
	if (!qhp) {
		printk(KERN_ERR MOD "BAD AE qpid 0x%x opcode %d "
		       "status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
		       CQE_QPID(err_cqe),
		       CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
		       CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
		       CQE_WRID_LOW(err_cqe));
		spin_unlock_irq(&dev->lock);
		goto out;
	}

	if (SQ_TYPE(err_cqe))
		cqid = qhp->attr.scq;
	else
		cqid = qhp->attr.rcq;
	chp = get_chp(dev, cqid);
	if (!chp) {
		printk(KERN_ERR MOD "BAD AE cqid 0x%x qpid 0x%x opcode %d "
		       "status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
		       cqid, CQE_QPID(err_cqe),
		       CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
		       CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
		       CQE_WRID_LOW(err_cqe));
		spin_unlock_irq(&dev->lock);
		goto out;
	}

	c4iw_qp_add_ref(&qhp->ibqp);
	atomic_inc(&chp->refcnt);
	spin_unlock_irq(&dev->lock);

	/* Bad incoming write */
	if (RQ_TYPE(err_cqe) &&
	    (CQE_OPCODE(err_cqe) == FW_RI_RDMA_WRITE)) {
		post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_REQ_ERR);
		goto done;
	}

	switch (CQE_STATUS(err_cqe)) {

	/* Completion Events */
	case T4_ERR_SUCCESS:
		printk(KERN_ERR MOD "AE with status 0!\n");
		break;

	case T4_ERR_STAG:
	case T4_ERR_PDID:
	case T4_ERR_QPID:
	case T4_ERR_ACCESS:
	case T4_ERR_WRAP:
	case T4_ERR_BOUND:
	case T4_ERR_INVALIDATE_SHARED_MR:
	case T4_ERR_INVALIDATE_MR_WITH_MW_BOUND:
		post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_ACCESS_ERR);
		break;

	/* Device Fatal Errors */
	case T4_ERR_ECC:
	case T4_ERR_ECC_PSTAG:
	case T4_ERR_INTERNAL_ERR:
		post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_DEVICE_FATAL);
		break;

	/* QP Fatal Errors */
	case T4_ERR_OUT_OF_RQE:
	case T4_ERR_PBL_ADDR_BOUND:
	case T4_ERR_CRC:
	case T4_ERR_MARKER:
	case T4_ERR_PDU_LEN_ERR:
	case T4_ERR_DDP_VERSION:
	case T4_ERR_RDMA_VERSION:
	case T4_ERR_OPCODE:
	case T4_ERR_DDP_QUEUE_NUM:
	case T4_ERR_MSN:
	case T4_ERR_TBIT:
	case T4_ERR_MO:
	case T4_ERR_MSN_GAP:
	case T4_ERR_MSN_RANGE:
	case T4_ERR_RQE_ADDR_BOUND:
	case T4_ERR_IRD_OVERFLOW:
		post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
		break;

	default:
		printk(KERN_ERR MOD "Unknown T4 status 0x%x QPID 0x%x\n",
		       CQE_STATUS(err_cqe), qhp->wq.sq.qid);
		post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
		break;
	}
done:
	if (atomic_dec_and_test(&chp->refcnt))
		wake_up(&chp->wait);
	c4iw_qp_rem_ref(&qhp->ibqp);
out:
	return;
}

int c4iw_ev_handler(struct c4iw_dev *dev, u32 qid)
{
	struct c4iw_cq *chp;
	unsigned long flag;

	chp = get_chp(dev, qid);
	if (chp) {
		spin_lock_irqsave(&chp->comp_handler_lock, flag);
		(*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
		spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
	} else
		PDBG("%s unknown cqid 0x%x\n", __func__, qid);
	return 0;
}
Commit	Line	Data
cfdda9d7 SW	1	/*
	2	* Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32	#include <linux/slab.h>
	33	#include <linux/mman.h>
	34	#include <net/sock.h>
	35
	36	#include "iw_cxgb4.h"
	37
	38	static void post_qp_event(struct c4iw_dev dev, struct c4iw_cq chp,
	39	struct c4iw_qp *qhp,
	40	struct t4_cqe *err_cqe,
	41	enum ib_event_type ib_event)
	42	{
	43	struct ib_event event;
	44	struct c4iw_qp_attributes attrs;
581bbe2c	45	unsigned long flag;
cfdda9d7	46
be4c9bad RD	47	printk(KERN_ERR MOD "AE qpid 0x%x opcode %d status 0x%x "
be4c9bad RD	48	"type %d wrid.hi 0x%x wrid.lo 0x%x\n",
cfdda9d7 SW	49	CQE_QPID(err_cqe), CQE_OPCODE(err_cqe),
	50	CQE_STATUS(err_cqe), CQE_TYPE(err_cqe),
	51	CQE_WRID_HI(err_cqe), CQE_WRID_LOW(err_cqe));
	52
	53	if (qhp->attr.state == C4IW_QP_STATE_RTS) {
	54	attrs.next_state = C4IW_QP_STATE_TERMINATE;
	55	c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE,
0e42c1f4	56	&attrs, 0);
cfdda9d7 SW	57	}
	58
	59	event.event = ib_event;
	60	event.device = chp->ibcq.device;
	61	if (ib_event == IB_EVENT_CQ_ERR)
	62	event.element.cq = &chp->ibcq;
	63	else
	64	event.element.qp = &qhp->ibqp;
	65	if (qhp->ibqp.event_handler)
	66	(*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context);
	67
581bbe2c	68	spin_lock_irqsave(&chp->comp_handler_lock, flag);
cfdda9d7	69	(*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
581bbe2c	70	spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
cfdda9d7 SW	71	}
	72
	73	void c4iw_ev_dispatch(struct c4iw_dev dev, struct t4_cqe err_cqe)
	74	{
	75	struct c4iw_cq *chp;
	76	struct c4iw_qp *qhp;
	77	u32 cqid;
	78
4984037b	79	spin_lock_irq(&dev->lock);
cfdda9d7 SW	80	qhp = get_qhp(dev, CQE_QPID(err_cqe));
	81	if (!qhp) {
	82	printk(KERN_ERR MOD "BAD AE qpid 0x%x opcode %d "
	83	"status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
	84	CQE_QPID(err_cqe),
	85	CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
	86	CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
	87	CQE_WRID_LOW(err_cqe));
4984037b	88	spin_unlock_irq(&dev->lock);
cfdda9d7 SW	89	goto out;
	90	}
	91
	92	if (SQ_TYPE(err_cqe))
	93	cqid = qhp->attr.scq;
	94	else
	95	cqid = qhp->attr.rcq;
	96	chp = get_chp(dev, cqid);
	97	if (!chp) {
	98	printk(KERN_ERR MOD "BAD AE cqid 0x%x qpid 0x%x opcode %d "
	99	"status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
	100	cqid, CQE_QPID(err_cqe),
	101	CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
	102	CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
	103	CQE_WRID_LOW(err_cqe));
4984037b	104	spin_unlock_irq(&dev->lock);
cfdda9d7 SW	105	goto out;
	106	}
	107
	108	c4iw_qp_add_ref(&qhp->ibqp);
	109	atomic_inc(&chp->refcnt);
4984037b	110	spin_unlock_irq(&dev->lock);
cfdda9d7 SW	111
	112	/* Bad incoming write */
	113	if (RQ_TYPE(err_cqe) &&
	114	(CQE_OPCODE(err_cqe) == FW_RI_RDMA_WRITE)) {
	115	post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_REQ_ERR);
	116	goto done;
	117	}
	118
	119	switch (CQE_STATUS(err_cqe)) {
	120
	121	/* Completion Events */
	122	case T4_ERR_SUCCESS:
	123	printk(KERN_ERR MOD "AE with status 0!\n");
	124	break;
	125
	126	case T4_ERR_STAG:
	127	case T4_ERR_PDID:
	128	case T4_ERR_QPID:
	129	case T4_ERR_ACCESS:
	130	case T4_ERR_WRAP:
	131	case T4_ERR_BOUND:
	132	case T4_ERR_INVALIDATE_SHARED_MR:
	133	case T4_ERR_INVALIDATE_MR_WITH_MW_BOUND:
	134	post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_ACCESS_ERR);
	135	break;
	136
	137	/* Device Fatal Errors */
	138	case T4_ERR_ECC:
	139	case T4_ERR_ECC_PSTAG:
	140	case T4_ERR_INTERNAL_ERR:
	141	post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_DEVICE_FATAL);
	142	break;
	143
	144	/* QP Fatal Errors */
	145	case T4_ERR_OUT_OF_RQE:
	146	case T4_ERR_PBL_ADDR_BOUND:
	147	case T4_ERR_CRC:
	148	case T4_ERR_MARKER:
	149	case T4_ERR_PDU_LEN_ERR:
	150	case T4_ERR_DDP_VERSION:
	151	case T4_ERR_RDMA_VERSION:
	152	case T4_ERR_OPCODE:
	153	case T4_ERR_DDP_QUEUE_NUM:
	154	case T4_ERR_MSN:
	155	case T4_ERR_TBIT:
	156	case T4_ERR_MO:
	157	case T4_ERR_MSN_GAP:
	158	case T4_ERR_MSN_RANGE:
	159	case T4_ERR_RQE_ADDR_BOUND:
	160	case T4_ERR_IRD_OVERFLOW:
	161	post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
	162	break;
	163
	164	default:
	165	printk(KERN_ERR MOD "Unknown T4 status 0x%x QPID 0x%x\n",
	166	CQE_STATUS(err_cqe), qhp->wq.sq.qid);
	167	post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
	168	break;
	169	}
	170	done:
	171	if (atomic_dec_and_test(&chp->refcnt))
	172	wake_up(&chp->wait);
	173	c4iw_qp_rem_ref(&qhp->ibqp);
	174	out:
175	return;
176	}
177
178	int c4iw_ev_handler(struct c4iw_dev *dev, u32 qid)
179	{
180	struct c4iw_cq *chp;
581bbe2c	181	unsigned long flag;
cfdda9d7 SW	182
cfdda9d7 SW	183	chp = get_chp(dev, qid);
581bbe2c KS	184	if (chp) {
581bbe2c KS	185	spin_lock_irqsave(&chp->comp_handler_lock, flag);
cfdda9d7	186	(*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
581bbe2c KS	187	spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
581bbe2c KS	188	} else
cfdda9d7 SW	189	PDBG("%s unknown cqid 0x%x\n", __func__, qid);
	190	return 0;
	191	}