Commit | Line | Data |
---|---|---|
1ac5a404 SX |
1 | /* |
2 | * Broadcom NetXtreme-E RoCE driver. | |
3 | * | |
4 | * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term | |
5 | * Broadcom refers to Broadcom Limited and/or its subsidiaries. | |
6 | * | |
7 | * This software is available to you under a choice of one of two | |
8 | * licenses. You may choose to be licensed under the terms of the GNU | |
9 | * General Public License (GPL) Version 2, available from the file | |
10 | * COPYING in the main directory of this source tree, or the | |
11 | * BSD license below: | |
12 | * | |
13 | * Redistribution and use in source and binary forms, with or without | |
14 | * modification, are permitted provided that the following conditions | |
15 | * are met: | |
16 | * | |
17 | * 1. Redistributions of source code must retain the above copyright | |
18 | * notice, this list of conditions and the following disclaimer. | |
19 | * 2. Redistributions in binary form must reproduce the above copyright | |
20 | * notice, this list of conditions and the following disclaimer in | |
21 | * the documentation and/or other materials provided with the | |
22 | * distribution. | |
23 | * | |
24 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' | |
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, | |
26 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | |
27 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS | |
28 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
31 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
32 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE | |
33 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN | |
34 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
35 | * | |
36 | * Description: IB Verbs interpreter (header) | |
37 | */ | |
38 | ||
39 | #ifndef __BNXT_RE_IB_VERBS_H__ | |
40 | #define __BNXT_RE_IB_VERBS_H__ | |
41 | ||
42 | struct bnxt_re_gid_ctx { | |
43 | u32 idx; | |
44 | u32 refcnt; | |
45 | }; | |
46 | ||
9152e0b7 EW |
47 | #define BNXT_RE_FENCE_BYTES 64 |
48 | struct bnxt_re_fence_data { | |
49 | u32 size; | |
50 | u8 va[BNXT_RE_FENCE_BYTES]; | |
51 | dma_addr_t dma_addr; | |
52 | struct bnxt_re_mr *mr; | |
53 | struct ib_mw *mw; | |
54 | struct bnxt_qplib_swqe bind_wqe; | |
55 | u32 bind_rkey; | |
56 | }; | |
57 | ||
1ac5a404 SX |
58 | struct bnxt_re_pd { |
59 | struct bnxt_re_dev *rdev; | |
60 | struct ib_pd ib_pd; | |
61 | struct bnxt_qplib_pd qplib_pd; | |
9152e0b7 | 62 | struct bnxt_re_fence_data fence; |
1ac5a404 SX |
63 | }; |
64 | ||
65 | struct bnxt_re_ah { | |
66 | struct bnxt_re_dev *rdev; | |
67 | struct ib_ah ib_ah; | |
68 | struct bnxt_qplib_ah qplib_ah; | |
69 | }; | |
70 | ||
37cb11ac DS |
71 | struct bnxt_re_srq { |
72 | struct bnxt_re_dev *rdev; | |
73 | u32 srq_limit; | |
74 | struct ib_srq ib_srq; | |
75 | struct bnxt_qplib_srq qplib_srq; | |
76 | struct ib_umem *umem; | |
77 | spinlock_t lock; /* protect srq */ | |
78 | }; | |
79 | ||
1ac5a404 SX |
80 | struct bnxt_re_qp { |
81 | struct list_head list; | |
82 | struct bnxt_re_dev *rdev; | |
83 | struct ib_qp ib_qp; | |
84 | spinlock_t sq_lock; /* protect sq */ | |
018cf599 | 85 | spinlock_t rq_lock; /* protect rq */ |
1ac5a404 SX |
86 | struct bnxt_qplib_qp qplib_qp; |
87 | struct ib_umem *sumem; | |
88 | struct ib_umem *rumem; | |
89 | /* QP1 */ | |
90 | u32 send_psn; | |
91 | struct ib_ud_header qp1_hdr; | |
3b921e3b SX |
92 | struct bnxt_re_cq *scq; |
93 | struct bnxt_re_cq *rcq; | |
1ac5a404 SX |
94 | }; |
95 | ||
96 | struct bnxt_re_cq { | |
97 | struct bnxt_re_dev *rdev; | |
98 | spinlock_t cq_lock; /* protect cq */ | |
99 | u16 cq_count; | |
100 | u16 cq_period; | |
101 | struct ib_cq ib_cq; | |
102 | struct bnxt_qplib_cq qplib_cq; | |
103 | struct bnxt_qplib_cqe *cql; | |
104 | #define MAX_CQL_PER_POLL 1024 | |
105 | u32 max_cql; | |
106 | struct ib_umem *umem; | |
107 | }; | |
108 | ||
109 | struct bnxt_re_mr { | |
110 | struct bnxt_re_dev *rdev; | |
111 | struct ib_mr ib_mr; | |
112 | struct ib_umem *ib_umem; | |
113 | struct bnxt_qplib_mrw qplib_mr; | |
114 | u32 npages; | |
115 | u64 *pages; | |
116 | struct bnxt_qplib_frpl qplib_frpl; | |
117 | }; | |
118 | ||
119 | struct bnxt_re_frpl { | |
120 | struct bnxt_re_dev *rdev; | |
121 | struct bnxt_qplib_frpl qplib_frpl; | |
122 | u64 *page_list; | |
123 | }; | |
124 | ||
125 | struct bnxt_re_fmr { | |
126 | struct bnxt_re_dev *rdev; | |
127 | struct ib_fmr ib_fmr; | |
128 | struct bnxt_qplib_mrw qplib_fmr; | |
129 | }; | |
130 | ||
131 | struct bnxt_re_mw { | |
132 | struct bnxt_re_dev *rdev; | |
133 | struct ib_mw ib_mw; | |
134 | struct bnxt_qplib_mrw qplib_mw; | |
135 | }; | |
136 | ||
137 | struct bnxt_re_ucontext { | |
138 | struct bnxt_re_dev *rdev; | |
139 | struct ib_ucontext ib_uctx; | |
b3b2c7c5 | 140 | struct bnxt_qplib_dpi dpi; |
1ac5a404 SX |
141 | void *shpg; |
142 | spinlock_t sh_lock; /* protect shpg */ | |
143 | }; | |
144 | ||
145 | struct net_device *bnxt_re_get_netdev(struct ib_device *ibdev, u8 port_num); | |
146 | ||
147 | int bnxt_re_query_device(struct ib_device *ibdev, | |
148 | struct ib_device_attr *ib_attr, | |
149 | struct ib_udata *udata); | |
150 | int bnxt_re_modify_device(struct ib_device *ibdev, | |
151 | int device_modify_mask, | |
152 | struct ib_device_modify *device_modify); | |
153 | int bnxt_re_query_port(struct ib_device *ibdev, u8 port_num, | |
154 | struct ib_port_attr *port_attr); | |
1ac5a404 SX |
155 | int bnxt_re_get_port_immutable(struct ib_device *ibdev, u8 port_num, |
156 | struct ib_port_immutable *immutable); | |
2fc68543 | 157 | void bnxt_re_query_fw_str(struct ib_device *ibdev, char *str); |
1ac5a404 SX |
158 | int bnxt_re_query_pkey(struct ib_device *ibdev, u8 port_num, |
159 | u16 index, u16 *pkey); | |
414448d2 | 160 | int bnxt_re_del_gid(const struct ib_gid_attr *attr, void **context); |
f4df9a7c | 161 | int bnxt_re_add_gid(const struct ib_gid_attr *attr, void **context); |
1ac5a404 SX |
162 | int bnxt_re_query_gid(struct ib_device *ibdev, u8 port_num, |
163 | int index, union ib_gid *gid); | |
164 | enum rdma_link_layer bnxt_re_get_link_layer(struct ib_device *ibdev, | |
165 | u8 port_num); | |
166 | struct ib_pd *bnxt_re_alloc_pd(struct ib_device *ibdev, | |
167 | struct ib_ucontext *context, | |
168 | struct ib_udata *udata); | |
169 | int bnxt_re_dealloc_pd(struct ib_pd *pd); | |
170 | struct ib_ah *bnxt_re_create_ah(struct ib_pd *pd, | |
90898850 | 171 | struct rdma_ah_attr *ah_attr, |
1ac5a404 | 172 | struct ib_udata *udata); |
90898850 DC |
173 | int bnxt_re_modify_ah(struct ib_ah *ah, struct rdma_ah_attr *ah_attr); |
174 | int bnxt_re_query_ah(struct ib_ah *ah, struct rdma_ah_attr *ah_attr); | |
1ac5a404 | 175 | int bnxt_re_destroy_ah(struct ib_ah *ah); |
37cb11ac DS |
176 | struct ib_srq *bnxt_re_create_srq(struct ib_pd *pd, |
177 | struct ib_srq_init_attr *srq_init_attr, | |
178 | struct ib_udata *udata); | |
179 | int bnxt_re_modify_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr, | |
180 | enum ib_srq_attr_mask srq_attr_mask, | |
181 | struct ib_udata *udata); | |
182 | int bnxt_re_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr); | |
183 | int bnxt_re_destroy_srq(struct ib_srq *srq); | |
d34ac5cd BVA |
184 | int bnxt_re_post_srq_recv(struct ib_srq *srq, const struct ib_recv_wr *recv_wr, |
185 | const struct ib_recv_wr **bad_recv_wr); | |
1ac5a404 SX |
186 | struct ib_qp *bnxt_re_create_qp(struct ib_pd *pd, |
187 | struct ib_qp_init_attr *qp_init_attr, | |
188 | struct ib_udata *udata); | |
189 | int bnxt_re_modify_qp(struct ib_qp *qp, struct ib_qp_attr *qp_attr, | |
190 | int qp_attr_mask, struct ib_udata *udata); | |
191 | int bnxt_re_query_qp(struct ib_qp *qp, struct ib_qp_attr *qp_attr, | |
192 | int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr); | |
193 | int bnxt_re_destroy_qp(struct ib_qp *qp); | |
d34ac5cd BVA |
194 | int bnxt_re_post_send(struct ib_qp *qp, const struct ib_send_wr *send_wr, |
195 | const struct ib_send_wr **bad_send_wr); | |
196 | int bnxt_re_post_recv(struct ib_qp *qp, const struct ib_recv_wr *recv_wr, | |
197 | const struct ib_recv_wr **bad_recv_wr); | |
1ac5a404 SX |
198 | struct ib_cq *bnxt_re_create_cq(struct ib_device *ibdev, |
199 | const struct ib_cq_init_attr *attr, | |
200 | struct ib_ucontext *context, | |
201 | struct ib_udata *udata); | |
202 | int bnxt_re_destroy_cq(struct ib_cq *cq); | |
203 | int bnxt_re_poll_cq(struct ib_cq *cq, int num_entries, struct ib_wc *wc); | |
204 | int bnxt_re_req_notify_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags); | |
205 | struct ib_mr *bnxt_re_get_dma_mr(struct ib_pd *pd, int mr_access_flags); | |
206 | ||
207 | int bnxt_re_map_mr_sg(struct ib_mr *ib_mr, struct scatterlist *sg, int sg_nents, | |
208 | unsigned int *sg_offset); | |
209 | struct ib_mr *bnxt_re_alloc_mr(struct ib_pd *ib_pd, enum ib_mr_type mr_type, | |
210 | u32 max_num_sg); | |
211 | int bnxt_re_dereg_mr(struct ib_mr *mr); | |
9152e0b7 EW |
212 | struct ib_mw *bnxt_re_alloc_mw(struct ib_pd *ib_pd, enum ib_mw_type type, |
213 | struct ib_udata *udata); | |
214 | int bnxt_re_dealloc_mw(struct ib_mw *mw); | |
1ac5a404 SX |
215 | struct ib_mr *bnxt_re_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, |
216 | u64 virt_addr, int mr_access_flags, | |
217 | struct ib_udata *udata); | |
218 | struct ib_ucontext *bnxt_re_alloc_ucontext(struct ib_device *ibdev, | |
219 | struct ib_udata *udata); | |
220 | int bnxt_re_dealloc_ucontext(struct ib_ucontext *context); | |
221 | int bnxt_re_mmap(struct ib_ucontext *context, struct vm_area_struct *vma); | |
942c9b6c SX |
222 | |
223 | unsigned long bnxt_re_lock_cqs(struct bnxt_re_qp *qp); | |
224 | void bnxt_re_unlock_cqs(struct bnxt_re_qp *qp, unsigned long flags); | |
1ac5a404 | 225 | #endif /* __BNXT_RE_IB_VERBS_H__ */ |