IB/core: add a need_inval flag to struct ib_mr
[linux-2.6-block.git] / drivers / infiniband / core / verbs.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
2a1d9b7f 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
33b9b3ee 8 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
1da177e4
LT
9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
1da177e4
LT
37 */
38
39#include <linux/errno.h>
40#include <linux/err.h>
b108d976 41#include <linux/export.h>
8c65b4a6 42#include <linux/string.h>
0e0ec7e0 43#include <linux/slab.h>
dbf727de
MB
44#include <linux/in.h>
45#include <linux/in6.h>
46#include <net/addrconf.h>
1da177e4 47
a4d61e84
RD
48#include <rdma/ib_verbs.h>
49#include <rdma/ib_cache.h>
dd5f03be 50#include <rdma/ib_addr.h>
1da177e4 51
ed4c54e5 52#include "core_priv.h"
1da177e4 53
2b1b5b60
SG
54static const char * const ib_events[] = {
55 [IB_EVENT_CQ_ERR] = "CQ error",
56 [IB_EVENT_QP_FATAL] = "QP fatal error",
57 [IB_EVENT_QP_REQ_ERR] = "QP request error",
58 [IB_EVENT_QP_ACCESS_ERR] = "QP access error",
59 [IB_EVENT_COMM_EST] = "communication established",
60 [IB_EVENT_SQ_DRAINED] = "send queue drained",
61 [IB_EVENT_PATH_MIG] = "path migration successful",
62 [IB_EVENT_PATH_MIG_ERR] = "path migration error",
63 [IB_EVENT_DEVICE_FATAL] = "device fatal error",
64 [IB_EVENT_PORT_ACTIVE] = "port active",
65 [IB_EVENT_PORT_ERR] = "port error",
66 [IB_EVENT_LID_CHANGE] = "LID change",
67 [IB_EVENT_PKEY_CHANGE] = "P_key change",
68 [IB_EVENT_SM_CHANGE] = "SM change",
69 [IB_EVENT_SRQ_ERR] = "SRQ error",
70 [IB_EVENT_SRQ_LIMIT_REACHED] = "SRQ limit reached",
71 [IB_EVENT_QP_LAST_WQE_REACHED] = "last WQE reached",
72 [IB_EVENT_CLIENT_REREGISTER] = "client reregister",
73 [IB_EVENT_GID_CHANGE] = "GID changed",
74};
75
db7489e0 76const char *__attribute_const__ ib_event_msg(enum ib_event_type event)
2b1b5b60
SG
77{
78 size_t index = event;
79
80 return (index < ARRAY_SIZE(ib_events) && ib_events[index]) ?
81 ib_events[index] : "unrecognized event";
82}
83EXPORT_SYMBOL(ib_event_msg);
84
85static const char * const wc_statuses[] = {
86 [IB_WC_SUCCESS] = "success",
87 [IB_WC_LOC_LEN_ERR] = "local length error",
88 [IB_WC_LOC_QP_OP_ERR] = "local QP operation error",
89 [IB_WC_LOC_EEC_OP_ERR] = "local EE context operation error",
90 [IB_WC_LOC_PROT_ERR] = "local protection error",
91 [IB_WC_WR_FLUSH_ERR] = "WR flushed",
92 [IB_WC_MW_BIND_ERR] = "memory management operation error",
93 [IB_WC_BAD_RESP_ERR] = "bad response error",
94 [IB_WC_LOC_ACCESS_ERR] = "local access error",
95 [IB_WC_REM_INV_REQ_ERR] = "invalid request error",
96 [IB_WC_REM_ACCESS_ERR] = "remote access error",
97 [IB_WC_REM_OP_ERR] = "remote operation error",
98 [IB_WC_RETRY_EXC_ERR] = "transport retry counter exceeded",
99 [IB_WC_RNR_RETRY_EXC_ERR] = "RNR retry counter exceeded",
100 [IB_WC_LOC_RDD_VIOL_ERR] = "local RDD violation error",
101 [IB_WC_REM_INV_RD_REQ_ERR] = "remote invalid RD request",
102 [IB_WC_REM_ABORT_ERR] = "operation aborted",
103 [IB_WC_INV_EECN_ERR] = "invalid EE context number",
104 [IB_WC_INV_EEC_STATE_ERR] = "invalid EE context state",
105 [IB_WC_FATAL_ERR] = "fatal error",
106 [IB_WC_RESP_TIMEOUT_ERR] = "response timeout error",
107 [IB_WC_GENERAL_ERR] = "general error",
108};
109
db7489e0 110const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status)
2b1b5b60
SG
111{
112 size_t index = status;
113
114 return (index < ARRAY_SIZE(wc_statuses) && wc_statuses[index]) ?
115 wc_statuses[index] : "unrecognized status";
116}
117EXPORT_SYMBOL(ib_wc_status_msg);
118
8385fd84 119__attribute_const__ int ib_rate_to_mult(enum ib_rate rate)
bf6a9e31
JM
120{
121 switch (rate) {
122 case IB_RATE_2_5_GBPS: return 1;
123 case IB_RATE_5_GBPS: return 2;
124 case IB_RATE_10_GBPS: return 4;
125 case IB_RATE_20_GBPS: return 8;
126 case IB_RATE_30_GBPS: return 12;
127 case IB_RATE_40_GBPS: return 16;
128 case IB_RATE_60_GBPS: return 24;
129 case IB_RATE_80_GBPS: return 32;
130 case IB_RATE_120_GBPS: return 48;
131 default: return -1;
132 }
133}
134EXPORT_SYMBOL(ib_rate_to_mult);
135
8385fd84 136__attribute_const__ enum ib_rate mult_to_ib_rate(int mult)
bf6a9e31
JM
137{
138 switch (mult) {
139 case 1: return IB_RATE_2_5_GBPS;
140 case 2: return IB_RATE_5_GBPS;
141 case 4: return IB_RATE_10_GBPS;
142 case 8: return IB_RATE_20_GBPS;
143 case 12: return IB_RATE_30_GBPS;
144 case 16: return IB_RATE_40_GBPS;
145 case 24: return IB_RATE_60_GBPS;
146 case 32: return IB_RATE_80_GBPS;
147 case 48: return IB_RATE_120_GBPS;
148 default: return IB_RATE_PORT_CURRENT;
149 }
150}
151EXPORT_SYMBOL(mult_to_ib_rate);
152
8385fd84 153__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate)
71eeba16
MA
154{
155 switch (rate) {
156 case IB_RATE_2_5_GBPS: return 2500;
157 case IB_RATE_5_GBPS: return 5000;
158 case IB_RATE_10_GBPS: return 10000;
159 case IB_RATE_20_GBPS: return 20000;
160 case IB_RATE_30_GBPS: return 30000;
161 case IB_RATE_40_GBPS: return 40000;
162 case IB_RATE_60_GBPS: return 60000;
163 case IB_RATE_80_GBPS: return 80000;
164 case IB_RATE_120_GBPS: return 120000;
165 case IB_RATE_14_GBPS: return 14062;
166 case IB_RATE_56_GBPS: return 56250;
167 case IB_RATE_112_GBPS: return 112500;
168 case IB_RATE_168_GBPS: return 168750;
169 case IB_RATE_25_GBPS: return 25781;
170 case IB_RATE_100_GBPS: return 103125;
171 case IB_RATE_200_GBPS: return 206250;
172 case IB_RATE_300_GBPS: return 309375;
173 default: return -1;
174 }
175}
176EXPORT_SYMBOL(ib_rate_to_mbps);
177
8385fd84 178__attribute_const__ enum rdma_transport_type
07ebafba
TT
179rdma_node_get_transport(enum rdma_node_type node_type)
180{
181 switch (node_type) {
182 case RDMA_NODE_IB_CA:
183 case RDMA_NODE_IB_SWITCH:
184 case RDMA_NODE_IB_ROUTER:
185 return RDMA_TRANSPORT_IB;
186 case RDMA_NODE_RNIC:
187 return RDMA_TRANSPORT_IWARP;
180771a3 188 case RDMA_NODE_USNIC:
5db5765e
UM
189 return RDMA_TRANSPORT_USNIC;
190 case RDMA_NODE_USNIC_UDP:
248567f7 191 return RDMA_TRANSPORT_USNIC_UDP;
07ebafba
TT
192 default:
193 BUG();
194 return 0;
195 }
196}
197EXPORT_SYMBOL(rdma_node_get_transport);
198
a3f5adaf
EC
199enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num)
200{
201 if (device->get_link_layer)
202 return device->get_link_layer(device, port_num);
203
204 switch (rdma_node_get_transport(device->node_type)) {
205 case RDMA_TRANSPORT_IB:
206 return IB_LINK_LAYER_INFINIBAND;
207 case RDMA_TRANSPORT_IWARP:
180771a3 208 case RDMA_TRANSPORT_USNIC:
248567f7 209 case RDMA_TRANSPORT_USNIC_UDP:
a3f5adaf
EC
210 return IB_LINK_LAYER_ETHERNET;
211 default:
212 return IB_LINK_LAYER_UNSPECIFIED;
213 }
214}
215EXPORT_SYMBOL(rdma_port_get_link_layer);
216
1da177e4
LT
217/* Protection domains */
218
96249d70
JG
219/**
220 * ib_alloc_pd - Allocates an unused protection domain.
221 * @device: The device on which to allocate the protection domain.
222 *
223 * A protection domain object provides an association between QPs, shared
224 * receive queues, address handles, memory regions, and memory windows.
225 *
226 * Every PD has a local_dma_lkey which can be used as the lkey value for local
227 * memory operations.
228 */
1da177e4
LT
229struct ib_pd *ib_alloc_pd(struct ib_device *device)
230{
231 struct ib_pd *pd;
232
b5e81bf5 233 pd = device->alloc_pd(device, NULL, NULL);
96249d70
JG
234 if (IS_ERR(pd))
235 return pd;
1da177e4 236
96249d70
JG
237 pd->device = device;
238 pd->uobject = NULL;
239 pd->local_mr = NULL;
240 atomic_set(&pd->usecnt, 0);
1da177e4 241
86bee4c9 242 if (device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)
96249d70
JG
243 pd->local_dma_lkey = device->local_dma_lkey;
244 else {
245 struct ib_mr *mr;
246
247 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
248 if (IS_ERR(mr)) {
249 ib_dealloc_pd(pd);
250 return (struct ib_pd *)mr;
251 }
1da177e4 252
96249d70
JG
253 pd->local_mr = mr;
254 pd->local_dma_lkey = pd->local_mr->lkey;
1da177e4 255 }
1da177e4
LT
256 return pd;
257}
258EXPORT_SYMBOL(ib_alloc_pd);
259
7dd78647
JG
260/**
261 * ib_dealloc_pd - Deallocates a protection domain.
262 * @pd: The protection domain to deallocate.
263 *
264 * It is an error to call this function while any resources in the pd still
265 * exist. The caller is responsible to synchronously destroy them and
266 * guarantee no new allocations will happen.
267 */
268void ib_dealloc_pd(struct ib_pd *pd)
1da177e4 269{
7dd78647
JG
270 int ret;
271
96249d70 272 if (pd->local_mr) {
7dd78647
JG
273 ret = ib_dereg_mr(pd->local_mr);
274 WARN_ON(ret);
96249d70
JG
275 pd->local_mr = NULL;
276 }
1da177e4 277
7dd78647
JG
278 /* uverbs manipulates usecnt with proper locking, while the kabi
279 requires the caller to guarantee we can't race here. */
280 WARN_ON(atomic_read(&pd->usecnt));
1da177e4 281
7dd78647
JG
282 /* Making delalloc_pd a void return is a WIP, no driver should return
283 an error here. */
284 ret = pd->device->dealloc_pd(pd);
285 WARN_ONCE(ret, "Infiniband HW driver failed dealloc_pd");
1da177e4
LT
286}
287EXPORT_SYMBOL(ib_dealloc_pd);
288
289/* Address handles */
290
291struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
292{
293 struct ib_ah *ah;
294
295 ah = pd->device->create_ah(pd, ah_attr);
296
297 if (!IS_ERR(ah)) {
b5e81bf5
RD
298 ah->device = pd->device;
299 ah->pd = pd;
300 ah->uobject = NULL;
1da177e4
LT
301 atomic_inc(&pd->usecnt);
302 }
303
304 return ah;
305}
306EXPORT_SYMBOL(ib_create_ah);
307
c865f246
SK
308static int ib_get_header_version(const union rdma_network_hdr *hdr)
309{
310 const struct iphdr *ip4h = (struct iphdr *)&hdr->roce4grh;
311 struct iphdr ip4h_checked;
312 const struct ipv6hdr *ip6h = (struct ipv6hdr *)&hdr->ibgrh;
313
314 /* If it's IPv6, the version must be 6, otherwise, the first
315 * 20 bytes (before the IPv4 header) are garbled.
316 */
317 if (ip6h->version != 6)
318 return (ip4h->version == 4) ? 4 : 0;
319 /* version may be 6 or 4 because the first 20 bytes could be garbled */
320
321 /* RoCE v2 requires no options, thus header length
322 * must be 5 words
323 */
324 if (ip4h->ihl != 5)
325 return 6;
326
327 /* Verify checksum.
328 * We can't write on scattered buffers so we need to copy to
329 * temp buffer.
330 */
331 memcpy(&ip4h_checked, ip4h, sizeof(ip4h_checked));
332 ip4h_checked.check = 0;
333 ip4h_checked.check = ip_fast_csum((u8 *)&ip4h_checked, 5);
334 /* if IPv4 header checksum is OK, believe it */
335 if (ip4h->check == ip4h_checked.check)
336 return 4;
337 return 6;
338}
339
340static enum rdma_network_type ib_get_net_type_by_grh(struct ib_device *device,
341 u8 port_num,
342 const struct ib_grh *grh)
343{
344 int grh_version;
345
346 if (rdma_protocol_ib(device, port_num))
347 return RDMA_NETWORK_IB;
348
349 grh_version = ib_get_header_version((union rdma_network_hdr *)grh);
350
351 if (grh_version == 4)
352 return RDMA_NETWORK_IPV4;
353
354 if (grh->next_hdr == IPPROTO_UDP)
355 return RDMA_NETWORK_IPV6;
356
357 return RDMA_NETWORK_ROCE_V1;
358}
359
dbf727de
MB
360struct find_gid_index_context {
361 u16 vlan_id;
c865f246 362 enum ib_gid_type gid_type;
dbf727de
MB
363};
364
365static bool find_gid_index(const union ib_gid *gid,
366 const struct ib_gid_attr *gid_attr,
367 void *context)
368{
369 struct find_gid_index_context *ctx =
370 (struct find_gid_index_context *)context;
371
c865f246
SK
372 if (ctx->gid_type != gid_attr->gid_type)
373 return false;
374
dbf727de
MB
375 if ((!!(ctx->vlan_id != 0xffff) == !is_vlan_dev(gid_attr->ndev)) ||
376 (is_vlan_dev(gid_attr->ndev) &&
377 vlan_dev_vlan_id(gid_attr->ndev) != ctx->vlan_id))
378 return false;
379
380 return true;
381}
382
383static int get_sgid_index_from_eth(struct ib_device *device, u8 port_num,
384 u16 vlan_id, const union ib_gid *sgid,
c865f246 385 enum ib_gid_type gid_type,
dbf727de
MB
386 u16 *gid_index)
387{
c865f246
SK
388 struct find_gid_index_context context = {.vlan_id = vlan_id,
389 .gid_type = gid_type};
dbf727de
MB
390
391 return ib_find_gid_by_filter(device, sgid, port_num, find_gid_index,
392 &context, gid_index);
393}
394
c865f246
SK
395static int get_gids_from_rdma_hdr(union rdma_network_hdr *hdr,
396 enum rdma_network_type net_type,
397 union ib_gid *sgid, union ib_gid *dgid)
398{
399 struct sockaddr_in src_in;
400 struct sockaddr_in dst_in;
401 __be32 src_saddr, dst_saddr;
402
403 if (!sgid || !dgid)
404 return -EINVAL;
405
406 if (net_type == RDMA_NETWORK_IPV4) {
407 memcpy(&src_in.sin_addr.s_addr,
408 &hdr->roce4grh.saddr, 4);
409 memcpy(&dst_in.sin_addr.s_addr,
410 &hdr->roce4grh.daddr, 4);
411 src_saddr = src_in.sin_addr.s_addr;
412 dst_saddr = dst_in.sin_addr.s_addr;
413 ipv6_addr_set_v4mapped(src_saddr,
414 (struct in6_addr *)sgid);
415 ipv6_addr_set_v4mapped(dst_saddr,
416 (struct in6_addr *)dgid);
417 return 0;
418 } else if (net_type == RDMA_NETWORK_IPV6 ||
419 net_type == RDMA_NETWORK_IB) {
420 *dgid = hdr->ibgrh.dgid;
421 *sgid = hdr->ibgrh.sgid;
422 return 0;
423 } else {
424 return -EINVAL;
425 }
426}
427
73cdaaee
IW
428int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
429 const struct ib_wc *wc, const struct ib_grh *grh,
430 struct ib_ah_attr *ah_attr)
513789ed 431{
513789ed
HR
432 u32 flow_class;
433 u16 gid_index;
434 int ret;
c865f246
SK
435 enum rdma_network_type net_type = RDMA_NETWORK_IB;
436 enum ib_gid_type gid_type = IB_GID_TYPE_IB;
c3efe750 437 int hoplimit = 0xff;
c865f246
SK
438 union ib_gid dgid;
439 union ib_gid sgid;
513789ed 440
4e00d694 441 memset(ah_attr, 0, sizeof *ah_attr);
227128fc 442 if (rdma_cap_eth_ah(device, port_num)) {
c865f246
SK
443 if (wc->wc_flags & IB_WC_WITH_NETWORK_HDR_TYPE)
444 net_type = wc->network_hdr_type;
445 else
446 net_type = ib_get_net_type_by_grh(device, port_num, grh);
447 gid_type = ib_network_to_gid_type(net_type);
448 }
449 ret = get_gids_from_rdma_hdr((union rdma_network_hdr *)grh, net_type,
450 &sgid, &dgid);
451 if (ret)
452 return ret;
453
454 if (rdma_protocol_roce(device, port_num)) {
20029832 455 int if_index = 0;
dbf727de
MB
456 u16 vlan_id = wc->wc_flags & IB_WC_WITH_VLAN ?
457 wc->vlan_id : 0xffff;
20029832
MB
458 struct net_device *idev;
459 struct net_device *resolved_dev;
dbf727de 460
dd5f03be
MB
461 if (!(wc->wc_flags & IB_WC_GRH))
462 return -EPROTOTYPE;
463
20029832
MB
464 if (!device->get_netdev)
465 return -EOPNOTSUPP;
466
467 idev = device->get_netdev(device, port_num);
468 if (!idev)
469 return -ENODEV;
470
f7f4b23e
MB
471 ret = rdma_addr_find_l2_eth_by_grh(&dgid, &sgid,
472 ah_attr->dmac,
473 wc->wc_flags & IB_WC_WITH_VLAN ?
474 NULL : &vlan_id,
c3efe750 475 &if_index, &hoplimit);
20029832
MB
476 if (ret) {
477 dev_put(idev);
478 return ret;
dd5f03be 479 }
dbf727de 480
20029832
MB
481 resolved_dev = dev_get_by_index(&init_net, if_index);
482 if (resolved_dev->flags & IFF_LOOPBACK) {
483 dev_put(resolved_dev);
484 resolved_dev = idev;
485 dev_hold(resolved_dev);
486 }
487 rcu_read_lock();
488 if (resolved_dev != idev && !rdma_is_upper_dev_rcu(idev,
489 resolved_dev))
490 ret = -EHOSTUNREACH;
491 rcu_read_unlock();
492 dev_put(idev);
493 dev_put(resolved_dev);
494 if (ret)
495 return ret;
496
dbf727de 497 ret = get_sgid_index_from_eth(device, port_num, vlan_id,
c865f246 498 &dgid, gid_type, &gid_index);
dbf727de
MB
499 if (ret)
500 return ret;
dd5f03be
MB
501 }
502
4e00d694
SH
503 ah_attr->dlid = wc->slid;
504 ah_attr->sl = wc->sl;
505 ah_attr->src_path_bits = wc->dlid_path_bits;
506 ah_attr->port_num = port_num;
513789ed
HR
507
508 if (wc->wc_flags & IB_WC_GRH) {
4e00d694 509 ah_attr->ah_flags = IB_AH_GRH;
c865f246 510 ah_attr->grh.dgid = sgid;
513789ed 511
dbf727de 512 if (!rdma_cap_eth_ah(device, port_num)) {
c865f246 513 ret = ib_find_cached_gid_by_port(device, &dgid,
b39ffa1d 514 IB_GID_TYPE_IB,
dbf727de
MB
515 port_num, NULL,
516 &gid_index);
517 if (ret)
518 return ret;
519 }
513789ed 520
4e00d694 521 ah_attr->grh.sgid_index = (u8) gid_index;
497677ab 522 flow_class = be32_to_cpu(grh->version_tclass_flow);
4e00d694 523 ah_attr->grh.flow_label = flow_class & 0xFFFFF;
c3efe750 524 ah_attr->grh.hop_limit = hoplimit;
4e00d694 525 ah_attr->grh.traffic_class = (flow_class >> 20) & 0xFF;
513789ed 526 }
4e00d694
SH
527 return 0;
528}
529EXPORT_SYMBOL(ib_init_ah_from_wc);
530
73cdaaee
IW
531struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
532 const struct ib_grh *grh, u8 port_num)
4e00d694
SH
533{
534 struct ib_ah_attr ah_attr;
535 int ret;
536
537 ret = ib_init_ah_from_wc(pd->device, port_num, wc, grh, &ah_attr);
538 if (ret)
539 return ERR_PTR(ret);
513789ed
HR
540
541 return ib_create_ah(pd, &ah_attr);
542}
543EXPORT_SYMBOL(ib_create_ah_from_wc);
544
1da177e4
LT
545int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
546{
547 return ah->device->modify_ah ?
548 ah->device->modify_ah(ah, ah_attr) :
549 -ENOSYS;
550}
551EXPORT_SYMBOL(ib_modify_ah);
552
553int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
554{
555 return ah->device->query_ah ?
556 ah->device->query_ah(ah, ah_attr) :
557 -ENOSYS;
558}
559EXPORT_SYMBOL(ib_query_ah);
560
561int ib_destroy_ah(struct ib_ah *ah)
562{
563 struct ib_pd *pd;
564 int ret;
565
566 pd = ah->pd;
567 ret = ah->device->destroy_ah(ah);
568 if (!ret)
569 atomic_dec(&pd->usecnt);
570
571 return ret;
572}
573EXPORT_SYMBOL(ib_destroy_ah);
574
d41fcc67
RD
575/* Shared receive queues */
576
577struct ib_srq *ib_create_srq(struct ib_pd *pd,
578 struct ib_srq_init_attr *srq_init_attr)
579{
580 struct ib_srq *srq;
581
582 if (!pd->device->create_srq)
583 return ERR_PTR(-ENOSYS);
584
585 srq = pd->device->create_srq(pd, srq_init_attr, NULL);
586
587 if (!IS_ERR(srq)) {
588 srq->device = pd->device;
589 srq->pd = pd;
590 srq->uobject = NULL;
591 srq->event_handler = srq_init_attr->event_handler;
592 srq->srq_context = srq_init_attr->srq_context;
96104eda 593 srq->srq_type = srq_init_attr->srq_type;
418d5130
SH
594 if (srq->srq_type == IB_SRQT_XRC) {
595 srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd;
596 srq->ext.xrc.cq = srq_init_attr->ext.xrc.cq;
597 atomic_inc(&srq->ext.xrc.xrcd->usecnt);
598 atomic_inc(&srq->ext.xrc.cq->usecnt);
599 }
d41fcc67
RD
600 atomic_inc(&pd->usecnt);
601 atomic_set(&srq->usecnt, 0);
602 }
603
604 return srq;
605}
606EXPORT_SYMBOL(ib_create_srq);
607
608int ib_modify_srq(struct ib_srq *srq,
609 struct ib_srq_attr *srq_attr,
610 enum ib_srq_attr_mask srq_attr_mask)
611{
7ce5eacb
DB
612 return srq->device->modify_srq ?
613 srq->device->modify_srq(srq, srq_attr, srq_attr_mask, NULL) :
614 -ENOSYS;
d41fcc67
RD
615}
616EXPORT_SYMBOL(ib_modify_srq);
617
618int ib_query_srq(struct ib_srq *srq,
619 struct ib_srq_attr *srq_attr)
620{
621 return srq->device->query_srq ?
622 srq->device->query_srq(srq, srq_attr) : -ENOSYS;
623}
624EXPORT_SYMBOL(ib_query_srq);
625
626int ib_destroy_srq(struct ib_srq *srq)
627{
628 struct ib_pd *pd;
418d5130
SH
629 enum ib_srq_type srq_type;
630 struct ib_xrcd *uninitialized_var(xrcd);
631 struct ib_cq *uninitialized_var(cq);
d41fcc67
RD
632 int ret;
633
634 if (atomic_read(&srq->usecnt))
635 return -EBUSY;
636
637 pd = srq->pd;
418d5130
SH
638 srq_type = srq->srq_type;
639 if (srq_type == IB_SRQT_XRC) {
640 xrcd = srq->ext.xrc.xrcd;
641 cq = srq->ext.xrc.cq;
642 }
d41fcc67
RD
643
644 ret = srq->device->destroy_srq(srq);
418d5130 645 if (!ret) {
d41fcc67 646 atomic_dec(&pd->usecnt);
418d5130
SH
647 if (srq_type == IB_SRQT_XRC) {
648 atomic_dec(&xrcd->usecnt);
649 atomic_dec(&cq->usecnt);
650 }
651 }
d41fcc67
RD
652
653 return ret;
654}
655EXPORT_SYMBOL(ib_destroy_srq);
656
1da177e4
LT
657/* Queue pairs */
658
0e0ec7e0
SH
659static void __ib_shared_qp_event_handler(struct ib_event *event, void *context)
660{
661 struct ib_qp *qp = context;
73c40c61 662 unsigned long flags;
0e0ec7e0 663
73c40c61 664 spin_lock_irqsave(&qp->device->event_handler_lock, flags);
0e0ec7e0 665 list_for_each_entry(event->element.qp, &qp->open_list, open_list)
eec9e29f
SP
666 if (event->element.qp->event_handler)
667 event->element.qp->event_handler(event, event->element.qp->qp_context);
73c40c61 668 spin_unlock_irqrestore(&qp->device->event_handler_lock, flags);
0e0ec7e0
SH
669}
670
d3d72d90
SH
671static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp)
672{
673 mutex_lock(&xrcd->tgt_qp_mutex);
674 list_add(&qp->xrcd_list, &xrcd->tgt_qp_list);
675 mutex_unlock(&xrcd->tgt_qp_mutex);
676}
677
0e0ec7e0
SH
678static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp,
679 void (*event_handler)(struct ib_event *, void *),
680 void *qp_context)
d3d72d90 681{
0e0ec7e0
SH
682 struct ib_qp *qp;
683 unsigned long flags;
684
685 qp = kzalloc(sizeof *qp, GFP_KERNEL);
686 if (!qp)
687 return ERR_PTR(-ENOMEM);
688
689 qp->real_qp = real_qp;
690 atomic_inc(&real_qp->usecnt);
691 qp->device = real_qp->device;
692 qp->event_handler = event_handler;
693 qp->qp_context = qp_context;
694 qp->qp_num = real_qp->qp_num;
695 qp->qp_type = real_qp->qp_type;
696
697 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
698 list_add(&qp->open_list, &real_qp->open_list);
699 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
700
701 return qp;
702}
703
704struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
705 struct ib_qp_open_attr *qp_open_attr)
706{
707 struct ib_qp *qp, *real_qp;
708
709 if (qp_open_attr->qp_type != IB_QPT_XRC_TGT)
710 return ERR_PTR(-EINVAL);
711
712 qp = ERR_PTR(-EINVAL);
d3d72d90 713 mutex_lock(&xrcd->tgt_qp_mutex);
0e0ec7e0
SH
714 list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) {
715 if (real_qp->qp_num == qp_open_attr->qp_num) {
716 qp = __ib_open_qp(real_qp, qp_open_attr->event_handler,
717 qp_open_attr->qp_context);
718 break;
719 }
720 }
d3d72d90 721 mutex_unlock(&xrcd->tgt_qp_mutex);
0e0ec7e0 722 return qp;
d3d72d90 723}
0e0ec7e0 724EXPORT_SYMBOL(ib_open_qp);
d3d72d90 725
04c41bf3
CH
726static struct ib_qp *ib_create_xrc_qp(struct ib_qp *qp,
727 struct ib_qp_init_attr *qp_init_attr)
728{
729 struct ib_qp *real_qp = qp;
730
731 qp->event_handler = __ib_shared_qp_event_handler;
732 qp->qp_context = qp;
733 qp->pd = NULL;
734 qp->send_cq = qp->recv_cq = NULL;
735 qp->srq = NULL;
736 qp->xrcd = qp_init_attr->xrcd;
737 atomic_inc(&qp_init_attr->xrcd->usecnt);
738 INIT_LIST_HEAD(&qp->open_list);
739
740 qp = __ib_open_qp(real_qp, qp_init_attr->event_handler,
741 qp_init_attr->qp_context);
742 if (!IS_ERR(qp))
743 __ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp);
744 else
745 real_qp->device->destroy_qp(real_qp);
746 return qp;
747}
748
1da177e4
LT
749struct ib_qp *ib_create_qp(struct ib_pd *pd,
750 struct ib_qp_init_attr *qp_init_attr)
751{
04c41bf3
CH
752 struct ib_device *device = pd ? pd->device : qp_init_attr->xrcd->device;
753 struct ib_qp *qp;
1da177e4 754
b42b63cf 755 qp = device->create_qp(pd, qp_init_attr, NULL);
04c41bf3
CH
756 if (IS_ERR(qp))
757 return qp;
758
759 qp->device = device;
760 qp->real_qp = qp;
761 qp->uobject = NULL;
762 qp->qp_type = qp_init_attr->qp_type;
763
764 atomic_set(&qp->usecnt, 0);
fffb0383
CH
765 qp->mrs_used = 0;
766 spin_lock_init(&qp->mr_lock);
767
04c41bf3
CH
768 if (qp_init_attr->qp_type == IB_QPT_XRC_TGT)
769 return ib_create_xrc_qp(qp, qp_init_attr);
770
771 qp->event_handler = qp_init_attr->event_handler;
772 qp->qp_context = qp_init_attr->qp_context;
773 if (qp_init_attr->qp_type == IB_QPT_XRC_INI) {
774 qp->recv_cq = NULL;
775 qp->srq = NULL;
776 } else {
777 qp->recv_cq = qp_init_attr->recv_cq;
778 atomic_inc(&qp_init_attr->recv_cq->usecnt);
779 qp->srq = qp_init_attr->srq;
780 if (qp->srq)
781 atomic_inc(&qp_init_attr->srq->usecnt);
1da177e4
LT
782 }
783
04c41bf3
CH
784 qp->pd = pd;
785 qp->send_cq = qp_init_attr->send_cq;
786 qp->xrcd = NULL;
787
788 atomic_inc(&pd->usecnt);
789 atomic_inc(&qp_init_attr->send_cq->usecnt);
1da177e4
LT
790 return qp;
791}
792EXPORT_SYMBOL(ib_create_qp);
793
8a51866f
RD
794static const struct {
795 int valid;
b42b63cf
SH
796 enum ib_qp_attr_mask req_param[IB_QPT_MAX];
797 enum ib_qp_attr_mask opt_param[IB_QPT_MAX];
8a51866f
RD
798} qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
799 [IB_QPS_RESET] = {
800 [IB_QPS_RESET] = { .valid = 1 },
8a51866f
RD
801 [IB_QPS_INIT] = {
802 .valid = 1,
803 .req_param = {
804 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
805 IB_QP_PORT |
806 IB_QP_QKEY),
c938a616 807 [IB_QPT_RAW_PACKET] = IB_QP_PORT,
8a51866f
RD
808 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
809 IB_QP_PORT |
810 IB_QP_ACCESS_FLAGS),
811 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
812 IB_QP_PORT |
813 IB_QP_ACCESS_FLAGS),
b42b63cf
SH
814 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
815 IB_QP_PORT |
816 IB_QP_ACCESS_FLAGS),
817 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
818 IB_QP_PORT |
819 IB_QP_ACCESS_FLAGS),
8a51866f
RD
820 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
821 IB_QP_QKEY),
822 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
823 IB_QP_QKEY),
824 }
825 },
826 },
827 [IB_QPS_INIT] = {
828 [IB_QPS_RESET] = { .valid = 1 },
829 [IB_QPS_ERR] = { .valid = 1 },
830 [IB_QPS_INIT] = {
831 .valid = 1,
832 .opt_param = {
833 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
834 IB_QP_PORT |
835 IB_QP_QKEY),
836 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
837 IB_QP_PORT |
838 IB_QP_ACCESS_FLAGS),
839 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
840 IB_QP_PORT |
841 IB_QP_ACCESS_FLAGS),
b42b63cf
SH
842 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
843 IB_QP_PORT |
844 IB_QP_ACCESS_FLAGS),
845 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
846 IB_QP_PORT |
847 IB_QP_ACCESS_FLAGS),
8a51866f
RD
848 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
849 IB_QP_QKEY),
850 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
851 IB_QP_QKEY),
852 }
853 },
854 [IB_QPS_RTR] = {
855 .valid = 1,
856 .req_param = {
857 [IB_QPT_UC] = (IB_QP_AV |
858 IB_QP_PATH_MTU |
859 IB_QP_DEST_QPN |
860 IB_QP_RQ_PSN),
861 [IB_QPT_RC] = (IB_QP_AV |
862 IB_QP_PATH_MTU |
863 IB_QP_DEST_QPN |
864 IB_QP_RQ_PSN |
865 IB_QP_MAX_DEST_RD_ATOMIC |
866 IB_QP_MIN_RNR_TIMER),
b42b63cf
SH
867 [IB_QPT_XRC_INI] = (IB_QP_AV |
868 IB_QP_PATH_MTU |
869 IB_QP_DEST_QPN |
870 IB_QP_RQ_PSN),
871 [IB_QPT_XRC_TGT] = (IB_QP_AV |
872 IB_QP_PATH_MTU |
873 IB_QP_DEST_QPN |
874 IB_QP_RQ_PSN |
875 IB_QP_MAX_DEST_RD_ATOMIC |
876 IB_QP_MIN_RNR_TIMER),
8a51866f
RD
877 },
878 .opt_param = {
879 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
880 IB_QP_QKEY),
881 [IB_QPT_UC] = (IB_QP_ALT_PATH |
882 IB_QP_ACCESS_FLAGS |
883 IB_QP_PKEY_INDEX),
884 [IB_QPT_RC] = (IB_QP_ALT_PATH |
885 IB_QP_ACCESS_FLAGS |
886 IB_QP_PKEY_INDEX),
b42b63cf
SH
887 [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH |
888 IB_QP_ACCESS_FLAGS |
889 IB_QP_PKEY_INDEX),
890 [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH |
891 IB_QP_ACCESS_FLAGS |
892 IB_QP_PKEY_INDEX),
8a51866f
RD
893 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
894 IB_QP_QKEY),
895 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
896 IB_QP_QKEY),
dd5f03be 897 },
dbf727de 898 },
8a51866f
RD
899 },
900 [IB_QPS_RTR] = {
901 [IB_QPS_RESET] = { .valid = 1 },
902 [IB_QPS_ERR] = { .valid = 1 },
903 [IB_QPS_RTS] = {
904 .valid = 1,
905 .req_param = {
906 [IB_QPT_UD] = IB_QP_SQ_PSN,
907 [IB_QPT_UC] = IB_QP_SQ_PSN,
908 [IB_QPT_RC] = (IB_QP_TIMEOUT |
909 IB_QP_RETRY_CNT |
910 IB_QP_RNR_RETRY |
911 IB_QP_SQ_PSN |
912 IB_QP_MAX_QP_RD_ATOMIC),
b42b63cf
SH
913 [IB_QPT_XRC_INI] = (IB_QP_TIMEOUT |
914 IB_QP_RETRY_CNT |
915 IB_QP_RNR_RETRY |
916 IB_QP_SQ_PSN |
917 IB_QP_MAX_QP_RD_ATOMIC),
918 [IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT |
919 IB_QP_SQ_PSN),
8a51866f
RD
920 [IB_QPT_SMI] = IB_QP_SQ_PSN,
921 [IB_QPT_GSI] = IB_QP_SQ_PSN,
922 },
923 .opt_param = {
924 [IB_QPT_UD] = (IB_QP_CUR_STATE |
925 IB_QP_QKEY),
926 [IB_QPT_UC] = (IB_QP_CUR_STATE |
927 IB_QP_ALT_PATH |
928 IB_QP_ACCESS_FLAGS |
929 IB_QP_PATH_MIG_STATE),
930 [IB_QPT_RC] = (IB_QP_CUR_STATE |
931 IB_QP_ALT_PATH |
932 IB_QP_ACCESS_FLAGS |
933 IB_QP_MIN_RNR_TIMER |
934 IB_QP_PATH_MIG_STATE),
b42b63cf
SH
935 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
936 IB_QP_ALT_PATH |
937 IB_QP_ACCESS_FLAGS |
938 IB_QP_PATH_MIG_STATE),
939 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
940 IB_QP_ALT_PATH |
941 IB_QP_ACCESS_FLAGS |
942 IB_QP_MIN_RNR_TIMER |
943 IB_QP_PATH_MIG_STATE),
8a51866f
RD
944 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
945 IB_QP_QKEY),
946 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
947 IB_QP_QKEY),
948 }
949 }
950 },
951 [IB_QPS_RTS] = {
952 [IB_QPS_RESET] = { .valid = 1 },
953 [IB_QPS_ERR] = { .valid = 1 },
954 [IB_QPS_RTS] = {
955 .valid = 1,
956 .opt_param = {
957 [IB_QPT_UD] = (IB_QP_CUR_STATE |
958 IB_QP_QKEY),
4546d31d
DB
959 [IB_QPT_UC] = (IB_QP_CUR_STATE |
960 IB_QP_ACCESS_FLAGS |
8a51866f
RD
961 IB_QP_ALT_PATH |
962 IB_QP_PATH_MIG_STATE),
4546d31d
DB
963 [IB_QPT_RC] = (IB_QP_CUR_STATE |
964 IB_QP_ACCESS_FLAGS |
8a51866f
RD
965 IB_QP_ALT_PATH |
966 IB_QP_PATH_MIG_STATE |
967 IB_QP_MIN_RNR_TIMER),
b42b63cf
SH
968 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
969 IB_QP_ACCESS_FLAGS |
970 IB_QP_ALT_PATH |
971 IB_QP_PATH_MIG_STATE),
972 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
973 IB_QP_ACCESS_FLAGS |
974 IB_QP_ALT_PATH |
975 IB_QP_PATH_MIG_STATE |
976 IB_QP_MIN_RNR_TIMER),
8a51866f
RD
977 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
978 IB_QP_QKEY),
979 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
980 IB_QP_QKEY),
981 }
982 },
983 [IB_QPS_SQD] = {
984 .valid = 1,
985 .opt_param = {
986 [IB_QPT_UD] = IB_QP_EN_SQD_ASYNC_NOTIFY,
987 [IB_QPT_UC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
988 [IB_QPT_RC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
b42b63cf
SH
989 [IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
990 [IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */
8a51866f
RD
991 [IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
992 [IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY
993 }
994 },
995 },
996 [IB_QPS_SQD] = {
997 [IB_QPS_RESET] = { .valid = 1 },
998 [IB_QPS_ERR] = { .valid = 1 },
999 [IB_QPS_RTS] = {
1000 .valid = 1,
1001 .opt_param = {
1002 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1003 IB_QP_QKEY),
1004 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1005 IB_QP_ALT_PATH |
1006 IB_QP_ACCESS_FLAGS |
1007 IB_QP_PATH_MIG_STATE),
1008 [IB_QPT_RC] = (IB_QP_CUR_STATE |
1009 IB_QP_ALT_PATH |
1010 IB_QP_ACCESS_FLAGS |
1011 IB_QP_MIN_RNR_TIMER |
1012 IB_QP_PATH_MIG_STATE),
b42b63cf
SH
1013 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
1014 IB_QP_ALT_PATH |
1015 IB_QP_ACCESS_FLAGS |
1016 IB_QP_PATH_MIG_STATE),
1017 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
1018 IB_QP_ALT_PATH |
1019 IB_QP_ACCESS_FLAGS |
1020 IB_QP_MIN_RNR_TIMER |
1021 IB_QP_PATH_MIG_STATE),
8a51866f
RD
1022 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1023 IB_QP_QKEY),
1024 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1025 IB_QP_QKEY),
1026 }
1027 },
1028 [IB_QPS_SQD] = {
1029 .valid = 1,
1030 .opt_param = {
1031 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
1032 IB_QP_QKEY),
1033 [IB_QPT_UC] = (IB_QP_AV |
8a51866f
RD
1034 IB_QP_ALT_PATH |
1035 IB_QP_ACCESS_FLAGS |
1036 IB_QP_PKEY_INDEX |
1037 IB_QP_PATH_MIG_STATE),
1038 [IB_QPT_RC] = (IB_QP_PORT |
1039 IB_QP_AV |
1040 IB_QP_TIMEOUT |
1041 IB_QP_RETRY_CNT |
1042 IB_QP_RNR_RETRY |
1043 IB_QP_MAX_QP_RD_ATOMIC |
1044 IB_QP_MAX_DEST_RD_ATOMIC |
8a51866f
RD
1045 IB_QP_ALT_PATH |
1046 IB_QP_ACCESS_FLAGS |
1047 IB_QP_PKEY_INDEX |
1048 IB_QP_MIN_RNR_TIMER |
1049 IB_QP_PATH_MIG_STATE),
b42b63cf
SH
1050 [IB_QPT_XRC_INI] = (IB_QP_PORT |
1051 IB_QP_AV |
1052 IB_QP_TIMEOUT |
1053 IB_QP_RETRY_CNT |
1054 IB_QP_RNR_RETRY |
1055 IB_QP_MAX_QP_RD_ATOMIC |
1056 IB_QP_ALT_PATH |
1057 IB_QP_ACCESS_FLAGS |
1058 IB_QP_PKEY_INDEX |
1059 IB_QP_PATH_MIG_STATE),
1060 [IB_QPT_XRC_TGT] = (IB_QP_PORT |
1061 IB_QP_AV |
1062 IB_QP_TIMEOUT |
1063 IB_QP_MAX_DEST_RD_ATOMIC |
1064 IB_QP_ALT_PATH |
1065 IB_QP_ACCESS_FLAGS |
1066 IB_QP_PKEY_INDEX |
1067 IB_QP_MIN_RNR_TIMER |
1068 IB_QP_PATH_MIG_STATE),
8a51866f
RD
1069 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
1070 IB_QP_QKEY),
1071 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
1072 IB_QP_QKEY),
1073 }
1074 }
1075 },
1076 [IB_QPS_SQE] = {
1077 [IB_QPS_RESET] = { .valid = 1 },
1078 [IB_QPS_ERR] = { .valid = 1 },
1079 [IB_QPS_RTS] = {
1080 .valid = 1,
1081 .opt_param = {
1082 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1083 IB_QP_QKEY),
1084 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1085 IB_QP_ACCESS_FLAGS),
1086 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1087 IB_QP_QKEY),
1088 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1089 IB_QP_QKEY),
1090 }
1091 }
1092 },
1093 [IB_QPS_ERR] = {
1094 [IB_QPS_RESET] = { .valid = 1 },
1095 [IB_QPS_ERR] = { .valid = 1 }
1096 }
1097};
1098
1099int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
dd5f03be
MB
1100 enum ib_qp_type type, enum ib_qp_attr_mask mask,
1101 enum rdma_link_layer ll)
8a51866f
RD
1102{
1103 enum ib_qp_attr_mask req_param, opt_param;
1104
1105 if (cur_state < 0 || cur_state > IB_QPS_ERR ||
1106 next_state < 0 || next_state > IB_QPS_ERR)
1107 return 0;
1108
1109 if (mask & IB_QP_CUR_STATE &&
1110 cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
1111 cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE)
1112 return 0;
1113
1114 if (!qp_state_table[cur_state][next_state].valid)
1115 return 0;
1116
1117 req_param = qp_state_table[cur_state][next_state].req_param[type];
1118 opt_param = qp_state_table[cur_state][next_state].opt_param[type];
1119
1120 if ((mask & req_param) != req_param)
1121 return 0;
1122
1123 if (mask & ~(req_param | opt_param | IB_QP_STATE))
1124 return 0;
1125
1126 return 1;
1127}
1128EXPORT_SYMBOL(ib_modify_qp_is_ok);
1129
dbf727de
MB
1130int ib_resolve_eth_dmac(struct ib_qp *qp,
1131 struct ib_qp_attr *qp_attr, int *qp_attr_mask)
ed4c54e5
OG
1132{
1133 int ret = 0;
ed4c54e5 1134
dbf727de
MB
1135 if (*qp_attr_mask & IB_QP_AV) {
1136 if (qp_attr->ah_attr.port_num < rdma_start_port(qp->device) ||
1137 qp_attr->ah_attr.port_num > rdma_end_port(qp->device))
1138 return -EINVAL;
1139
1140 if (!rdma_cap_eth_ah(qp->device, qp_attr->ah_attr.port_num))
1141 return 0;
1142
ed4c54e5 1143 if (rdma_link_local_addr((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw)) {
dbf727de
MB
1144 rdma_get_ll_mac((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw,
1145 qp_attr->ah_attr.dmac);
ed4c54e5 1146 } else {
dbf727de
MB
1147 union ib_gid sgid;
1148 struct ib_gid_attr sgid_attr;
1149 int ifindex;
c3efe750 1150 int hop_limit;
dbf727de
MB
1151
1152 ret = ib_query_gid(qp->device,
1153 qp_attr->ah_attr.port_num,
1154 qp_attr->ah_attr.grh.sgid_index,
1155 &sgid, &sgid_attr);
1156
1157 if (ret || !sgid_attr.ndev) {
1158 if (!ret)
1159 ret = -ENXIO;
ed4c54e5 1160 goto out;
dbf727de
MB
1161 }
1162
1163 ifindex = sgid_attr.ndev->ifindex;
1164
f7f4b23e
MB
1165 ret = rdma_addr_find_l2_eth_by_grh(&sgid,
1166 &qp_attr->ah_attr.grh.dgid,
1167 qp_attr->ah_attr.dmac,
c3efe750 1168 NULL, &ifindex, &hop_limit);
dbf727de
MB
1169
1170 dev_put(sgid_attr.ndev);
c3efe750
MB
1171
1172 qp_attr->ah_attr.grh.hop_limit = hop_limit;
ed4c54e5 1173 }
ed4c54e5
OG
1174 }
1175out:
1176 return ret;
1177}
dbf727de 1178EXPORT_SYMBOL(ib_resolve_eth_dmac);
ed4c54e5
OG
1179
1180
1da177e4
LT
1181int ib_modify_qp(struct ib_qp *qp,
1182 struct ib_qp_attr *qp_attr,
1183 int qp_attr_mask)
1184{
ed4c54e5
OG
1185 int ret;
1186
dbf727de 1187 ret = ib_resolve_eth_dmac(qp, qp_attr, &qp_attr_mask);
ed4c54e5
OG
1188 if (ret)
1189 return ret;
1190
0e0ec7e0 1191 return qp->device->modify_qp(qp->real_qp, qp_attr, qp_attr_mask, NULL);
1da177e4
LT
1192}
1193EXPORT_SYMBOL(ib_modify_qp);
1194
1195int ib_query_qp(struct ib_qp *qp,
1196 struct ib_qp_attr *qp_attr,
1197 int qp_attr_mask,
1198 struct ib_qp_init_attr *qp_init_attr)
1199{
1200 return qp->device->query_qp ?
0e0ec7e0 1201 qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) :
1da177e4
LT
1202 -ENOSYS;
1203}
1204EXPORT_SYMBOL(ib_query_qp);
1205
0e0ec7e0
SH
1206int ib_close_qp(struct ib_qp *qp)
1207{
1208 struct ib_qp *real_qp;
1209 unsigned long flags;
1210
1211 real_qp = qp->real_qp;
1212 if (real_qp == qp)
1213 return -EINVAL;
1214
1215 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
1216 list_del(&qp->open_list);
1217 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
1218
1219 atomic_dec(&real_qp->usecnt);
1220 kfree(qp);
1221
1222 return 0;
1223}
1224EXPORT_SYMBOL(ib_close_qp);
1225
1226static int __ib_destroy_shared_qp(struct ib_qp *qp)
1227{
1228 struct ib_xrcd *xrcd;
1229 struct ib_qp *real_qp;
1230 int ret;
1231
1232 real_qp = qp->real_qp;
1233 xrcd = real_qp->xrcd;
1234
1235 mutex_lock(&xrcd->tgt_qp_mutex);
1236 ib_close_qp(qp);
1237 if (atomic_read(&real_qp->usecnt) == 0)
1238 list_del(&real_qp->xrcd_list);
1239 else
1240 real_qp = NULL;
1241 mutex_unlock(&xrcd->tgt_qp_mutex);
1242
1243 if (real_qp) {
1244 ret = ib_destroy_qp(real_qp);
1245 if (!ret)
1246 atomic_dec(&xrcd->usecnt);
1247 else
1248 __ib_insert_xrcd_qp(xrcd, real_qp);
1249 }
1250
1251 return 0;
1252}
1253
1da177e4
LT
1254int ib_destroy_qp(struct ib_qp *qp)
1255{
1256 struct ib_pd *pd;
1257 struct ib_cq *scq, *rcq;
1258 struct ib_srq *srq;
1259 int ret;
1260
fffb0383
CH
1261 WARN_ON_ONCE(qp->mrs_used > 0);
1262
0e0ec7e0
SH
1263 if (atomic_read(&qp->usecnt))
1264 return -EBUSY;
1265
1266 if (qp->real_qp != qp)
1267 return __ib_destroy_shared_qp(qp);
1268
b42b63cf
SH
1269 pd = qp->pd;
1270 scq = qp->send_cq;
1271 rcq = qp->recv_cq;
1272 srq = qp->srq;
1da177e4
LT
1273
1274 ret = qp->device->destroy_qp(qp);
1275 if (!ret) {
b42b63cf
SH
1276 if (pd)
1277 atomic_dec(&pd->usecnt);
1278 if (scq)
1279 atomic_dec(&scq->usecnt);
1280 if (rcq)
1281 atomic_dec(&rcq->usecnt);
1da177e4
LT
1282 if (srq)
1283 atomic_dec(&srq->usecnt);
1284 }
1285
1286 return ret;
1287}
1288EXPORT_SYMBOL(ib_destroy_qp);
1289
1290/* Completion queues */
1291
1292struct ib_cq *ib_create_cq(struct ib_device *device,
1293 ib_comp_handler comp_handler,
1294 void (*event_handler)(struct ib_event *, void *),
8e37210b
MB
1295 void *cq_context,
1296 const struct ib_cq_init_attr *cq_attr)
1da177e4
LT
1297{
1298 struct ib_cq *cq;
1299
8e37210b 1300 cq = device->create_cq(device, cq_attr, NULL, NULL);
1da177e4
LT
1301
1302 if (!IS_ERR(cq)) {
1303 cq->device = device;
b5e81bf5 1304 cq->uobject = NULL;
1da177e4
LT
1305 cq->comp_handler = comp_handler;
1306 cq->event_handler = event_handler;
1307 cq->cq_context = cq_context;
1308 atomic_set(&cq->usecnt, 0);
1309 }
1310
1311 return cq;
1312}
1313EXPORT_SYMBOL(ib_create_cq);
1314
2dd57162
EC
1315int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period)
1316{
1317 return cq->device->modify_cq ?
1318 cq->device->modify_cq(cq, cq_count, cq_period) : -ENOSYS;
1319}
1320EXPORT_SYMBOL(ib_modify_cq);
1321
1da177e4
LT
1322int ib_destroy_cq(struct ib_cq *cq)
1323{
1324 if (atomic_read(&cq->usecnt))
1325 return -EBUSY;
1326
1327 return cq->device->destroy_cq(cq);
1328}
1329EXPORT_SYMBOL(ib_destroy_cq);
1330
a74cd4af 1331int ib_resize_cq(struct ib_cq *cq, int cqe)
1da177e4 1332{
40de2e54 1333 return cq->device->resize_cq ?
33b9b3ee 1334 cq->device->resize_cq(cq, cqe, NULL) : -ENOSYS;
1da177e4
LT
1335}
1336EXPORT_SYMBOL(ib_resize_cq);
1337
1338/* Memory regions */
1339
1340struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
1341{
1342 struct ib_mr *mr;
1c636f80
EC
1343 int err;
1344
1345 err = ib_check_mr_access(mr_access_flags);
1346 if (err)
1347 return ERR_PTR(err);
1da177e4
LT
1348
1349 mr = pd->device->get_dma_mr(pd, mr_access_flags);
1350
1351 if (!IS_ERR(mr)) {
b5e81bf5
RD
1352 mr->device = pd->device;
1353 mr->pd = pd;
1354 mr->uobject = NULL;
1da177e4 1355 atomic_inc(&pd->usecnt);
d4a85c30 1356 mr->need_inval = false;
1da177e4
LT
1357 }
1358
1359 return mr;
1360}
1361EXPORT_SYMBOL(ib_get_dma_mr);
1362
1da177e4
LT
1363int ib_dereg_mr(struct ib_mr *mr)
1364{
ab67ed8d 1365 struct ib_pd *pd = mr->pd;
1da177e4
LT
1366 int ret;
1367
1da177e4
LT
1368 ret = mr->device->dereg_mr(mr);
1369 if (!ret)
1370 atomic_dec(&pd->usecnt);
1371
1372 return ret;
1373}
1374EXPORT_SYMBOL(ib_dereg_mr);
1375
9bee178b
SG
1376/**
1377 * ib_alloc_mr() - Allocates a memory region
1378 * @pd: protection domain associated with the region
1379 * @mr_type: memory region type
1380 * @max_num_sg: maximum sg entries available for registration.
1381 *
1382 * Notes:
1383 * Memory registeration page/sg lists must not exceed max_num_sg.
1384 * For mr_type IB_MR_TYPE_MEM_REG, the total length cannot exceed
1385 * max_num_sg * used_page_size.
1386 *
1387 */
1388struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
1389 enum ib_mr_type mr_type,
1390 u32 max_num_sg)
00f7ec36
SW
1391{
1392 struct ib_mr *mr;
1393
d9f272c5 1394 if (!pd->device->alloc_mr)
00f7ec36
SW
1395 return ERR_PTR(-ENOSYS);
1396
d9f272c5 1397 mr = pd->device->alloc_mr(pd, mr_type, max_num_sg);
00f7ec36
SW
1398 if (!IS_ERR(mr)) {
1399 mr->device = pd->device;
1400 mr->pd = pd;
1401 mr->uobject = NULL;
1402 atomic_inc(&pd->usecnt);
d4a85c30 1403 mr->need_inval = false;
00f7ec36
SW
1404 }
1405
1406 return mr;
1407}
d9f272c5 1408EXPORT_SYMBOL(ib_alloc_mr);
00f7ec36 1409
1da177e4
LT
1410/* "Fast" memory regions */
1411
1412struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
1413 int mr_access_flags,
1414 struct ib_fmr_attr *fmr_attr)
1415{
1416 struct ib_fmr *fmr;
1417
1418 if (!pd->device->alloc_fmr)
1419 return ERR_PTR(-ENOSYS);
1420
1421 fmr = pd->device->alloc_fmr(pd, mr_access_flags, fmr_attr);
1422 if (!IS_ERR(fmr)) {
1423 fmr->device = pd->device;
1424 fmr->pd = pd;
1425 atomic_inc(&pd->usecnt);
1426 }
1427
1428 return fmr;
1429}
1430EXPORT_SYMBOL(ib_alloc_fmr);
1431
1432int ib_unmap_fmr(struct list_head *fmr_list)
1433{
1434 struct ib_fmr *fmr;
1435
1436 if (list_empty(fmr_list))
1437 return 0;
1438
1439 fmr = list_entry(fmr_list->next, struct ib_fmr, list);
1440 return fmr->device->unmap_fmr(fmr_list);
1441}
1442EXPORT_SYMBOL(ib_unmap_fmr);
1443
1444int ib_dealloc_fmr(struct ib_fmr *fmr)
1445{
1446 struct ib_pd *pd;
1447 int ret;
1448
1449 pd = fmr->pd;
1450 ret = fmr->device->dealloc_fmr(fmr);
1451 if (!ret)
1452 atomic_dec(&pd->usecnt);
1453
1454 return ret;
1455}
1456EXPORT_SYMBOL(ib_dealloc_fmr);
1457
1458/* Multicast groups */
1459
1460int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1461{
c3bccbfb
OG
1462 int ret;
1463
0c33aeed
JM
1464 if (!qp->device->attach_mcast)
1465 return -ENOSYS;
1466 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1467 return -EINVAL;
1468
c3bccbfb
OG
1469 ret = qp->device->attach_mcast(qp, gid, lid);
1470 if (!ret)
1471 atomic_inc(&qp->usecnt);
1472 return ret;
1da177e4
LT
1473}
1474EXPORT_SYMBOL(ib_attach_mcast);
1475
1476int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1477{
c3bccbfb
OG
1478 int ret;
1479
0c33aeed
JM
1480 if (!qp->device->detach_mcast)
1481 return -ENOSYS;
1482 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1483 return -EINVAL;
1484
c3bccbfb
OG
1485 ret = qp->device->detach_mcast(qp, gid, lid);
1486 if (!ret)
1487 atomic_dec(&qp->usecnt);
1488 return ret;
1da177e4
LT
1489}
1490EXPORT_SYMBOL(ib_detach_mcast);
59991f94
SH
1491
1492struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device)
1493{
1494 struct ib_xrcd *xrcd;
1495
1496 if (!device->alloc_xrcd)
1497 return ERR_PTR(-ENOSYS);
1498
1499 xrcd = device->alloc_xrcd(device, NULL, NULL);
1500 if (!IS_ERR(xrcd)) {
1501 xrcd->device = device;
53d0bd1e 1502 xrcd->inode = NULL;
59991f94 1503 atomic_set(&xrcd->usecnt, 0);
d3d72d90
SH
1504 mutex_init(&xrcd->tgt_qp_mutex);
1505 INIT_LIST_HEAD(&xrcd->tgt_qp_list);
59991f94
SH
1506 }
1507
1508 return xrcd;
1509}
1510EXPORT_SYMBOL(ib_alloc_xrcd);
1511
1512int ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1513{
d3d72d90
SH
1514 struct ib_qp *qp;
1515 int ret;
1516
59991f94
SH
1517 if (atomic_read(&xrcd->usecnt))
1518 return -EBUSY;
1519
d3d72d90
SH
1520 while (!list_empty(&xrcd->tgt_qp_list)) {
1521 qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list);
1522 ret = ib_destroy_qp(qp);
1523 if (ret)
1524 return ret;
1525 }
1526
59991f94
SH
1527 return xrcd->device->dealloc_xrcd(xrcd);
1528}
1529EXPORT_SYMBOL(ib_dealloc_xrcd);
319a441d
HHZ
1530
1531struct ib_flow *ib_create_flow(struct ib_qp *qp,
1532 struct ib_flow_attr *flow_attr,
1533 int domain)
1534{
1535 struct ib_flow *flow_id;
1536 if (!qp->device->create_flow)
1537 return ERR_PTR(-ENOSYS);
1538
1539 flow_id = qp->device->create_flow(qp, flow_attr, domain);
1540 if (!IS_ERR(flow_id))
1541 atomic_inc(&qp->usecnt);
1542 return flow_id;
1543}
1544EXPORT_SYMBOL(ib_create_flow);
1545
1546int ib_destroy_flow(struct ib_flow *flow_id)
1547{
1548 int err;
1549 struct ib_qp *qp = flow_id->qp;
1550
1551 err = qp->device->destroy_flow(flow_id);
1552 if (!err)
1553 atomic_dec(&qp->usecnt);
1554 return err;
1555}
1556EXPORT_SYMBOL(ib_destroy_flow);
1b01d335
SG
1557
1558int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
1559 struct ib_mr_status *mr_status)
1560{
1561 return mr->device->check_mr_status ?
1562 mr->device->check_mr_status(mr, check_mask, mr_status) : -ENOSYS;
1563}
1564EXPORT_SYMBOL(ib_check_mr_status);
4c67e2bf 1565
50174a7f
EC
1566int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port,
1567 int state)
1568{
1569 if (!device->set_vf_link_state)
1570 return -ENOSYS;
1571
1572 return device->set_vf_link_state(device, vf, port, state);
1573}
1574EXPORT_SYMBOL(ib_set_vf_link_state);
1575
1576int ib_get_vf_config(struct ib_device *device, int vf, u8 port,
1577 struct ifla_vf_info *info)
1578{
1579 if (!device->get_vf_config)
1580 return -ENOSYS;
1581
1582 return device->get_vf_config(device, vf, port, info);
1583}
1584EXPORT_SYMBOL(ib_get_vf_config);
1585
1586int ib_get_vf_stats(struct ib_device *device, int vf, u8 port,
1587 struct ifla_vf_stats *stats)
1588{
1589 if (!device->get_vf_stats)
1590 return -ENOSYS;
1591
1592 return device->get_vf_stats(device, vf, port, stats);
1593}
1594EXPORT_SYMBOL(ib_get_vf_stats);
1595
1596int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid,
1597 int type)
1598{
1599 if (!device->set_vf_guid)
1600 return -ENOSYS;
1601
1602 return device->set_vf_guid(device, vf, port, guid, type);
1603}
1604EXPORT_SYMBOL(ib_set_vf_guid);
1605
4c67e2bf
SG
1606/**
1607 * ib_map_mr_sg() - Map the largest prefix of a dma mapped SG list
1608 * and set it the memory region.
1609 * @mr: memory region
1610 * @sg: dma mapped scatterlist
1611 * @sg_nents: number of entries in sg
ff2ba993 1612 * @sg_offset: offset in bytes into sg
4c67e2bf
SG
1613 * @page_size: page vector desired page size
1614 *
1615 * Constraints:
1616 * - The first sg element is allowed to have an offset.
1617 * - Each sg element must be aligned to page_size (or physically
1618 * contiguous to the previous element). In case an sg element has a
1619 * non contiguous offset, the mapping prefix will not include it.
1620 * - The last sg element is allowed to have length less than page_size.
1621 * - If sg_nents total byte length exceeds the mr max_num_sge * page_size
1622 * then only max_num_sg entries will be mapped.
f5aa9159
SG
1623 * - If the MR was allocated with type IB_MR_TYPE_SG_GAPS_REG, non of these
1624 * constraints holds and the page_size argument is ignored.
4c67e2bf
SG
1625 *
1626 * Returns the number of sg elements that were mapped to the memory region.
1627 *
1628 * After this completes successfully, the memory region
1629 * is ready for registration.
1630 */
ff2ba993
CH
1631int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
1632 unsigned int sg_offset, unsigned int page_size)
4c67e2bf
SG
1633{
1634 if (unlikely(!mr->device->map_mr_sg))
1635 return -ENOSYS;
1636
1637 mr->page_size = page_size;
1638
ff2ba993 1639 return mr->device->map_mr_sg(mr, sg, sg_nents, sg_offset);
4c67e2bf
SG
1640}
1641EXPORT_SYMBOL(ib_map_mr_sg);
1642
1643/**
1644 * ib_sg_to_pages() - Convert the largest prefix of a sg list
1645 * to a page vector
1646 * @mr: memory region
1647 * @sgl: dma mapped scatterlist
1648 * @sg_nents: number of entries in sg
ff2ba993 1649 * @sg_offset: offset in bytes into sg
4c67e2bf
SG
1650 * @set_page: driver page assignment function pointer
1651 *
8f5ba10e 1652 * Core service helper for drivers to convert the largest
4c67e2bf
SG
1653 * prefix of given sg list to a page vector. The sg list
1654 * prefix converted is the prefix that meet the requirements
1655 * of ib_map_mr_sg.
1656 *
1657 * Returns the number of sg elements that were assigned to
1658 * a page vector.
1659 */
ff2ba993
CH
1660int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents,
1661 unsigned int sg_offset, int (*set_page)(struct ib_mr *, u64))
4c67e2bf
SG
1662{
1663 struct scatterlist *sg;
b6aeb980 1664 u64 last_end_dma_addr = 0;
4c67e2bf
SG
1665 unsigned int last_page_off = 0;
1666 u64 page_mask = ~((u64)mr->page_size - 1);
8f5ba10e 1667 int i, ret;
4c67e2bf 1668
ff2ba993 1669 mr->iova = sg_dma_address(&sgl[0]) + sg_offset;
4c67e2bf
SG
1670 mr->length = 0;
1671
1672 for_each_sg(sgl, sg, sg_nents, i) {
ff2ba993
CH
1673 u64 dma_addr = sg_dma_address(sg) + sg_offset;
1674 unsigned int dma_len = sg_dma_len(sg) - sg_offset;
4c67e2bf
SG
1675 u64 end_dma_addr = dma_addr + dma_len;
1676 u64 page_addr = dma_addr & page_mask;
1677
8f5ba10e
BVA
1678 /*
1679 * For the second and later elements, check whether either the
1680 * end of element i-1 or the start of element i is not aligned
1681 * on a page boundary.
1682 */
1683 if (i && (last_page_off != 0 || page_addr != dma_addr)) {
1684 /* Stop mapping if there is a gap. */
1685 if (last_end_dma_addr != dma_addr)
1686 break;
1687
1688 /*
1689 * Coalesce this element with the last. If it is small
1690 * enough just update mr->length. Otherwise start
1691 * mapping from the next page.
1692 */
1693 goto next_page;
4c67e2bf
SG
1694 }
1695
1696 do {
8f5ba10e
BVA
1697 ret = set_page(mr, page_addr);
1698 if (unlikely(ret < 0))
1699 return i ? : ret;
1700next_page:
4c67e2bf
SG
1701 page_addr += mr->page_size;
1702 } while (page_addr < end_dma_addr);
1703
1704 mr->length += dma_len;
1705 last_end_dma_addr = end_dma_addr;
4c67e2bf 1706 last_page_off = end_dma_addr & ~page_mask;
ff2ba993
CH
1707
1708 sg_offset = 0;
4c67e2bf
SG
1709 }
1710
4c67e2bf
SG
1711 return i;
1712}
1713EXPORT_SYMBOL(ib_sg_to_pages);
765d6774
SW
1714
1715struct ib_drain_cqe {
1716 struct ib_cqe cqe;
1717 struct completion done;
1718};
1719
1720static void ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc)
1721{
1722 struct ib_drain_cqe *cqe = container_of(wc->wr_cqe, struct ib_drain_cqe,
1723 cqe);
1724
1725 complete(&cqe->done);
1726}
1727
1728/*
1729 * Post a WR and block until its completion is reaped for the SQ.
1730 */
1731static void __ib_drain_sq(struct ib_qp *qp)
1732{
1733 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1734 struct ib_drain_cqe sdrain;
1735 struct ib_send_wr swr = {}, *bad_swr;
1736 int ret;
1737
1738 if (qp->send_cq->poll_ctx == IB_POLL_DIRECT) {
1739 WARN_ONCE(qp->send_cq->poll_ctx == IB_POLL_DIRECT,
1740 "IB_POLL_DIRECT poll_ctx not supported for drain\n");
1741 return;
1742 }
1743
1744 swr.wr_cqe = &sdrain.cqe;
1745 sdrain.cqe.done = ib_drain_qp_done;
1746 init_completion(&sdrain.done);
1747
1748 ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
1749 if (ret) {
1750 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1751 return;
1752 }
1753
1754 ret = ib_post_send(qp, &swr, &bad_swr);
1755 if (ret) {
1756 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1757 return;
1758 }
1759
1760 wait_for_completion(&sdrain.done);
1761}
1762
1763/*
1764 * Post a WR and block until its completion is reaped for the RQ.
1765 */
1766static void __ib_drain_rq(struct ib_qp *qp)
1767{
1768 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1769 struct ib_drain_cqe rdrain;
1770 struct ib_recv_wr rwr = {}, *bad_rwr;
1771 int ret;
1772
1773 if (qp->recv_cq->poll_ctx == IB_POLL_DIRECT) {
1774 WARN_ONCE(qp->recv_cq->poll_ctx == IB_POLL_DIRECT,
1775 "IB_POLL_DIRECT poll_ctx not supported for drain\n");
1776 return;
1777 }
1778
1779 rwr.wr_cqe = &rdrain.cqe;
1780 rdrain.cqe.done = ib_drain_qp_done;
1781 init_completion(&rdrain.done);
1782
1783 ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
1784 if (ret) {
1785 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
1786 return;
1787 }
1788
1789 ret = ib_post_recv(qp, &rwr, &bad_rwr);
1790 if (ret) {
1791 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
1792 return;
1793 }
1794
1795 wait_for_completion(&rdrain.done);
1796}
1797
1798/**
1799 * ib_drain_sq() - Block until all SQ CQEs have been consumed by the
1800 * application.
1801 * @qp: queue pair to drain
1802 *
1803 * If the device has a provider-specific drain function, then
1804 * call that. Otherwise call the generic drain function
1805 * __ib_drain_sq().
1806 *
1807 * The caller must:
1808 *
1809 * ensure there is room in the CQ and SQ for the drain work request and
1810 * completion.
1811 *
1812 * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
1813 * IB_POLL_DIRECT.
1814 *
1815 * ensure that there are no other contexts that are posting WRs concurrently.
1816 * Otherwise the drain is not guaranteed.
1817 */
1818void ib_drain_sq(struct ib_qp *qp)
1819{
1820 if (qp->device->drain_sq)
1821 qp->device->drain_sq(qp);
1822 else
1823 __ib_drain_sq(qp);
1824}
1825EXPORT_SYMBOL(ib_drain_sq);
1826
1827/**
1828 * ib_drain_rq() - Block until all RQ CQEs have been consumed by the
1829 * application.
1830 * @qp: queue pair to drain
1831 *
1832 * If the device has a provider-specific drain function, then
1833 * call that. Otherwise call the generic drain function
1834 * __ib_drain_rq().
1835 *
1836 * The caller must:
1837 *
1838 * ensure there is room in the CQ and RQ for the drain work request and
1839 * completion.
1840 *
1841 * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
1842 * IB_POLL_DIRECT.
1843 *
1844 * ensure that there are no other contexts that are posting WRs concurrently.
1845 * Otherwise the drain is not guaranteed.
1846 */
1847void ib_drain_rq(struct ib_qp *qp)
1848{
1849 if (qp->device->drain_rq)
1850 qp->device->drain_rq(qp);
1851 else
1852 __ib_drain_rq(qp);
1853}
1854EXPORT_SYMBOL(ib_drain_rq);
1855
1856/**
1857 * ib_drain_qp() - Block until all CQEs have been consumed by the
1858 * application on both the RQ and SQ.
1859 * @qp: queue pair to drain
1860 *
1861 * The caller must:
1862 *
1863 * ensure there is room in the CQ(s), SQ, and RQ for drain work requests
1864 * and completions.
1865 *
1866 * allocate the CQs using ib_alloc_cq() and the CQ poll context cannot be
1867 * IB_POLL_DIRECT.
1868 *
1869 * ensure that there are no other contexts that are posting WRs concurrently.
1870 * Otherwise the drain is not guaranteed.
1871 */
1872void ib_drain_qp(struct ib_qp *qp)
1873{
1874 ib_drain_sq(qp);
42235f80
SG
1875 if (!qp->srq)
1876 ib_drain_rq(qp);
765d6774
SW
1877}
1878EXPORT_SYMBOL(ib_drain_qp);