Merge tag 'libnvdimm-for-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdim...
[linux-2.6-block.git] / drivers / infiniband / core / verbs.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
2a1d9b7f 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
33b9b3ee 8 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
1da177e4
LT
9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
1da177e4
LT
37 */
38
39#include <linux/errno.h>
40#include <linux/err.h>
b108d976 41#include <linux/export.h>
8c65b4a6 42#include <linux/string.h>
0e0ec7e0 43#include <linux/slab.h>
dbf727de
MB
44#include <linux/in.h>
45#include <linux/in6.h>
46#include <net/addrconf.h>
1da177e4 47
a4d61e84
RD
48#include <rdma/ib_verbs.h>
49#include <rdma/ib_cache.h>
dd5f03be 50#include <rdma/ib_addr.h>
a060b562 51#include <rdma/rw.h>
1da177e4 52
ed4c54e5 53#include "core_priv.h"
1da177e4 54
2b1b5b60
SG
55static const char * const ib_events[] = {
56 [IB_EVENT_CQ_ERR] = "CQ error",
57 [IB_EVENT_QP_FATAL] = "QP fatal error",
58 [IB_EVENT_QP_REQ_ERR] = "QP request error",
59 [IB_EVENT_QP_ACCESS_ERR] = "QP access error",
60 [IB_EVENT_COMM_EST] = "communication established",
61 [IB_EVENT_SQ_DRAINED] = "send queue drained",
62 [IB_EVENT_PATH_MIG] = "path migration successful",
63 [IB_EVENT_PATH_MIG_ERR] = "path migration error",
64 [IB_EVENT_DEVICE_FATAL] = "device fatal error",
65 [IB_EVENT_PORT_ACTIVE] = "port active",
66 [IB_EVENT_PORT_ERR] = "port error",
67 [IB_EVENT_LID_CHANGE] = "LID change",
68 [IB_EVENT_PKEY_CHANGE] = "P_key change",
69 [IB_EVENT_SM_CHANGE] = "SM change",
70 [IB_EVENT_SRQ_ERR] = "SRQ error",
71 [IB_EVENT_SRQ_LIMIT_REACHED] = "SRQ limit reached",
72 [IB_EVENT_QP_LAST_WQE_REACHED] = "last WQE reached",
73 [IB_EVENT_CLIENT_REREGISTER] = "client reregister",
74 [IB_EVENT_GID_CHANGE] = "GID changed",
75};
76
db7489e0 77const char *__attribute_const__ ib_event_msg(enum ib_event_type event)
2b1b5b60
SG
78{
79 size_t index = event;
80
81 return (index < ARRAY_SIZE(ib_events) && ib_events[index]) ?
82 ib_events[index] : "unrecognized event";
83}
84EXPORT_SYMBOL(ib_event_msg);
85
86static const char * const wc_statuses[] = {
87 [IB_WC_SUCCESS] = "success",
88 [IB_WC_LOC_LEN_ERR] = "local length error",
89 [IB_WC_LOC_QP_OP_ERR] = "local QP operation error",
90 [IB_WC_LOC_EEC_OP_ERR] = "local EE context operation error",
91 [IB_WC_LOC_PROT_ERR] = "local protection error",
92 [IB_WC_WR_FLUSH_ERR] = "WR flushed",
93 [IB_WC_MW_BIND_ERR] = "memory management operation error",
94 [IB_WC_BAD_RESP_ERR] = "bad response error",
95 [IB_WC_LOC_ACCESS_ERR] = "local access error",
96 [IB_WC_REM_INV_REQ_ERR] = "invalid request error",
97 [IB_WC_REM_ACCESS_ERR] = "remote access error",
98 [IB_WC_REM_OP_ERR] = "remote operation error",
99 [IB_WC_RETRY_EXC_ERR] = "transport retry counter exceeded",
100 [IB_WC_RNR_RETRY_EXC_ERR] = "RNR retry counter exceeded",
101 [IB_WC_LOC_RDD_VIOL_ERR] = "local RDD violation error",
102 [IB_WC_REM_INV_RD_REQ_ERR] = "remote invalid RD request",
103 [IB_WC_REM_ABORT_ERR] = "operation aborted",
104 [IB_WC_INV_EECN_ERR] = "invalid EE context number",
105 [IB_WC_INV_EEC_STATE_ERR] = "invalid EE context state",
106 [IB_WC_FATAL_ERR] = "fatal error",
107 [IB_WC_RESP_TIMEOUT_ERR] = "response timeout error",
108 [IB_WC_GENERAL_ERR] = "general error",
109};
110
db7489e0 111const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status)
2b1b5b60
SG
112{
113 size_t index = status;
114
115 return (index < ARRAY_SIZE(wc_statuses) && wc_statuses[index]) ?
116 wc_statuses[index] : "unrecognized status";
117}
118EXPORT_SYMBOL(ib_wc_status_msg);
119
8385fd84 120__attribute_const__ int ib_rate_to_mult(enum ib_rate rate)
bf6a9e31
JM
121{
122 switch (rate) {
123 case IB_RATE_2_5_GBPS: return 1;
124 case IB_RATE_5_GBPS: return 2;
125 case IB_RATE_10_GBPS: return 4;
126 case IB_RATE_20_GBPS: return 8;
127 case IB_RATE_30_GBPS: return 12;
128 case IB_RATE_40_GBPS: return 16;
129 case IB_RATE_60_GBPS: return 24;
130 case IB_RATE_80_GBPS: return 32;
131 case IB_RATE_120_GBPS: return 48;
132 default: return -1;
133 }
134}
135EXPORT_SYMBOL(ib_rate_to_mult);
136
8385fd84 137__attribute_const__ enum ib_rate mult_to_ib_rate(int mult)
bf6a9e31
JM
138{
139 switch (mult) {
140 case 1: return IB_RATE_2_5_GBPS;
141 case 2: return IB_RATE_5_GBPS;
142 case 4: return IB_RATE_10_GBPS;
143 case 8: return IB_RATE_20_GBPS;
144 case 12: return IB_RATE_30_GBPS;
145 case 16: return IB_RATE_40_GBPS;
146 case 24: return IB_RATE_60_GBPS;
147 case 32: return IB_RATE_80_GBPS;
148 case 48: return IB_RATE_120_GBPS;
149 default: return IB_RATE_PORT_CURRENT;
150 }
151}
152EXPORT_SYMBOL(mult_to_ib_rate);
153
8385fd84 154__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate)
71eeba16
MA
155{
156 switch (rate) {
157 case IB_RATE_2_5_GBPS: return 2500;
158 case IB_RATE_5_GBPS: return 5000;
159 case IB_RATE_10_GBPS: return 10000;
160 case IB_RATE_20_GBPS: return 20000;
161 case IB_RATE_30_GBPS: return 30000;
162 case IB_RATE_40_GBPS: return 40000;
163 case IB_RATE_60_GBPS: return 60000;
164 case IB_RATE_80_GBPS: return 80000;
165 case IB_RATE_120_GBPS: return 120000;
166 case IB_RATE_14_GBPS: return 14062;
167 case IB_RATE_56_GBPS: return 56250;
168 case IB_RATE_112_GBPS: return 112500;
169 case IB_RATE_168_GBPS: return 168750;
170 case IB_RATE_25_GBPS: return 25781;
171 case IB_RATE_100_GBPS: return 103125;
172 case IB_RATE_200_GBPS: return 206250;
173 case IB_RATE_300_GBPS: return 309375;
174 default: return -1;
175 }
176}
177EXPORT_SYMBOL(ib_rate_to_mbps);
178
8385fd84 179__attribute_const__ enum rdma_transport_type
07ebafba
TT
180rdma_node_get_transport(enum rdma_node_type node_type)
181{
182 switch (node_type) {
183 case RDMA_NODE_IB_CA:
184 case RDMA_NODE_IB_SWITCH:
185 case RDMA_NODE_IB_ROUTER:
186 return RDMA_TRANSPORT_IB;
187 case RDMA_NODE_RNIC:
188 return RDMA_TRANSPORT_IWARP;
180771a3 189 case RDMA_NODE_USNIC:
5db5765e
UM
190 return RDMA_TRANSPORT_USNIC;
191 case RDMA_NODE_USNIC_UDP:
248567f7 192 return RDMA_TRANSPORT_USNIC_UDP;
07ebafba
TT
193 default:
194 BUG();
195 return 0;
196 }
197}
198EXPORT_SYMBOL(rdma_node_get_transport);
199
a3f5adaf
EC
200enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num)
201{
202 if (device->get_link_layer)
203 return device->get_link_layer(device, port_num);
204
205 switch (rdma_node_get_transport(device->node_type)) {
206 case RDMA_TRANSPORT_IB:
207 return IB_LINK_LAYER_INFINIBAND;
208 case RDMA_TRANSPORT_IWARP:
180771a3 209 case RDMA_TRANSPORT_USNIC:
248567f7 210 case RDMA_TRANSPORT_USNIC_UDP:
a3f5adaf
EC
211 return IB_LINK_LAYER_ETHERNET;
212 default:
213 return IB_LINK_LAYER_UNSPECIFIED;
214 }
215}
216EXPORT_SYMBOL(rdma_port_get_link_layer);
217
1da177e4
LT
218/* Protection domains */
219
96249d70
JG
220/**
221 * ib_alloc_pd - Allocates an unused protection domain.
222 * @device: The device on which to allocate the protection domain.
223 *
224 * A protection domain object provides an association between QPs, shared
225 * receive queues, address handles, memory regions, and memory windows.
226 *
227 * Every PD has a local_dma_lkey which can be used as the lkey value for local
228 * memory operations.
229 */
ed082d36
CH
230struct ib_pd *__ib_alloc_pd(struct ib_device *device, unsigned int flags,
231 const char *caller)
1da177e4
LT
232{
233 struct ib_pd *pd;
ed082d36 234 int mr_access_flags = 0;
1da177e4 235
b5e81bf5 236 pd = device->alloc_pd(device, NULL, NULL);
96249d70
JG
237 if (IS_ERR(pd))
238 return pd;
1da177e4 239
96249d70
JG
240 pd->device = device;
241 pd->uobject = NULL;
50d46335 242 pd->__internal_mr = NULL;
96249d70 243 atomic_set(&pd->usecnt, 0);
ed082d36 244 pd->flags = flags;
1da177e4 245
86bee4c9 246 if (device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)
96249d70 247 pd->local_dma_lkey = device->local_dma_lkey;
ed082d36
CH
248 else
249 mr_access_flags |= IB_ACCESS_LOCAL_WRITE;
250
251 if (flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
252 pr_warn("%s: enabling unsafe global rkey\n", caller);
253 mr_access_flags |= IB_ACCESS_REMOTE_READ | IB_ACCESS_REMOTE_WRITE;
254 }
255
256 if (mr_access_flags) {
96249d70
JG
257 struct ib_mr *mr;
258
5ef990f0 259 mr = pd->device->get_dma_mr(pd, mr_access_flags);
96249d70
JG
260 if (IS_ERR(mr)) {
261 ib_dealloc_pd(pd);
5ef990f0 262 return ERR_CAST(mr);
96249d70 263 }
1da177e4 264
5ef990f0
CH
265 mr->device = pd->device;
266 mr->pd = pd;
267 mr->uobject = NULL;
268 mr->need_inval = false;
269
50d46335 270 pd->__internal_mr = mr;
ed082d36
CH
271
272 if (!(device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY))
273 pd->local_dma_lkey = pd->__internal_mr->lkey;
274
275 if (flags & IB_PD_UNSAFE_GLOBAL_RKEY)
276 pd->unsafe_global_rkey = pd->__internal_mr->rkey;
1da177e4 277 }
ed082d36 278
1da177e4
LT
279 return pd;
280}
ed082d36 281EXPORT_SYMBOL(__ib_alloc_pd);
1da177e4 282
7dd78647
JG
283/**
284 * ib_dealloc_pd - Deallocates a protection domain.
285 * @pd: The protection domain to deallocate.
286 *
287 * It is an error to call this function while any resources in the pd still
288 * exist. The caller is responsible to synchronously destroy them and
289 * guarantee no new allocations will happen.
290 */
291void ib_dealloc_pd(struct ib_pd *pd)
1da177e4 292{
7dd78647
JG
293 int ret;
294
50d46335 295 if (pd->__internal_mr) {
5ef990f0 296 ret = pd->device->dereg_mr(pd->__internal_mr);
7dd78647 297 WARN_ON(ret);
50d46335 298 pd->__internal_mr = NULL;
96249d70 299 }
1da177e4 300
7dd78647
JG
301 /* uverbs manipulates usecnt with proper locking, while the kabi
302 requires the caller to guarantee we can't race here. */
303 WARN_ON(atomic_read(&pd->usecnt));
1da177e4 304
7dd78647
JG
305 /* Making delalloc_pd a void return is a WIP, no driver should return
306 an error here. */
307 ret = pd->device->dealloc_pd(pd);
308 WARN_ONCE(ret, "Infiniband HW driver failed dealloc_pd");
1da177e4
LT
309}
310EXPORT_SYMBOL(ib_dealloc_pd);
311
312/* Address handles */
313
0a18cfe4 314struct ib_ah *rdma_create_ah(struct ib_pd *pd, struct rdma_ah_attr *ah_attr)
1da177e4
LT
315{
316 struct ib_ah *ah;
317
477864c8 318 ah = pd->device->create_ah(pd, ah_attr, NULL);
1da177e4
LT
319
320 if (!IS_ERR(ah)) {
b5e81bf5
RD
321 ah->device = pd->device;
322 ah->pd = pd;
323 ah->uobject = NULL;
44c58487 324 ah->type = ah_attr->type;
1da177e4
LT
325 atomic_inc(&pd->usecnt);
326 }
327
328 return ah;
329}
0a18cfe4 330EXPORT_SYMBOL(rdma_create_ah);
1da177e4 331
850d8fd7 332int ib_get_rdma_header_version(const union rdma_network_hdr *hdr)
c865f246
SK
333{
334 const struct iphdr *ip4h = (struct iphdr *)&hdr->roce4grh;
335 struct iphdr ip4h_checked;
336 const struct ipv6hdr *ip6h = (struct ipv6hdr *)&hdr->ibgrh;
337
338 /* If it's IPv6, the version must be 6, otherwise, the first
339 * 20 bytes (before the IPv4 header) are garbled.
340 */
341 if (ip6h->version != 6)
342 return (ip4h->version == 4) ? 4 : 0;
343 /* version may be 6 or 4 because the first 20 bytes could be garbled */
344
345 /* RoCE v2 requires no options, thus header length
346 * must be 5 words
347 */
348 if (ip4h->ihl != 5)
349 return 6;
350
351 /* Verify checksum.
352 * We can't write on scattered buffers so we need to copy to
353 * temp buffer.
354 */
355 memcpy(&ip4h_checked, ip4h, sizeof(ip4h_checked));
356 ip4h_checked.check = 0;
357 ip4h_checked.check = ip_fast_csum((u8 *)&ip4h_checked, 5);
358 /* if IPv4 header checksum is OK, believe it */
359 if (ip4h->check == ip4h_checked.check)
360 return 4;
361 return 6;
362}
850d8fd7 363EXPORT_SYMBOL(ib_get_rdma_header_version);
c865f246
SK
364
365static enum rdma_network_type ib_get_net_type_by_grh(struct ib_device *device,
366 u8 port_num,
367 const struct ib_grh *grh)
368{
369 int grh_version;
370
371 if (rdma_protocol_ib(device, port_num))
372 return RDMA_NETWORK_IB;
373
850d8fd7 374 grh_version = ib_get_rdma_header_version((union rdma_network_hdr *)grh);
c865f246
SK
375
376 if (grh_version == 4)
377 return RDMA_NETWORK_IPV4;
378
379 if (grh->next_hdr == IPPROTO_UDP)
380 return RDMA_NETWORK_IPV6;
381
382 return RDMA_NETWORK_ROCE_V1;
383}
384
dbf727de
MB
385struct find_gid_index_context {
386 u16 vlan_id;
c865f246 387 enum ib_gid_type gid_type;
dbf727de
MB
388};
389
390static bool find_gid_index(const union ib_gid *gid,
391 const struct ib_gid_attr *gid_attr,
392 void *context)
393{
394 struct find_gid_index_context *ctx =
395 (struct find_gid_index_context *)context;
396
c865f246
SK
397 if (ctx->gid_type != gid_attr->gid_type)
398 return false;
399
dbf727de
MB
400 if ((!!(ctx->vlan_id != 0xffff) == !is_vlan_dev(gid_attr->ndev)) ||
401 (is_vlan_dev(gid_attr->ndev) &&
402 vlan_dev_vlan_id(gid_attr->ndev) != ctx->vlan_id))
403 return false;
404
405 return true;
406}
407
408static int get_sgid_index_from_eth(struct ib_device *device, u8 port_num,
409 u16 vlan_id, const union ib_gid *sgid,
c865f246 410 enum ib_gid_type gid_type,
dbf727de
MB
411 u16 *gid_index)
412{
c865f246
SK
413 struct find_gid_index_context context = {.vlan_id = vlan_id,
414 .gid_type = gid_type};
dbf727de
MB
415
416 return ib_find_gid_by_filter(device, sgid, port_num, find_gid_index,
417 &context, gid_index);
418}
419
850d8fd7
MS
420int ib_get_gids_from_rdma_hdr(const union rdma_network_hdr *hdr,
421 enum rdma_network_type net_type,
422 union ib_gid *sgid, union ib_gid *dgid)
c865f246
SK
423{
424 struct sockaddr_in src_in;
425 struct sockaddr_in dst_in;
426 __be32 src_saddr, dst_saddr;
427
428 if (!sgid || !dgid)
429 return -EINVAL;
430
431 if (net_type == RDMA_NETWORK_IPV4) {
432 memcpy(&src_in.sin_addr.s_addr,
433 &hdr->roce4grh.saddr, 4);
434 memcpy(&dst_in.sin_addr.s_addr,
435 &hdr->roce4grh.daddr, 4);
436 src_saddr = src_in.sin_addr.s_addr;
437 dst_saddr = dst_in.sin_addr.s_addr;
438 ipv6_addr_set_v4mapped(src_saddr,
439 (struct in6_addr *)sgid);
440 ipv6_addr_set_v4mapped(dst_saddr,
441 (struct in6_addr *)dgid);
442 return 0;
443 } else if (net_type == RDMA_NETWORK_IPV6 ||
444 net_type == RDMA_NETWORK_IB) {
445 *dgid = hdr->ibgrh.dgid;
446 *sgid = hdr->ibgrh.sgid;
447 return 0;
448 } else {
449 return -EINVAL;
450 }
451}
850d8fd7 452EXPORT_SYMBOL(ib_get_gids_from_rdma_hdr);
c865f246 453
73cdaaee
IW
454int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
455 const struct ib_wc *wc, const struct ib_grh *grh,
90898850 456 struct rdma_ah_attr *ah_attr)
513789ed 457{
513789ed
HR
458 u32 flow_class;
459 u16 gid_index;
460 int ret;
c865f246
SK
461 enum rdma_network_type net_type = RDMA_NETWORK_IB;
462 enum ib_gid_type gid_type = IB_GID_TYPE_IB;
c3efe750 463 int hoplimit = 0xff;
c865f246
SK
464 union ib_gid dgid;
465 union ib_gid sgid;
513789ed 466
4e00d694 467 memset(ah_attr, 0, sizeof *ah_attr);
44c58487 468 ah_attr->type = rdma_ah_find_type(device, port_num);
227128fc 469 if (rdma_cap_eth_ah(device, port_num)) {
c865f246
SK
470 if (wc->wc_flags & IB_WC_WITH_NETWORK_HDR_TYPE)
471 net_type = wc->network_hdr_type;
472 else
473 net_type = ib_get_net_type_by_grh(device, port_num, grh);
474 gid_type = ib_network_to_gid_type(net_type);
475 }
850d8fd7
MS
476 ret = ib_get_gids_from_rdma_hdr((union rdma_network_hdr *)grh, net_type,
477 &sgid, &dgid);
c865f246
SK
478 if (ret)
479 return ret;
480
481 if (rdma_protocol_roce(device, port_num)) {
20029832 482 int if_index = 0;
dbf727de
MB
483 u16 vlan_id = wc->wc_flags & IB_WC_WITH_VLAN ?
484 wc->vlan_id : 0xffff;
20029832
MB
485 struct net_device *idev;
486 struct net_device *resolved_dev;
dbf727de 487
dd5f03be
MB
488 if (!(wc->wc_flags & IB_WC_GRH))
489 return -EPROTOTYPE;
490
20029832
MB
491 if (!device->get_netdev)
492 return -EOPNOTSUPP;
493
494 idev = device->get_netdev(device, port_num);
495 if (!idev)
496 return -ENODEV;
497
f7f4b23e 498 ret = rdma_addr_find_l2_eth_by_grh(&dgid, &sgid,
44c58487 499 ah_attr->roce.dmac,
f7f4b23e
MB
500 wc->wc_flags & IB_WC_WITH_VLAN ?
501 NULL : &vlan_id,
c3efe750 502 &if_index, &hoplimit);
20029832
MB
503 if (ret) {
504 dev_put(idev);
505 return ret;
dd5f03be 506 }
dbf727de 507
20029832
MB
508 resolved_dev = dev_get_by_index(&init_net, if_index);
509 if (resolved_dev->flags & IFF_LOOPBACK) {
510 dev_put(resolved_dev);
511 resolved_dev = idev;
512 dev_hold(resolved_dev);
513 }
514 rcu_read_lock();
515 if (resolved_dev != idev && !rdma_is_upper_dev_rcu(idev,
516 resolved_dev))
517 ret = -EHOSTUNREACH;
518 rcu_read_unlock();
519 dev_put(idev);
520 dev_put(resolved_dev);
521 if (ret)
522 return ret;
523
dbf727de 524 ret = get_sgid_index_from_eth(device, port_num, vlan_id,
c865f246 525 &dgid, gid_type, &gid_index);
dbf727de
MB
526 if (ret)
527 return ret;
dd5f03be
MB
528 }
529
d8966fcd
DC
530 rdma_ah_set_dlid(ah_attr, wc->slid);
531 rdma_ah_set_sl(ah_attr, wc->sl);
532 rdma_ah_set_path_bits(ah_attr, wc->dlid_path_bits);
533 rdma_ah_set_port_num(ah_attr, port_num);
513789ed
HR
534
535 if (wc->wc_flags & IB_WC_GRH) {
dbf727de 536 if (!rdma_cap_eth_ah(device, port_num)) {
b3556005
EC
537 if (dgid.global.interface_id != cpu_to_be64(IB_SA_WELL_KNOWN_GUID)) {
538 ret = ib_find_cached_gid_by_port(device, &dgid,
539 IB_GID_TYPE_IB,
540 port_num, NULL,
541 &gid_index);
542 if (ret)
543 return ret;
544 } else {
545 gid_index = 0;
546 }
dbf727de 547 }
513789ed 548
497677ab 549 flow_class = be32_to_cpu(grh->version_tclass_flow);
d8966fcd
DC
550 rdma_ah_set_grh(ah_attr, &sgid,
551 flow_class & 0xFFFFF,
552 (u8)gid_index, hoplimit,
553 (flow_class >> 20) & 0xFF);
554
513789ed 555 }
4e00d694
SH
556 return 0;
557}
558EXPORT_SYMBOL(ib_init_ah_from_wc);
559
73cdaaee
IW
560struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
561 const struct ib_grh *grh, u8 port_num)
4e00d694 562{
90898850 563 struct rdma_ah_attr ah_attr;
4e00d694
SH
564 int ret;
565
566 ret = ib_init_ah_from_wc(pd->device, port_num, wc, grh, &ah_attr);
567 if (ret)
568 return ERR_PTR(ret);
513789ed 569
0a18cfe4 570 return rdma_create_ah(pd, &ah_attr);
513789ed
HR
571}
572EXPORT_SYMBOL(ib_create_ah_from_wc);
573
67b985b6 574int rdma_modify_ah(struct ib_ah *ah, struct rdma_ah_attr *ah_attr)
1da177e4 575{
44c58487
DC
576 if (ah->type != ah_attr->type)
577 return -EINVAL;
578
1da177e4
LT
579 return ah->device->modify_ah ?
580 ah->device->modify_ah(ah, ah_attr) :
581 -ENOSYS;
582}
67b985b6 583EXPORT_SYMBOL(rdma_modify_ah);
1da177e4 584
bfbfd661 585int rdma_query_ah(struct ib_ah *ah, struct rdma_ah_attr *ah_attr)
1da177e4
LT
586{
587 return ah->device->query_ah ?
588 ah->device->query_ah(ah, ah_attr) :
589 -ENOSYS;
590}
bfbfd661 591EXPORT_SYMBOL(rdma_query_ah);
1da177e4 592
36523159 593int rdma_destroy_ah(struct ib_ah *ah)
1da177e4
LT
594{
595 struct ib_pd *pd;
596 int ret;
597
598 pd = ah->pd;
599 ret = ah->device->destroy_ah(ah);
600 if (!ret)
601 atomic_dec(&pd->usecnt);
602
603 return ret;
604}
36523159 605EXPORT_SYMBOL(rdma_destroy_ah);
1da177e4 606
d41fcc67
RD
607/* Shared receive queues */
608
609struct ib_srq *ib_create_srq(struct ib_pd *pd,
610 struct ib_srq_init_attr *srq_init_attr)
611{
612 struct ib_srq *srq;
613
614 if (!pd->device->create_srq)
615 return ERR_PTR(-ENOSYS);
616
617 srq = pd->device->create_srq(pd, srq_init_attr, NULL);
618
619 if (!IS_ERR(srq)) {
620 srq->device = pd->device;
621 srq->pd = pd;
622 srq->uobject = NULL;
623 srq->event_handler = srq_init_attr->event_handler;
624 srq->srq_context = srq_init_attr->srq_context;
96104eda 625 srq->srq_type = srq_init_attr->srq_type;
418d5130
SH
626 if (srq->srq_type == IB_SRQT_XRC) {
627 srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd;
628 srq->ext.xrc.cq = srq_init_attr->ext.xrc.cq;
629 atomic_inc(&srq->ext.xrc.xrcd->usecnt);
630 atomic_inc(&srq->ext.xrc.cq->usecnt);
631 }
d41fcc67
RD
632 atomic_inc(&pd->usecnt);
633 atomic_set(&srq->usecnt, 0);
634 }
635
636 return srq;
637}
638EXPORT_SYMBOL(ib_create_srq);
639
640int ib_modify_srq(struct ib_srq *srq,
641 struct ib_srq_attr *srq_attr,
642 enum ib_srq_attr_mask srq_attr_mask)
643{
7ce5eacb
DB
644 return srq->device->modify_srq ?
645 srq->device->modify_srq(srq, srq_attr, srq_attr_mask, NULL) :
646 -ENOSYS;
d41fcc67
RD
647}
648EXPORT_SYMBOL(ib_modify_srq);
649
650int ib_query_srq(struct ib_srq *srq,
651 struct ib_srq_attr *srq_attr)
652{
653 return srq->device->query_srq ?
654 srq->device->query_srq(srq, srq_attr) : -ENOSYS;
655}
656EXPORT_SYMBOL(ib_query_srq);
657
658int ib_destroy_srq(struct ib_srq *srq)
659{
660 struct ib_pd *pd;
418d5130
SH
661 enum ib_srq_type srq_type;
662 struct ib_xrcd *uninitialized_var(xrcd);
663 struct ib_cq *uninitialized_var(cq);
d41fcc67
RD
664 int ret;
665
666 if (atomic_read(&srq->usecnt))
667 return -EBUSY;
668
669 pd = srq->pd;
418d5130
SH
670 srq_type = srq->srq_type;
671 if (srq_type == IB_SRQT_XRC) {
672 xrcd = srq->ext.xrc.xrcd;
673 cq = srq->ext.xrc.cq;
674 }
d41fcc67
RD
675
676 ret = srq->device->destroy_srq(srq);
418d5130 677 if (!ret) {
d41fcc67 678 atomic_dec(&pd->usecnt);
418d5130
SH
679 if (srq_type == IB_SRQT_XRC) {
680 atomic_dec(&xrcd->usecnt);
681 atomic_dec(&cq->usecnt);
682 }
683 }
d41fcc67
RD
684
685 return ret;
686}
687EXPORT_SYMBOL(ib_destroy_srq);
688
1da177e4
LT
689/* Queue pairs */
690
0e0ec7e0
SH
691static void __ib_shared_qp_event_handler(struct ib_event *event, void *context)
692{
693 struct ib_qp *qp = context;
73c40c61 694 unsigned long flags;
0e0ec7e0 695
73c40c61 696 spin_lock_irqsave(&qp->device->event_handler_lock, flags);
0e0ec7e0 697 list_for_each_entry(event->element.qp, &qp->open_list, open_list)
eec9e29f
SP
698 if (event->element.qp->event_handler)
699 event->element.qp->event_handler(event, event->element.qp->qp_context);
73c40c61 700 spin_unlock_irqrestore(&qp->device->event_handler_lock, flags);
0e0ec7e0
SH
701}
702
d3d72d90
SH
703static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp)
704{
705 mutex_lock(&xrcd->tgt_qp_mutex);
706 list_add(&qp->xrcd_list, &xrcd->tgt_qp_list);
707 mutex_unlock(&xrcd->tgt_qp_mutex);
708}
709
0e0ec7e0
SH
710static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp,
711 void (*event_handler)(struct ib_event *, void *),
712 void *qp_context)
d3d72d90 713{
0e0ec7e0
SH
714 struct ib_qp *qp;
715 unsigned long flags;
716
717 qp = kzalloc(sizeof *qp, GFP_KERNEL);
718 if (!qp)
719 return ERR_PTR(-ENOMEM);
720
721 qp->real_qp = real_qp;
722 atomic_inc(&real_qp->usecnt);
723 qp->device = real_qp->device;
724 qp->event_handler = event_handler;
725 qp->qp_context = qp_context;
726 qp->qp_num = real_qp->qp_num;
727 qp->qp_type = real_qp->qp_type;
728
729 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
730 list_add(&qp->open_list, &real_qp->open_list);
731 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
732
733 return qp;
734}
735
736struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
737 struct ib_qp_open_attr *qp_open_attr)
738{
739 struct ib_qp *qp, *real_qp;
740
741 if (qp_open_attr->qp_type != IB_QPT_XRC_TGT)
742 return ERR_PTR(-EINVAL);
743
744 qp = ERR_PTR(-EINVAL);
d3d72d90 745 mutex_lock(&xrcd->tgt_qp_mutex);
0e0ec7e0
SH
746 list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) {
747 if (real_qp->qp_num == qp_open_attr->qp_num) {
748 qp = __ib_open_qp(real_qp, qp_open_attr->event_handler,
749 qp_open_attr->qp_context);
750 break;
751 }
752 }
d3d72d90 753 mutex_unlock(&xrcd->tgt_qp_mutex);
0e0ec7e0 754 return qp;
d3d72d90 755}
0e0ec7e0 756EXPORT_SYMBOL(ib_open_qp);
d3d72d90 757
04c41bf3
CH
758static struct ib_qp *ib_create_xrc_qp(struct ib_qp *qp,
759 struct ib_qp_init_attr *qp_init_attr)
760{
761 struct ib_qp *real_qp = qp;
762
763 qp->event_handler = __ib_shared_qp_event_handler;
764 qp->qp_context = qp;
765 qp->pd = NULL;
766 qp->send_cq = qp->recv_cq = NULL;
767 qp->srq = NULL;
768 qp->xrcd = qp_init_attr->xrcd;
769 atomic_inc(&qp_init_attr->xrcd->usecnt);
770 INIT_LIST_HEAD(&qp->open_list);
771
772 qp = __ib_open_qp(real_qp, qp_init_attr->event_handler,
773 qp_init_attr->qp_context);
774 if (!IS_ERR(qp))
775 __ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp);
776 else
777 real_qp->device->destroy_qp(real_qp);
778 return qp;
779}
780
1da177e4
LT
781struct ib_qp *ib_create_qp(struct ib_pd *pd,
782 struct ib_qp_init_attr *qp_init_attr)
783{
04c41bf3
CH
784 struct ib_device *device = pd ? pd->device : qp_init_attr->xrcd->device;
785 struct ib_qp *qp;
a060b562
CH
786 int ret;
787
a9017e23
YH
788 if (qp_init_attr->rwq_ind_tbl &&
789 (qp_init_attr->recv_cq ||
790 qp_init_attr->srq || qp_init_attr->cap.max_recv_wr ||
791 qp_init_attr->cap.max_recv_sge))
792 return ERR_PTR(-EINVAL);
793
a060b562
CH
794 /*
795 * If the callers is using the RDMA API calculate the resources
796 * needed for the RDMA READ/WRITE operations.
797 *
798 * Note that these callers need to pass in a port number.
799 */
800 if (qp_init_attr->cap.max_rdma_ctxs)
801 rdma_rw_init_qp(device, qp_init_attr);
1da177e4 802
b42b63cf 803 qp = device->create_qp(pd, qp_init_attr, NULL);
04c41bf3
CH
804 if (IS_ERR(qp))
805 return qp;
806
807 qp->device = device;
808 qp->real_qp = qp;
809 qp->uobject = NULL;
810 qp->qp_type = qp_init_attr->qp_type;
a9017e23 811 qp->rwq_ind_tbl = qp_init_attr->rwq_ind_tbl;
04c41bf3
CH
812
813 atomic_set(&qp->usecnt, 0);
fffb0383
CH
814 qp->mrs_used = 0;
815 spin_lock_init(&qp->mr_lock);
a060b562 816 INIT_LIST_HEAD(&qp->rdma_mrs);
0e353e34 817 INIT_LIST_HEAD(&qp->sig_mrs);
fffb0383 818
04c41bf3
CH
819 if (qp_init_attr->qp_type == IB_QPT_XRC_TGT)
820 return ib_create_xrc_qp(qp, qp_init_attr);
821
822 qp->event_handler = qp_init_attr->event_handler;
823 qp->qp_context = qp_init_attr->qp_context;
824 if (qp_init_attr->qp_type == IB_QPT_XRC_INI) {
825 qp->recv_cq = NULL;
826 qp->srq = NULL;
827 } else {
828 qp->recv_cq = qp_init_attr->recv_cq;
a9017e23
YH
829 if (qp_init_attr->recv_cq)
830 atomic_inc(&qp_init_attr->recv_cq->usecnt);
04c41bf3
CH
831 qp->srq = qp_init_attr->srq;
832 if (qp->srq)
833 atomic_inc(&qp_init_attr->srq->usecnt);
1da177e4
LT
834 }
835
04c41bf3
CH
836 qp->pd = pd;
837 qp->send_cq = qp_init_attr->send_cq;
838 qp->xrcd = NULL;
839
840 atomic_inc(&pd->usecnt);
a9017e23
YH
841 if (qp_init_attr->send_cq)
842 atomic_inc(&qp_init_attr->send_cq->usecnt);
843 if (qp_init_attr->rwq_ind_tbl)
844 atomic_inc(&qp->rwq_ind_tbl->usecnt);
a060b562
CH
845
846 if (qp_init_attr->cap.max_rdma_ctxs) {
847 ret = rdma_rw_init_mrs(qp, qp_init_attr);
848 if (ret) {
849 pr_err("failed to init MR pool ret= %d\n", ret);
850 ib_destroy_qp(qp);
b6bc1c73 851 return ERR_PTR(ret);
a060b562
CH
852 }
853 }
854
632bc3f6
BVA
855 /*
856 * Note: all hw drivers guarantee that max_send_sge is lower than
857 * the device RDMA WRITE SGE limit but not all hw drivers ensure that
858 * max_send_sge <= max_sge_rd.
859 */
860 qp->max_write_sge = qp_init_attr->cap.max_send_sge;
861 qp->max_read_sge = min_t(u32, qp_init_attr->cap.max_send_sge,
862 device->attrs.max_sge_rd);
863
1da177e4
LT
864 return qp;
865}
866EXPORT_SYMBOL(ib_create_qp);
867
8a51866f
RD
868static const struct {
869 int valid;
b42b63cf
SH
870 enum ib_qp_attr_mask req_param[IB_QPT_MAX];
871 enum ib_qp_attr_mask opt_param[IB_QPT_MAX];
8a51866f
RD
872} qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
873 [IB_QPS_RESET] = {
874 [IB_QPS_RESET] = { .valid = 1 },
8a51866f
RD
875 [IB_QPS_INIT] = {
876 .valid = 1,
877 .req_param = {
878 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
879 IB_QP_PORT |
880 IB_QP_QKEY),
c938a616 881 [IB_QPT_RAW_PACKET] = IB_QP_PORT,
8a51866f
RD
882 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
883 IB_QP_PORT |
884 IB_QP_ACCESS_FLAGS),
885 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
886 IB_QP_PORT |
887 IB_QP_ACCESS_FLAGS),
b42b63cf
SH
888 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
889 IB_QP_PORT |
890 IB_QP_ACCESS_FLAGS),
891 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
892 IB_QP_PORT |
893 IB_QP_ACCESS_FLAGS),
8a51866f
RD
894 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
895 IB_QP_QKEY),
896 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
897 IB_QP_QKEY),
898 }
899 },
900 },
901 [IB_QPS_INIT] = {
902 [IB_QPS_RESET] = { .valid = 1 },
903 [IB_QPS_ERR] = { .valid = 1 },
904 [IB_QPS_INIT] = {
905 .valid = 1,
906 .opt_param = {
907 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
908 IB_QP_PORT |
909 IB_QP_QKEY),
910 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
911 IB_QP_PORT |
912 IB_QP_ACCESS_FLAGS),
913 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
914 IB_QP_PORT |
915 IB_QP_ACCESS_FLAGS),
b42b63cf
SH
916 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
917 IB_QP_PORT |
918 IB_QP_ACCESS_FLAGS),
919 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
920 IB_QP_PORT |
921 IB_QP_ACCESS_FLAGS),
8a51866f
RD
922 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
923 IB_QP_QKEY),
924 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
925 IB_QP_QKEY),
926 }
927 },
928 [IB_QPS_RTR] = {
929 .valid = 1,
930 .req_param = {
931 [IB_QPT_UC] = (IB_QP_AV |
932 IB_QP_PATH_MTU |
933 IB_QP_DEST_QPN |
934 IB_QP_RQ_PSN),
935 [IB_QPT_RC] = (IB_QP_AV |
936 IB_QP_PATH_MTU |
937 IB_QP_DEST_QPN |
938 IB_QP_RQ_PSN |
939 IB_QP_MAX_DEST_RD_ATOMIC |
940 IB_QP_MIN_RNR_TIMER),
b42b63cf
SH
941 [IB_QPT_XRC_INI] = (IB_QP_AV |
942 IB_QP_PATH_MTU |
943 IB_QP_DEST_QPN |
944 IB_QP_RQ_PSN),
945 [IB_QPT_XRC_TGT] = (IB_QP_AV |
946 IB_QP_PATH_MTU |
947 IB_QP_DEST_QPN |
948 IB_QP_RQ_PSN |
949 IB_QP_MAX_DEST_RD_ATOMIC |
950 IB_QP_MIN_RNR_TIMER),
8a51866f
RD
951 },
952 .opt_param = {
953 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
954 IB_QP_QKEY),
955 [IB_QPT_UC] = (IB_QP_ALT_PATH |
956 IB_QP_ACCESS_FLAGS |
957 IB_QP_PKEY_INDEX),
958 [IB_QPT_RC] = (IB_QP_ALT_PATH |
959 IB_QP_ACCESS_FLAGS |
960 IB_QP_PKEY_INDEX),
b42b63cf
SH
961 [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH |
962 IB_QP_ACCESS_FLAGS |
963 IB_QP_PKEY_INDEX),
964 [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH |
965 IB_QP_ACCESS_FLAGS |
966 IB_QP_PKEY_INDEX),
8a51866f
RD
967 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
968 IB_QP_QKEY),
969 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
970 IB_QP_QKEY),
dd5f03be 971 },
dbf727de 972 },
8a51866f
RD
973 },
974 [IB_QPS_RTR] = {
975 [IB_QPS_RESET] = { .valid = 1 },
976 [IB_QPS_ERR] = { .valid = 1 },
977 [IB_QPS_RTS] = {
978 .valid = 1,
979 .req_param = {
980 [IB_QPT_UD] = IB_QP_SQ_PSN,
981 [IB_QPT_UC] = IB_QP_SQ_PSN,
982 [IB_QPT_RC] = (IB_QP_TIMEOUT |
983 IB_QP_RETRY_CNT |
984 IB_QP_RNR_RETRY |
985 IB_QP_SQ_PSN |
986 IB_QP_MAX_QP_RD_ATOMIC),
b42b63cf
SH
987 [IB_QPT_XRC_INI] = (IB_QP_TIMEOUT |
988 IB_QP_RETRY_CNT |
989 IB_QP_RNR_RETRY |
990 IB_QP_SQ_PSN |
991 IB_QP_MAX_QP_RD_ATOMIC),
992 [IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT |
993 IB_QP_SQ_PSN),
8a51866f
RD
994 [IB_QPT_SMI] = IB_QP_SQ_PSN,
995 [IB_QPT_GSI] = IB_QP_SQ_PSN,
996 },
997 .opt_param = {
998 [IB_QPT_UD] = (IB_QP_CUR_STATE |
999 IB_QP_QKEY),
1000 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1001 IB_QP_ALT_PATH |
1002 IB_QP_ACCESS_FLAGS |
1003 IB_QP_PATH_MIG_STATE),
1004 [IB_QPT_RC] = (IB_QP_CUR_STATE |
1005 IB_QP_ALT_PATH |
1006 IB_QP_ACCESS_FLAGS |
1007 IB_QP_MIN_RNR_TIMER |
1008 IB_QP_PATH_MIG_STATE),
b42b63cf
SH
1009 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
1010 IB_QP_ALT_PATH |
1011 IB_QP_ACCESS_FLAGS |
1012 IB_QP_PATH_MIG_STATE),
1013 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
1014 IB_QP_ALT_PATH |
1015 IB_QP_ACCESS_FLAGS |
1016 IB_QP_MIN_RNR_TIMER |
1017 IB_QP_PATH_MIG_STATE),
8a51866f
RD
1018 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1019 IB_QP_QKEY),
1020 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1021 IB_QP_QKEY),
528e5a1b 1022 [IB_QPT_RAW_PACKET] = IB_QP_RATE_LIMIT,
8a51866f
RD
1023 }
1024 }
1025 },
1026 [IB_QPS_RTS] = {
1027 [IB_QPS_RESET] = { .valid = 1 },
1028 [IB_QPS_ERR] = { .valid = 1 },
1029 [IB_QPS_RTS] = {
1030 .valid = 1,
1031 .opt_param = {
1032 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1033 IB_QP_QKEY),
4546d31d
DB
1034 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1035 IB_QP_ACCESS_FLAGS |
8a51866f
RD
1036 IB_QP_ALT_PATH |
1037 IB_QP_PATH_MIG_STATE),
4546d31d
DB
1038 [IB_QPT_RC] = (IB_QP_CUR_STATE |
1039 IB_QP_ACCESS_FLAGS |
8a51866f
RD
1040 IB_QP_ALT_PATH |
1041 IB_QP_PATH_MIG_STATE |
1042 IB_QP_MIN_RNR_TIMER),
b42b63cf
SH
1043 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
1044 IB_QP_ACCESS_FLAGS |
1045 IB_QP_ALT_PATH |
1046 IB_QP_PATH_MIG_STATE),
1047 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
1048 IB_QP_ACCESS_FLAGS |
1049 IB_QP_ALT_PATH |
1050 IB_QP_PATH_MIG_STATE |
1051 IB_QP_MIN_RNR_TIMER),
8a51866f
RD
1052 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1053 IB_QP_QKEY),
1054 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1055 IB_QP_QKEY),
528e5a1b 1056 [IB_QPT_RAW_PACKET] = IB_QP_RATE_LIMIT,
8a51866f
RD
1057 }
1058 },
1059 [IB_QPS_SQD] = {
1060 .valid = 1,
1061 .opt_param = {
1062 [IB_QPT_UD] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1063 [IB_QPT_UC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1064 [IB_QPT_RC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
b42b63cf
SH
1065 [IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1066 [IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */
8a51866f
RD
1067 [IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1068 [IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY
1069 }
1070 },
1071 },
1072 [IB_QPS_SQD] = {
1073 [IB_QPS_RESET] = { .valid = 1 },
1074 [IB_QPS_ERR] = { .valid = 1 },
1075 [IB_QPS_RTS] = {
1076 .valid = 1,
1077 .opt_param = {
1078 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1079 IB_QP_QKEY),
1080 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1081 IB_QP_ALT_PATH |
1082 IB_QP_ACCESS_FLAGS |
1083 IB_QP_PATH_MIG_STATE),
1084 [IB_QPT_RC] = (IB_QP_CUR_STATE |
1085 IB_QP_ALT_PATH |
1086 IB_QP_ACCESS_FLAGS |
1087 IB_QP_MIN_RNR_TIMER |
1088 IB_QP_PATH_MIG_STATE),
b42b63cf
SH
1089 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
1090 IB_QP_ALT_PATH |
1091 IB_QP_ACCESS_FLAGS |
1092 IB_QP_PATH_MIG_STATE),
1093 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
1094 IB_QP_ALT_PATH |
1095 IB_QP_ACCESS_FLAGS |
1096 IB_QP_MIN_RNR_TIMER |
1097 IB_QP_PATH_MIG_STATE),
8a51866f
RD
1098 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1099 IB_QP_QKEY),
1100 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1101 IB_QP_QKEY),
1102 }
1103 },
1104 [IB_QPS_SQD] = {
1105 .valid = 1,
1106 .opt_param = {
1107 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
1108 IB_QP_QKEY),
1109 [IB_QPT_UC] = (IB_QP_AV |
8a51866f
RD
1110 IB_QP_ALT_PATH |
1111 IB_QP_ACCESS_FLAGS |
1112 IB_QP_PKEY_INDEX |
1113 IB_QP_PATH_MIG_STATE),
1114 [IB_QPT_RC] = (IB_QP_PORT |
1115 IB_QP_AV |
1116 IB_QP_TIMEOUT |
1117 IB_QP_RETRY_CNT |
1118 IB_QP_RNR_RETRY |
1119 IB_QP_MAX_QP_RD_ATOMIC |
1120 IB_QP_MAX_DEST_RD_ATOMIC |
8a51866f
RD
1121 IB_QP_ALT_PATH |
1122 IB_QP_ACCESS_FLAGS |
1123 IB_QP_PKEY_INDEX |
1124 IB_QP_MIN_RNR_TIMER |
1125 IB_QP_PATH_MIG_STATE),
b42b63cf
SH
1126 [IB_QPT_XRC_INI] = (IB_QP_PORT |
1127 IB_QP_AV |
1128 IB_QP_TIMEOUT |
1129 IB_QP_RETRY_CNT |
1130 IB_QP_RNR_RETRY |
1131 IB_QP_MAX_QP_RD_ATOMIC |
1132 IB_QP_ALT_PATH |
1133 IB_QP_ACCESS_FLAGS |
1134 IB_QP_PKEY_INDEX |
1135 IB_QP_PATH_MIG_STATE),
1136 [IB_QPT_XRC_TGT] = (IB_QP_PORT |
1137 IB_QP_AV |
1138 IB_QP_TIMEOUT |
1139 IB_QP_MAX_DEST_RD_ATOMIC |
1140 IB_QP_ALT_PATH |
1141 IB_QP_ACCESS_FLAGS |
1142 IB_QP_PKEY_INDEX |
1143 IB_QP_MIN_RNR_TIMER |
1144 IB_QP_PATH_MIG_STATE),
8a51866f
RD
1145 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
1146 IB_QP_QKEY),
1147 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
1148 IB_QP_QKEY),
1149 }
1150 }
1151 },
1152 [IB_QPS_SQE] = {
1153 [IB_QPS_RESET] = { .valid = 1 },
1154 [IB_QPS_ERR] = { .valid = 1 },
1155 [IB_QPS_RTS] = {
1156 .valid = 1,
1157 .opt_param = {
1158 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1159 IB_QP_QKEY),
1160 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1161 IB_QP_ACCESS_FLAGS),
1162 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1163 IB_QP_QKEY),
1164 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1165 IB_QP_QKEY),
1166 }
1167 }
1168 },
1169 [IB_QPS_ERR] = {
1170 [IB_QPS_RESET] = { .valid = 1 },
1171 [IB_QPS_ERR] = { .valid = 1 }
1172 }
1173};
1174
1175int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
dd5f03be
MB
1176 enum ib_qp_type type, enum ib_qp_attr_mask mask,
1177 enum rdma_link_layer ll)
8a51866f
RD
1178{
1179 enum ib_qp_attr_mask req_param, opt_param;
1180
1181 if (cur_state < 0 || cur_state > IB_QPS_ERR ||
1182 next_state < 0 || next_state > IB_QPS_ERR)
1183 return 0;
1184
1185 if (mask & IB_QP_CUR_STATE &&
1186 cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
1187 cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE)
1188 return 0;
1189
1190 if (!qp_state_table[cur_state][next_state].valid)
1191 return 0;
1192
1193 req_param = qp_state_table[cur_state][next_state].req_param[type];
1194 opt_param = qp_state_table[cur_state][next_state].opt_param[type];
1195
1196 if ((mask & req_param) != req_param)
1197 return 0;
1198
1199 if (mask & ~(req_param | opt_param | IB_QP_STATE))
1200 return 0;
1201
1202 return 1;
1203}
1204EXPORT_SYMBOL(ib_modify_qp_is_ok);
1205
c90ea9d8 1206int ib_resolve_eth_dmac(struct ib_device *device,
90898850 1207 struct rdma_ah_attr *ah_attr)
ed4c54e5
OG
1208{
1209 int ret = 0;
d8966fcd 1210 struct ib_global_route *grh;
ed4c54e5 1211
d8966fcd 1212 if (!rdma_is_port_valid(device, rdma_ah_get_port_num(ah_attr)))
c90ea9d8 1213 return -EINVAL;
dbf727de 1214
44c58487 1215 if (ah_attr->type != RDMA_AH_ATTR_TYPE_ROCE)
c90ea9d8 1216 return 0;
dbf727de 1217
d8966fcd
DC
1218 grh = rdma_ah_retrieve_grh(ah_attr);
1219
1220 if (rdma_link_local_addr((struct in6_addr *)grh->dgid.raw)) {
1221 rdma_get_ll_mac((struct in6_addr *)grh->dgid.raw,
44c58487 1222 ah_attr->roce.dmac);
c90ea9d8
MS
1223 } else {
1224 union ib_gid sgid;
1225 struct ib_gid_attr sgid_attr;
1226 int ifindex;
1227 int hop_limit;
1228
1229 ret = ib_query_gid(device,
d8966fcd
DC
1230 rdma_ah_get_port_num(ah_attr),
1231 grh->sgid_index,
c90ea9d8
MS
1232 &sgid, &sgid_attr);
1233
1234 if (ret || !sgid_attr.ndev) {
1235 if (!ret)
1236 ret = -ENXIO;
1237 goto out;
1238 }
dbf727de 1239
c90ea9d8 1240 ifindex = sgid_attr.ndev->ifindex;
c3efe750 1241
d8966fcd
DC
1242 ret =
1243 rdma_addr_find_l2_eth_by_grh(&sgid, &grh->dgid,
44c58487 1244 ah_attr->roce.dmac,
d8966fcd 1245 NULL, &ifindex, &hop_limit);
c90ea9d8
MS
1246
1247 dev_put(sgid_attr.ndev);
1248
d8966fcd 1249 grh->hop_limit = hop_limit;
ed4c54e5
OG
1250 }
1251out:
1252 return ret;
1253}
dbf727de 1254EXPORT_SYMBOL(ib_resolve_eth_dmac);
ed4c54e5 1255
1da177e4
LT
1256int ib_modify_qp(struct ib_qp *qp,
1257 struct ib_qp_attr *qp_attr,
1258 int qp_attr_mask)
1259{
ed4c54e5 1260
c90ea9d8
MS
1261 if (qp_attr_mask & IB_QP_AV) {
1262 int ret;
1263
1264 ret = ib_resolve_eth_dmac(qp->device, &qp_attr->ah_attr);
1265 if (ret)
1266 return ret;
1267 }
ed4c54e5 1268
0e0ec7e0 1269 return qp->device->modify_qp(qp->real_qp, qp_attr, qp_attr_mask, NULL);
1da177e4
LT
1270}
1271EXPORT_SYMBOL(ib_modify_qp);
1272
1273int ib_query_qp(struct ib_qp *qp,
1274 struct ib_qp_attr *qp_attr,
1275 int qp_attr_mask,
1276 struct ib_qp_init_attr *qp_init_attr)
1277{
1278 return qp->device->query_qp ?
0e0ec7e0 1279 qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) :
1da177e4
LT
1280 -ENOSYS;
1281}
1282EXPORT_SYMBOL(ib_query_qp);
1283
0e0ec7e0
SH
1284int ib_close_qp(struct ib_qp *qp)
1285{
1286 struct ib_qp *real_qp;
1287 unsigned long flags;
1288
1289 real_qp = qp->real_qp;
1290 if (real_qp == qp)
1291 return -EINVAL;
1292
1293 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
1294 list_del(&qp->open_list);
1295 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
1296
1297 atomic_dec(&real_qp->usecnt);
1298 kfree(qp);
1299
1300 return 0;
1301}
1302EXPORT_SYMBOL(ib_close_qp);
1303
1304static int __ib_destroy_shared_qp(struct ib_qp *qp)
1305{
1306 struct ib_xrcd *xrcd;
1307 struct ib_qp *real_qp;
1308 int ret;
1309
1310 real_qp = qp->real_qp;
1311 xrcd = real_qp->xrcd;
1312
1313 mutex_lock(&xrcd->tgt_qp_mutex);
1314 ib_close_qp(qp);
1315 if (atomic_read(&real_qp->usecnt) == 0)
1316 list_del(&real_qp->xrcd_list);
1317 else
1318 real_qp = NULL;
1319 mutex_unlock(&xrcd->tgt_qp_mutex);
1320
1321 if (real_qp) {
1322 ret = ib_destroy_qp(real_qp);
1323 if (!ret)
1324 atomic_dec(&xrcd->usecnt);
1325 else
1326 __ib_insert_xrcd_qp(xrcd, real_qp);
1327 }
1328
1329 return 0;
1330}
1331
1da177e4
LT
1332int ib_destroy_qp(struct ib_qp *qp)
1333{
1334 struct ib_pd *pd;
1335 struct ib_cq *scq, *rcq;
1336 struct ib_srq *srq;
a9017e23 1337 struct ib_rwq_ind_table *ind_tbl;
1da177e4
LT
1338 int ret;
1339
fffb0383
CH
1340 WARN_ON_ONCE(qp->mrs_used > 0);
1341
0e0ec7e0
SH
1342 if (atomic_read(&qp->usecnt))
1343 return -EBUSY;
1344
1345 if (qp->real_qp != qp)
1346 return __ib_destroy_shared_qp(qp);
1347
b42b63cf
SH
1348 pd = qp->pd;
1349 scq = qp->send_cq;
1350 rcq = qp->recv_cq;
1351 srq = qp->srq;
a9017e23 1352 ind_tbl = qp->rwq_ind_tbl;
1da177e4 1353
a060b562
CH
1354 if (!qp->uobject)
1355 rdma_rw_cleanup_mrs(qp);
1356
1da177e4
LT
1357 ret = qp->device->destroy_qp(qp);
1358 if (!ret) {
b42b63cf
SH
1359 if (pd)
1360 atomic_dec(&pd->usecnt);
1361 if (scq)
1362 atomic_dec(&scq->usecnt);
1363 if (rcq)
1364 atomic_dec(&rcq->usecnt);
1da177e4
LT
1365 if (srq)
1366 atomic_dec(&srq->usecnt);
a9017e23
YH
1367 if (ind_tbl)
1368 atomic_dec(&ind_tbl->usecnt);
1da177e4
LT
1369 }
1370
1371 return ret;
1372}
1373EXPORT_SYMBOL(ib_destroy_qp);
1374
1375/* Completion queues */
1376
1377struct ib_cq *ib_create_cq(struct ib_device *device,
1378 ib_comp_handler comp_handler,
1379 void (*event_handler)(struct ib_event *, void *),
8e37210b
MB
1380 void *cq_context,
1381 const struct ib_cq_init_attr *cq_attr)
1da177e4
LT
1382{
1383 struct ib_cq *cq;
1384
8e37210b 1385 cq = device->create_cq(device, cq_attr, NULL, NULL);
1da177e4
LT
1386
1387 if (!IS_ERR(cq)) {
1388 cq->device = device;
b5e81bf5 1389 cq->uobject = NULL;
1da177e4
LT
1390 cq->comp_handler = comp_handler;
1391 cq->event_handler = event_handler;
1392 cq->cq_context = cq_context;
1393 atomic_set(&cq->usecnt, 0);
1394 }
1395
1396 return cq;
1397}
1398EXPORT_SYMBOL(ib_create_cq);
1399
2dd57162
EC
1400int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period)
1401{
1402 return cq->device->modify_cq ?
1403 cq->device->modify_cq(cq, cq_count, cq_period) : -ENOSYS;
1404}
1405EXPORT_SYMBOL(ib_modify_cq);
1406
1da177e4
LT
1407int ib_destroy_cq(struct ib_cq *cq)
1408{
1409 if (atomic_read(&cq->usecnt))
1410 return -EBUSY;
1411
1412 return cq->device->destroy_cq(cq);
1413}
1414EXPORT_SYMBOL(ib_destroy_cq);
1415
a74cd4af 1416int ib_resize_cq(struct ib_cq *cq, int cqe)
1da177e4 1417{
40de2e54 1418 return cq->device->resize_cq ?
33b9b3ee 1419 cq->device->resize_cq(cq, cqe, NULL) : -ENOSYS;
1da177e4
LT
1420}
1421EXPORT_SYMBOL(ib_resize_cq);
1422
1423/* Memory regions */
1424
1da177e4
LT
1425int ib_dereg_mr(struct ib_mr *mr)
1426{
ab67ed8d 1427 struct ib_pd *pd = mr->pd;
1da177e4
LT
1428 int ret;
1429
1da177e4
LT
1430 ret = mr->device->dereg_mr(mr);
1431 if (!ret)
1432 atomic_dec(&pd->usecnt);
1433
1434 return ret;
1435}
1436EXPORT_SYMBOL(ib_dereg_mr);
1437
9bee178b
SG
1438/**
1439 * ib_alloc_mr() - Allocates a memory region
1440 * @pd: protection domain associated with the region
1441 * @mr_type: memory region type
1442 * @max_num_sg: maximum sg entries available for registration.
1443 *
1444 * Notes:
1445 * Memory registeration page/sg lists must not exceed max_num_sg.
1446 * For mr_type IB_MR_TYPE_MEM_REG, the total length cannot exceed
1447 * max_num_sg * used_page_size.
1448 *
1449 */
1450struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
1451 enum ib_mr_type mr_type,
1452 u32 max_num_sg)
00f7ec36
SW
1453{
1454 struct ib_mr *mr;
1455
d9f272c5 1456 if (!pd->device->alloc_mr)
00f7ec36
SW
1457 return ERR_PTR(-ENOSYS);
1458
d9f272c5 1459 mr = pd->device->alloc_mr(pd, mr_type, max_num_sg);
00f7ec36
SW
1460 if (!IS_ERR(mr)) {
1461 mr->device = pd->device;
1462 mr->pd = pd;
1463 mr->uobject = NULL;
1464 atomic_inc(&pd->usecnt);
d4a85c30 1465 mr->need_inval = false;
00f7ec36
SW
1466 }
1467
1468 return mr;
1469}
d9f272c5 1470EXPORT_SYMBOL(ib_alloc_mr);
00f7ec36 1471
1da177e4
LT
1472/* "Fast" memory regions */
1473
1474struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
1475 int mr_access_flags,
1476 struct ib_fmr_attr *fmr_attr)
1477{
1478 struct ib_fmr *fmr;
1479
1480 if (!pd->device->alloc_fmr)
1481 return ERR_PTR(-ENOSYS);
1482
1483 fmr = pd->device->alloc_fmr(pd, mr_access_flags, fmr_attr);
1484 if (!IS_ERR(fmr)) {
1485 fmr->device = pd->device;
1486 fmr->pd = pd;
1487 atomic_inc(&pd->usecnt);
1488 }
1489
1490 return fmr;
1491}
1492EXPORT_SYMBOL(ib_alloc_fmr);
1493
1494int ib_unmap_fmr(struct list_head *fmr_list)
1495{
1496 struct ib_fmr *fmr;
1497
1498 if (list_empty(fmr_list))
1499 return 0;
1500
1501 fmr = list_entry(fmr_list->next, struct ib_fmr, list);
1502 return fmr->device->unmap_fmr(fmr_list);
1503}
1504EXPORT_SYMBOL(ib_unmap_fmr);
1505
1506int ib_dealloc_fmr(struct ib_fmr *fmr)
1507{
1508 struct ib_pd *pd;
1509 int ret;
1510
1511 pd = fmr->pd;
1512 ret = fmr->device->dealloc_fmr(fmr);
1513 if (!ret)
1514 atomic_dec(&pd->usecnt);
1515
1516 return ret;
1517}
1518EXPORT_SYMBOL(ib_dealloc_fmr);
1519
1520/* Multicast groups */
1521
1522int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1523{
c3bccbfb
OG
1524 int ret;
1525
0c33aeed
JM
1526 if (!qp->device->attach_mcast)
1527 return -ENOSYS;
8561eae6
MR
1528 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD ||
1529 lid < be16_to_cpu(IB_MULTICAST_LID_BASE) ||
1530 lid == be16_to_cpu(IB_LID_PERMISSIVE))
0c33aeed
JM
1531 return -EINVAL;
1532
c3bccbfb
OG
1533 ret = qp->device->attach_mcast(qp, gid, lid);
1534 if (!ret)
1535 atomic_inc(&qp->usecnt);
1536 return ret;
1da177e4
LT
1537}
1538EXPORT_SYMBOL(ib_attach_mcast);
1539
1540int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1541{
c3bccbfb
OG
1542 int ret;
1543
0c33aeed
JM
1544 if (!qp->device->detach_mcast)
1545 return -ENOSYS;
8561eae6
MR
1546 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD ||
1547 lid < be16_to_cpu(IB_MULTICAST_LID_BASE) ||
1548 lid == be16_to_cpu(IB_LID_PERMISSIVE))
0c33aeed
JM
1549 return -EINVAL;
1550
c3bccbfb
OG
1551 ret = qp->device->detach_mcast(qp, gid, lid);
1552 if (!ret)
1553 atomic_dec(&qp->usecnt);
1554 return ret;
1da177e4
LT
1555}
1556EXPORT_SYMBOL(ib_detach_mcast);
59991f94
SH
1557
1558struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device)
1559{
1560 struct ib_xrcd *xrcd;
1561
1562 if (!device->alloc_xrcd)
1563 return ERR_PTR(-ENOSYS);
1564
1565 xrcd = device->alloc_xrcd(device, NULL, NULL);
1566 if (!IS_ERR(xrcd)) {
1567 xrcd->device = device;
53d0bd1e 1568 xrcd->inode = NULL;
59991f94 1569 atomic_set(&xrcd->usecnt, 0);
d3d72d90
SH
1570 mutex_init(&xrcd->tgt_qp_mutex);
1571 INIT_LIST_HEAD(&xrcd->tgt_qp_list);
59991f94
SH
1572 }
1573
1574 return xrcd;
1575}
1576EXPORT_SYMBOL(ib_alloc_xrcd);
1577
1578int ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1579{
d3d72d90
SH
1580 struct ib_qp *qp;
1581 int ret;
1582
59991f94
SH
1583 if (atomic_read(&xrcd->usecnt))
1584 return -EBUSY;
1585
d3d72d90
SH
1586 while (!list_empty(&xrcd->tgt_qp_list)) {
1587 qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list);
1588 ret = ib_destroy_qp(qp);
1589 if (ret)
1590 return ret;
1591 }
1592
59991f94
SH
1593 return xrcd->device->dealloc_xrcd(xrcd);
1594}
1595EXPORT_SYMBOL(ib_dealloc_xrcd);
319a441d 1596
5fd251c8
YH
1597/**
1598 * ib_create_wq - Creates a WQ associated with the specified protection
1599 * domain.
1600 * @pd: The protection domain associated with the WQ.
1601 * @wq_init_attr: A list of initial attributes required to create the
1602 * WQ. If WQ creation succeeds, then the attributes are updated to
1603 * the actual capabilities of the created WQ.
1604 *
1605 * wq_init_attr->max_wr and wq_init_attr->max_sge determine
1606 * the requested size of the WQ, and set to the actual values allocated
1607 * on return.
1608 * If ib_create_wq() succeeds, then max_wr and max_sge will always be
1609 * at least as large as the requested values.
1610 */
1611struct ib_wq *ib_create_wq(struct ib_pd *pd,
1612 struct ib_wq_init_attr *wq_attr)
1613{
1614 struct ib_wq *wq;
1615
1616 if (!pd->device->create_wq)
1617 return ERR_PTR(-ENOSYS);
1618
1619 wq = pd->device->create_wq(pd, wq_attr, NULL);
1620 if (!IS_ERR(wq)) {
1621 wq->event_handler = wq_attr->event_handler;
1622 wq->wq_context = wq_attr->wq_context;
1623 wq->wq_type = wq_attr->wq_type;
1624 wq->cq = wq_attr->cq;
1625 wq->device = pd->device;
1626 wq->pd = pd;
1627 wq->uobject = NULL;
1628 atomic_inc(&pd->usecnt);
1629 atomic_inc(&wq_attr->cq->usecnt);
1630 atomic_set(&wq->usecnt, 0);
1631 }
1632 return wq;
1633}
1634EXPORT_SYMBOL(ib_create_wq);
1635
1636/**
1637 * ib_destroy_wq - Destroys the specified WQ.
1638 * @wq: The WQ to destroy.
1639 */
1640int ib_destroy_wq(struct ib_wq *wq)
1641{
1642 int err;
1643 struct ib_cq *cq = wq->cq;
1644 struct ib_pd *pd = wq->pd;
1645
1646 if (atomic_read(&wq->usecnt))
1647 return -EBUSY;
1648
1649 err = wq->device->destroy_wq(wq);
1650 if (!err) {
1651 atomic_dec(&pd->usecnt);
1652 atomic_dec(&cq->usecnt);
1653 }
1654 return err;
1655}
1656EXPORT_SYMBOL(ib_destroy_wq);
1657
1658/**
1659 * ib_modify_wq - Modifies the specified WQ.
1660 * @wq: The WQ to modify.
1661 * @wq_attr: On input, specifies the WQ attributes to modify.
1662 * @wq_attr_mask: A bit-mask used to specify which attributes of the WQ
1663 * are being modified.
1664 * On output, the current values of selected WQ attributes are returned.
1665 */
1666int ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
1667 u32 wq_attr_mask)
1668{
1669 int err;
1670
1671 if (!wq->device->modify_wq)
1672 return -ENOSYS;
1673
1674 err = wq->device->modify_wq(wq, wq_attr, wq_attr_mask, NULL);
1675 return err;
1676}
1677EXPORT_SYMBOL(ib_modify_wq);
1678
6d39786b
YH
1679/*
1680 * ib_create_rwq_ind_table - Creates a RQ Indirection Table.
1681 * @device: The device on which to create the rwq indirection table.
1682 * @ib_rwq_ind_table_init_attr: A list of initial attributes required to
1683 * create the Indirection Table.
1684 *
1685 * Note: The life time of ib_rwq_ind_table_init_attr->ind_tbl is not less
1686 * than the created ib_rwq_ind_table object and the caller is responsible
1687 * for its memory allocation/free.
1688 */
1689struct ib_rwq_ind_table *ib_create_rwq_ind_table(struct ib_device *device,
1690 struct ib_rwq_ind_table_init_attr *init_attr)
1691{
1692 struct ib_rwq_ind_table *rwq_ind_table;
1693 int i;
1694 u32 table_size;
1695
1696 if (!device->create_rwq_ind_table)
1697 return ERR_PTR(-ENOSYS);
1698
1699 table_size = (1 << init_attr->log_ind_tbl_size);
1700 rwq_ind_table = device->create_rwq_ind_table(device,
1701 init_attr, NULL);
1702 if (IS_ERR(rwq_ind_table))
1703 return rwq_ind_table;
1704
1705 rwq_ind_table->ind_tbl = init_attr->ind_tbl;
1706 rwq_ind_table->log_ind_tbl_size = init_attr->log_ind_tbl_size;
1707 rwq_ind_table->device = device;
1708 rwq_ind_table->uobject = NULL;
1709 atomic_set(&rwq_ind_table->usecnt, 0);
1710
1711 for (i = 0; i < table_size; i++)
1712 atomic_inc(&rwq_ind_table->ind_tbl[i]->usecnt);
1713
1714 return rwq_ind_table;
1715}
1716EXPORT_SYMBOL(ib_create_rwq_ind_table);
1717
1718/*
1719 * ib_destroy_rwq_ind_table - Destroys the specified Indirection Table.
1720 * @wq_ind_table: The Indirection Table to destroy.
1721*/
1722int ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *rwq_ind_table)
1723{
1724 int err, i;
1725 u32 table_size = (1 << rwq_ind_table->log_ind_tbl_size);
1726 struct ib_wq **ind_tbl = rwq_ind_table->ind_tbl;
1727
1728 if (atomic_read(&rwq_ind_table->usecnt))
1729 return -EBUSY;
1730
1731 err = rwq_ind_table->device->destroy_rwq_ind_table(rwq_ind_table);
1732 if (!err) {
1733 for (i = 0; i < table_size; i++)
1734 atomic_dec(&ind_tbl[i]->usecnt);
1735 }
1736
1737 return err;
1738}
1739EXPORT_SYMBOL(ib_destroy_rwq_ind_table);
1740
319a441d
HHZ
1741struct ib_flow *ib_create_flow(struct ib_qp *qp,
1742 struct ib_flow_attr *flow_attr,
1743 int domain)
1744{
1745 struct ib_flow *flow_id;
1746 if (!qp->device->create_flow)
1747 return ERR_PTR(-ENOSYS);
1748
1749 flow_id = qp->device->create_flow(qp, flow_attr, domain);
8ecc7985 1750 if (!IS_ERR(flow_id)) {
319a441d 1751 atomic_inc(&qp->usecnt);
8ecc7985
MB
1752 flow_id->qp = qp;
1753 }
319a441d
HHZ
1754 return flow_id;
1755}
1756EXPORT_SYMBOL(ib_create_flow);
1757
1758int ib_destroy_flow(struct ib_flow *flow_id)
1759{
1760 int err;
1761 struct ib_qp *qp = flow_id->qp;
1762
1763 err = qp->device->destroy_flow(flow_id);
1764 if (!err)
1765 atomic_dec(&qp->usecnt);
1766 return err;
1767}
1768EXPORT_SYMBOL(ib_destroy_flow);
1b01d335
SG
1769
1770int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
1771 struct ib_mr_status *mr_status)
1772{
1773 return mr->device->check_mr_status ?
1774 mr->device->check_mr_status(mr, check_mask, mr_status) : -ENOSYS;
1775}
1776EXPORT_SYMBOL(ib_check_mr_status);
4c67e2bf 1777
50174a7f
EC
1778int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port,
1779 int state)
1780{
1781 if (!device->set_vf_link_state)
1782 return -ENOSYS;
1783
1784 return device->set_vf_link_state(device, vf, port, state);
1785}
1786EXPORT_SYMBOL(ib_set_vf_link_state);
1787
1788int ib_get_vf_config(struct ib_device *device, int vf, u8 port,
1789 struct ifla_vf_info *info)
1790{
1791 if (!device->get_vf_config)
1792 return -ENOSYS;
1793
1794 return device->get_vf_config(device, vf, port, info);
1795}
1796EXPORT_SYMBOL(ib_get_vf_config);
1797
1798int ib_get_vf_stats(struct ib_device *device, int vf, u8 port,
1799 struct ifla_vf_stats *stats)
1800{
1801 if (!device->get_vf_stats)
1802 return -ENOSYS;
1803
1804 return device->get_vf_stats(device, vf, port, stats);
1805}
1806EXPORT_SYMBOL(ib_get_vf_stats);
1807
1808int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid,
1809 int type)
1810{
1811 if (!device->set_vf_guid)
1812 return -ENOSYS;
1813
1814 return device->set_vf_guid(device, vf, port, guid, type);
1815}
1816EXPORT_SYMBOL(ib_set_vf_guid);
1817
4c67e2bf
SG
1818/**
1819 * ib_map_mr_sg() - Map the largest prefix of a dma mapped SG list
1820 * and set it the memory region.
1821 * @mr: memory region
1822 * @sg: dma mapped scatterlist
1823 * @sg_nents: number of entries in sg
ff2ba993 1824 * @sg_offset: offset in bytes into sg
4c67e2bf
SG
1825 * @page_size: page vector desired page size
1826 *
1827 * Constraints:
1828 * - The first sg element is allowed to have an offset.
52746129
BVA
1829 * - Each sg element must either be aligned to page_size or virtually
1830 * contiguous to the previous element. In case an sg element has a
1831 * non-contiguous offset, the mapping prefix will not include it.
4c67e2bf
SG
1832 * - The last sg element is allowed to have length less than page_size.
1833 * - If sg_nents total byte length exceeds the mr max_num_sge * page_size
1834 * then only max_num_sg entries will be mapped.
52746129 1835 * - If the MR was allocated with type IB_MR_TYPE_SG_GAPS, none of these
f5aa9159 1836 * constraints holds and the page_size argument is ignored.
4c67e2bf
SG
1837 *
1838 * Returns the number of sg elements that were mapped to the memory region.
1839 *
1840 * After this completes successfully, the memory region
1841 * is ready for registration.
1842 */
ff2ba993 1843int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
9aa8b321 1844 unsigned int *sg_offset, unsigned int page_size)
4c67e2bf
SG
1845{
1846 if (unlikely(!mr->device->map_mr_sg))
1847 return -ENOSYS;
1848
1849 mr->page_size = page_size;
1850
ff2ba993 1851 return mr->device->map_mr_sg(mr, sg, sg_nents, sg_offset);
4c67e2bf
SG
1852}
1853EXPORT_SYMBOL(ib_map_mr_sg);
1854
1855/**
1856 * ib_sg_to_pages() - Convert the largest prefix of a sg list
1857 * to a page vector
1858 * @mr: memory region
1859 * @sgl: dma mapped scatterlist
1860 * @sg_nents: number of entries in sg
9aa8b321
BVA
1861 * @sg_offset_p: IN: start offset in bytes into sg
1862 * OUT: offset in bytes for element n of the sg of the first
1863 * byte that has not been processed where n is the return
1864 * value of this function.
4c67e2bf
SG
1865 * @set_page: driver page assignment function pointer
1866 *
8f5ba10e 1867 * Core service helper for drivers to convert the largest
4c67e2bf
SG
1868 * prefix of given sg list to a page vector. The sg list
1869 * prefix converted is the prefix that meet the requirements
1870 * of ib_map_mr_sg.
1871 *
1872 * Returns the number of sg elements that were assigned to
1873 * a page vector.
1874 */
ff2ba993 1875int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents,
9aa8b321 1876 unsigned int *sg_offset_p, int (*set_page)(struct ib_mr *, u64))
4c67e2bf
SG
1877{
1878 struct scatterlist *sg;
b6aeb980 1879 u64 last_end_dma_addr = 0;
9aa8b321 1880 unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0;
4c67e2bf
SG
1881 unsigned int last_page_off = 0;
1882 u64 page_mask = ~((u64)mr->page_size - 1);
8f5ba10e 1883 int i, ret;
4c67e2bf 1884
9aa8b321
BVA
1885 if (unlikely(sg_nents <= 0 || sg_offset > sg_dma_len(&sgl[0])))
1886 return -EINVAL;
1887
ff2ba993 1888 mr->iova = sg_dma_address(&sgl[0]) + sg_offset;
4c67e2bf
SG
1889 mr->length = 0;
1890
1891 for_each_sg(sgl, sg, sg_nents, i) {
ff2ba993 1892 u64 dma_addr = sg_dma_address(sg) + sg_offset;
9aa8b321 1893 u64 prev_addr = dma_addr;
ff2ba993 1894 unsigned int dma_len = sg_dma_len(sg) - sg_offset;
4c67e2bf
SG
1895 u64 end_dma_addr = dma_addr + dma_len;
1896 u64 page_addr = dma_addr & page_mask;
1897
8f5ba10e
BVA
1898 /*
1899 * For the second and later elements, check whether either the
1900 * end of element i-1 or the start of element i is not aligned
1901 * on a page boundary.
1902 */
1903 if (i && (last_page_off != 0 || page_addr != dma_addr)) {
1904 /* Stop mapping if there is a gap. */
1905 if (last_end_dma_addr != dma_addr)
1906 break;
1907
1908 /*
1909 * Coalesce this element with the last. If it is small
1910 * enough just update mr->length. Otherwise start
1911 * mapping from the next page.
1912 */
1913 goto next_page;
4c67e2bf
SG
1914 }
1915
1916 do {
8f5ba10e 1917 ret = set_page(mr, page_addr);
9aa8b321
BVA
1918 if (unlikely(ret < 0)) {
1919 sg_offset = prev_addr - sg_dma_address(sg);
1920 mr->length += prev_addr - dma_addr;
1921 if (sg_offset_p)
1922 *sg_offset_p = sg_offset;
1923 return i || sg_offset ? i : ret;
1924 }
1925 prev_addr = page_addr;
8f5ba10e 1926next_page:
4c67e2bf
SG
1927 page_addr += mr->page_size;
1928 } while (page_addr < end_dma_addr);
1929
1930 mr->length += dma_len;
1931 last_end_dma_addr = end_dma_addr;
4c67e2bf 1932 last_page_off = end_dma_addr & ~page_mask;
ff2ba993
CH
1933
1934 sg_offset = 0;
4c67e2bf
SG
1935 }
1936
9aa8b321
BVA
1937 if (sg_offset_p)
1938 *sg_offset_p = 0;
4c67e2bf
SG
1939 return i;
1940}
1941EXPORT_SYMBOL(ib_sg_to_pages);
765d6774
SW
1942
1943struct ib_drain_cqe {
1944 struct ib_cqe cqe;
1945 struct completion done;
1946};
1947
1948static void ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc)
1949{
1950 struct ib_drain_cqe *cqe = container_of(wc->wr_cqe, struct ib_drain_cqe,
1951 cqe);
1952
1953 complete(&cqe->done);
1954}
1955
1956/*
1957 * Post a WR and block until its completion is reaped for the SQ.
1958 */
1959static void __ib_drain_sq(struct ib_qp *qp)
1960{
f039f44f 1961 struct ib_cq *cq = qp->send_cq;
765d6774
SW
1962 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1963 struct ib_drain_cqe sdrain;
1964 struct ib_send_wr swr = {}, *bad_swr;
1965 int ret;
1966
765d6774
SW
1967 swr.wr_cqe = &sdrain.cqe;
1968 sdrain.cqe.done = ib_drain_qp_done;
1969 init_completion(&sdrain.done);
1970
1971 ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
1972 if (ret) {
1973 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1974 return;
1975 }
1976
1977 ret = ib_post_send(qp, &swr, &bad_swr);
1978 if (ret) {
1979 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1980 return;
1981 }
1982
f039f44f
BVA
1983 if (cq->poll_ctx == IB_POLL_DIRECT)
1984 while (wait_for_completion_timeout(&sdrain.done, HZ / 10) <= 0)
1985 ib_process_cq_direct(cq, -1);
1986 else
1987 wait_for_completion(&sdrain.done);
765d6774
SW
1988}
1989
1990/*
1991 * Post a WR and block until its completion is reaped for the RQ.
1992 */
1993static void __ib_drain_rq(struct ib_qp *qp)
1994{
f039f44f 1995 struct ib_cq *cq = qp->recv_cq;
765d6774
SW
1996 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1997 struct ib_drain_cqe rdrain;
1998 struct ib_recv_wr rwr = {}, *bad_rwr;
1999 int ret;
2000
765d6774
SW
2001 rwr.wr_cqe = &rdrain.cqe;
2002 rdrain.cqe.done = ib_drain_qp_done;
2003 init_completion(&rdrain.done);
2004
2005 ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
2006 if (ret) {
2007 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
2008 return;
2009 }
2010
2011 ret = ib_post_recv(qp, &rwr, &bad_rwr);
2012 if (ret) {
2013 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
2014 return;
2015 }
2016
f039f44f
BVA
2017 if (cq->poll_ctx == IB_POLL_DIRECT)
2018 while (wait_for_completion_timeout(&rdrain.done, HZ / 10) <= 0)
2019 ib_process_cq_direct(cq, -1);
2020 else
2021 wait_for_completion(&rdrain.done);
765d6774
SW
2022}
2023
2024/**
2025 * ib_drain_sq() - Block until all SQ CQEs have been consumed by the
2026 * application.
2027 * @qp: queue pair to drain
2028 *
2029 * If the device has a provider-specific drain function, then
2030 * call that. Otherwise call the generic drain function
2031 * __ib_drain_sq().
2032 *
2033 * The caller must:
2034 *
2035 * ensure there is room in the CQ and SQ for the drain work request and
2036 * completion.
2037 *
f039f44f 2038 * allocate the CQ using ib_alloc_cq().
765d6774
SW
2039 *
2040 * ensure that there are no other contexts that are posting WRs concurrently.
2041 * Otherwise the drain is not guaranteed.
2042 */
2043void ib_drain_sq(struct ib_qp *qp)
2044{
2045 if (qp->device->drain_sq)
2046 qp->device->drain_sq(qp);
2047 else
2048 __ib_drain_sq(qp);
2049}
2050EXPORT_SYMBOL(ib_drain_sq);
2051
2052/**
2053 * ib_drain_rq() - Block until all RQ CQEs have been consumed by the
2054 * application.
2055 * @qp: queue pair to drain
2056 *
2057 * If the device has a provider-specific drain function, then
2058 * call that. Otherwise call the generic drain function
2059 * __ib_drain_rq().
2060 *
2061 * The caller must:
2062 *
2063 * ensure there is room in the CQ and RQ for the drain work request and
2064 * completion.
2065 *
f039f44f 2066 * allocate the CQ using ib_alloc_cq().
765d6774
SW
2067 *
2068 * ensure that there are no other contexts that are posting WRs concurrently.
2069 * Otherwise the drain is not guaranteed.
2070 */
2071void ib_drain_rq(struct ib_qp *qp)
2072{
2073 if (qp->device->drain_rq)
2074 qp->device->drain_rq(qp);
2075 else
2076 __ib_drain_rq(qp);
2077}
2078EXPORT_SYMBOL(ib_drain_rq);
2079
2080/**
2081 * ib_drain_qp() - Block until all CQEs have been consumed by the
2082 * application on both the RQ and SQ.
2083 * @qp: queue pair to drain
2084 *
2085 * The caller must:
2086 *
2087 * ensure there is room in the CQ(s), SQ, and RQ for drain work requests
2088 * and completions.
2089 *
f039f44f 2090 * allocate the CQs using ib_alloc_cq().
765d6774
SW
2091 *
2092 * ensure that there are no other contexts that are posting WRs concurrently.
2093 * Otherwise the drain is not guaranteed.
2094 */
2095void ib_drain_qp(struct ib_qp *qp)
2096{
2097 ib_drain_sq(qp);
42235f80
SG
2098 if (!qp->srq)
2099 ib_drain_rq(qp);
765d6774
SW
2100}
2101EXPORT_SYMBOL(ib_drain_qp);