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Merge tag 'kgdb-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/danielt...
[linux-2.6-block.git] / drivers / iio / magnetometer / bmc150_magn.c
CommitLineData
c91746a2
IT		 1/*
2 * Bosch BMC150 three-axis magnetic field sensor driver
3 *
4 * Copyright (c) 2015, Intel Corporation.
5 *
6 * This code is based on bmm050_api.c authored by contact@bosch.sensortec.com:
7 *
8 * (C) Copyright 2011~2014 Bosch Sensortec GmbH All Rights Reserved
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2, as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 */
19
20#include <linux/module.h>
21#include <linux/i2c.h>
22#include <linux/interrupt.h>
23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/acpi.h>
c91746a2
IT		 26#include <linux/pm.h>
27#include <linux/pm_runtime.h>
28#include <linux/iio/iio.h>
29#include <linux/iio/sysfs.h>
30#include <linux/iio/buffer.h>
31#include <linux/iio/events.h>
32#include <linux/iio/trigger.h>
33#include <linux/iio/trigger_consumer.h>
34#include <linux/iio/triggered_buffer.h>
35#include <linux/regmap.h>
36
761b7910
DB		 37#include "bmc150_magn.h"
38
c91746a2
IT		 39#define BMC150_MAGN_DRV_NAME "bmc150_magn"
40#define BMC150_MAGN_IRQ_NAME "bmc150_magn_event"
c91746a2
IT		 41
42#define BMC150_MAGN_REG_CHIP_ID 0x40
43#define BMC150_MAGN_CHIP_ID_VAL 0x32
44
45#define BMC150_MAGN_REG_X_L 0x42
46#define BMC150_MAGN_REG_X_M 0x43
47#define BMC150_MAGN_REG_Y_L 0x44
48#define BMC150_MAGN_REG_Y_M 0x45
49#define BMC150_MAGN_SHIFT_XY_L 3
50#define BMC150_MAGN_REG_Z_L 0x46
51#define BMC150_MAGN_REG_Z_M 0x47
52#define BMC150_MAGN_SHIFT_Z_L 1
53#define BMC150_MAGN_REG_RHALL_L 0x48
54#define BMC150_MAGN_REG_RHALL_M 0x49
55#define BMC150_MAGN_SHIFT_RHALL_L 2
56
57#define BMC150_MAGN_REG_INT_STATUS 0x4A
58
59#define BMC150_MAGN_REG_POWER 0x4B
60#define BMC150_MAGN_MASK_POWER_CTL BIT(0)
61
62#define BMC150_MAGN_REG_OPMODE_ODR 0x4C
63#define BMC150_MAGN_MASK_OPMODE GENMASK(2, 1)
64#define BMC150_MAGN_SHIFT_OPMODE 1
65#define BMC150_MAGN_MODE_NORMAL 0x00
66#define BMC150_MAGN_MODE_FORCED 0x01
67#define BMC150_MAGN_MODE_SLEEP 0x03
68#define BMC150_MAGN_MASK_ODR GENMASK(5, 3)
69#define BMC150_MAGN_SHIFT_ODR 3
70
71#define BMC150_MAGN_REG_INT 0x4D
72
73#define BMC150_MAGN_REG_INT_DRDY 0x4E
74#define BMC150_MAGN_MASK_DRDY_EN BIT(7)
75#define BMC150_MAGN_SHIFT_DRDY_EN 7
76#define BMC150_MAGN_MASK_DRDY_INT3 BIT(6)
77#define BMC150_MAGN_MASK_DRDY_Z_EN BIT(5)
78#define BMC150_MAGN_MASK_DRDY_Y_EN BIT(4)
79#define BMC150_MAGN_MASK_DRDY_X_EN BIT(3)
80#define BMC150_MAGN_MASK_DRDY_DR_POLARITY BIT(2)
81#define BMC150_MAGN_MASK_DRDY_LATCHING BIT(1)
82#define BMC150_MAGN_MASK_DRDY_INT3_POLARITY BIT(0)
83
84#define BMC150_MAGN_REG_LOW_THRESH 0x4F
85#define BMC150_MAGN_REG_HIGH_THRESH 0x50
86#define BMC150_MAGN_REG_REP_XY 0x51
87#define BMC150_MAGN_REG_REP_Z 0x52
1506f3cd 88#define BMC150_MAGN_REG_REP_DATAMASK GENMASK(7, 0)
c91746a2
IT		 89
90#define BMC150_MAGN_REG_TRIM_START 0x5D
91#define BMC150_MAGN_REG_TRIM_END 0x71
92
93#define BMC150_MAGN_XY_OVERFLOW_VAL -4096
94#define BMC150_MAGN_Z_OVERFLOW_VAL -16384
95
96/* Time from SUSPEND to SLEEP */
97#define BMC150_MAGN_START_UP_TIME_MS 3
98
99#define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS 2000
100
101#define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
102#define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
103#define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
104#define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
105
106enum bmc150_magn_axis {
107 AXIS_X,
108 AXIS_Y,
109 AXIS_Z,
110 RHALL,
111 AXIS_XYZ_MAX = RHALL,
112 AXIS_XYZR_MAX,
113};
114
115enum bmc150_magn_power_modes {
116 BMC150_MAGN_POWER_MODE_SUSPEND,
117 BMC150_MAGN_POWER_MODE_SLEEP,
118 BMC150_MAGN_POWER_MODE_NORMAL,
119};
120
121struct bmc150_magn_trim_regs {
122 s8 x1;
123 s8 y1;
124 __le16 reserved1;
125 u8 reserved2;
126 __le16 z4;
127 s8 x2;
128 s8 y2;
129 __le16 reserved3;
130 __le16 z2;
131 __le16 z1;
132 __le16 xyz1;
133 __le16 z3;
134 s8 xy2;
135 u8 xy1;
136} __packed;
137
138struct bmc150_magn_data {
761b7910 139 struct device *dev;
c91746a2
IT		 140 /*
141 * 1. Protect this structure.
142 * 2. Serialize sequences that power on/off the device and access HW.
143 */
144 struct mutex mutex;
145 struct regmap *regmap;
d9842c77 146 struct iio_mount_matrix orientation;
c91746a2
IT		 147 /* 4 x 32 bits for x, y z, 4 bytes align, 64 bits timestamp */
148 s32 buffer[6];
149 struct iio_trigger *dready_trig;
150 bool dready_trigger_on;
5990dc97 151 int max_odr;
761b7910 152 int irq;
c91746a2
IT		 153};
154
155static const struct {
156 int freq;
157 u8 reg_val;
158} bmc150_magn_samp_freq_table[] = { {2, 0x01},
159 {6, 0x02},
160 {8, 0x03},
161 {10, 0x00},
162 {15, 0x04},
163 {20, 0x05},
164 {25, 0x06},
165 {30, 0x07} };
166
167enum bmc150_magn_presets {
168 LOW_POWER_PRESET,
169 REGULAR_PRESET,
170 ENHANCED_REGULAR_PRESET,
171 HIGH_ACCURACY_PRESET
172};
173
174static const struct bmc150_magn_preset {
175 u8 rep_xy;
176 u8 rep_z;
177 u8 odr;
178} bmc150_magn_presets_table[] = {
179 [LOW_POWER_PRESET] = {3, 3, 10},
180 [REGULAR_PRESET] = {9, 15, 10},
181 [ENHANCED_REGULAR_PRESET] = {15, 27, 10},
182 [HIGH_ACCURACY_PRESET] = {47, 83, 20},
183};
184
185#define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
186
187static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
188{
189 switch (reg) {
190 case BMC150_MAGN_REG_POWER:
191 case BMC150_MAGN_REG_OPMODE_ODR:
192 case BMC150_MAGN_REG_INT:
193 case BMC150_MAGN_REG_INT_DRDY:
194 case BMC150_MAGN_REG_LOW_THRESH:
195 case BMC150_MAGN_REG_HIGH_THRESH:
196 case BMC150_MAGN_REG_REP_XY:
197 case BMC150_MAGN_REG_REP_Z:
198 return true;
199 default:
200 return false;
201 };
202}
203
204static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
205{
206 switch (reg) {
207 case BMC150_MAGN_REG_X_L:
208 case BMC150_MAGN_REG_X_M:
209 case BMC150_MAGN_REG_Y_L:
210 case BMC150_MAGN_REG_Y_M:
211 case BMC150_MAGN_REG_Z_L:
212 case BMC150_MAGN_REG_Z_M:
213 case BMC150_MAGN_REG_RHALL_L:
214 case BMC150_MAGN_REG_RHALL_M:
215 case BMC150_MAGN_REG_INT_STATUS:
216 return true;
217 default:
218 return false;
219 }
220}
221
761b7910 222const struct regmap_config bmc150_magn_regmap_config = {
c91746a2
IT		 223 .reg_bits = 8,
224 .val_bits = 8,
225
226 .max_register = BMC150_MAGN_REG_TRIM_END,
227 .cache_type = REGCACHE_RBTREE,
228
229 .writeable_reg = bmc150_magn_is_writeable_reg,
230 .volatile_reg = bmc150_magn_is_volatile_reg,
231};
761b7910 232EXPORT_SYMBOL(bmc150_magn_regmap_config);
c91746a2
IT		 233
234static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
235 enum bmc150_magn_power_modes mode,
236 bool state)
237{
238 int ret;
239
240 switch (mode) {
241 case BMC150_MAGN_POWER_MODE_SUSPEND:
242 ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
243 BMC150_MAGN_MASK_POWER_CTL, !state);
244 if (ret < 0)
245 return ret;
246 usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
247 return 0;
248 case BMC150_MAGN_POWER_MODE_SLEEP:
249 return regmap_update_bits(data->regmap,
250 BMC150_MAGN_REG_OPMODE_ODR,
251 BMC150_MAGN_MASK_OPMODE,
252 BMC150_MAGN_MODE_SLEEP <<
253 BMC150_MAGN_SHIFT_OPMODE);
254 case BMC150_MAGN_POWER_MODE_NORMAL:
255 return regmap_update_bits(data->regmap,
256 BMC150_MAGN_REG_OPMODE_ODR,
257 BMC150_MAGN_MASK_OPMODE,
258 BMC150_MAGN_MODE_NORMAL <<
259 BMC150_MAGN_SHIFT_OPMODE);
260 }
261
262 return -EINVAL;
263}
264
265static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
266{
267#ifdef CONFIG_PM
268 int ret;
269
270 if (on) {
761b7910 271 ret = pm_runtime_get_sync(data->dev);
c91746a2 272 } else {
761b7910
DB		 273 pm_runtime_mark_last_busy(data->dev);
274 ret = pm_runtime_put_autosuspend(data->dev);
c91746a2
IT		 275 }
276
277 if (ret < 0) {
761b7910 278 dev_err(data->dev,
c91746a2
IT		 279 "failed to change power state to %d\n", on);
280 if (on)
761b7910 281 pm_runtime_put_noidle(data->dev);
c91746a2
IT		 282
283 return ret;
284 }
285#endif
286
287 return 0;
288}
289
290static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
291{
292 int ret, reg_val;
293 u8 i, odr_val;
294
295 ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, &reg_val);
296 if (ret < 0)
297 return ret;
298 odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
299
300 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
301 if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
302 *val = bmc150_magn_samp_freq_table[i].freq;
303 return 0;
304 }
305
306 return -EINVAL;
307}
308
309static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
310{
311 int ret;
312 u8 i;
313
314 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
315 if (bmc150_magn_samp_freq_table[i].freq == val) {
316 ret = regmap_update_bits(data->regmap,
317 BMC150_MAGN_REG_OPMODE_ODR,
318 BMC150_MAGN_MASK_ODR,
319 bmc150_magn_samp_freq_table[i].
320 reg_val <<
321 BMC150_MAGN_SHIFT_ODR);
322 if (ret < 0)
323 return ret;
324 return 0;
325 }
326 }
327
328 return -EINVAL;
329}
330
5990dc97
IT		 331static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
332 int rep_z, int odr)
333{
334 int ret, reg_val, max_odr;
335
336 if (rep_xy <= 0) {
337 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
338 &reg_val);
339 if (ret < 0)
340 return ret;
341 rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
342 }
343 if (rep_z <= 0) {
344 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
345 &reg_val);
346 if (ret < 0)
347 return ret;
348 rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
349 }
350 if (odr <= 0) {
351 ret = bmc150_magn_get_odr(data, &odr);
352 if (ret < 0)
353 return ret;
354 }
355 /* the maximum selectable read-out frequency from datasheet */
356 max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
357 if (odr > max_odr) {
761b7910 358 dev_err(data->dev,
5990dc97
IT		 359 "Can't set oversampling with sampling freq %d\n",
360 odr);
361 return -EINVAL;
362 }
363 data->max_odr = max_odr;
364
365 return 0;
366}
367
c91746a2
IT		 368static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
369 u16 rhall)
370{
371 s16 val;
372 u16 xyz1 = le16_to_cpu(tregs->xyz1);
373
374 if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
375 return S32_MIN;
376
377 if (!rhall)
378 rhall = xyz1;
379
380 val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
381 val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
382 ((s32)val)) >> 7)) + (((s32)val) *
383 ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
384 ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
385 (((s16)tregs->x1) << 3);
386
387 return (s32)val;
388}
389
390static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
391 u16 rhall)
392{
393 s16 val;
394 u16 xyz1 = le16_to_cpu(tregs->xyz1);
395
396 if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
397 return S32_MIN;
398
399 if (!rhall)
400 rhall = xyz1;
401
402 val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
403 val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
404 ((s32)val)) >> 7)) + (((s32)val) *
405 ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
406 ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
407 (((s16)tregs->y1) << 3);
408
409 return (s32)val;
410}
411
412static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
413 u16 rhall)
414{
415 s32 val;
416 u16 xyz1 = le16_to_cpu(tregs->xyz1);
417 u16 z1 = le16_to_cpu(tregs->z1);
418 s16 z2 = le16_to_cpu(tregs->z2);
419 s16 z3 = le16_to_cpu(tregs->z3);
420 s16 z4 = le16_to_cpu(tregs->z4);
421
422 if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
423 return S32_MIN;
424
425 val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
426 ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
427 ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
428
429 return val;
430}
431
432static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
433{
434 int ret;
435 __le16 values[AXIS_XYZR_MAX];
436 s16 raw_x, raw_y, raw_z;
437 u16 rhall;
438 struct bmc150_magn_trim_regs tregs;
439
440 ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
441 values, sizeof(values));
442 if (ret < 0)
443 return ret;
444
445 raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
446 raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
447 raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
448 rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
449
450 ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
451 &tregs, sizeof(tregs));
452 if (ret < 0)
453 return ret;
454
455 buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
456 buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
457 buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
458
459 return 0;
460}
461
462static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
463 struct iio_chan_spec const *chan,
464 int *val, int *val2, long mask)
465{
466 struct bmc150_magn_data *data = iio_priv(indio_dev);
5990dc97 467 int ret, tmp;
c91746a2
IT		 468 s32 values[AXIS_XYZ_MAX];
469
470 switch (mask) {
471 case IIO_CHAN_INFO_RAW:
472 if (iio_buffer_enabled(indio_dev))
473 return -EBUSY;
474 mutex_lock(&data->mutex);
475
476 ret = bmc150_magn_set_power_state(data, true);
477 if (ret < 0) {
478 mutex_unlock(&data->mutex);
479 return ret;
480 }
481
482 ret = bmc150_magn_read_xyz(data, values);
483 if (ret < 0) {
484 bmc150_magn_set_power_state(data, false);
485 mutex_unlock(&data->mutex);
486 return ret;
487 }
488 *val = values[chan->scan_index];
489
490 ret = bmc150_magn_set_power_state(data, false);
491 if (ret < 0) {
492 mutex_unlock(&data->mutex);
493 return ret;
494 }
495
496 mutex_unlock(&data->mutex);
497 return IIO_VAL_INT;
498 case IIO_CHAN_INFO_SCALE:
499 /*
500 * The API/driver performs an off-chip temperature
501 * compensation and outputs x/y/z magnetic field data in
502 * 16 LSB/uT to the upper application layer.
503 */
504 *val = 0;
505 *val2 = 625;
506 return IIO_VAL_INT_PLUS_MICRO;
507 case IIO_CHAN_INFO_SAMP_FREQ:
508 ret = bmc150_magn_get_odr(data, val);
509 if (ret < 0)
510 return ret;
511 return IIO_VAL_INT;
5990dc97
IT		 512 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
513 switch (chan->channel2) {
514 case IIO_MOD_X:
515 case IIO_MOD_Y:
516 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
517 &tmp);
518 if (ret < 0)
519 return ret;
520 *val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
521 return IIO_VAL_INT;
522 case IIO_MOD_Z:
523 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
524 &tmp);
525 if (ret < 0)
526 return ret;
527 *val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
528 return IIO_VAL_INT;
529 default:
530 return -EINVAL;
531 }
c91746a2
IT		 532 default:
533 return -EINVAL;
534 }
535}
536
537static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
538 struct iio_chan_spec const *chan,
539 int val, int val2, long mask)
540{
541 struct bmc150_magn_data *data = iio_priv(indio_dev);
542 int ret;
543
544 switch (mask) {
545 case IIO_CHAN_INFO_SAMP_FREQ:
5990dc97
IT		 546 if (val > data->max_odr)
547 return -EINVAL;
c91746a2
IT		 548 mutex_lock(&data->mutex);
549 ret = bmc150_magn_set_odr(data, val);
550 mutex_unlock(&data->mutex);
551 return ret;
5990dc97
IT		 552 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
553 switch (chan->channel2) {
554 case IIO_MOD_X:
555 case IIO_MOD_Y:
556 if (val < 1 || val > 511)
557 return -EINVAL;
558 mutex_lock(&data->mutex);
559 ret = bmc150_magn_set_max_odr(data, val, 0, 0);
560 if (ret < 0) {
561 mutex_unlock(&data->mutex);
562 return ret;
563 }
564 ret = regmap_update_bits(data->regmap,
565 BMC150_MAGN_REG_REP_XY,
1506f3cd 566 BMC150_MAGN_REG_REP_DATAMASK,
5990dc97
IT		 567 BMC150_MAGN_REPXY_TO_REGVAL
568 (val));
569 mutex_unlock(&data->mutex);
570 return ret;
571 case IIO_MOD_Z:
572 if (val < 1 || val > 256)
573 return -EINVAL;
574 mutex_lock(&data->mutex);
575 ret = bmc150_magn_set_max_odr(data, 0, val, 0);
576 if (ret < 0) {
577 mutex_unlock(&data->mutex);
578 return ret;
579 }
580 ret = regmap_update_bits(data->regmap,
581 BMC150_MAGN_REG_REP_Z,
1506f3cd 582 BMC150_MAGN_REG_REP_DATAMASK,
5990dc97
IT		 583 BMC150_MAGN_REPZ_TO_REGVAL
584 (val));
585 mutex_unlock(&data->mutex);
586 return ret;
587 default:
588 return -EINVAL;
589 }
c91746a2
IT		 590 default:
591 return -EINVAL;
592 }
593}
594
5990dc97
IT		 595static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
596 struct device_attribute *attr,
597 char *buf)
598{
599 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
600 struct bmc150_magn_data *data = iio_priv(indio_dev);
601 size_t len = 0;
602 u8 i;
603
604 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
605 if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
606 break;
607 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
608 bmc150_magn_samp_freq_table[i].freq);
609 }
610 /* replace last space with a newline */
611 buf[len - 1] = '\n';
612
613 return len;
614}
615
d9842c77
NS		 616static const struct iio_mount_matrix *
617bmc150_magn_get_mount_matrix(const struct iio_dev *indio_dev,
618 const struct iio_chan_spec *chan)
619{
620 struct bmc150_magn_data *data = iio_priv(indio_dev);
621
622 return &data->orientation;
623}
624
625static const struct iio_chan_spec_ext_info bmc150_magn_ext_info[] = {
626 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmc150_magn_get_mount_matrix),
627 { }
628};
629
5990dc97 630static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
c91746a2
IT		 631
632static struct attribute *bmc150_magn_attributes[] = {
5990dc97 633 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
c91746a2
IT		 634 NULL,
635};
636
637static const struct attribute_group bmc150_magn_attrs_group = {
638 .attrs = bmc150_magn_attributes,
639};
640
641#define BMC150_MAGN_CHANNEL(_axis) { \
642 .type = IIO_MAGN, \
643 .modified = 1, \
644 .channel2 = IIO_MOD_##_axis, \
5990dc97
IT		 645 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
646 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
c91746a2
IT		 647 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
648 BIT(IIO_CHAN_INFO_SCALE), \
649 .scan_index = AXIS_##_axis, \
650 .scan_type = { \
651 .sign = 's', \
652 .realbits = 32, \
653 .storagebits = 32, \
654 .endianness = IIO_LE \
655 }, \
d9842c77 656 .ext_info = bmc150_magn_ext_info, \
c91746a2
IT		 657}
658
659static const struct iio_chan_spec bmc150_magn_channels[] = {
660 BMC150_MAGN_CHANNEL(X),
661 BMC150_MAGN_CHANNEL(Y),
662 BMC150_MAGN_CHANNEL(Z),
663 IIO_CHAN_SOFT_TIMESTAMP(3),
664};
665
666static const struct iio_info bmc150_magn_info = {
667 .attrs = &bmc150_magn_attrs_group,
668 .read_raw = bmc150_magn_read_raw,
669 .write_raw = bmc150_magn_write_raw,
c91746a2
IT		 670};
671
47764c79
HK		 672static const unsigned long bmc150_magn_scan_masks[] = {
673 BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
674 0};
c91746a2
IT		 675
676static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
677{
678 struct iio_poll_func *pf = p;
679 struct iio_dev *indio_dev = pf->indio_dev;
680 struct bmc150_magn_data *data = iio_priv(indio_dev);
681 int ret;
682
683 mutex_lock(&data->mutex);
684 ret = bmc150_magn_read_xyz(data, data->buffer);
c91746a2
IT		 685 if (ret < 0)
686 goto err;
687
688 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
689 pf->timestamp);
690
691err:
3021678a 692 mutex_unlock(&data->mutex);
9d174b49 693 iio_trigger_notify_done(indio_dev->trig);
c91746a2
IT		 694
695 return IRQ_HANDLED;
696}
697
698static int bmc150_magn_init(struct bmc150_magn_data *data)
699{
700 int ret, chip_id;
701 struct bmc150_magn_preset preset;
702
703 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
704 false);
705 if (ret < 0) {
761b7910 706 dev_err(data->dev,
c91746a2
IT		 707 "Failed to bring up device from suspend mode\n");
708 return ret;
709 }
710
711 ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
712 if (ret < 0) {
761b7910 713 dev_err(data->dev, "Failed reading chip id\n");
c91746a2
IT		 714 goto err_poweroff;
715 }
716 if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
761b7910 717 dev_err(data->dev, "Invalid chip id 0x%x\n", chip_id);
c91746a2
IT		 718 ret = -ENODEV;
719 goto err_poweroff;
720 }
761b7910 721 dev_dbg(data->dev, "Chip id %x\n", chip_id);
c91746a2
IT		 722
723 preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
724 ret = bmc150_magn_set_odr(data, preset.odr);
725 if (ret < 0) {
761b7910 726 dev_err(data->dev, "Failed to set ODR to %d\n",
c91746a2
IT		 727 preset.odr);
728 goto err_poweroff;
729 }
730
731 ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
732 BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
733 if (ret < 0) {
761b7910 734 dev_err(data->dev, "Failed to set REP XY to %d\n",
c91746a2
IT		 735 preset.rep_xy);
736 goto err_poweroff;
737 }
738
739 ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
740 BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
741 if (ret < 0) {
761b7910 742 dev_err(data->dev, "Failed to set REP Z to %d\n",
c91746a2
IT		 743 preset.rep_z);
744 goto err_poweroff;
745 }
746
5990dc97
IT		 747 ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
748 preset.odr);
749 if (ret < 0)
750 goto err_poweroff;
751
c91746a2
IT		 752 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
753 true);
754 if (ret < 0) {
761b7910 755 dev_err(data->dev, "Failed to power on device\n");
c91746a2
IT		 756 goto err_poweroff;
757 }
758
759 return 0;
760
761err_poweroff:
762 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
763 return ret;
764}
765
766static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
767{
768 int tmp;
769
770 /*
771 * Data Ready (DRDY) is always cleared after
772 * readout of data registers ends.
773 */
774 return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
775}
776
777static int bmc150_magn_trig_try_reen(struct iio_trigger *trig)
778{
779 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
780 struct bmc150_magn_data *data = iio_priv(indio_dev);
781 int ret;
782
783 if (!data->dready_trigger_on)
784 return 0;
785
786 mutex_lock(&data->mutex);
787 ret = bmc150_magn_reset_intr(data);
788 mutex_unlock(&data->mutex);
789
790 return ret;
791}
792
793static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
794 bool state)
795{
796 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
797 struct bmc150_magn_data *data = iio_priv(indio_dev);
798 int ret = 0;
799
800 mutex_lock(&data->mutex);
801 if (state == data->dready_trigger_on)
802 goto err_unlock;
803
c91746a2
IT		 804 ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
805 BMC150_MAGN_MASK_DRDY_EN,
806 state << BMC150_MAGN_SHIFT_DRDY_EN);
807 if (ret < 0)
5ab744d0 808 goto err_unlock;
c91746a2
IT		 809
810 data->dready_trigger_on = state;
811
812 if (state) {
813 ret = bmc150_magn_reset_intr(data);
814 if (ret < 0)
5ab744d0 815 goto err_unlock;
c91746a2
IT		 816 }
817 mutex_unlock(&data->mutex);
818
819 return 0;
820
c91746a2
IT		 821err_unlock:
822 mutex_unlock(&data->mutex);
823 return ret;
824}
825
826static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
827 .set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
828 .try_reenable = bmc150_magn_trig_try_reen,
c91746a2
IT		 829};
830
9d174b49
VD		 831static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
832{
833 struct bmc150_magn_data *data = iio_priv(indio_dev);
834
835 return bmc150_magn_set_power_state(data, true);
836}
837
838static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
839{
840 struct bmc150_magn_data *data = iio_priv(indio_dev);
841
842 return bmc150_magn_set_power_state(data, false);
843}
844
845static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
846 .preenable = bmc150_magn_buffer_preenable,
847 .postenable = iio_triggered_buffer_postenable,
848 .predisable = iio_triggered_buffer_predisable,
849 .postdisable = bmc150_magn_buffer_postdisable,
850};
851
c91746a2
IT		 852static const char *bmc150_magn_match_acpi_device(struct device *dev)
853{
854 const struct acpi_device_id *id;
855
856 id = acpi_match_device(dev->driver->acpi_match_table, dev);
857 if (!id)
858 return NULL;
859
860 return dev_name(dev);
861}
862
761b7910
DB		 863int bmc150_magn_probe(struct device *dev, struct regmap *regmap,
864 int irq, const char *name)
c91746a2
IT		 865{
866 struct bmc150_magn_data *data;
867 struct iio_dev *indio_dev;
c91746a2
IT		 868 int ret;
869
761b7910 870 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
c91746a2
IT		 871 if (!indio_dev)
872 return -ENOMEM;
873
874 data = iio_priv(indio_dev);
761b7910
DB		 875 dev_set_drvdata(dev, indio_dev);
876 data->regmap = regmap;
877 data->irq = irq;
878 data->dev = dev;
c91746a2 879
d9842c77
NS		 880 ret = iio_read_mount_matrix(dev, "mount-matrix",
881 &data->orientation);
882 if (ret)
883 return ret;
884
761b7910
DB		 885 if (!name && ACPI_HANDLE(dev))
886 name = bmc150_magn_match_acpi_device(dev);
c91746a2
IT		 887
888 mutex_init(&data->mutex);
c91746a2
IT		 889
890 ret = bmc150_magn_init(data);
891 if (ret < 0)
892 return ret;
893
761b7910 894 indio_dev->dev.parent = dev;
c91746a2
IT		 895 indio_dev->channels = bmc150_magn_channels;
896 indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
897 indio_dev->available_scan_masks = bmc150_magn_scan_masks;
898 indio_dev->name = name;
899 indio_dev->modes = INDIO_DIRECT_MODE;
900 indio_dev->info = &bmc150_magn_info;
901
761b7910
DB		 902 if (irq > 0) {
903 data->dready_trig = devm_iio_trigger_alloc(dev,
c91746a2
IT		 904 "%s-dev%d",
905 indio_dev->name,
906 indio_dev->id);
907 if (!data->dready_trig) {
908 ret = -ENOMEM;
761b7910 909 dev_err(dev, "iio trigger alloc failed\n");
c91746a2
IT		 910 goto err_poweroff;
911 }
912
761b7910 913 data->dready_trig->dev.parent = dev;
c91746a2
IT		 914 data->dready_trig->ops = &bmc150_magn_trigger_ops;
915 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
916 ret = iio_trigger_register(data->dready_trig);
917 if (ret) {
761b7910 918 dev_err(dev, "iio trigger register failed\n");
c91746a2
IT		 919 goto err_poweroff;
920 }
921
761b7910 922 ret = request_threaded_irq(irq,
c91746a2
IT		 923 iio_trigger_generic_data_rdy_poll,
924 NULL,
925 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
926 BMC150_MAGN_IRQ_NAME,
927 data->dready_trig);
928 if (ret < 0) {
761b7910 929 dev_err(dev, "request irq %d failed\n", irq);
9d174b49 930 goto err_trigger_unregister;
c91746a2
IT		 931 }
932 }
933
9d174b49
VD		 934 ret = iio_triggered_buffer_setup(indio_dev,
935 iio_pollfunc_store_time,
936 bmc150_magn_trigger_handler,
937 &bmc150_magn_buffer_setup_ops);
938 if (ret < 0) {
761b7910 939 dev_err(dev, "iio triggered buffer setup failed\n");
9d174b49
VD		 940 goto err_free_irq;
941 }
942
761b7910 943 ret = pm_runtime_set_active(dev);
c91746a2 944 if (ret)
7d0ead5c 945 goto err_buffer_cleanup;
c91746a2 946
761b7910
DB		 947 pm_runtime_enable(dev);
948 pm_runtime_set_autosuspend_delay(dev,
c91746a2 949 BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
761b7910 950 pm_runtime_use_autosuspend(dev);
c91746a2 951
7d0ead5c
AR		 952 ret = iio_device_register(indio_dev);
953 if (ret < 0) {
761b7910 954 dev_err(dev, "unable to register iio device\n");
7d0ead5c
AR		 955 goto err_buffer_cleanup;
956 }
c91746a2 957
761b7910 958 dev_dbg(dev, "Registered device %s\n", name);
c91746a2
IT		 959 return 0;
960
9d174b49
VD		 961err_buffer_cleanup:
962 iio_triggered_buffer_cleanup(indio_dev);
c91746a2 963err_free_irq:
761b7910
DB		 964 if (irq > 0)
965 free_irq(irq, data->dready_trig);
c91746a2
IT		 966err_trigger_unregister:
967 if (data->dready_trig)
968 iio_trigger_unregister(data->dready_trig);
969err_poweroff:
970 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
971 return ret;
972}
761b7910 973EXPORT_SYMBOL(bmc150_magn_probe);
c91746a2 974
761b7910 975int bmc150_magn_remove(struct device *dev)
c91746a2 976{
761b7910 977 struct iio_dev *indio_dev = dev_get_drvdata(dev);
c91746a2
IT		 978 struct bmc150_magn_data *data = iio_priv(indio_dev);
979
7d0ead5c
AR		 980 iio_device_unregister(indio_dev);
981
761b7910
DB		 982 pm_runtime_disable(dev);
983 pm_runtime_set_suspended(dev);
984 pm_runtime_put_noidle(dev);
c91746a2 985
9d174b49 986 iio_triggered_buffer_cleanup(indio_dev);
c91746a2 987
761b7910
DB		 988 if (data->irq > 0)
989 free_irq(data->irq, data->dready_trig);
c91746a2 990
9d174b49 991 if (data->dready_trig)
c91746a2 992 iio_trigger_unregister(data->dready_trig);
c91746a2
IT		 993
994 mutex_lock(&data->mutex);
995 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
996 mutex_unlock(&data->mutex);
997
998 return 0;
999}
761b7910 1000EXPORT_SYMBOL(bmc150_magn_remove);
c91746a2
IT		 1001
1002#ifdef CONFIG_PM
1003static int bmc150_magn_runtime_suspend(struct device *dev)
1004{
761b7910 1005 struct iio_dev *indio_dev = dev_get_drvdata(dev);
c91746a2
IT		 1006 struct bmc150_magn_data *data = iio_priv(indio_dev);
1007 int ret;
1008
1009 mutex_lock(&data->mutex);
1010 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
1011 true);
1012 mutex_unlock(&data->mutex);
1013 if (ret < 0) {
761b7910 1014 dev_err(dev, "powering off device failed\n");
c91746a2
IT		 1015 return ret;
1016 }
1017 return 0;
1018}
1019
019cc46d
IT		 1020/*
1021 * Should be called with data->mutex held.
1022 */
c91746a2
IT		 1023static int bmc150_magn_runtime_resume(struct device *dev)
1024{
761b7910 1025 struct iio_dev *indio_dev = dev_get_drvdata(dev);
c91746a2
IT		 1026 struct bmc150_magn_data *data = iio_priv(indio_dev);
1027
1028 return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1029 true);
1030}
1031#endif
1032
1033#ifdef CONFIG_PM_SLEEP
1034static int bmc150_magn_suspend(struct device *dev)
1035{
761b7910 1036 struct iio_dev *indio_dev = dev_get_drvdata(dev);
c91746a2
IT		 1037 struct bmc150_magn_data *data = iio_priv(indio_dev);
1038 int ret;
1039
1040 mutex_lock(&data->mutex);
1041 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
1042 true);
1043 mutex_unlock(&data->mutex);
1044
1045 return ret;
1046}
1047
1048static int bmc150_magn_resume(struct device *dev)
1049{
761b7910 1050 struct iio_dev *indio_dev = dev_get_drvdata(dev);
c91746a2
IT		 1051 struct bmc150_magn_data *data = iio_priv(indio_dev);
1052 int ret;
1053
1054 mutex_lock(&data->mutex);
1055 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1056 true);
1057 mutex_unlock(&data->mutex);
1058
1059 return ret;
1060}
1061#endif
1062
761b7910 1063const struct dev_pm_ops bmc150_magn_pm_ops = {
c91746a2
IT		 1064 SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
1065 SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
1066 bmc150_magn_runtime_resume, NULL)
1067};
761b7910 1068EXPORT_SYMBOL(bmc150_magn_pm_ops);
c91746a2
IT		 1069
1070MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
1071MODULE_LICENSE("GPL v2");
761b7910 1072MODULE_DESCRIPTION("BMC150 magnetometer core driver");
Linux 6.x block layer and io_uring tree(s)