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iio: ltr501: Add interrupt rate control support
[linux-2.6-block.git] / drivers / iio / light / ltr501.c
CommitLineData
2690be90
PM		 1/*
2 * ltr501.c - Support for Lite-On LTR501 ambient light and proximity sensor
3 *
4 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
5 *
6 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details.
9 *
10 * 7-bit I2C slave address 0x23
11 *
eea53b4a 12 * TODO: IR LED characteristics
2690be90
PM		 13 */
14
15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/err.h>
18#include <linux/delay.h>
2f2c9633 19#include <linux/regmap.h>
2690be90
PM		 20
21#include <linux/iio/iio.h>
7ac702b3 22#include <linux/iio/events.h>
2690be90
PM		 23#include <linux/iio/sysfs.h>
24#include <linux/iio/trigger_consumer.h>
25#include <linux/iio/buffer.h>
26#include <linux/iio/triggered_buffer.h>
27
28#define LTR501_DRV_NAME "ltr501"
29
30#define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */
31#define LTR501_PS_CONTR 0x81 /* PS operation mode */
eea53b4a 32#define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/
844b4702 33#define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/
2690be90
PM		 34#define LTR501_PART_ID 0x86
35#define LTR501_MANUFAC_ID 0x87
36#define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */
37#define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */
38#define LTR501_ALS_PS_STATUS 0x8c
39#define LTR501_PS_DATA 0x8d /* 16-bit, little endian */
7ac702b3
KS		 40#define LTR501_INTR 0x8f /* output mode, polarity, mode */
41#define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */
42#define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */
43#define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */
44#define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */
eea53b4a 45#define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */
2f2c9633 46#define LTR501_MAX_REG 0x9f
2690be90
PM		 47
48#define LTR501_ALS_CONTR_SW_RESET BIT(2)
49#define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2))
50#define LTR501_CONTR_PS_GAIN_SHIFT 2
51#define LTR501_CONTR_ALS_GAIN_MASK BIT(3)
52#define LTR501_CONTR_ACTIVE BIT(1)
53
7ac702b3 54#define LTR501_STATUS_ALS_INTR BIT(3)
2690be90 55#define LTR501_STATUS_ALS_RDY BIT(2)
7ac702b3 56#define LTR501_STATUS_PS_INTR BIT(1)
2690be90
PM		 57#define LTR501_STATUS_PS_RDY BIT(0)
58
59#define LTR501_PS_DATA_MASK 0x7ff
7ac702b3
KS		 60#define LTR501_PS_THRESH_MASK 0x7ff
61#define LTR501_ALS_THRESH_MASK 0xffff
2690be90 62
eea53b4a
KS		 63#define LTR501_ALS_DEF_PERIOD 500000
64#define LTR501_PS_DEF_PERIOD 100000
65
2f2c9633
KS		 66#define LTR501_REGMAP_NAME "ltr501_regmap"
67
844b4702
KS		 68static const int int_time_mapping[] = {100000, 50000, 200000, 400000};
69
70static const struct reg_field reg_field_it =
71 REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
7ac702b3
KS		 72static const struct reg_field reg_field_als_intr =
73 REG_FIELD(LTR501_INTR, 0, 0);
74static const struct reg_field reg_field_ps_intr =
75 REG_FIELD(LTR501_INTR, 1, 1);
eea53b4a
KS		 76static const struct reg_field reg_field_als_rate =
77 REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
78static const struct reg_field reg_field_ps_rate =
79 REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
80static const struct reg_field reg_field_als_prst =
81 REG_FIELD(LTR501_INTR_PRST, 0, 3);
82static const struct reg_field reg_field_ps_prst =
83 REG_FIELD(LTR501_INTR_PRST, 4, 7);
84
85struct ltr501_samp_table {
86 int freq_val; /* repetition frequency in micro HZ*/
87 int time_val; /* repetition rate in micro seconds */
88};
844b4702 89
2690be90
PM		 90struct ltr501_data {
91 struct i2c_client *client;
92 struct mutex lock_als, lock_ps;
93 u8 als_contr, ps_contr;
eea53b4a 94 int als_period, ps_period; /* period in micro seconds */
2f2c9633 95 struct regmap *regmap;
844b4702 96 struct regmap_field *reg_it;
7ac702b3
KS		 97 struct regmap_field *reg_als_intr;
98 struct regmap_field *reg_ps_intr;
eea53b4a
KS		 99 struct regmap_field *reg_als_rate;
100 struct regmap_field *reg_ps_rate;
101 struct regmap_field *reg_als_prst;
102 struct regmap_field *reg_ps_prst;
103};
104
105static const struct ltr501_samp_table ltr501_als_samp_table[] = {
106 {20000000, 50000}, {10000000, 100000},
107 {5000000, 200000}, {2000000, 500000},
108 {1000000, 1000000}, {500000, 2000000},
109 {500000, 2000000}, {500000, 2000000}
2690be90
PM		 110};
111
eea53b4a
KS		 112static const struct ltr501_samp_table ltr501_ps_samp_table[] = {
113 {20000000, 50000}, {14285714, 70000},
114 {10000000, 100000}, {5000000, 200000},
115 {2000000, 500000}, {1000000, 1000000},
116 {500000, 2000000}, {500000, 2000000},
117 {500000, 2000000}
118};
119
120static unsigned int ltr501_match_samp_freq(const struct ltr501_samp_table *tab,
121 int len, int val, int val2)
122{
123 int i, freq;
124
125 freq = val * 1000000 + val2;
126
127 for (i = 0; i < len; i++) {
128 if (tab[i].freq_val == freq)
129 return i;
130 }
131
132 return -EINVAL;
133}
134
135static int ltr501_als_read_samp_freq(struct ltr501_data *data,
136 int *val, int *val2)
137{
138 int ret, i;
139
140 ret = regmap_field_read(data->reg_als_rate, &i);
141 if (ret < 0)
142 return ret;
143
144 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
145 return -EINVAL;
146
147 *val = ltr501_als_samp_table[i].freq_val / 1000000;
148 *val2 = ltr501_als_samp_table[i].freq_val % 1000000;
149
150 return IIO_VAL_INT_PLUS_MICRO;
151}
152
153static int ltr501_ps_read_samp_freq(struct ltr501_data *data,
154 int *val, int *val2)
155{
156 int ret, i;
157
158 ret = regmap_field_read(data->reg_ps_rate, &i);
159 if (ret < 0)
160 return ret;
161
162 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
163 return -EINVAL;
164
165 *val = ltr501_ps_samp_table[i].freq_val / 1000000;
166 *val2 = ltr501_ps_samp_table[i].freq_val % 1000000;
167
168 return IIO_VAL_INT_PLUS_MICRO;
169}
170
171static int ltr501_als_write_samp_freq(struct ltr501_data *data,
172 int val, int val2)
173{
174 int i, ret;
175
176 i = ltr501_match_samp_freq(ltr501_als_samp_table,
177 ARRAY_SIZE(ltr501_als_samp_table),
178 val, val2);
179
180 if (i < 0)
181 return i;
182
183 mutex_lock(&data->lock_als);
184 ret = regmap_field_write(data->reg_als_rate, i);
185 mutex_unlock(&data->lock_als);
186
187 return ret;
188}
189
190static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
191 int val, int val2)
192{
193 int i, ret;
194
195 i = ltr501_match_samp_freq(ltr501_ps_samp_table,
196 ARRAY_SIZE(ltr501_ps_samp_table),
197 val, val2);
198
199 if (i < 0)
200 return i;
201
202 mutex_lock(&data->lock_ps);
203 ret = regmap_field_write(data->reg_ps_rate, i);
204 mutex_unlock(&data->lock_ps);
205
206 return ret;
207}
208
209static int ltr501_als_read_samp_period(struct ltr501_data *data, int *val)
210{
211 int ret, i;
212
213 ret = regmap_field_read(data->reg_als_rate, &i);
214 if (ret < 0)
215 return ret;
216
217 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
218 return -EINVAL;
219
220 *val = ltr501_als_samp_table[i].time_val;
221
222 return IIO_VAL_INT;
223}
224
225static int ltr501_ps_read_samp_period(struct ltr501_data *data, int *val)
226{
227 int ret, i;
228
229 ret = regmap_field_read(data->reg_ps_rate, &i);
230 if (ret < 0)
231 return ret;
232
233 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
234 return -EINVAL;
235
236 *val = ltr501_ps_samp_table[i].time_val;
237
238 return IIO_VAL_INT;
239}
240
2690be90
PM		 241static int ltr501_drdy(struct ltr501_data *data, u8 drdy_mask)
242{
243 int tries = 100;
2f2c9633 244 int ret, status;
2690be90
PM		 245
246 while (tries--) {
2f2c9633 247 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
2690be90
PM		 248 if (ret < 0)
249 return ret;
2f2c9633 250 if ((status & drdy_mask) == drdy_mask)
2690be90
PM		 251 return 0;
252 msleep(25);
253 }
254
255 dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n");
256 return -EIO;
257}
258
844b4702
KS		 259static int ltr501_set_it_time(struct ltr501_data *data, int it)
260{
261 int ret, i, index = -1, status;
262
263 for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
264 if (int_time_mapping[i] == it) {
265 index = i;
266 break;
267 }
268 }
269 /* Make sure integ time index is valid */
270 if (index < 0)
271 return -EINVAL;
272
273 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
274 if (ret < 0)
275 return ret;
276
277 if (status & LTR501_CONTR_ALS_GAIN_MASK) {
278 /*
279 * 200 ms and 400 ms integ time can only be
280 * used in dynamic range 1
281 */
282 if (index > 1)
283 return -EINVAL;
284 } else
285 /* 50 ms integ time can only be used in dynamic range 2 */
286 if (index == 1)
287 return -EINVAL;
288
289 return regmap_field_write(data->reg_it, index);
290}
291
292/* read int time in micro seconds */
293static int ltr501_read_it_time(struct ltr501_data *data, int *val, int *val2)
294{
295 int ret, index;
296
297 ret = regmap_field_read(data->reg_it, &index);
298 if (ret < 0)
299 return ret;
300
301 /* Make sure integ time index is valid */
302 if (index < 0 || index >= ARRAY_SIZE(int_time_mapping))
303 return -EINVAL;
304
305 *val2 = int_time_mapping[index];
306 *val = 0;
307
308 return IIO_VAL_INT_PLUS_MICRO;
309}
310
2690be90
PM		 311static int ltr501_read_als(struct ltr501_data *data, __le16 buf[2])
312{
2f2c9633
KS		 313 int ret;
314
315 ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY);
2690be90
PM		 316 if (ret < 0)
317 return ret;
318 /* always read both ALS channels in given order */
2f2c9633
KS		 319 return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
320 buf, 2 * sizeof(__le16));
2690be90
PM		 321}
322
323static int ltr501_read_ps(struct ltr501_data *data)
324{
2f2c9633
KS		 325 int ret, status;
326
327 ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY);
328 if (ret < 0)
329 return ret;
330
331 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
332 &status, 2);
2690be90
PM		 333 if (ret < 0)
334 return ret;
2f2c9633
KS		 335
336 return status;
2690be90
PM		 337}
338
eea53b4a
KS		 339static int ltr501_read_intr_prst(struct ltr501_data *data,
340 enum iio_chan_type type,
341 int *val2)
342{
343 int ret, samp_period, prst;
344
345 switch (type) {
346 case IIO_INTENSITY:
347 ret = regmap_field_read(data->reg_als_prst, &prst);
348 if (ret < 0)
349 return ret;
350
351 ret = ltr501_als_read_samp_period(data, &samp_period);
352
353 if (ret < 0)
354 return ret;
355 *val2 = samp_period * prst;
356 return IIO_VAL_INT_PLUS_MICRO;
357 case IIO_PROXIMITY:
358 ret = regmap_field_read(data->reg_ps_prst, &prst);
359 if (ret < 0)
360 return ret;
361
362 ret = ltr501_ps_read_samp_period(data, &samp_period);
363
364 if (ret < 0)
365 return ret;
366
367 *val2 = samp_period * prst;
368 return IIO_VAL_INT_PLUS_MICRO;
369 default:
370 return -EINVAL;
371 }
372
373 return -EINVAL;
374}
375
376static int ltr501_write_intr_prst(struct ltr501_data *data,
377 enum iio_chan_type type,
378 int val, int val2)
379{
380 int ret, samp_period, new_val;
381 unsigned long period;
382
383 if (val < 0 || val2 < 0)
384 return -EINVAL;
385
386 /* period in microseconds */
387 period = ((val * 1000000) + val2);
388
389 switch (type) {
390 case IIO_INTENSITY:
391 ret = ltr501_als_read_samp_period(data, &samp_period);
392 if (ret < 0)
393 return ret;
394
395 /* period should be atleast equal to sampling period */
396 if (period < samp_period)
397 return -EINVAL;
398
399 new_val = DIV_ROUND_UP(period, samp_period);
400 if (new_val < 0 || new_val > 0x0f)
401 return -EINVAL;
402
403 mutex_lock(&data->lock_als);
404 ret = regmap_field_write(data->reg_als_prst, new_val);
405 mutex_unlock(&data->lock_als);
406 if (ret >= 0)
407 data->als_period = period;
408
409 return ret;
410 case IIO_PROXIMITY:
411 ret = ltr501_ps_read_samp_period(data, &samp_period);
412 if (ret < 0)
413 return ret;
414
415 /* period should be atleast equal to rate */
416 if (period < samp_period)
417 return -EINVAL;
418
419 new_val = DIV_ROUND_UP(period, samp_period);
420 if (new_val < 0 || new_val > 0x0f)
421 return -EINVAL;
422
423 mutex_lock(&data->lock_ps);
424 ret = regmap_field_write(data->reg_ps_prst, new_val);
425 mutex_unlock(&data->lock_ps);
426 if (ret >= 0)
427 data->ps_period = period;
428
429 return ret;
430 default:
431 return -EINVAL;
432 }
433
434 return -EINVAL;
435}
436
7ac702b3
KS		 437static const struct iio_event_spec ltr501_als_event_spec[] = {
438 {
439 .type = IIO_EV_TYPE_THRESH,
440 .dir = IIO_EV_DIR_RISING,
441 .mask_separate = BIT(IIO_EV_INFO_VALUE),
442 }, {
443 .type = IIO_EV_TYPE_THRESH,
444 .dir = IIO_EV_DIR_FALLING,
445 .mask_separate = BIT(IIO_EV_INFO_VALUE),
446 }, {
447 .type = IIO_EV_TYPE_THRESH,
448 .dir = IIO_EV_DIR_EITHER,
eea53b4a
KS		 449 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
450 BIT(IIO_EV_INFO_PERIOD),
7ac702b3
KS		 451 },
452
453};
454
455static const struct iio_event_spec ltr501_pxs_event_spec[] = {
456 {
457 .type = IIO_EV_TYPE_THRESH,
458 .dir = IIO_EV_DIR_RISING,
459 .mask_separate = BIT(IIO_EV_INFO_VALUE),
460 }, {
461 .type = IIO_EV_TYPE_THRESH,
462 .dir = IIO_EV_DIR_FALLING,
463 .mask_separate = BIT(IIO_EV_INFO_VALUE),
464 }, {
465 .type = IIO_EV_TYPE_THRESH,
466 .dir = IIO_EV_DIR_EITHER,
eea53b4a
KS		 467 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
468 BIT(IIO_EV_INFO_PERIOD),
7ac702b3
KS		 469 },
470};
471
472#define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
473 _evspec, _evsize) { \
2690be90
PM		 474 .type = IIO_INTENSITY, \
475 .modified = 1, \
476 .address = (_addr), \
477 .channel2 = (_mod), \
478 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
479 .info_mask_shared_by_type = (_shared), \
480 .scan_index = (_idx), \
481 .scan_type = { \
482 .sign = 'u', \
483 .realbits = 16, \
484 .storagebits = 16, \
485 .endianness = IIO_CPU, \
7ac702b3
KS		 486 }, \
487 .event_spec = _evspec,\
488 .num_event_specs = _evsize,\
2690be90
PM		 489}
490
491static const struct iio_chan_spec ltr501_channels[] = {
7ac702b3
KS		 492 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
493 ltr501_als_event_spec,
494 ARRAY_SIZE(ltr501_als_event_spec)),
2690be90 495 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
844b4702 496 BIT(IIO_CHAN_INFO_SCALE) |
eea53b4a
KS		 497 BIT(IIO_CHAN_INFO_INT_TIME) |
498 BIT(IIO_CHAN_INFO_SAMP_FREQ),
7ac702b3 499 NULL, 0),
2690be90
PM		 500 {
501 .type = IIO_PROXIMITY,
502 .address = LTR501_PS_DATA,
503 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
504 BIT(IIO_CHAN_INFO_SCALE),
505 .scan_index = 2,
506 .scan_type = {
507 .sign = 'u',
508 .realbits = 11,
509 .storagebits = 16,
510 .endianness = IIO_CPU,
511 },
7ac702b3
KS		 512 .event_spec = ltr501_pxs_event_spec,
513 .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec),
2690be90
PM		 514 },
515 IIO_CHAN_SOFT_TIMESTAMP(3),
516};
517
518static const int ltr501_ps_gain[4][2] = {
519 {1, 0}, {0, 250000}, {0, 125000}, {0, 62500}
520};
521
522static int ltr501_read_raw(struct iio_dev *indio_dev,
abda2b4f
DB		 523 struct iio_chan_spec const *chan,
524 int *val, int *val2, long mask)
2690be90
PM		 525{
526 struct ltr501_data *data = iio_priv(indio_dev);
527 __le16 buf[2];
528 int ret, i;
529
530 switch (mask) {
531 case IIO_CHAN_INFO_RAW:
532 if (iio_buffer_enabled(indio_dev))
533 return -EBUSY;
534
535 switch (chan->type) {
536 case IIO_INTENSITY:
537 mutex_lock(&data->lock_als);
538 ret = ltr501_read_als(data, buf);
539 mutex_unlock(&data->lock_als);
540 if (ret < 0)
541 return ret;
542 *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ?
abda2b4f 543 buf[0] : buf[1]);
2690be90
PM		 544 return IIO_VAL_INT;
545 case IIO_PROXIMITY:
546 mutex_lock(&data->lock_ps);
547 ret = ltr501_read_ps(data);
548 mutex_unlock(&data->lock_ps);
549 if (ret < 0)
550 return ret;
551 *val = ret & LTR501_PS_DATA_MASK;
552 return IIO_VAL_INT;
553 default:
554 return -EINVAL;
555 }
556 case IIO_CHAN_INFO_SCALE:
557 switch (chan->type) {
558 case IIO_INTENSITY:
559 if (data->als_contr & LTR501_CONTR_ALS_GAIN_MASK) {
560 *val = 0;
561 *val2 = 5000;
562 return IIO_VAL_INT_PLUS_MICRO;
2690be90 563 }
2f2c9633
KS		 564 *val = 1;
565 *val2 = 0;
566 return IIO_VAL_INT;
2690be90
PM		 567 case IIO_PROXIMITY:
568 i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >>
569 LTR501_CONTR_PS_GAIN_SHIFT;
570 *val = ltr501_ps_gain[i][0];
571 *val2 = ltr501_ps_gain[i][1];
572 return IIO_VAL_INT_PLUS_MICRO;
573 default:
574 return -EINVAL;
575 }
844b4702
KS		 576 case IIO_CHAN_INFO_INT_TIME:
577 switch (chan->type) {
578 case IIO_INTENSITY:
579 return ltr501_read_it_time(data, val, val2);
580 default:
581 return -EINVAL;
582 }
eea53b4a
KS		 583 case IIO_CHAN_INFO_SAMP_FREQ:
584 switch (chan->type) {
585 case IIO_INTENSITY:
586 return ltr501_als_read_samp_freq(data, val, val2);
587 case IIO_PROXIMITY:
588 return ltr501_ps_read_samp_freq(data, val, val2);
589 default:
590 return -EINVAL;
591 }
2690be90
PM		 592 }
593 return -EINVAL;
594}
595
596static int ltr501_get_ps_gain_index(int val, int val2)
597{
598 int i;
599
600 for (i = 0; i < ARRAY_SIZE(ltr501_ps_gain); i++)
601 if (val == ltr501_ps_gain[i][0] && val2 == ltr501_ps_gain[i][1])
602 return i;
603
604 return -1;
605}
606
607static int ltr501_write_raw(struct iio_dev *indio_dev,
abda2b4f
DB		 608 struct iio_chan_spec const *chan,
609 int val, int val2, long mask)
2690be90
PM		 610{
611 struct ltr501_data *data = iio_priv(indio_dev);
eea53b4a 612 int i, ret, freq_val, freq_val2;
2690be90
PM		 613
614 if (iio_buffer_enabled(indio_dev))
615 return -EBUSY;
616
617 switch (mask) {
618 case IIO_CHAN_INFO_SCALE:
619 switch (chan->type) {
620 case IIO_INTENSITY:
621 if (val == 0 && val2 == 5000)
622 data->als_contr |= LTR501_CONTR_ALS_GAIN_MASK;
623 else if (val == 1 && val2 == 0)
624 data->als_contr &= ~LTR501_CONTR_ALS_GAIN_MASK;
625 else
626 return -EINVAL;
2f2c9633
KS		 627
628 return regmap_write(data->regmap, LTR501_ALS_CONTR,
629 data->als_contr);
2690be90
PM		 630 case IIO_PROXIMITY:
631 i = ltr501_get_ps_gain_index(val, val2);
632 if (i < 0)
633 return -EINVAL;
634 data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK;
635 data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT;
2f2c9633
KS		 636
637 return regmap_write(data->regmap, LTR501_PS_CONTR,
638 data->ps_contr);
2690be90
PM		 639 default:
640 return -EINVAL;
641 }
844b4702
KS		 642 case IIO_CHAN_INFO_INT_TIME:
643 switch (chan->type) {
644 case IIO_INTENSITY:
645 if (val != 0)
646 return -EINVAL;
647 mutex_lock(&data->lock_als);
648 i = ltr501_set_it_time(data, val2);
649 mutex_unlock(&data->lock_als);
650 return i;
651 default:
652 return -EINVAL;
653 }
eea53b4a
KS		 654 case IIO_CHAN_INFO_SAMP_FREQ:
655 switch (chan->type) {
656 case IIO_INTENSITY:
657 ret = ltr501_als_read_samp_freq(data, &freq_val,
658 &freq_val2);
659 if (ret < 0)
660 return ret;
661
662 ret = ltr501_als_write_samp_freq(data, val, val2);
663 if (ret < 0)
664 return ret;
665
666 /* update persistence count when changing frequency */
667 ret = ltr501_write_intr_prst(data, chan->type,
668 0, data->als_period);
669
670 if (ret < 0)
671 return ltr501_als_write_samp_freq(data,
672 freq_val,
673 freq_val2);
674 return ret;
675 case IIO_PROXIMITY:
676 ret = ltr501_ps_read_samp_freq(data, &freq_val,
677 &freq_val2);
678 if (ret < 0)
679 return ret;
680
681 ret = ltr501_ps_write_samp_freq(data, val, val2);
682 if (ret < 0)
683 return ret;
684
685 /* update persistence count when changing frequency */
686 ret = ltr501_write_intr_prst(data, chan->type,
687 0, data->ps_period);
688
689 if (ret < 0)
690 return ltr501_ps_write_samp_freq(data,
691 freq_val,
692 freq_val2);
693 return ret;
694 default:
695 return -EINVAL;
696 }
2690be90
PM		 697 }
698 return -EINVAL;
699}
700
7ac702b3
KS		 701static int ltr501_read_thresh(struct iio_dev *indio_dev,
702 const struct iio_chan_spec *chan,
703 enum iio_event_type type,
704 enum iio_event_direction dir,
705 enum iio_event_info info,
706 int *val, int *val2)
707{
708 struct ltr501_data *data = iio_priv(indio_dev);
709 int ret, thresh_data;
710
711 switch (chan->type) {
712 case IIO_INTENSITY:
713 switch (dir) {
714 case IIO_EV_DIR_RISING:
715 ret = regmap_bulk_read(data->regmap,
716 LTR501_ALS_THRESH_UP,
717 &thresh_data, 2);
718 if (ret < 0)
719 return ret;
720 *val = thresh_data & LTR501_ALS_THRESH_MASK;
721 return IIO_VAL_INT;
722 case IIO_EV_DIR_FALLING:
723 ret = regmap_bulk_read(data->regmap,
724 LTR501_ALS_THRESH_LOW,
725 &thresh_data, 2);
726 if (ret < 0)
727 return ret;
728 *val = thresh_data & LTR501_ALS_THRESH_MASK;
729 return IIO_VAL_INT;
730 default:
731 return -EINVAL;
732 }
733 case IIO_PROXIMITY:
734 switch (dir) {
735 case IIO_EV_DIR_RISING:
736 ret = regmap_bulk_read(data->regmap,
737 LTR501_PS_THRESH_UP,
738 &thresh_data, 2);
739 if (ret < 0)
740 return ret;
741 *val = thresh_data & LTR501_PS_THRESH_MASK;
742 return IIO_VAL_INT;
743 case IIO_EV_DIR_FALLING:
744 ret = regmap_bulk_read(data->regmap,
745 LTR501_PS_THRESH_LOW,
746 &thresh_data, 2);
747 if (ret < 0)
748 return ret;
749 *val = thresh_data & LTR501_PS_THRESH_MASK;
750 return IIO_VAL_INT;
751 default:
752 return -EINVAL;
753 }
754 default:
755 return -EINVAL;
756 }
757
758 return -EINVAL;
759}
760
761static int ltr501_write_thresh(struct iio_dev *indio_dev,
762 const struct iio_chan_spec *chan,
763 enum iio_event_type type,
764 enum iio_event_direction dir,
765 enum iio_event_info info,
766 int val, int val2)
767{
768 struct ltr501_data *data = iio_priv(indio_dev);
769 int ret;
770
771 if (val < 0)
772 return -EINVAL;
773
774 switch (chan->type) {
775 case IIO_INTENSITY:
776 if (val > LTR501_ALS_THRESH_MASK)
777 return -EINVAL;
778 switch (dir) {
779 case IIO_EV_DIR_RISING:
780 mutex_lock(&data->lock_als);
781 ret = regmap_bulk_write(data->regmap,
782 LTR501_ALS_THRESH_UP,
783 &val, 2);
784 mutex_unlock(&data->lock_als);
785 return ret;
786 case IIO_EV_DIR_FALLING:
787 mutex_lock(&data->lock_als);
788 ret = regmap_bulk_write(data->regmap,
789 LTR501_ALS_THRESH_LOW,
790 &val, 2);
791 mutex_unlock(&data->lock_als);
792 return ret;
793 default:
794 return -EINVAL;
795 }
796 case IIO_PROXIMITY:
797 switch (dir) {
798 if (val > LTR501_PS_THRESH_MASK)
799 return -EINVAL;
800 case IIO_EV_DIR_RISING:
801 mutex_lock(&data->lock_ps);
802 ret = regmap_bulk_write(data->regmap,
803 LTR501_PS_THRESH_UP,
804 &val, 2);
805 mutex_unlock(&data->lock_ps);
806 return ret;
807 case IIO_EV_DIR_FALLING:
808 mutex_lock(&data->lock_ps);
809 ret = regmap_bulk_write(data->regmap,
810 LTR501_PS_THRESH_LOW,
811 &val, 2);
812 mutex_unlock(&data->lock_ps);
813 return ret;
814 default:
815 return -EINVAL;
816 }
817 default:
818 return -EINVAL;
819 }
820
821 return -EINVAL;
822}
823
eea53b4a
KS		 824static int ltr501_read_event(struct iio_dev *indio_dev,
825 const struct iio_chan_spec *chan,
826 enum iio_event_type type,
827 enum iio_event_direction dir,
828 enum iio_event_info info,
829 int *val, int *val2)
830{
831 int ret;
832
833 switch (info) {
834 case IIO_EV_INFO_VALUE:
835 return ltr501_read_thresh(indio_dev, chan, type, dir,
836 info, val, val2);
837 case IIO_EV_INFO_PERIOD:
838 ret = ltr501_read_intr_prst(iio_priv(indio_dev),
839 chan->type, val2);
840 *val = *val2 / 1000000;
841 *val2 = *val2 % 1000000;
842 return ret;
843 default:
844 return -EINVAL;
845 }
846
847 return -EINVAL;
848}
849
850static int ltr501_write_event(struct iio_dev *indio_dev,
851 const struct iio_chan_spec *chan,
852 enum iio_event_type type,
853 enum iio_event_direction dir,
854 enum iio_event_info info,
855 int val, int val2)
856{
857 switch (info) {
858 case IIO_EV_INFO_VALUE:
859 if (val2 != 0)
860 return -EINVAL;
861 return ltr501_write_thresh(indio_dev, chan, type, dir,
862 info, val, val2);
863 case IIO_EV_INFO_PERIOD:
864 return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type,
865 val, val2);
866 default:
867 return -EINVAL;
868 }
869
870 return -EINVAL;
871}
872
7ac702b3
KS		 873static int ltr501_read_event_config(struct iio_dev *indio_dev,
874 const struct iio_chan_spec *chan,
875 enum iio_event_type type,
876 enum iio_event_direction dir)
877{
878 struct ltr501_data *data = iio_priv(indio_dev);
879 int ret, status;
880
881 switch (chan->type) {
882 case IIO_INTENSITY:
883 ret = regmap_field_read(data->reg_als_intr, &status);
884 if (ret < 0)
885 return ret;
886 return status;
887 case IIO_PROXIMITY:
888 ret = regmap_field_read(data->reg_ps_intr, &status);
889 if (ret < 0)
890 return ret;
891 return status;
892 default:
893 return -EINVAL;
894 }
895
896 return -EINVAL;
897}
898
899static int ltr501_write_event_config(struct iio_dev *indio_dev,
900 const struct iio_chan_spec *chan,
901 enum iio_event_type type,
902 enum iio_event_direction dir, int state)
903{
904 struct ltr501_data *data = iio_priv(indio_dev);
905 int ret;
906
907 /* only 1 and 0 are valid inputs */
908 if (state != 1 || state != 0)
909 return -EINVAL;
910
911 switch (chan->type) {
912 case IIO_INTENSITY:
913 mutex_lock(&data->lock_als);
914 ret = regmap_field_write(data->reg_als_intr, state);
915 mutex_unlock(&data->lock_als);
916 return ret;
917 case IIO_PROXIMITY:
918 mutex_lock(&data->lock_ps);
919 ret = regmap_field_write(data->reg_ps_intr, state);
920 mutex_unlock(&data->lock_ps);
921 return ret;
922 default:
923 return -EINVAL;
924 }
925
926 return -EINVAL;
927}
928
2690be90
PM		 929static IIO_CONST_ATTR(in_proximity_scale_available, "1 0.25 0.125 0.0625");
930static IIO_CONST_ATTR(in_intensity_scale_available, "1 0.005");
844b4702 931static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4");
eea53b4a 932static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5");
2690be90
PM		 933
934static struct attribute *ltr501_attributes[] = {
935 &iio_const_attr_in_proximity_scale_available.dev_attr.attr,
936 &iio_const_attr_in_intensity_scale_available.dev_attr.attr,
844b4702 937 &iio_const_attr_integration_time_available.dev_attr.attr,
eea53b4a 938 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
2690be90
PM		 939 NULL
940};
941
942static const struct attribute_group ltr501_attribute_group = {
943 .attrs = ltr501_attributes,
944};
945
7ac702b3
KS		 946static const struct iio_info ltr501_info_no_irq = {
947 .read_raw = ltr501_read_raw,
948 .write_raw = ltr501_write_raw,
949 .attrs = &ltr501_attribute_group,
950 .driver_module = THIS_MODULE,
951};
952
2690be90
PM		 953static const struct iio_info ltr501_info = {
954 .read_raw = ltr501_read_raw,
955 .write_raw = ltr501_write_raw,
956 .attrs = &ltr501_attribute_group,
eea53b4a
KS		 957 .read_event_value = &ltr501_read_event,
958 .write_event_value = &ltr501_write_event,
7ac702b3
KS		 959 .read_event_config = &ltr501_read_event_config,
960 .write_event_config = &ltr501_write_event_config,
2690be90
PM		 961 .driver_module = THIS_MODULE,
962};
963
2f2c9633 964static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val)
2690be90 965{
2f2c9633
KS		 966 int ret;
967
968 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val);
2690be90
PM		 969 if (ret < 0)
970 return ret;
971
2f2c9633 972 return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val);
2690be90
PM		 973}
974
975static irqreturn_t ltr501_trigger_handler(int irq, void *p)
976{
977 struct iio_poll_func *pf = p;
978 struct iio_dev *indio_dev = pf->indio_dev;
979 struct ltr501_data *data = iio_priv(indio_dev);
980 u16 buf[8];
981 __le16 als_buf[2];
982 u8 mask = 0;
983 int j = 0;
2f2c9633 984 int ret, psdata;
2690be90
PM		 985
986 memset(buf, 0, sizeof(buf));
987
988 /* figure out which data needs to be ready */
989 if (test_bit(0, indio_dev->active_scan_mask) ||
abda2b4f 990 test_bit(1, indio_dev->active_scan_mask))
2690be90
PM		 991 mask |= LTR501_STATUS_ALS_RDY;
992 if (test_bit(2, indio_dev->active_scan_mask))
993 mask |= LTR501_STATUS_PS_RDY;
994
995 ret = ltr501_drdy(data, mask);
996 if (ret < 0)
997 goto done;
998
999 if (mask & LTR501_STATUS_ALS_RDY) {
2f2c9633
KS		 1000 ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
1001 (u8 *)als_buf, sizeof(als_buf));
2690be90
PM		 1002 if (ret < 0)
1003 return ret;
1004 if (test_bit(0, indio_dev->active_scan_mask))
1005 buf[j++] = le16_to_cpu(als_buf[1]);
1006 if (test_bit(1, indio_dev->active_scan_mask))
1007 buf[j++] = le16_to_cpu(als_buf[0]);
1008 }
1009
1010 if (mask & LTR501_STATUS_PS_RDY) {
2f2c9633
KS		 1011 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
1012 &psdata, 2);
2690be90
PM		 1013 if (ret < 0)
1014 goto done;
2f2c9633 1015 buf[j++] = psdata & LTR501_PS_DATA_MASK;
2690be90
PM		 1016 }
1017
abda2b4f 1018 iio_push_to_buffers_with_timestamp(indio_dev, buf, iio_get_time_ns());
2690be90
PM		 1019
1020done:
1021 iio_trigger_notify_done(indio_dev->trig);
1022
1023 return IRQ_HANDLED;
1024}
1025
7ac702b3
KS		 1026static irqreturn_t ltr501_interrupt_handler(int irq, void *private)
1027{
1028 struct iio_dev *indio_dev = private;
1029 struct ltr501_data *data = iio_priv(indio_dev);
1030 int ret, status;
1031
1032 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
1033 if (ret < 0) {
1034 dev_err(&data->client->dev,
1035 "irq read int reg failed\n");
1036 return IRQ_HANDLED;
1037 }
1038
1039 if (status & LTR501_STATUS_ALS_INTR)
1040 iio_push_event(indio_dev,
1041 IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
1042 IIO_EV_TYPE_THRESH,
1043 IIO_EV_DIR_EITHER),
1044 iio_get_time_ns());
1045
1046 if (status & LTR501_STATUS_PS_INTR)
1047 iio_push_event(indio_dev,
1048 IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
1049 IIO_EV_TYPE_THRESH,
1050 IIO_EV_DIR_EITHER),
1051 iio_get_time_ns());
1052
1053 return IRQ_HANDLED;
1054}
1055
2690be90
PM		 1056static int ltr501_init(struct ltr501_data *data)
1057{
2f2c9633 1058 int ret, status;
2690be90 1059
2f2c9633 1060 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
2690be90
PM		 1061 if (ret < 0)
1062 return ret;
2690be90 1063
2f2c9633
KS		 1064 data->als_contr = status | LTR501_CONTR_ACTIVE;
1065
1066 ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status);
2690be90
PM		 1067 if (ret < 0)
1068 return ret;
2690be90 1069
2f2c9633
KS		 1070 data->ps_contr = status | LTR501_CONTR_ACTIVE;
1071
eea53b4a
KS		 1072 ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period);
1073 if (ret < 0)
1074 return ret;
1075
1076 ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period);
1077 if (ret < 0)
1078 return ret;
1079
2f2c9633 1080 return ltr501_write_contr(data, data->als_contr, data->ps_contr);
2690be90
PM		 1081}
1082
2f2c9633
KS		 1083static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg)
1084{
1085 switch (reg) {
1086 case LTR501_ALS_DATA1:
1087 case LTR501_ALS_DATA0:
1088 case LTR501_ALS_PS_STATUS:
1089 case LTR501_PS_DATA:
1090 return true;
1091 default:
1092 return false;
1093 }
1094}
1095
1096static struct regmap_config ltr501_regmap_config = {
1097 .name = LTR501_REGMAP_NAME,
1098 .reg_bits = 8,
1099 .val_bits = 8,
1100 .max_register = LTR501_MAX_REG,
1101 .cache_type = REGCACHE_RBTREE,
1102 .volatile_reg = ltr501_is_volatile_reg,
1103};
1104
1ca510b0
CO		 1105static int ltr501_powerdown(struct ltr501_data *data)
1106{
2f2c9633 1107 return ltr501_write_contr(data, data->als_contr & ~LTR501_CONTR_ACTIVE,
1ca510b0
CO		 1108 data->ps_contr & ~LTR501_CONTR_ACTIVE);
1109}
1110
2690be90 1111static int ltr501_probe(struct i2c_client *client,
abda2b4f 1112 const struct i2c_device_id *id)
2690be90
PM		 1113{
1114 struct ltr501_data *data;
1115 struct iio_dev *indio_dev;
2f2c9633
KS		 1116 struct regmap *regmap;
1117 int ret, partid;
2690be90
PM		 1118
1119 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1120 if (!indio_dev)
1121 return -ENOMEM;
1122
2f2c9633
KS		 1123 regmap = devm_regmap_init_i2c(client, &ltr501_regmap_config);
1124 if (IS_ERR(regmap)) {
1125 dev_err(&client->dev, "Regmap initialization failed.\n");
1126 return PTR_ERR(regmap);
1127 }
1128
2690be90
PM		 1129 data = iio_priv(indio_dev);
1130 i2c_set_clientdata(client, indio_dev);
1131 data->client = client;
2f2c9633 1132 data->regmap = regmap;
2690be90
PM		 1133 mutex_init(&data->lock_als);
1134 mutex_init(&data->lock_ps);
1135
844b4702
KS		 1136 data->reg_it = devm_regmap_field_alloc(&client->dev, regmap,
1137 reg_field_it);
1138 if (IS_ERR(data->reg_it)) {
1139 dev_err(&client->dev, "Integ time reg field init failed.\n");
1140 return PTR_ERR(data->reg_it);
1141 }
1142
7ac702b3
KS		 1143 data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap,
1144 reg_field_als_intr);
1145 if (IS_ERR(data->reg_als_intr)) {
1146 dev_err(&client->dev, "ALS intr mode reg field init failed\n");
1147 return PTR_ERR(data->reg_als_intr);
1148 }
1149
1150 data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap,
1151 reg_field_ps_intr);
1152 if (IS_ERR(data->reg_ps_intr)) {
1153 dev_err(&client->dev, "PS intr mode reg field init failed.\n");
1154 return PTR_ERR(data->reg_ps_intr);
1155 }
1156
eea53b4a
KS		 1157 data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap,
1158 reg_field_als_rate);
1159 if (IS_ERR(data->reg_als_rate)) {
1160 dev_err(&client->dev, "ALS samp rate field init failed.\n");
1161 return PTR_ERR(data->reg_als_rate);
1162 }
1163
1164 data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap,
1165 reg_field_ps_rate);
1166 if (IS_ERR(data->reg_ps_rate)) {
1167 dev_err(&client->dev, "PS samp rate field init failed.\n");
1168 return PTR_ERR(data->reg_ps_rate);
1169 }
1170
1171 data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap,
1172 reg_field_als_prst);
1173 if (IS_ERR(data->reg_als_prst)) {
1174 dev_err(&client->dev, "ALS prst reg field init failed\n");
1175 return PTR_ERR(data->reg_als_prst);
1176 }
1177
1178 data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap,
1179 reg_field_ps_prst);
1180 if (IS_ERR(data->reg_ps_prst)) {
1181 dev_err(&client->dev, "PS prst reg field init failed.\n");
1182 return PTR_ERR(data->reg_ps_prst);
1183 }
1184
2f2c9633 1185 ret = regmap_read(data->regmap, LTR501_PART_ID, &partid);
2690be90
PM		 1186 if (ret < 0)
1187 return ret;
2f2c9633 1188 if ((partid >> 4) != 0x8)
2690be90
PM		 1189 return -ENODEV;
1190
1191 indio_dev->dev.parent = &client->dev;
2690be90
PM		 1192 indio_dev->channels = ltr501_channels;
1193 indio_dev->num_channels = ARRAY_SIZE(ltr501_channels);
1194 indio_dev->name = LTR501_DRV_NAME;
1195 indio_dev->modes = INDIO_DIRECT_MODE;
1196
1197 ret = ltr501_init(data);
1198 if (ret < 0)
1199 return ret;
1200
7ac702b3
KS		 1201 if (client->irq > 0) {
1202 indio_dev->info = &ltr501_info;
1203 ret = devm_request_threaded_irq(&client->dev, client->irq,
1204 NULL, ltr501_interrupt_handler,
1205 IRQF_TRIGGER_FALLING |
1206 IRQF_ONESHOT,
1207 "ltr501_thresh_event",
1208 indio_dev);
1209 if (ret) {
1210 dev_err(&client->dev, "request irq (%d) failed\n",
1211 client->irq);
1212 return ret;
1213 }
1214 } else {
1215 indio_dev->info = &ltr501_info_no_irq;
1216 }
1217
2690be90 1218 ret = iio_triggered_buffer_setup(indio_dev, NULL,
abda2b4f 1219 ltr501_trigger_handler, NULL);
2690be90 1220 if (ret)
1ca510b0 1221 goto powerdown_on_error;
2690be90
PM		 1222
1223 ret = iio_device_register(indio_dev);
1224 if (ret)
1225 goto error_unreg_buffer;
1226
1227 return 0;
1228
1229error_unreg_buffer:
1230 iio_triggered_buffer_cleanup(indio_dev);
1ca510b0
CO		 1231powerdown_on_error:
1232 ltr501_powerdown(data);
2690be90
PM		 1233 return ret;
1234}
1235
2690be90
PM		 1236static int ltr501_remove(struct i2c_client *client)
1237{
1238 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1239
1240 iio_device_unregister(indio_dev);
1241 iio_triggered_buffer_cleanup(indio_dev);
1242 ltr501_powerdown(iio_priv(indio_dev));
1243
1244 return 0;
1245}
1246
1247#ifdef CONFIG_PM_SLEEP
1248static int ltr501_suspend(struct device *dev)
1249{
1250 struct ltr501_data *data = iio_priv(i2c_get_clientdata(
abda2b4f 1251 to_i2c_client(dev)));
2690be90
PM		 1252 return ltr501_powerdown(data);
1253}
1254
1255static int ltr501_resume(struct device *dev)
1256{
1257 struct ltr501_data *data = iio_priv(i2c_get_clientdata(
abda2b4f 1258 to_i2c_client(dev)));
2690be90 1259
2f2c9633 1260 return ltr501_write_contr(data, data->als_contr,
2690be90
PM		 1261 data->ps_contr);
1262}
1263#endif
1264
1265static SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume);
1266
1267static const struct i2c_device_id ltr501_id[] = {
1268 { "ltr501", 0 },
1269 { }
1270};
1271MODULE_DEVICE_TABLE(i2c, ltr501_id);
1272
1273static struct i2c_driver ltr501_driver = {
1274 .driver = {
1275 .name = LTR501_DRV_NAME,
1276 .pm = &ltr501_pm_ops,
1277 .owner = THIS_MODULE,
1278 },
1279 .probe = ltr501_probe,
1280 .remove = ltr501_remove,
1281 .id_table = ltr501_id,
1282};
1283
1284module_i2c_driver(ltr501_driver);
1285
1286MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
1287MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver");
1288MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)