[linux-2.6-block.git] / drivers / iio / health / max30102.c

/*
 * max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
 *
 * Copyright (C) 2017 Matt Ranostay <matt@ranostay.consulting>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * TODO: proximity power saving feature
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/irq.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>

#define MAX30102_REGMAP_NAME	"max30102_regmap"
#define MAX30102_DRV_NAME	"max30102"

#define MAX30102_REG_INT_STATUS			0x00
#define MAX30102_REG_INT_STATUS_PWR_RDY		BIT(0)
#define MAX30102_REG_INT_STATUS_PROX_INT	BIT(4)
#define MAX30102_REG_INT_STATUS_ALC_OVF		BIT(5)
#define MAX30102_REG_INT_STATUS_PPG_RDY		BIT(6)
#define MAX30102_REG_INT_STATUS_FIFO_RDY	BIT(7)

#define MAX30102_REG_INT_ENABLE			0x02
#define MAX30102_REG_INT_ENABLE_PROX_INT_EN	BIT(4)
#define MAX30102_REG_INT_ENABLE_ALC_OVF_EN	BIT(5)
#define MAX30102_REG_INT_ENABLE_PPG_EN		BIT(6)
#define MAX30102_REG_INT_ENABLE_FIFO_EN		BIT(7)
#define MAX30102_REG_INT_ENABLE_MASK		0xf0
#define MAX30102_REG_INT_ENABLE_MASK_SHIFT	4

#define MAX30102_REG_FIFO_WR_PTR		0x04
#define MAX30102_REG_FIFO_OVR_CTR		0x05
#define MAX30102_REG_FIFO_RD_PTR		0x06
#define MAX30102_REG_FIFO_DATA			0x07
#define MAX30102_REG_FIFO_DATA_ENTRY_LEN	6

#define MAX30102_REG_FIFO_CONFIG		0x08
#define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES	BIT(1)
#define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT	5
#define MAX30102_REG_FIFO_CONFIG_AFULL		BIT(0)

#define MAX30102_REG_MODE_CONFIG		0x09
#define MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN	BIT(0)
#define MAX30102_REG_MODE_CONFIG_MODE_HR_EN	BIT(1)
#define MAX30102_REG_MODE_CONFIG_MODE_MASK	0x03
#define MAX30102_REG_MODE_CONFIG_PWR		BIT(7)

#define MAX30102_REG_SPO2_CONFIG		0x0a
#define MAX30102_REG_SPO2_CONFIG_PULSE_411_US	0x03
#define MAX30102_REG_SPO2_CONFIG_SR_400HZ	0x03
#define MAX30102_REG_SPO2_CONFIG_SR_MASK	0x07
#define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT	2
#define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS	BIT(0)
#define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT	5

#define MAX30102_REG_RED_LED_CONFIG		0x0c
#define MAX30102_REG_IR_LED_CONFIG		0x0d

#define MAX30102_REG_TEMP_CONFIG		0x21
#define MAX30102_REG_TEMP_CONFIG_TEMP_EN	BIT(0)

#define MAX30102_REG_TEMP_INTEGER		0x1f
#define MAX30102_REG_TEMP_FRACTION		0x20

struct max30102_data {
	struct i2c_client *client;
	struct iio_dev *indio_dev;
	struct mutex lock;
	struct regmap *regmap;

	u8 buffer[8];
	__be32 processed_buffer[2]; /* 2 x 18-bit (padded to 32-bits) */
};

static const struct regmap_config max30102_regmap_config = {
	.name = MAX30102_REGMAP_NAME,

	.reg_bits = 8,
	.val_bits = 8,
};

static const unsigned long max30102_scan_masks[] = {0x3, 0};

static const struct iio_chan_spec max30102_channels[] = {
	{
		.type = IIO_INTENSITY,
		.channel2 = IIO_MOD_LIGHT_RED,
		.modified = 1,

		.scan_index = 0,
		.scan_type = {
			.sign = 'u',
			.shift = 8,
			.realbits = 18,
			.storagebits = 32,
			.endianness = IIO_BE,
		},
	},
	{
		.type = IIO_INTENSITY,
		.channel2 = IIO_MOD_LIGHT_IR,
		.modified = 1,

		.scan_index = 1,
		.scan_type = {
			.sign = 'u',
			.shift = 8,
			.realbits = 18,
			.storagebits = 32,
			.endianness = IIO_BE,
		},
	},
	{
		.type = IIO_TEMP,
		.info_mask_separate =
			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
		.scan_index = -1,
	},
};

static int max30102_set_powermode(struct max30102_data *data, bool state)
{
	return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
				  MAX30102_REG_MODE_CONFIG_PWR,
				  state ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
}

static int max30102_buffer_postenable(struct iio_dev *indio_dev)
{
	struct max30102_data *data = iio_priv(indio_dev);

	return max30102_set_powermode(data, true);
}

static int max30102_buffer_predisable(struct iio_dev *indio_dev)
{
	struct max30102_data *data = iio_priv(indio_dev);

	return max30102_set_powermode(data, false);
}

static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
	.postenable = max30102_buffer_postenable,
	.predisable = max30102_buffer_predisable,
};

static inline int max30102_fifo_count(struct max30102_data *data)
{
	unsigned int val;
	int ret;

	ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
	if (ret)
		return ret;

	/* FIFO has one sample slot left */
	if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
		return 1;

	return 0;
}

static int max30102_read_measurement(struct max30102_data *data)
{
	int ret;
	u8 *buffer = (u8 *) &data->buffer;

	ret = i2c_smbus_read_i2c_block_data(data->client,
					    MAX30102_REG_FIFO_DATA,
					    MAX30102_REG_FIFO_DATA_ENTRY_LEN,
					    buffer);

	memcpy(&data->processed_buffer[0], &buffer[0], 3);
	memcpy(&data->processed_buffer[1], &buffer[3], 3);

	return (ret == MAX30102_REG_FIFO_DATA_ENTRY_LEN) ? 0 : -EINVAL;
}

static irqreturn_t max30102_interrupt_handler(int irq, void *private)
{
	struct iio_dev *indio_dev = private;
	struct max30102_data *data = iio_priv(indio_dev);
	int ret, cnt = 0;

	mutex_lock(&data->lock);

	while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
		ret = max30102_read_measurement(data);
		if (ret)
			break;

		iio_push_to_buffers(data->indio_dev, data->processed_buffer);
		cnt--;
	}

	mutex_unlock(&data->lock);

	return IRQ_HANDLED;
}

static int max30102_get_current_idx(unsigned int val, int *reg)
{
	/* each step is 0.200 mA */
	*reg = val / 200;

	return *reg > 0xff ? -EINVAL : 0;
}

static int max30102_led_init(struct max30102_data *data)
{
	struct device *dev = &data->client->dev;
	struct device_node *np = dev->of_node;
	unsigned int val;
	int reg, ret;

	ret = of_property_read_u32(np, "maxim,red-led-current-microamp", &val);
	if (ret) {
		dev_info(dev, "no red-led-current-microamp set\n");

		/* Default to 7 mA RED LED */
		val = 7000;
	}

	ret = max30102_get_current_idx(val, &reg);
	if (ret) {
		dev_err(dev, "invalid RED LED current setting %d\n", val);
		return ret;
	}

	ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
	if (ret)
		return ret;

	ret = of_property_read_u32(np, "maxim,ir-led-current-microamp", &val);
	if (ret) {
		dev_info(dev, "no ir-led-current-microamp set\n");

		/* Default to 7 mA IR LED */
		val = 7000;
	}

	ret = max30102_get_current_idx(val, &reg);
	if (ret) {
		dev_err(dev, "invalid IR LED current setting %d", val);
		return ret;
	}

	return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
}

static int max30102_chip_init(struct max30102_data *data)
{
	int ret;

	/* setup LED current settings */
	ret = max30102_led_init(data);
	if (ret)
		return ret;

	/* enable 18-bit HR + SPO2 readings at 400Hz */
	ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
				(MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
				 << MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
				(MAX30102_REG_SPO2_CONFIG_SR_400HZ
				 << MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
				 MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
	if (ret)
		return ret;

	/* enable SPO2 mode */
	ret = regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
				 MAX30102_REG_MODE_CONFIG_MODE_MASK,
				 MAX30102_REG_MODE_CONFIG_MODE_HR_EN |
				 MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN);
	if (ret)
		return ret;

	/* average 4 samples + generate FIFO interrupt */
	ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
				(MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
				 << MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
				 MAX30102_REG_FIFO_CONFIG_AFULL);
	if (ret)
		return ret;

	/* enable FIFO interrupt */
	return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
				 MAX30102_REG_INT_ENABLE_MASK,
				 MAX30102_REG_INT_ENABLE_FIFO_EN);
}

static int max30102_read_temp(struct max30102_data *data, int *val)
{
	int ret;
	unsigned int reg;

	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, &reg);
	if (ret < 0)
		return ret;
	*val = reg << 4;

	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, &reg);
	if (ret < 0)
		return ret;

	*val |= reg & 0xf;
	*val = sign_extend32(*val, 11);

	return 0;
}

static int max30102_get_temp(struct max30102_data *data, int *val)
{
	int ret;

	/* start acquisition */
	ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
				 MAX30102_REG_TEMP_CONFIG_TEMP_EN,
				 MAX30102_REG_TEMP_CONFIG_TEMP_EN);
	if (ret)
		return ret;

	msleep(35);

	return max30102_read_temp(data, val);
}

static int max30102_read_raw(struct iio_dev *indio_dev,
			     struct iio_chan_spec const *chan,
			     int *val, int *val2, long mask)
{
	struct max30102_data *data = iio_priv(indio_dev);
	int ret = -EINVAL;

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		/*
		 * Temperature reading can only be acquired while engine
		 * is running
		 */
		mutex_lock(&indio_dev->mlock);

		if (!iio_buffer_enabled(indio_dev))
			ret = -EBUSY;
		else {
			ret = max30102_get_temp(data, val);
			if (!ret)
				ret = IIO_VAL_INT;
		}

		mutex_unlock(&indio_dev->mlock);
		break;
	case IIO_CHAN_INFO_SCALE:
		*val = 1;  /* 0.0625 */
		*val2 = 16;
		ret = IIO_VAL_FRACTIONAL;
		break;
	}

	return ret;
}

static const struct iio_info max30102_info = {
	.driver_module = THIS_MODULE,
	.read_raw = max30102_read_raw,
};

static int max30102_probe(struct i2c_client *client,
			  const struct i2c_device_id *id)
{
	struct max30102_data *data;
	struct iio_buffer *buffer;
	struct iio_dev *indio_dev;
	int ret;

	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
	if (!indio_dev)
		return -ENOMEM;

	buffer = devm_iio_kfifo_allocate(&client->dev);
	if (!buffer)
		return -ENOMEM;

	iio_device_attach_buffer(indio_dev, buffer);

	indio_dev->name = MAX30102_DRV_NAME;
	indio_dev->channels = max30102_channels;
	indio_dev->info = &max30102_info;
	indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
	indio_dev->available_scan_masks = max30102_scan_masks;
	indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
	indio_dev->setup_ops = &max30102_buffer_setup_ops;
	indio_dev->dev.parent = &client->dev;

	data = iio_priv(indio_dev);
	data->indio_dev = indio_dev;
	data->client = client;

	mutex_init(&data->lock);
	i2c_set_clientdata(client, indio_dev);

	data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
	if (IS_ERR(data->regmap)) {
		dev_err(&client->dev, "regmap initialization failed.\n");
		return PTR_ERR(data->regmap);
	}
	max30102_set_powermode(data, false);

	ret = max30102_chip_init(data);
	if (ret)
		return ret;

	if (client->irq <= 0) {
		dev_err(&client->dev, "no valid irq defined\n");
		return -EINVAL;
	}

	ret = devm_request_threaded_irq(&client->dev, client->irq,
					NULL, max30102_interrupt_handler,
					IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
					"max30102_irq", indio_dev);
	if (ret) {
		dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
		return ret;
	}

	return iio_device_register(indio_dev);
}

static int max30102_remove(struct i2c_client *client)
{
	struct iio_dev *indio_dev = i2c_get_clientdata(client);
	struct max30102_data *data = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	max30102_set_powermode(data, false);

	return 0;
}

static const struct i2c_device_id max30102_id[] = {
	{ "max30102", 0 },
	{}
};
MODULE_DEVICE_TABLE(i2c, max30102_id);

static const struct of_device_id max30102_dt_ids[] = {
	{ .compatible = "maxim,max30102" },
	{ }
};
MODULE_DEVICE_TABLE(of, max30102_dt_ids);

static struct i2c_driver max30102_driver = {
	.driver = {
		.name	= MAX30102_DRV_NAME,
		.of_match_table	= of_match_ptr(max30102_dt_ids),
	},
	.probe		= max30102_probe,
	.remove		= max30102_remove,
	.id_table	= max30102_id,
};
module_i2c_driver(max30102_driver);

MODULE_AUTHOR("Matt Ranostay <matt@ranostay.consulting>");
MODULE_DESCRIPTION("MAX30102 heart rate and pulse oximeter sensor");
MODULE_LICENSE("GPL");
Commit	Line	Data
b3c590ce MR	1	/*
	2	* max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
	3	*
	4	* Copyright (C) 2017 Matt Ranostay <matt@ranostay.consulting>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* TODO: proximity power saving feature
	17	*/
	18
	19	#include <linux/module.h>
	20	#include <linux/init.h>
	21	#include <linux/interrupt.h>
	22	#include <linux/delay.h>
	23	#include <linux/err.h>
	24	#include <linux/irq.h>
	25	#include <linux/i2c.h>
	26	#include <linux/mutex.h>
	27	#include <linux/of.h>
	28	#include <linux/regmap.h>
	29	#include <linux/iio/iio.h>
	30	#include <linux/iio/buffer.h>
	31	#include <linux/iio/kfifo_buf.h>
	32
	33	#define MAX30102_REGMAP_NAME "max30102_regmap"
	34	#define MAX30102_DRV_NAME "max30102"
	35
	36	#define MAX30102_REG_INT_STATUS 0x00
	37	#define MAX30102_REG_INT_STATUS_PWR_RDY BIT(0)
	38	#define MAX30102_REG_INT_STATUS_PROX_INT BIT(4)
	39	#define MAX30102_REG_INT_STATUS_ALC_OVF BIT(5)
	40	#define MAX30102_REG_INT_STATUS_PPG_RDY BIT(6)
	41	#define MAX30102_REG_INT_STATUS_FIFO_RDY BIT(7)
	42
	43	#define MAX30102_REG_INT_ENABLE 0x02
	44	#define MAX30102_REG_INT_ENABLE_PROX_INT_EN BIT(4)
	45	#define MAX30102_REG_INT_ENABLE_ALC_OVF_EN BIT(5)
	46	#define MAX30102_REG_INT_ENABLE_PPG_EN BIT(6)
	47	#define MAX30102_REG_INT_ENABLE_FIFO_EN BIT(7)
	48	#define MAX30102_REG_INT_ENABLE_MASK 0xf0
	49	#define MAX30102_REG_INT_ENABLE_MASK_SHIFT 4
	50
	51	#define MAX30102_REG_FIFO_WR_PTR 0x04
	52	#define MAX30102_REG_FIFO_OVR_CTR 0x05
	53	#define MAX30102_REG_FIFO_RD_PTR 0x06
	54	#define MAX30102_REG_FIFO_DATA 0x07
	55	#define MAX30102_REG_FIFO_DATA_ENTRY_LEN 6
	56
	57	#define MAX30102_REG_FIFO_CONFIG 0x08
	58	#define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES BIT(1)
	59	#define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT 5
	60	#define MAX30102_REG_FIFO_CONFIG_AFULL BIT(0)
	61
	62	#define MAX30102_REG_MODE_CONFIG 0x09
	63	#define MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN BIT(0)
	64	#define MAX30102_REG_MODE_CONFIG_MODE_HR_EN BIT(1)
65	#define MAX30102_REG_MODE_CONFIG_MODE_MASK 0x03
66	#define MAX30102_REG_MODE_CONFIG_PWR BIT(7)
67
68	#define MAX30102_REG_SPO2_CONFIG 0x0a
69	#define MAX30102_REG_SPO2_CONFIG_PULSE_411_US 0x03
70	#define MAX30102_REG_SPO2_CONFIG_SR_400HZ 0x03
71	#define MAX30102_REG_SPO2_CONFIG_SR_MASK 0x07
72	#define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT 2
73	#define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS BIT(0)
74	#define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT 5
75
76	#define MAX30102_REG_RED_LED_CONFIG 0x0c
77	#define MAX30102_REG_IR_LED_CONFIG 0x0d
78
79	#define MAX30102_REG_TEMP_CONFIG 0x21
80	#define MAX30102_REG_TEMP_CONFIG_TEMP_EN BIT(0)
81
82	#define MAX30102_REG_TEMP_INTEGER 0x1f
83	#define MAX30102_REG_TEMP_FRACTION 0x20
84
85	struct max30102_data {
86	struct i2c_client *client;
87	struct iio_dev *indio_dev;
88	struct mutex lock;
89	struct regmap *regmap;
90
91	u8 buffer[8];
92	__be32 processed_buffer[2]; /* 2 x 18-bit (padded to 32-bits) */
93	};
94
95	static const struct regmap_config max30102_regmap_config = {
96	.name = MAX30102_REGMAP_NAME,
97
98	.reg_bits = 8,
99	.val_bits = 8,
100	};
101
102	static const unsigned long max30102_scan_masks[] = {0x3, 0};
103
104	static const struct iio_chan_spec max30102_channels[] = {
105	{
106	.type = IIO_INTENSITY,
107	.channel2 = IIO_MOD_LIGHT_RED,
108	.modified = 1,
109
110	.scan_index = 0,
111	.scan_type = {
112	.sign = 'u',
113	.shift = 8,
114	.realbits = 18,
115	.storagebits = 32,
116	.endianness = IIO_BE,
117	},
118	},
119	{
120	.type = IIO_INTENSITY,
121	.channel2 = IIO_MOD_LIGHT_IR,
122	.modified = 1,
123
124	.scan_index = 1,
125	.scan_type = {
126	.sign = 'u',
127	.shift = 8,
128	.realbits = 18,
129	.storagebits = 32,
130	.endianness = IIO_BE,
131	},
132	},
133	{
134	.type = IIO_TEMP,
135	.info_mask_separate =
136	BIT(IIO_CHAN_INFO_RAW) \| BIT(IIO_CHAN_INFO_SCALE),
137	.scan_index = -1,
138	},
139	};
140
141	static int max30102_set_powermode(struct max30102_data *data, bool state)
142	{
143	return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
144	MAX30102_REG_MODE_CONFIG_PWR,
145	state ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
146	}
147
148	static int max30102_buffer_postenable(struct iio_dev *indio_dev)
149	{
150	struct max30102_data *data = iio_priv(indio_dev);
151
152	return max30102_set_powermode(data, true);
153	}
154
155	static int max30102_buffer_predisable(struct iio_dev *indio_dev)
156	{
157	struct max30102_data *data = iio_priv(indio_dev);
158
159	return max30102_set_powermode(data, false);
160	}
161
162	static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
163	.postenable = max30102_buffer_postenable,
164	.predisable = max30102_buffer_predisable,
165	};
166
167	static inline int max30102_fifo_count(struct max30102_data *data)
168	{
169	unsigned int val;
170	int ret;
171
172	ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
173	if (ret)
174	return ret;
175
176	/* FIFO has one sample slot left */
177	if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
178	return 1;
179
180	return 0;
181	}
182
183	static int max30102_read_measurement(struct max30102_data *data)
184	{
185	int ret;
186	u8 buffer = (u8 ) &data->buffer;
187
188	ret = i2c_smbus_read_i2c_block_data(data->client,
189	MAX30102_REG_FIFO_DATA,
190	MAX30102_REG_FIFO_DATA_ENTRY_LEN,
191	buffer);
192
193	memcpy(&data->processed_buffer[0], &buffer[0], 3);
194	memcpy(&data->processed_buffer[1], &buffer[3], 3);
195
196	return (ret == MAX30102_REG_FIFO_DATA_ENTRY_LEN) ? 0 : -EINVAL;
197	}
198
199	static irqreturn_t max30102_interrupt_handler(int irq, void *private)
200	{
201	struct iio_dev *indio_dev = private;
202	struct max30102_data *data = iio_priv(indio_dev);
203	int ret, cnt = 0;
204
205	mutex_lock(&data->lock);
206
207	while (cnt \|\| (cnt = max30102_fifo_count(data)) > 0) {
208	ret = max30102_read_measurement(data);
209	if (ret)
210	break;
211
212	iio_push_to_buffers(data->indio_dev, data->processed_buffer);
213	cnt--;
214	}
215
216	mutex_unlock(&data->lock);
217
218	return IRQ_HANDLED;
219	}
220
221	static int max30102_get_current_idx(unsigned int val, int *reg)
222	{
223	/* each step is 0.200 mA */
224	*reg = val / 200;
225
226	return *reg > 0xff ? -EINVAL : 0;
227	}
228
229	static int max30102_led_init(struct max30102_data *data)
230	{
231	struct device *dev = &data->client->dev;
232	struct device_node *np = dev->of_node;
233	unsigned int val;
234	int reg, ret;
235
236	ret = of_property_read_u32(np, "maxim,red-led-current-microamp", &val);
237	if (ret) {
238	dev_info(dev, "no red-led-current-microamp set\n");
239
240	/* Default to 7 mA RED LED */
241	val = 7000;
242	}
243
244	ret = max30102_get_current_idx(val, &reg);
245	if (ret) {
246	dev_err(dev, "invalid RED LED current setting %d\n", val);
247	return ret;
248	}
249
250	ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
251	if (ret)
252	return ret;
253
254	ret = of_property_read_u32(np, "maxim,ir-led-current-microamp", &val);
255	if (ret) {
256	dev_info(dev, "no ir-led-current-microamp set\n");
257
258	/* Default to 7 mA IR LED */
259	val = 7000;
260	}
261
262	ret = max30102_get_current_idx(val, &reg);
263	if (ret) {
264	dev_err(dev, "invalid IR LED current setting %d", val);
265	return ret;
266	}
267
268	return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
269	}
270
271	static int max30102_chip_init(struct max30102_data *data)
272	{
273	int ret;
274
275	/* setup LED current settings */
276	ret = max30102_led_init(data);
277	if (ret)
278	return ret;
279
280	/* enable 18-bit HR + SPO2 readings at 400Hz */
281	ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
282	(MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
283	<< MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) \|
284	(MAX30102_REG_SPO2_CONFIG_SR_400HZ
285	<< MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) \|
286	MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
287	if (ret)
288	return ret;
289
290	/* enable SPO2 mode */
291	ret = regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
292	MAX30102_REG_MODE_CONFIG_MODE_MASK,
293	MAX30102_REG_MODE_CONFIG_MODE_HR_EN \|
294	MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN);
295	if (ret)
296	return ret;
297
298	/* average 4 samples + generate FIFO interrupt */
299	ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
300	(MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
301	<< MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) \|
302	MAX30102_REG_FIFO_CONFIG_AFULL);
303	if (ret)
304	return ret;
305
306	/* enable FIFO interrupt */
307	return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
308	MAX30102_REG_INT_ENABLE_MASK,
309	MAX30102_REG_INT_ENABLE_FIFO_EN);
310	}
311
312	static int max30102_read_temp(struct max30102_data data, int val)
313	{
314	int ret;
315	unsigned int reg;
316
317	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, &reg);
318	if (ret < 0)
319	return ret;
320	*val = reg << 4;
321
322	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, &reg);
323	if (ret < 0)
324	return ret;
325
326	*val \|= reg & 0xf;
327	val = sign_extend32(val, 11);
328
329	return 0;
330	}
331
332	static int max30102_get_temp(struct max30102_data data, int val)
333	{
334	int ret;
335
336	/* start acquisition */
337	ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
338	MAX30102_REG_TEMP_CONFIG_TEMP_EN,
339	MAX30102_REG_TEMP_CONFIG_TEMP_EN);
340	if (ret)
341	return ret;
342
343	msleep(35);
344
345	return max30102_read_temp(data, val);
346	}
347
348	static int max30102_read_raw(struct iio_dev *indio_dev,
349	struct iio_chan_spec const *chan,
350	int val, int val2, long mask)
351	{
352	struct max30102_data *data = iio_priv(indio_dev);
353	int ret = -EINVAL;
354
355	switch (mask) {
356	case IIO_CHAN_INFO_RAW:
357	/*
358	* Temperature reading can only be acquired while engine
359	* is running
360	*/
361	mutex_lock(&indio_dev->mlock);
362
363	if (!iio_buffer_enabled(indio_dev))
364	ret = -EBUSY;
365	else {
366	ret = max30102_get_temp(data, val);
367	if (!ret)
368	ret = IIO_VAL_INT;
369	}
370
371	mutex_unlock(&indio_dev->mlock);
372	break;
373	case IIO_CHAN_INFO_SCALE:
374	val = 1; / 0.0625 */
375	*val2 = 16;
376	ret = IIO_VAL_FRACTIONAL;
377	break;
378	}
379
380	return ret;
381	}
382
383	static const struct iio_info max30102_info = {
384	.driver_module = THIS_MODULE,
385	.read_raw = max30102_read_raw,
386	};
387
388	static int max30102_probe(struct i2c_client *client,
389	const struct i2c_device_id *id)
390	{
391	struct max30102_data *data;
392	struct iio_buffer *buffer;
393	struct iio_dev *indio_dev;
394	int ret;
395
396	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
397	if (!indio_dev)
398	return -ENOMEM;
399
400	buffer = devm_iio_kfifo_allocate(&client->dev);
401	if (!buffer)
402	return -ENOMEM;
403
404	iio_device_attach_buffer(indio_dev, buffer);
405
406	indio_dev->name = MAX30102_DRV_NAME;
407	indio_dev->channels = max30102_channels;
408	indio_dev->info = &max30102_info;
409	indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
410	indio_dev->available_scan_masks = max30102_scan_masks;
411	indio_dev->modes = (INDIO_BUFFER_SOFTWARE \| INDIO_DIRECT_MODE);
412	indio_dev->setup_ops = &max30102_buffer_setup_ops;
fa722499	413	indio_dev->dev.parent = &client->dev;
b3c590ce MR	414
	415	data = iio_priv(indio_dev);
	416	data->indio_dev = indio_dev;
	417	data->client = client;
	418
	419	mutex_init(&data->lock);
	420	i2c_set_clientdata(client, indio_dev);
	421
	422	data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
	423	if (IS_ERR(data->regmap)) {
	424	dev_err(&client->dev, "regmap initialization failed.\n");
	425	return PTR_ERR(data->regmap);
	426	}
	427	max30102_set_powermode(data, false);
	428
	429	ret = max30102_chip_init(data);
	430	if (ret)
	431	return ret;
	432
	433	if (client->irq <= 0) {
	434	dev_err(&client->dev, "no valid irq defined\n");
	435	return -EINVAL;
	436	}
	437
	438	ret = devm_request_threaded_irq(&client->dev, client->irq,
	439	NULL, max30102_interrupt_handler,
	440	IRQF_TRIGGER_FALLING \| IRQF_ONESHOT,
	441	"max30102_irq", indio_dev);
	442	if (ret) {
	443	dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
	444	return ret;
	445	}
	446
	447	return iio_device_register(indio_dev);
	448	}
	449
	450	static int max30102_remove(struct i2c_client *client)
	451	{
	452	struct iio_dev *indio_dev = i2c_get_clientdata(client);
	453	struct max30102_data *data = iio_priv(indio_dev);
	454
	455	iio_device_unregister(indio_dev);
	456	max30102_set_powermode(data, false);
	457
	458	return 0;
	459	}
	460
	461	static const struct i2c_device_id max30102_id[] = {
	462	{ "max30102", 0 },
	463	{}
	464	};
	465	MODULE_DEVICE_TABLE(i2c, max30102_id);
	466
	467	static const struct of_device_id max30102_dt_ids[] = {
	468	{ .compatible = "maxim,max30102" },
	469	{ }
	470	};
	471	MODULE_DEVICE_TABLE(of, max30102_dt_ids);
	472
	473	static struct i2c_driver max30102_driver = {
	474	.driver = {
	475	.name = MAX30102_DRV_NAME,
	476	.of_match_table = of_match_ptr(max30102_dt_ids),
	477	},
478	.probe = max30102_probe,
479	.remove = max30102_remove,
480	.id_table = max30102_id,
481	};
482	module_i2c_driver(max30102_driver);
483
484	MODULE_AUTHOR("Matt Ranostay <matt@ranostay.consulting>");
485	MODULE_DESCRIPTION("MAX30102 heart rate and pulse oximeter sensor");
486	MODULE_LICENSE("GPL");