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1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef BME680_H_ | |
3 | #define BME680_H_ | |
4 | ||
73f3bc6d | 5 | #define BME680_REG_CHIP_ID 0xD0 |
70f1cbdd | 6 | #define BME680_CHIP_ID_VAL 0x61 |
73f3bc6d | 7 | #define BME680_REG_SOFT_RESET 0xE0 |
70f1cbdd | 8 | #define BME680_CMD_SOFTRESET 0xB6 |
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9 | #define BME680_REG_STATUS 0x73 |
10 | #define BME680_SPI_MEM_PAGE_BIT BIT(4) | |
11 | #define BME680_SPI_MEM_PAGE_1_VAL 1 | |
12 | ||
13 | #define BME680_REG_TEMP_MSB 0x22 | |
14 | #define BME680_REG_PRESS_MSB 0x1F | |
15 | #define BM6880_REG_HUMIDITY_MSB 0x25 | |
16 | #define BME680_REG_GAS_MSB 0x2A | |
17 | #define BME680_REG_GAS_R_LSB 0x2B | |
18 | #define BME680_GAS_STAB_BIT BIT(4) | |
8d3032c3 | 19 | #define BME680_GAS_RANGE_MASK GENMASK(3, 0) |
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20 | |
21 | #define BME680_REG_CTRL_HUMIDITY 0x72 | |
22 | #define BME680_OSRS_HUMIDITY_MASK GENMASK(2, 0) | |
23 | ||
24 | #define BME680_REG_CTRL_MEAS 0x74 | |
25 | #define BME680_OSRS_TEMP_MASK GENMASK(7, 5) | |
26 | #define BME680_OSRS_PRESS_MASK GENMASK(4, 2) | |
27 | #define BME680_MODE_MASK GENMASK(1, 0) | |
70f1cbdd DF |
28 | #define BME680_MODE_FORCED 1 |
29 | #define BME680_MODE_SLEEP 0 | |
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30 | |
31 | #define BME680_REG_CONFIG 0x75 | |
32 | #define BME680_FILTER_MASK GENMASK(4, 2) | |
33 | #define BME680_FILTER_COEFF_VAL BIT(1) | |
34 | ||
35 | /* TEMP/PRESS/HUMID reading skipped */ | |
36 | #define BME680_MEAS_SKIPPED 0x8000 | |
37 | ||
38 | #define BME680_MAX_OVERFLOW_VAL 0x40000000 | |
39 | #define BME680_HUM_REG_SHIFT_VAL 4 | |
8d3032c3 | 40 | #define BME680_BIT_H1_DATA_MASK GENMASK(3, 0) |
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41 | |
42 | #define BME680_REG_RES_HEAT_RANGE 0x02 | |
8d3032c3 | 43 | #define BME680_RHRANGE_MASK GENMASK(5, 4) |
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44 | #define BME680_REG_RES_HEAT_VAL 0x00 |
45 | #define BME680_REG_RANGE_SW_ERR 0x04 | |
8d3032c3 | 46 | #define BME680_RSERROR_MASK GENMASK(7, 4) |
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47 | #define BME680_REG_RES_HEAT_0 0x5A |
48 | #define BME680_REG_GAS_WAIT_0 0x64 | |
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49 | #define BME680_ADC_GAS_RES_SHIFT 6 |
50 | #define BME680_AMB_TEMP 25 | |
51 | ||
52 | #define BME680_REG_CTRL_GAS_1 0x71 | |
53 | #define BME680_RUN_GAS_MASK BIT(4) | |
54 | #define BME680_NB_CONV_MASK GENMASK(3, 0) | |
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55 | |
56 | #define BME680_REG_MEAS_STAT_0 0x1D | |
57 | #define BME680_GAS_MEAS_BIT BIT(6) | |
58 | ||
59 | /* Calibration Parameters */ | |
60 | #define BME680_T2_LSB_REG 0x8A | |
61 | #define BME680_T3_REG 0x8C | |
62 | #define BME680_P1_LSB_REG 0x8E | |
63 | #define BME680_P2_LSB_REG 0x90 | |
64 | #define BME680_P3_REG 0x92 | |
65 | #define BME680_P4_LSB_REG 0x94 | |
66 | #define BME680_P5_LSB_REG 0x96 | |
67 | #define BME680_P7_REG 0x98 | |
68 | #define BME680_P6_REG 0x99 | |
69 | #define BME680_P8_LSB_REG 0x9C | |
70 | #define BME680_P9_LSB_REG 0x9E | |
71 | #define BME680_P10_REG 0xA0 | |
72 | #define BME680_H2_LSB_REG 0xE2 | |
73 | #define BME680_H2_MSB_REG 0xE1 | |
74 | #define BME680_H1_MSB_REG 0xE3 | |
75 | #define BME680_H1_LSB_REG 0xE2 | |
76 | #define BME680_H3_REG 0xE4 | |
77 | #define BME680_H4_REG 0xE5 | |
78 | #define BME680_H5_REG 0xE6 | |
79 | #define BME680_H6_REG 0xE7 | |
80 | #define BME680_H7_REG 0xE8 | |
81 | #define BME680_T1_LSB_REG 0xE9 | |
82 | #define BME680_GH2_LSB_REG 0xEB | |
83 | #define BME680_GH1_REG 0xED | |
84 | #define BME680_GH3_REG 0xEE | |
85 | ||
86 | extern const struct regmap_config bme680_regmap_config; | |
87 | ||
88 | int bme680_core_probe(struct device *dev, struct regmap *regmap, | |
89 | const char *name); | |
90 | ||
91 | #endif /* BME680_H_ */ |