[linux-block.git] / drivers / iio / adc / mcp3422.c

/*
 * mcp3422.c - driver for the Microchip mcp3422/3/4 chip family
 *
 * Copyright (C) 2013, Angelo Compagnucci
 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
 *
 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
 *
 * This driver exports the value of analog input voltage to sysfs, the
 * voltage unit is nV.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/sysfs.h>
#include <linux/of.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>

/* Masks */
#define MCP3422_CHANNEL_MASK	0x60
#define MCP3422_PGA_MASK	0x03
#define MCP3422_SRATE_MASK	0x0C
#define MCP3422_SRATE_240	0x0
#define MCP3422_SRATE_60	0x1
#define MCP3422_SRATE_15	0x2
#define MCP3422_SRATE_3	0x3
#define MCP3422_PGA_1	0
#define MCP3422_PGA_2	1
#define MCP3422_PGA_4	2
#define MCP3422_PGA_8	3
#define MCP3422_CONT_SAMPLING	0x10

#define MCP3422_CHANNEL(config)	(((config) & MCP3422_CHANNEL_MASK) >> 5)
#define MCP3422_PGA(config)	((config) & MCP3422_PGA_MASK)
#define MCP3422_SAMPLE_RATE(config)	(((config) & MCP3422_SRATE_MASK) >> 2)

#define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
#define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
#define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)

#define MCP3422_CHAN(_index) \
	{ \
		.type = IIO_VOLTAGE, \
		.indexed = 1, \
		.channel = _index, \
		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
				| BIT(IIO_CHAN_INFO_SCALE), \
		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
	}

/* LSB is in nV to eliminate floating point */
static const u32 rates_to_lsb[] = {1000000, 250000, 62500, 15625};

/*
 *  scales calculated as:
 *  rates_to_lsb[sample_rate] / (1 << pga);
 *  pga is 1 for 0, 2
 */

static const int mcp3422_scales[4][4] = {
	{ 1000000, 250000, 62500, 15625 },
	{ 500000 , 125000, 31250, 7812 },
	{ 250000 , 62500 , 15625, 3906 },
	{ 125000 , 31250 , 7812 , 1953 } };

/* Constant msleep times for data acquisitions */
static const int mcp3422_read_times[4] = {
	[MCP3422_SRATE_240] = 1000 / 240,
	[MCP3422_SRATE_60] = 1000 / 60,
	[MCP3422_SRATE_15] = 1000 / 15,
	[MCP3422_SRATE_3] = 1000 / 3 };

/* sample rates to integer conversion table */
static const int mcp3422_sample_rates[4] = {
	[MCP3422_SRATE_240] = 240,
	[MCP3422_SRATE_60] = 60,
	[MCP3422_SRATE_15] = 15,
	[MCP3422_SRATE_3] = 3 };

/* sample rates to sign extension table */
static const int mcp3422_sign_extend[4] = {
	[MCP3422_SRATE_240] = 12,
	[MCP3422_SRATE_60] = 14,
	[MCP3422_SRATE_15] = 16,
	[MCP3422_SRATE_3] = 18 };

/* Client data (each client gets its own) */
struct mcp3422 {
	struct i2c_client *i2c;
	u8 config;
	u8 pga[4];
	struct mutex lock;
};

static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
{
	int ret;

	mutex_lock(&adc->lock);

	ret = i2c_master_send(adc->i2c, &newconfig, 1);
	if (ret > 0) {
		adc->config = newconfig;
		ret = 0;
	}

	mutex_unlock(&adc->lock);

	return ret;
}

static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
{
	int ret = 0;
	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
	u8 buf[4] = {0, 0, 0, 0};
	u32 temp;

	if (sample_rate == MCP3422_SRATE_3) {
		ret = i2c_master_recv(adc->i2c, buf, 4);
		temp = buf[0] << 16 | buf[1] << 8 | buf[2];
		*config = buf[3];
	} else {
		ret = i2c_master_recv(adc->i2c, buf, 3);
		temp = buf[0] << 8 | buf[1];
		*config = buf[2];
	}

	*value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);

	return ret;
}

static int mcp3422_read_channel(struct mcp3422 *adc,
				struct iio_chan_spec const *channel, int *value)
{
	int ret;
	u8 config;
	u8 req_channel = channel->channel;

	if (req_channel != MCP3422_CHANNEL(adc->config)) {
		config = adc->config;
		config &= ~MCP3422_CHANNEL_MASK;
		config |= MCP3422_CHANNEL_VALUE(req_channel);
		config &= ~MCP3422_PGA_MASK;
		config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
		ret = mcp3422_update_config(adc, config);
		if (ret < 0)
			return ret;
		msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
	}

	return mcp3422_read(adc, value, &config);
}

static int mcp3422_read_raw(struct iio_dev *iio,
			struct iio_chan_spec const *channel, int *val1,
			int *val2, long mask)
{
	struct mcp3422 *adc = iio_priv(iio);
	int err;

	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
	u8 pga		 = MCP3422_PGA(adc->config);

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		err = mcp3422_read_channel(adc, channel, val1);
		if (err < 0)
			return -EINVAL;
		return IIO_VAL_INT;

	case IIO_CHAN_INFO_SCALE:

		*val1 = 0;
		*val2 = mcp3422_scales[sample_rate][pga];
		return IIO_VAL_INT_PLUS_NANO;

	case IIO_CHAN_INFO_SAMP_FREQ:
		*val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
		return IIO_VAL_INT;

	default:
		break;
	}

	return -EINVAL;
}

static int mcp3422_write_raw(struct iio_dev *iio,
			struct iio_chan_spec const *channel, int val1,
			int val2, long mask)
{
	struct mcp3422 *adc = iio_priv(iio);
	u8 temp;
	u8 config = adc->config;
	u8 req_channel = channel->channel;
	u8 sample_rate = MCP3422_SAMPLE_RATE(config);
	u8 i;

	switch (mask) {
	case IIO_CHAN_INFO_SCALE:
		if (val1 != 0)
			return -EINVAL;

		for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
			if (val2 == mcp3422_scales[sample_rate][i]) {
				adc->pga[req_channel] = i;

				config &= ~MCP3422_CHANNEL_MASK;
				config |= MCP3422_CHANNEL_VALUE(req_channel);
				config &= ~MCP3422_PGA_MASK;
				config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);

				return mcp3422_update_config(adc, config);
			}
		}
		return -EINVAL;

	case IIO_CHAN_INFO_SAMP_FREQ:
		switch (val1) {
		case 240:
			temp = MCP3422_SRATE_240;
			break;
		case 60:
			temp = MCP3422_SRATE_60;
			break;
		case 15:
			temp = MCP3422_SRATE_15;
			break;
		case 3:
			temp = MCP3422_SRATE_3;
			break;
		default:
			return -EINVAL;
		}

		config &= ~MCP3422_CHANNEL_MASK;
		config |= MCP3422_CHANNEL_VALUE(req_channel);
		config &= ~MCP3422_SRATE_MASK;
		config |= MCP3422_SAMPLE_RATE_VALUE(temp);

		return mcp3422_update_config(adc, config);

	default:
		break;
	}

	return -EINVAL;
}

static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
		struct iio_chan_spec const *chan, long mask)
{
	switch (mask) {
	case IIO_CHAN_INFO_SCALE:
		return IIO_VAL_INT_PLUS_NANO;
	case IIO_CHAN_INFO_SAMP_FREQ:
		return IIO_VAL_INT_PLUS_MICRO;
	default:
		return -EINVAL;
	}
}

static ssize_t mcp3422_show_scales(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);

	return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
		mcp3422_scales[sample_rate][0],
		mcp3422_scales[sample_rate][1],
		mcp3422_scales[sample_rate][2],
		mcp3422_scales[sample_rate][3]);
}

static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("240 60 15 3");
static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
		mcp3422_show_scales, NULL, 0);

static struct attribute *mcp3422_attributes[] = {
	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
	&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
	NULL,
};

static const struct attribute_group mcp3422_attribute_group = {
	.attrs = mcp3422_attributes,
};

static const struct iio_chan_spec mcp3422_channels[] = {
	MCP3422_CHAN(0),
	MCP3422_CHAN(1),
};

static const struct iio_chan_spec mcp3424_channels[] = {
	MCP3422_CHAN(0),
	MCP3422_CHAN(1),
	MCP3422_CHAN(2),
	MCP3422_CHAN(3),
};

static const struct iio_info mcp3422_info = {
	.read_raw = mcp3422_read_raw,
	.write_raw = mcp3422_write_raw,
	.write_raw_get_fmt = mcp3422_write_raw_get_fmt,
	.attrs = &mcp3422_attribute_group,
	.driver_module = THIS_MODULE,
};

static int mcp3422_probe(struct i2c_client *client,
			 const struct i2c_device_id *id)
{
	struct iio_dev *indio_dev;
	struct mcp3422 *adc;
	int err;
	u8 config;

	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
		return -ENODEV;

	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
	if (!indio_dev)
		return -ENOMEM;

	adc = iio_priv(indio_dev);
	adc->i2c = client;

	mutex_init(&adc->lock);

	indio_dev->dev.parent = &client->dev;
	indio_dev->name = dev_name(&client->dev);
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->info = &mcp3422_info;

	switch ((unsigned int)(id->driver_data)) {
	case 2:
	case 3:
		indio_dev->channels = mcp3422_channels;
		indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
		break;
	case 4:
		indio_dev->channels = mcp3424_channels;
		indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
		break;
	}

	/* meaningful default configuration */
	config = (MCP3422_CONT_SAMPLING
		| MCP3422_CHANNEL_VALUE(1)
		| MCP3422_PGA_VALUE(MCP3422_PGA_1)
		| MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
	mcp3422_update_config(adc, config);

	err = iio_device_register(indio_dev);
	if (err < 0)
		return err;

	i2c_set_clientdata(client, indio_dev);

	return 0;
}

static int mcp3422_remove(struct i2c_client *client)
{
	iio_device_unregister(i2c_get_clientdata(client));
	return 0;
}

static const struct i2c_device_id mcp3422_id[] = {
	{ "mcp3422", 2 },
	{ "mcp3423", 3 },
	{ "mcp3424", 4 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, mcp3422_id);

#ifdef CONFIG_OF
static const struct of_device_id mcp3422_of_match[] = {
	{ .compatible = "mcp3422" },
	{ }
};
MODULE_DEVICE_TABLE(of, mcp3422_of_match);
#endif

static struct i2c_driver mcp3422_driver = {
	.driver = {
		.name = "mcp3422",
		.owner = THIS_MODULE,
		.of_match_table = of_match_ptr(mcp3422_of_match),
	},
	.probe = mcp3422_probe,
	.remove = mcp3422_remove,
	.id_table = mcp3422_id,
};
module_i2c_driver(mcp3422_driver);

MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
MODULE_DESCRIPTION("Microchip mcp3422/3/4 driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
07914c84 AC	1	/*
	2	* mcp3422.c - driver for the Microchip mcp3422/3/4 chip family
	3	*
	4	* Copyright (C) 2013, Angelo Compagnucci
	5	* Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
	6	*
	7	* Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
	8	*
	9	* This driver exports the value of analog input voltage to sysfs, the
	10	* voltage unit is nV.
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; either version 2 of the License, or
	15	* (at your option) any later version.
	16	*/
	17
	18	#include <linux/err.h>
	19	#include <linux/i2c.h>
	20	#include <linux/module.h>
	21	#include <linux/delay.h>
	22	#include <linux/sysfs.h>
de36d817	23	#include <linux/of.h>
07914c84 AC	24
	25	#include <linux/iio/iio.h>
	26	#include <linux/iio/sysfs.h>
	27
	28	/* Masks */
	29	#define MCP3422_CHANNEL_MASK 0x60
	30	#define MCP3422_PGA_MASK 0x03
	31	#define MCP3422_SRATE_MASK 0x0C
	32	#define MCP3422_SRATE_240 0x0
	33	#define MCP3422_SRATE_60 0x1
	34	#define MCP3422_SRATE_15 0x2
	35	#define MCP3422_SRATE_3 0x3
	36	#define MCP3422_PGA_1 0
	37	#define MCP3422_PGA_2 1
	38	#define MCP3422_PGA_4 2
	39	#define MCP3422_PGA_8 3
	40	#define MCP3422_CONT_SAMPLING 0x10
	41
	42	#define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
	43	#define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
	44	#define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
	45
	46	#define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
	47	#define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
	48	#define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
	49
	50	#define MCP3422_CHAN(_index) \
	51	{ \
	52	.type = IIO_VOLTAGE, \
	53	.indexed = 1, \
	54	.channel = _index, \
	55	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
	56	\| BIT(IIO_CHAN_INFO_SCALE), \
	57	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
	58	}
	59
	60	/* LSB is in nV to eliminate floating point */
	61	static const u32 rates_to_lsb[] = {1000000, 250000, 62500, 15625};
	62
	63	/*
	64	* scales calculated as:
	65	* rates_to_lsb[sample_rate] / (1 << pga);
	66	* pga is 1 for 0, 2
	67	*/
	68
	69	static const int mcp3422_scales[4][4] = {
	70	{ 1000000, 250000, 62500, 15625 },
	71	{ 500000 , 125000, 31250, 7812 },
	72	{ 250000 , 62500 , 15625, 3906 },
	73	{ 125000 , 31250 , 7812 , 1953 } };
	74
	75	/* Constant msleep times for data acquisitions */
	76	static const int mcp3422_read_times[4] = {
	77	[MCP3422_SRATE_240] = 1000 / 240,
	78	[MCP3422_SRATE_60] = 1000 / 60,
	79	[MCP3422_SRATE_15] = 1000 / 15,
	80	[MCP3422_SRATE_3] = 1000 / 3 };
	81
	82	/* sample rates to integer conversion table */
	83	static const int mcp3422_sample_rates[4] = {
	84	[MCP3422_SRATE_240] = 240,
	85	[MCP3422_SRATE_60] = 60,
	86	[MCP3422_SRATE_15] = 15,
	87	[MCP3422_SRATE_3] = 3 };
88
89	/* sample rates to sign extension table */
90	static const int mcp3422_sign_extend[4] = {
91	[MCP3422_SRATE_240] = 12,
92	[MCP3422_SRATE_60] = 14,
93	[MCP3422_SRATE_15] = 16,
94	[MCP3422_SRATE_3] = 18 };
95
96	/* Client data (each client gets its own) */
97	struct mcp3422 {
98	struct i2c_client *i2c;
99	u8 config;
100	u8 pga[4];
101	struct mutex lock;
102	};
103
104	static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
105	{
106	int ret;
107
108	mutex_lock(&adc->lock);
109
110	ret = i2c_master_send(adc->i2c, &newconfig, 1);
111	if (ret > 0) {
112	adc->config = newconfig;
113	ret = 0;
114	}
115
116	mutex_unlock(&adc->lock);
117
118	return ret;
119	}
120
121	static int mcp3422_read(struct mcp3422 adc, int value, u8 *config)
122	{
123	int ret = 0;
124	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
125	u8 buf[4] = {0, 0, 0, 0};
126	u32 temp;
127
128	if (sample_rate == MCP3422_SRATE_3) {
129	ret = i2c_master_recv(adc->i2c, buf, 4);
130	temp = buf[0] << 16 \| buf[1] << 8 \| buf[2];
131	*config = buf[3];
132	} else {
133	ret = i2c_master_recv(adc->i2c, buf, 3);
134	temp = buf[0] << 8 \| buf[1];
135	*config = buf[2];
136	}
137
138	*value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
139
140	return ret;
141	}
142
143	static int mcp3422_read_channel(struct mcp3422 *adc,
144	struct iio_chan_spec const channel, int value)
145	{
146	int ret;
147	u8 config;
148	u8 req_channel = channel->channel;
149
150	if (req_channel != MCP3422_CHANNEL(adc->config)) {
151	config = adc->config;
152	config &= ~MCP3422_CHANNEL_MASK;
153	config \|= MCP3422_CHANNEL_VALUE(req_channel);
154	config &= ~MCP3422_PGA_MASK;
155	config \|= MCP3422_PGA_VALUE(adc->pga[req_channel]);
156	ret = mcp3422_update_config(adc, config);
157	if (ret < 0)
158	return ret;
159	msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
160	}
161
162	return mcp3422_read(adc, value, &config);
163	}
164
165	static int mcp3422_read_raw(struct iio_dev *iio,
166	struct iio_chan_spec const channel, int val1,
167	int *val2, long mask)
168	{
169	struct mcp3422 *adc = iio_priv(iio);
170	int err;
171
172	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
173	u8 pga = MCP3422_PGA(adc->config);
174
175	switch (mask) {
176	case IIO_CHAN_INFO_RAW:
177	err = mcp3422_read_channel(adc, channel, val1);
178	if (err < 0)
179	return -EINVAL;
180	return IIO_VAL_INT;
181
182	case IIO_CHAN_INFO_SCALE:
183
184	*val1 = 0;
185	*val2 = mcp3422_scales[sample_rate][pga];
186	return IIO_VAL_INT_PLUS_NANO;
187
188	case IIO_CHAN_INFO_SAMP_FREQ:
189	*val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
190	return IIO_VAL_INT;
191
192	default:
193	break;
194	}
195
196	return -EINVAL;
197	}
198
199	static int mcp3422_write_raw(struct iio_dev *iio,
200	struct iio_chan_spec const *channel, int val1,
201	int val2, long mask)
202	{
203	struct mcp3422 *adc = iio_priv(iio);
204	u8 temp;
205	u8 config = adc->config;
206	u8 req_channel = channel->channel;
207	u8 sample_rate = MCP3422_SAMPLE_RATE(config);
208	u8 i;
209
210	switch (mask) {
211	case IIO_CHAN_INFO_SCALE:
212	if (val1 != 0)
213	return -EINVAL;
214
215	for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
216	if (val2 == mcp3422_scales[sample_rate][i]) {
217	adc->pga[req_channel] = i;
218
219	config &= ~MCP3422_CHANNEL_MASK;
220	config \|= MCP3422_CHANNEL_VALUE(req_channel);
221	config &= ~MCP3422_PGA_MASK;
222	config \|= MCP3422_PGA_VALUE(adc->pga[req_channel]);
223
224	return mcp3422_update_config(adc, config);
225	}
226	}
227	return -EINVAL;
228
229	case IIO_CHAN_INFO_SAMP_FREQ:
230	switch (val1) {
231	case 240:
232	temp = MCP3422_SRATE_240;
233	break;
234	case 60:
235	temp = MCP3422_SRATE_60;
236	break;
237	case 15:
238	temp = MCP3422_SRATE_15;
239	break;
240	case 3:
241	temp = MCP3422_SRATE_3;
242	break;
243	default:
244	return -EINVAL;
245	}
246
247	config &= ~MCP3422_CHANNEL_MASK;
248	config \|= MCP3422_CHANNEL_VALUE(req_channel);
249	config &= ~MCP3422_SRATE_MASK;
250	config \|= MCP3422_SAMPLE_RATE_VALUE(temp);
251
252	return mcp3422_update_config(adc, config);
253
254	default:
255	break;
256	}
257
258	return -EINVAL;
259	}
260
261	static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
262	struct iio_chan_spec const *chan, long mask)
263	{
264	switch (mask) {
265	case IIO_CHAN_INFO_SCALE:
266	return IIO_VAL_INT_PLUS_NANO;
267	case IIO_CHAN_INFO_SAMP_FREQ:
268	return IIO_VAL_INT_PLUS_MICRO;
269	default:
270	return -EINVAL;
271	}
272	}
273
274	static ssize_t mcp3422_show_scales(struct device *dev,
275	struct device_attribute attr, char buf)
276	{
277	struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
278	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
279
280	return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
281	mcp3422_scales[sample_rate][0],
282	mcp3422_scales[sample_rate][1],
283	mcp3422_scales[sample_rate][2],
284	mcp3422_scales[sample_rate][3]);
285	}
286
287	static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("240 60 15 3");
288	static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
289	mcp3422_show_scales, NULL, 0);
290
291	static struct attribute *mcp3422_attributes[] = {
292	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
293	&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
294	NULL,
295	};
296
297	static const struct attribute_group mcp3422_attribute_group = {
298	.attrs = mcp3422_attributes,
299	};
300
301	static const struct iio_chan_spec mcp3422_channels[] = {
302	MCP3422_CHAN(0),
303	MCP3422_CHAN(1),
304	};
305
306	static const struct iio_chan_spec mcp3424_channels[] = {
307	MCP3422_CHAN(0),
308	MCP3422_CHAN(1),
309	MCP3422_CHAN(2),
310	MCP3422_CHAN(3),
311	};
312
313	static const struct iio_info mcp3422_info = {
314	.read_raw = mcp3422_read_raw,
315	.write_raw = mcp3422_write_raw,
316	.write_raw_get_fmt = mcp3422_write_raw_get_fmt,
317	.attrs = &mcp3422_attribute_group,
318	.driver_module = THIS_MODULE,
319	};
320
321	static int mcp3422_probe(struct i2c_client *client,
322	const struct i2c_device_id *id)
323	{
324	struct iio_dev *indio_dev;
325	struct mcp3422 *adc;
326	int err;
327	u8 config;
328
329	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
330	return -ENODEV;
331
332	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
333	if (!indio_dev)
334	return -ENOMEM;
335
336	adc = iio_priv(indio_dev);
337	adc->i2c = client;
338
339	mutex_init(&adc->lock);
340
341	indio_dev->dev.parent = &client->dev;
342	indio_dev->name = dev_name(&client->dev);
343	indio_dev->modes = INDIO_DIRECT_MODE;
344	indio_dev->info = &mcp3422_info;
345
346	switch ((unsigned int)(id->driver_data)) {
347	case 2:
348	case 3:
349	indio_dev->channels = mcp3422_channels;
350	indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
351	break;
352	case 4:
353	indio_dev->channels = mcp3424_channels;
354	indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
355	break;
356	}
357
358	/* meaningful default configuration */
359	config = (MCP3422_CONT_SAMPLING
360	\| MCP3422_CHANNEL_VALUE(1)
361	\| MCP3422_PGA_VALUE(MCP3422_PGA_1)
362	\| MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
363	mcp3422_update_config(adc, config);
364
365	err = iio_device_register(indio_dev);
366	if (err < 0)
367	return err;
368
369	i2c_set_clientdata(client, indio_dev);
370
371	return 0;
372	}
373
374	static int mcp3422_remove(struct i2c_client *client)
375	{
376	iio_device_unregister(i2c_get_clientdata(client));
377	return 0;
378	}
379
380	static const struct i2c_device_id mcp3422_id[] = {
381	{ "mcp3422", 2 },
382	{ "mcp3423", 3 },
383	{ "mcp3424", 4 },
384	{ }
385	};
386	MODULE_DEVICE_TABLE(i2c, mcp3422_id);
387
388	#ifdef CONFIG_OF
389	static const struct of_device_id mcp3422_of_match[] = {
390	{ .compatible = "mcp3422" },
391	{ }
392	};
393	MODULE_DEVICE_TABLE(of, mcp3422_of_match);
394	#endif
395
396	static struct i2c_driver mcp3422_driver = {
397	.driver = {
398	.name = "mcp3422",
399	.owner = THIS_MODULE,
400	.of_match_table = of_match_ptr(mcp3422_of_match),
401	},
402	.probe = mcp3422_probe,
403	.remove = mcp3422_remove,
404	.id_table = mcp3422_id,
405	};
406	module_i2c_driver(mcp3422_driver);
407
408	MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
409	MODULE_DESCRIPTION("Microchip mcp3422/3/4 driver");
410	MODULE_LICENSE("GPL v2");