[linux-2.6-block.git] / drivers / iio / adc / mcp320x.c

/*
 * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
 * Copyright (C) 2014 Rose Technology
 * 	   Allan Bendorff Jensen <abj@rosetechnology.dk>
 *	   Soren Andersen <san@rosetechnology.dk>
 *
 * Driver for following ADC chips from Microchip Technology's:
 * 10 Bit converter
 * MCP3001
 * MCP3002
 * MCP3004
 * MCP3008
 * ------------
 * 12 bit converter
 * MCP3201
 * MCP3202
 * MCP3204
 * MCP3208
 * ------------
 * 13 bit converter
 * MCP3301
 *
 * Datasheet can be found here:
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf  mcp3001
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf  mcp3002
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf  mcp3004/08
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf  mcp3201
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf  mcp3202
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf  mcp3204/08
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf  mcp3301
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/err.h>
#include <linux/delay.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/regulator/consumer.h>

enum {
	mcp3001,
	mcp3002,
	mcp3004,
	mcp3008,
	mcp3201,
	mcp3202,
	mcp3204,
	mcp3208,
	mcp3301,
};

struct mcp320x_chip_info {
	const struct iio_chan_spec *channels;
	unsigned int num_channels;
	unsigned int resolution;
};

struct mcp320x {
	struct spi_device *spi;
	struct spi_message msg;
	struct spi_transfer transfer[2];

	struct regulator *reg;
	struct mutex lock;
	const struct mcp320x_chip_info *chip_info;

	u8 tx_buf ____cacheline_aligned;
	u8 rx_buf[2];
};

static int mcp320x_channel_to_tx_data(int device_index,
			const unsigned int channel, bool differential)
{
	int start_bit = 1;

	switch (device_index) {
	case mcp3001:
	case mcp3201:
	case mcp3301:
		return 0;
	case mcp3002:
	case mcp3202:
		return ((start_bit << 4) | (!differential << 3) |
							(channel << 2));
	case mcp3004:
	case mcp3204:
	case mcp3008:
	case mcp3208:
		return ((start_bit << 6) | (!differential << 5) |
							(channel << 2));
	default:
		return -EINVAL;
	}
}

static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
				  bool differential, int device_index, int *val)
{
	int ret;

	adc->rx_buf[0] = 0;
	adc->rx_buf[1] = 0;
	adc->tx_buf = mcp320x_channel_to_tx_data(device_index,
						channel, differential);

	if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) {
		ret = spi_sync(adc->spi, &adc->msg);
		if (ret < 0)
			return ret;
	} else {
		ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf));
		if (ret < 0)
			return ret;
	}

	switch (device_index) {
	case mcp3001:
		*val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
		return 0;
	case mcp3002:
	case mcp3004:
	case mcp3008:
		*val = (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
		return 0;
	case mcp3201:
		*val = (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
		return 0;
	case mcp3202:
	case mcp3204:
	case mcp3208:
		*val = (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
		return 0;
	case mcp3301:
		*val = sign_extend32((adc->rx_buf[0] & 0x1f) << 8
				    | adc->rx_buf[1], 12);
		return 0;
	default:
		return -EINVAL;
	}
}

static int mcp320x_read_raw(struct iio_dev *indio_dev,
			    struct iio_chan_spec const *channel, int *val,
			    int *val2, long mask)
{
	struct mcp320x *adc = iio_priv(indio_dev);
	int ret = -EINVAL;
	int device_index = 0;

	mutex_lock(&adc->lock);

	device_index = spi_get_device_id(adc->spi)->driver_data;

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		ret = mcp320x_adc_conversion(adc, channel->address,
			channel->differential, device_index, val);
		if (ret < 0)
			goto out;

		ret = IIO_VAL_INT;
		break;

	case IIO_CHAN_INFO_SCALE:
		ret = regulator_get_voltage(adc->reg);
		if (ret < 0)
			goto out;

		/* convert regulator output voltage to mV */
		*val = ret / 1000;
		*val2 = adc->chip_info->resolution;
		ret = IIO_VAL_FRACTIONAL_LOG2;
		break;
	}

out:
	mutex_unlock(&adc->lock);

	return ret;
}

#define MCP320X_VOLTAGE_CHANNEL(num)				\
	{							\
		.type = IIO_VOLTAGE,				\
		.indexed = 1,					\
		.channel = (num),				\
		.address = (num),				\
		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	}

#define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2)		\
	{							\
		.type = IIO_VOLTAGE,				\
		.indexed = 1,					\
		.channel = (chan1),				\
		.channel2 = (chan2),				\
		.address = (chan1),				\
		.differential = 1,				\
		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	}

static const struct iio_chan_spec mcp3201_channels[] = {
	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
};

static const struct iio_chan_spec mcp3202_channels[] = {
	MCP320X_VOLTAGE_CHANNEL(0),
	MCP320X_VOLTAGE_CHANNEL(1),
	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
};

static const struct iio_chan_spec mcp3204_channels[] = {
	MCP320X_VOLTAGE_CHANNEL(0),
	MCP320X_VOLTAGE_CHANNEL(1),
	MCP320X_VOLTAGE_CHANNEL(2),
	MCP320X_VOLTAGE_CHANNEL(3),
	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
};

static const struct iio_chan_spec mcp3208_channels[] = {
	MCP320X_VOLTAGE_CHANNEL(0),
	MCP320X_VOLTAGE_CHANNEL(1),
	MCP320X_VOLTAGE_CHANNEL(2),
	MCP320X_VOLTAGE_CHANNEL(3),
	MCP320X_VOLTAGE_CHANNEL(4),
	MCP320X_VOLTAGE_CHANNEL(5),
	MCP320X_VOLTAGE_CHANNEL(6),
	MCP320X_VOLTAGE_CHANNEL(7),
	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
	MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5),
	MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4),
	MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7),
	MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6),
};

static const struct iio_info mcp320x_info = {
	.read_raw = mcp320x_read_raw,
	.driver_module = THIS_MODULE,
};

static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
	[mcp3001] = {
		.channels = mcp3201_channels,
		.num_channels = ARRAY_SIZE(mcp3201_channels),
		.resolution = 10
	},
	[mcp3002] = {
		.channels = mcp3202_channels,
		.num_channels = ARRAY_SIZE(mcp3202_channels),
		.resolution = 10
	},
	[mcp3004] = {
		.channels = mcp3204_channels,
		.num_channels = ARRAY_SIZE(mcp3204_channels),
		.resolution = 10
	},
	[mcp3008] = {
		.channels = mcp3208_channels,
		.num_channels = ARRAY_SIZE(mcp3208_channels),
		.resolution = 10
	},
	[mcp3201] = {
		.channels = mcp3201_channels,
		.num_channels = ARRAY_SIZE(mcp3201_channels),
		.resolution = 12
	},
	[mcp3202] = {
		.channels = mcp3202_channels,
		.num_channels = ARRAY_SIZE(mcp3202_channels),
		.resolution = 12
	},
	[mcp3204] = {
		.channels = mcp3204_channels,
		.num_channels = ARRAY_SIZE(mcp3204_channels),
		.resolution = 12
	},
	[mcp3208] = {
		.channels = mcp3208_channels,
		.num_channels = ARRAY_SIZE(mcp3208_channels),
		.resolution = 12
	},
	[mcp3301] = {
		.channels = mcp3201_channels,
		.num_channels = ARRAY_SIZE(mcp3201_channels),
		.resolution = 13
	},
};

static int mcp320x_probe(struct spi_device *spi)
{
	struct iio_dev *indio_dev;
	struct mcp320x *adc;
	const struct mcp320x_chip_info *chip_info;
	int ret;

	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
	if (!indio_dev)
		return -ENOMEM;

	adc = iio_priv(indio_dev);
	adc->spi = spi;

	indio_dev->dev.parent = &spi->dev;
	indio_dev->dev.of_node = spi->dev.of_node;
	indio_dev->name = spi_get_device_id(spi)->name;
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->info = &mcp320x_info;
	spi_set_drvdata(spi, indio_dev);

	chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data];
	indio_dev->channels = chip_info->channels;
	indio_dev->num_channels = chip_info->num_channels;

	adc->chip_info = chip_info;

	adc->transfer[0].tx_buf = &adc->tx_buf;
	adc->transfer[0].len = sizeof(adc->tx_buf);
	adc->transfer[1].rx_buf = adc->rx_buf;
	adc->transfer[1].len = sizeof(adc->rx_buf);

	spi_message_init_with_transfers(&adc->msg, adc->transfer,
					ARRAY_SIZE(adc->transfer));

	adc->reg = devm_regulator_get(&spi->dev, "vref");
	if (IS_ERR(adc->reg))
		return PTR_ERR(adc->reg);

	ret = regulator_enable(adc->reg);
	if (ret < 0)
		return ret;

	mutex_init(&adc->lock);

	ret = iio_device_register(indio_dev);
	if (ret < 0)
		goto reg_disable;

	return 0;

reg_disable:
	regulator_disable(adc->reg);

	return ret;
}

static int mcp320x_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	struct mcp320x *adc = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	regulator_disable(adc->reg);

	return 0;
}

#if defined(CONFIG_OF)
static const struct of_device_id mcp320x_dt_ids[] = {
	/* NOTE: The use of compatibles with no vendor prefix is deprecated. */
	{
		.compatible = "mcp3001",
		.data = &mcp320x_chip_infos[mcp3001],
	}, {
		.compatible = "mcp3002",
		.data = &mcp320x_chip_infos[mcp3002],
	}, {
		.compatible = "mcp3004",
		.data = &mcp320x_chip_infos[mcp3004],
	}, {
		.compatible = "mcp3008",
		.data = &mcp320x_chip_infos[mcp3008],
	}, {
		.compatible = "mcp3201",
		.data = &mcp320x_chip_infos[mcp3201],
	}, {
		.compatible = "mcp3202",
		.data = &mcp320x_chip_infos[mcp3202],
	}, {
		.compatible = "mcp3204",
		.data = &mcp320x_chip_infos[mcp3204],
	}, {
		.compatible = "mcp3208",
		.data = &mcp320x_chip_infos[mcp3208],
	}, {
		.compatible = "mcp3301",
		.data = &mcp320x_chip_infos[mcp3301],
	}, {
		.compatible = "microchip,mcp3001",
		.data = &mcp320x_chip_infos[mcp3001],
	}, {
		.compatible = "microchip,mcp3002",
		.data = &mcp320x_chip_infos[mcp3002],
	}, {
		.compatible = "microchip,mcp3004",
		.data = &mcp320x_chip_infos[mcp3004],
	}, {
		.compatible = "microchip,mcp3008",
		.data = &mcp320x_chip_infos[mcp3008],
	}, {
		.compatible = "microchip,mcp3201",
		.data = &mcp320x_chip_infos[mcp3201],
	}, {
		.compatible = "microchip,mcp3202",
		.data = &mcp320x_chip_infos[mcp3202],
	}, {
		.compatible = "microchip,mcp3204",
		.data = &mcp320x_chip_infos[mcp3204],
	}, {
		.compatible = "microchip,mcp3208",
		.data = &mcp320x_chip_infos[mcp3208],
	}, {
		.compatible = "microchip,mcp3301",
		.data = &mcp320x_chip_infos[mcp3301],
	}, {
	}
};
MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
#endif

static const struct spi_device_id mcp320x_id[] = {
	{ "mcp3001", mcp3001 },
	{ "mcp3002", mcp3002 },
	{ "mcp3004", mcp3004 },
	{ "mcp3008", mcp3008 },
	{ "mcp3201", mcp3201 },
	{ "mcp3202", mcp3202 },
	{ "mcp3204", mcp3204 },
	{ "mcp3208", mcp3208 },
	{ "mcp3301", mcp3301 },
	{ }
};
MODULE_DEVICE_TABLE(spi, mcp320x_id);

static struct spi_driver mcp320x_driver = {
	.driver = {
		.name = "mcp320x",
		.of_match_table = of_match_ptr(mcp320x_dt_ids),
	},
	.probe = mcp320x_probe,
	.remove = mcp320x_remove,
	.id_table = mcp320x_id,
};
module_spi_driver(mcp320x_driver);

MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
f5ce4a7a OA	1	/*
f5ce4a7a OA	2	* Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
b12206e9 SA	3	* Copyright (C) 2014 Rose Technology
	4	* Allan Bendorff Jensen <abj@rosetechnology.dk>
	5	* Soren Andersen <san@rosetechnology.dk>
	6	*
	7	* Driver for following ADC chips from Microchip Technology's:
	8	* 10 Bit converter
	9	* MCP3001
	10	* MCP3002
	11	* MCP3004
	12	* MCP3008
	13	* ------------
	14	* 12 bit converter
	15	* MCP3201
	16	* MCP3202
	17	* MCP3204
	18	* MCP3208
	19	* ------------
e6f47943 LW	20	* 13 bit converter
e6f47943 LW	21	* MCP3301
f5ce4a7a	22	*
f5ce4a7a	23	* Datasheet can be found here:
b12206e9 SA	24	* http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001
	25	* http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002
	26	* http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08
	27	* http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201
	28	* http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202
	29	* http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08
f686a36b	30	* http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301
f5ce4a7a OA	31	*
	32	* This program is free software; you can redistribute it and/or modify
	33	* it under the terms of the GNU General Public License version 2 as
	34	* published by the Free Software Foundation.
	35	*/
	36
	37	#include <linux/err.h>
b12206e9	38	#include <linux/delay.h>
f5ce4a7a OA	39	#include <linux/spi/spi.h>
	40	#include <linux/module.h>
	41	#include <linux/iio/iio.h>
	42	#include <linux/regulator/consumer.h>
	43
f5ce4a7a	44	enum {
b12206e9 SA	45	mcp3001,
	46	mcp3002,
	47	mcp3004,
	48	mcp3008,
	49	mcp3201,
	50	mcp3202,
f5ce4a7a OA	51	mcp3204,
f5ce4a7a OA	52	mcp3208,
f686a36b	53	mcp3301,
f5ce4a7a OA	54	};
f5ce4a7a OA	55
b12206e9 SA	56	struct mcp320x_chip_info {
	57	const struct iio_chan_spec *channels;
	58	unsigned int num_channels;
	59	unsigned int resolution;
	60	};
	61
f5ce4a7a OA	62	struct mcp320x {
	63	struct spi_device *spi;
	64	struct spi_message msg;
	65	struct spi_transfer transfer[2];
	66
f5ce4a7a OA	67	struct regulator *reg;
f5ce4a7a OA	68	struct mutex lock;
b12206e9	69	const struct mcp320x_chip_info *chip_info;
0e81bc99 MW	70
	71	u8 tx_buf ____cacheline_aligned;
	72	u8 rx_buf[2];
f5ce4a7a OA	73	};
f5ce4a7a OA	74
b12206e9 SA	75	static int mcp320x_channel_to_tx_data(int device_index,
	76	const unsigned int channel, bool differential)
	77	{
	78	int start_bit = 1;
	79
	80	switch (device_index) {
	81	case mcp3001:
	82	case mcp3201:
f686a36b	83	case mcp3301:
b12206e9 SA	84	return 0;
	85	case mcp3002:
	86	case mcp3202:
	87	return ((start_bit << 4) \| (!differential << 3) \|
	88	(channel << 2));
	89	case mcp3004:
	90	case mcp3204:
	91	case mcp3008:
	92	case mcp3208:
	93	return ((start_bit << 6) \| (!differential << 5) \|
	94	(channel << 2));
	95	default:
	96	return -EINVAL;
	97	}
	98	}
	99
	100	static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
e6f47943	101	bool differential, int device_index, int *val)
f5ce4a7a OA	102	{
	103	int ret;
	104
b12206e9 SA	105	adc->rx_buf[0] = 0;
	106	adc->rx_buf[1] = 0;
	107	adc->tx_buf = mcp320x_channel_to_tx_data(device_index,
	108	channel, differential);
	109
f686a36b	110	if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) {
b12206e9 SA	111	ret = spi_sync(adc->spi, &adc->msg);
	112	if (ret < 0)
	113	return ret;
	114	} else {
	115	ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf));
	116	if (ret < 0)
	117	return ret;
	118	}
f5ce4a7a	119
b12206e9 SA	120	switch (device_index) {
b12206e9 SA	121	case mcp3001:
e6f47943 LW	122	*val = (adc->rx_buf[0] << 5 \| adc->rx_buf[1] >> 3);
e6f47943 LW	123	return 0;
b12206e9 SA	124	case mcp3002:
	125	case mcp3004:
	126	case mcp3008:
e6f47943 LW	127	*val = (adc->rx_buf[0] << 2 \| adc->rx_buf[1] >> 6);
e6f47943 LW	128	return 0;
b12206e9	129	case mcp3201:
e6f47943 LW	130	*val = (adc->rx_buf[0] << 7 \| adc->rx_buf[1] >> 1);
e6f47943 LW	131	return 0;
b12206e9 SA	132	case mcp3202:
	133	case mcp3204:
	134	case mcp3208:
e6f47943 LW	135	*val = (adc->rx_buf[0] << 4 \| adc->rx_buf[1] >> 4);
e6f47943 LW	136	return 0;
f686a36b	137	case mcp3301:
e6f47943 LW	138	*val = sign_extend32((adc->rx_buf[0] & 0x1f) << 8
	139	\| adc->rx_buf[1], 12);
	140	return 0;
b12206e9 SA	141	default:
	142	return -EINVAL;
	143	}
f5ce4a7a OA	144	}
	145
	146	static int mcp320x_read_raw(struct iio_dev *indio_dev,
	147	struct iio_chan_spec const channel, int val,
	148	int *val2, long mask)
	149	{
	150	struct mcp320x *adc = iio_priv(indio_dev);
	151	int ret = -EINVAL;
b12206e9	152	int device_index = 0;
f5ce4a7a OA	153
	154	mutex_lock(&adc->lock);
	155
b12206e9 SA	156	device_index = spi_get_device_id(adc->spi)->driver_data;
b12206e9 SA	157
f5ce4a7a OA	158	switch (mask) {
f5ce4a7a OA	159	case IIO_CHAN_INFO_RAW:
b12206e9	160	ret = mcp320x_adc_conversion(adc, channel->address,
e6f47943	161	channel->differential, device_index, val);
f5ce4a7a OA	162	if (ret < 0)
	163	goto out;
	164
f5ce4a7a OA	165	ret = IIO_VAL_INT;
	166	break;
	167
	168	case IIO_CHAN_INFO_SCALE:
f5ce4a7a OA	169	ret = regulator_get_voltage(adc->reg);
	170	if (ret < 0)
	171	goto out;
	172
b12206e9	173	/* convert regulator output voltage to mV */
f5ce4a7a	174	*val = ret / 1000;
b12206e9	175	*val2 = adc->chip_info->resolution;
f5ce4a7a OA	176	ret = IIO_VAL_FRACTIONAL_LOG2;
f5ce4a7a OA	177	break;
f5ce4a7a OA	178	}
	179
	180	out:
	181	mutex_unlock(&adc->lock);
	182
	183	return ret;
	184	}
	185
	186	#define MCP320X_VOLTAGE_CHANNEL(num) \
	187	{ \
	188	.type = IIO_VOLTAGE, \
	189	.indexed = 1, \
	190	.channel = (num), \
	191	.address = (num), \
	192	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	193	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	194	}
	195
4ea71e5c	196	#define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2) \
f5ce4a7a OA	197	{ \
	198	.type = IIO_VOLTAGE, \
	199	.indexed = 1, \
4ea71e5c AM	200	.channel = (chan1), \
	201	.channel2 = (chan2), \
	202	.address = (chan1), \
f5ce4a7a OA	203	.differential = 1, \
	204	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	205	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	206	}
	207
b12206e9	208	static const struct iio_chan_spec mcp3201_channels[] = {
4ea71e5c	209	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
b12206e9 SA	210	};
	211
	212	static const struct iio_chan_spec mcp3202_channels[] = {
	213	MCP320X_VOLTAGE_CHANNEL(0),
	214	MCP320X_VOLTAGE_CHANNEL(1),
4ea71e5c AM	215	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
4ea71e5c AM	216	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
b12206e9 SA	217	};
b12206e9 SA	218
f5ce4a7a OA	219	static const struct iio_chan_spec mcp3204_channels[] = {
	220	MCP320X_VOLTAGE_CHANNEL(0),
	221	MCP320X_VOLTAGE_CHANNEL(1),
	222	MCP320X_VOLTAGE_CHANNEL(2),
	223	MCP320X_VOLTAGE_CHANNEL(3),
4ea71e5c AM	224	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	225	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
	226	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
	227	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
f5ce4a7a OA	228	};
	229
	230	static const struct iio_chan_spec mcp3208_channels[] = {
	231	MCP320X_VOLTAGE_CHANNEL(0),
	232	MCP320X_VOLTAGE_CHANNEL(1),
	233	MCP320X_VOLTAGE_CHANNEL(2),
	234	MCP320X_VOLTAGE_CHANNEL(3),
	235	MCP320X_VOLTAGE_CHANNEL(4),
	236	MCP320X_VOLTAGE_CHANNEL(5),
	237	MCP320X_VOLTAGE_CHANNEL(6),
	238	MCP320X_VOLTAGE_CHANNEL(7),
4ea71e5c AM	239	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	240	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
	241	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
	242	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
	243	MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5),
	244	MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4),
	245	MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7),
	246	MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6),
f5ce4a7a OA	247	};
	248
	249	static const struct iio_info mcp320x_info = {
	250	.read_raw = mcp320x_read_raw,
	251	.driver_module = THIS_MODULE,
	252	};
	253
b12206e9 SA	254	static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
	255	[mcp3001] = {
	256	.channels = mcp3201_channels,
	257	.num_channels = ARRAY_SIZE(mcp3201_channels),
	258	.resolution = 10
	259	},
	260	[mcp3002] = {
	261	.channels = mcp3202_channels,
	262	.num_channels = ARRAY_SIZE(mcp3202_channels),
	263	.resolution = 10
	264	},
	265	[mcp3004] = {
	266	.channels = mcp3204_channels,
	267	.num_channels = ARRAY_SIZE(mcp3204_channels),
	268	.resolution = 10
	269	},
	270	[mcp3008] = {
	271	.channels = mcp3208_channels,
	272	.num_channels = ARRAY_SIZE(mcp3208_channels),
	273	.resolution = 10
	274	},
	275	[mcp3201] = {
	276	.channels = mcp3201_channels,
	277	.num_channels = ARRAY_SIZE(mcp3201_channels),
	278	.resolution = 12
	279	},
	280	[mcp3202] = {
	281	.channels = mcp3202_channels,
	282	.num_channels = ARRAY_SIZE(mcp3202_channels),
	283	.resolution = 12
	284	},
f5ce4a7a OA	285	[mcp3204] = {
f5ce4a7a OA	286	.channels = mcp3204_channels,
b12206e9 SA	287	.num_channels = ARRAY_SIZE(mcp3204_channels),
b12206e9 SA	288	.resolution = 12
f5ce4a7a OA	289	},
	290	[mcp3208] = {
	291	.channels = mcp3208_channels,
b12206e9 SA	292	.num_channels = ARRAY_SIZE(mcp3208_channels),
b12206e9 SA	293	.resolution = 12
f5ce4a7a	294	},
f686a36b AG	295	[mcp3301] = {
	296	.channels = mcp3201_channels,
	297	.num_channels = ARRAY_SIZE(mcp3201_channels),
	298	.resolution = 13
	299	},
f5ce4a7a OA	300	};
	301
	302	static int mcp320x_probe(struct spi_device *spi)
	303	{
	304	struct iio_dev *indio_dev;
	305	struct mcp320x *adc;
b12206e9	306	const struct mcp320x_chip_info *chip_info;
f5ce4a7a OA	307	int ret;
f5ce4a7a OA	308
a726dea5	309	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
f5ce4a7a OA	310	if (!indio_dev)
	311	return -ENOMEM;
	312
	313	adc = iio_priv(indio_dev);
	314	adc->spi = spi;
	315
	316	indio_dev->dev.parent = &spi->dev;
b541eaff	317	indio_dev->dev.of_node = spi->dev.of_node;
f5ce4a7a OA	318	indio_dev->name = spi_get_device_id(spi)->name;
	319	indio_dev->modes = INDIO_DIRECT_MODE;
	320	indio_dev->info = &mcp320x_info;
0964e409	321	spi_set_drvdata(spi, indio_dev);
f5ce4a7a	322
b12206e9	323	chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data];
f5ce4a7a OA	324	indio_dev->channels = chip_info->channels;
	325	indio_dev->num_channels = chip_info->num_channels;
	326
41be6a0d MS	327	adc->chip_info = chip_info;
41be6a0d MS	328
f5ce4a7a OA	329	adc->transfer[0].tx_buf = &adc->tx_buf;
	330	adc->transfer[0].len = sizeof(adc->tx_buf);
	331	adc->transfer[1].rx_buf = adc->rx_buf;
	332	adc->transfer[1].len = sizeof(adc->rx_buf);
	333
	334	spi_message_init_with_transfers(&adc->msg, adc->transfer,
	335	ARRAY_SIZE(adc->transfer));
	336
a726dea5 SK	337	adc->reg = devm_regulator_get(&spi->dev, "vref");
	338	if (IS_ERR(adc->reg))
	339	return PTR_ERR(adc->reg);
f5ce4a7a OA	340
	341	ret = regulator_enable(adc->reg);
	342	if (ret < 0)
a726dea5	343	return ret;
f5ce4a7a OA	344
	345	mutex_init(&adc->lock);
	346
	347	ret = iio_device_register(indio_dev);
	348	if (ret < 0)
	349	goto reg_disable;
	350
	351	return 0;
	352
	353	reg_disable:
	354	regulator_disable(adc->reg);
f5ce4a7a OA	355
	356	return ret;
	357	}
	358
	359	static int mcp320x_remove(struct spi_device *spi)
	360	{
	361	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	362	struct mcp320x *adc = iio_priv(indio_dev);
	363
	364	iio_device_unregister(indio_dev);
	365	regulator_disable(adc->reg);
f5ce4a7a OA	366
	367	return 0;
	368	}
	369
b12206e9 SA	370	#if defined(CONFIG_OF)
b12206e9 SA	371	static const struct of_device_id mcp320x_dt_ids[] = {
0d0e5384	372	/* NOTE: The use of compatibles with no vendor prefix is deprecated. */
b12206e9 SA	373	{
	374	.compatible = "mcp3001",
	375	.data = &mcp320x_chip_infos[mcp3001],
	376	}, {
	377	.compatible = "mcp3002",
	378	.data = &mcp320x_chip_infos[mcp3002],
	379	}, {
	380	.compatible = "mcp3004",
	381	.data = &mcp320x_chip_infos[mcp3004],
	382	}, {
	383	.compatible = "mcp3008",
	384	.data = &mcp320x_chip_infos[mcp3008],
	385	}, {
	386	.compatible = "mcp3201",
	387	.data = &mcp320x_chip_infos[mcp3201],
	388	}, {
	389	.compatible = "mcp3202",
	390	.data = &mcp320x_chip_infos[mcp3202],
	391	}, {
	392	.compatible = "mcp3204",
	393	.data = &mcp320x_chip_infos[mcp3204],
	394	}, {
	395	.compatible = "mcp3208",
	396	.data = &mcp320x_chip_infos[mcp3208],
f686a36b AG	397	}, {
	398	.compatible = "mcp3301",
	399	.data = &mcp320x_chip_infos[mcp3301],
0d0e5384 JMC	400	}, {
	401	.compatible = "microchip,mcp3001",
	402	.data = &mcp320x_chip_infos[mcp3001],
	403	}, {
	404	.compatible = "microchip,mcp3002",
	405	.data = &mcp320x_chip_infos[mcp3002],
	406	}, {
	407	.compatible = "microchip,mcp3004",
	408	.data = &mcp320x_chip_infos[mcp3004],
	409	}, {
	410	.compatible = "microchip,mcp3008",
	411	.data = &mcp320x_chip_infos[mcp3008],
	412	}, {
	413	.compatible = "microchip,mcp3201",
	414	.data = &mcp320x_chip_infos[mcp3201],
	415	}, {
	416	.compatible = "microchip,mcp3202",
	417	.data = &mcp320x_chip_infos[mcp3202],
	418	}, {
	419	.compatible = "microchip,mcp3204",
	420	.data = &mcp320x_chip_infos[mcp3204],
	421	}, {
	422	.compatible = "microchip,mcp3208",
	423	.data = &mcp320x_chip_infos[mcp3208],
	424	}, {
	425	.compatible = "microchip,mcp3301",
	426	.data = &mcp320x_chip_infos[mcp3301],
b12206e9 SA	427	}, {
	428	}
	429	};
	430	MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
	431	#endif
	432
f5ce4a7a	433	static const struct spi_device_id mcp320x_id[] = {
b12206e9 SA	434	{ "mcp3001", mcp3001 },
	435	{ "mcp3002", mcp3002 },
	436	{ "mcp3004", mcp3004 },
	437	{ "mcp3008", mcp3008 },
	438	{ "mcp3201", mcp3201 },
	439	{ "mcp3202", mcp3202 },
f5ce4a7a OA	440	{ "mcp3204", mcp3204 },
f5ce4a7a OA	441	{ "mcp3208", mcp3208 },
f686a36b	442	{ "mcp3301", mcp3301 },
f5ce4a7a OA	443	{ }
	444	};
	445	MODULE_DEVICE_TABLE(spi, mcp320x_id);
	446
	447	static struct spi_driver mcp320x_driver = {
	448	.driver = {
	449	.name = "mcp320x",
ab6ff6c6	450	.of_match_table = of_match_ptr(mcp320x_dt_ids),
f5ce4a7a OA	451	},
	452	.probe = mcp320x_probe,
	453	.remove = mcp320x_remove,
	454	.id_table = mcp320x_id,
	455	};
	456	module_spi_driver(mcp320x_driver);
	457
	458	MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
b12206e9	459	MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08");
f5ce4a7a	460	MODULE_LICENSE("GPL v2");