[linux-2.6-block.git] / drivers / iio / adc / mcp320x.c

/*
 * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
 * Copyright (C) 2014 Rose Technology
 * 	   Allan Bendorff Jensen <abj@rosetechnology.dk>
 *	   Soren Andersen <san@rosetechnology.dk>
 *
 * Driver for following ADC chips from Microchip Technology's:
 * 10 Bit converter
 * MCP3001
 * MCP3002
 * MCP3004
 * MCP3008
 * ------------
 * 12 bit converter
 * MCP3201
 * MCP3202
 * MCP3204
 * MCP3208
 * ------------
 *
 * Datasheet can be found here:
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf  mcp3001
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf  mcp3002
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf  mcp3004/08
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf  mcp3201
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf  mcp3202
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf  mcp3204/08
 * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf  mcp3301
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/err.h>
#include <linux/delay.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/regulator/consumer.h>

enum {
	mcp3001,
	mcp3002,
	mcp3004,
	mcp3008,
	mcp3201,
	mcp3202,
	mcp3204,
	mcp3208,
	mcp3301,
};

struct mcp320x_chip_info {
	const struct iio_chan_spec *channels;
	unsigned int num_channels;
	unsigned int resolution;
};

struct mcp320x {
	struct spi_device *spi;
	struct spi_message msg;
	struct spi_transfer transfer[2];

	struct regulator *reg;
	struct mutex lock;
	const struct mcp320x_chip_info *chip_info;

	u8 tx_buf ____cacheline_aligned;
	u8 rx_buf[2];
};

static int mcp320x_channel_to_tx_data(int device_index,
			const unsigned int channel, bool differential)
{
	int start_bit = 1;

	switch (device_index) {
	case mcp3001:
	case mcp3201:
	case mcp3301:
		return 0;
	case mcp3002:
	case mcp3202:
		return ((start_bit << 4) | (!differential << 3) |
							(channel << 2));
	case mcp3004:
	case mcp3204:
	case mcp3008:
	case mcp3208:
		return ((start_bit << 6) | (!differential << 5) |
							(channel << 2));
	default:
		return -EINVAL;
	}
}

static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
				  bool differential, int device_index)
{
	int ret;

	adc->rx_buf[0] = 0;
	adc->rx_buf[1] = 0;
	adc->tx_buf = mcp320x_channel_to_tx_data(device_index,
						channel, differential);

	if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) {
		ret = spi_sync(adc->spi, &adc->msg);
		if (ret < 0)
			return ret;
	} else {
		ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf));
		if (ret < 0)
			return ret;
	}

	switch (device_index) {
	case mcp3001:
		return (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
	case mcp3002:
	case mcp3004:
	case mcp3008:
		return (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
	case mcp3201:
		return (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
	case mcp3202:
	case mcp3204:
	case mcp3208:
		return (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
	case mcp3301:
		return sign_extend32((adc->rx_buf[0] & 0x1f) << 8 | adc->rx_buf[1], 12);
	default:
		return -EINVAL;
	}
}

static int mcp320x_read_raw(struct iio_dev *indio_dev,
			    struct iio_chan_spec const *channel, int *val,
			    int *val2, long mask)
{
	struct mcp320x *adc = iio_priv(indio_dev);
	int ret = -EINVAL;
	int device_index = 0;

	mutex_lock(&adc->lock);

	device_index = spi_get_device_id(adc->spi)->driver_data;

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		ret = mcp320x_adc_conversion(adc, channel->address,
			channel->differential, device_index);

		if (ret < 0)
			goto out;

		*val = ret;
		ret = IIO_VAL_INT;
		break;

	case IIO_CHAN_INFO_SCALE:
		ret = regulator_get_voltage(adc->reg);
		if (ret < 0)
			goto out;

		/* convert regulator output voltage to mV */
		*val = ret / 1000;
		*val2 = adc->chip_info->resolution;
		ret = IIO_VAL_FRACTIONAL_LOG2;
		break;
	}

out:
	mutex_unlock(&adc->lock);

	return ret;
}

#define MCP320X_VOLTAGE_CHANNEL(num)				\
	{							\
		.type = IIO_VOLTAGE,				\
		.indexed = 1,					\
		.channel = (num),				\
		.address = (num),				\
		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	}

#define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2)		\
	{							\
		.type = IIO_VOLTAGE,				\
		.indexed = 1,					\
		.channel = (chan1),				\
		.channel2 = (chan2),				\
		.address = (chan1),				\
		.differential = 1,				\
		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	}

static const struct iio_chan_spec mcp3201_channels[] = {
	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
};

static const struct iio_chan_spec mcp3202_channels[] = {
	MCP320X_VOLTAGE_CHANNEL(0),
	MCP320X_VOLTAGE_CHANNEL(1),
	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
};

static const struct iio_chan_spec mcp3204_channels[] = {
	MCP320X_VOLTAGE_CHANNEL(0),
	MCP320X_VOLTAGE_CHANNEL(1),
	MCP320X_VOLTAGE_CHANNEL(2),
	MCP320X_VOLTAGE_CHANNEL(3),
	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
};

static const struct iio_chan_spec mcp3208_channels[] = {
	MCP320X_VOLTAGE_CHANNEL(0),
	MCP320X_VOLTAGE_CHANNEL(1),
	MCP320X_VOLTAGE_CHANNEL(2),
	MCP320X_VOLTAGE_CHANNEL(3),
	MCP320X_VOLTAGE_CHANNEL(4),
	MCP320X_VOLTAGE_CHANNEL(5),
	MCP320X_VOLTAGE_CHANNEL(6),
	MCP320X_VOLTAGE_CHANNEL(7),
	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
	MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5),
	MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4),
	MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7),
	MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6),
};

static const struct iio_info mcp320x_info = {
	.read_raw = mcp320x_read_raw,
	.driver_module = THIS_MODULE,
};

static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
	[mcp3001] = {
		.channels = mcp3201_channels,
		.num_channels = ARRAY_SIZE(mcp3201_channels),
		.resolution = 10
	},
	[mcp3002] = {
		.channels = mcp3202_channels,
		.num_channels = ARRAY_SIZE(mcp3202_channels),
		.resolution = 10
	},
	[mcp3004] = {
		.channels = mcp3204_channels,
		.num_channels = ARRAY_SIZE(mcp3204_channels),
		.resolution = 10
	},
	[mcp3008] = {
		.channels = mcp3208_channels,
		.num_channels = ARRAY_SIZE(mcp3208_channels),
		.resolution = 10
	},
	[mcp3201] = {
		.channels = mcp3201_channels,
		.num_channels = ARRAY_SIZE(mcp3201_channels),
		.resolution = 12
	},
	[mcp3202] = {
		.channels = mcp3202_channels,
		.num_channels = ARRAY_SIZE(mcp3202_channels),
		.resolution = 12
	},
	[mcp3204] = {
		.channels = mcp3204_channels,
		.num_channels = ARRAY_SIZE(mcp3204_channels),
		.resolution = 12
	},
	[mcp3208] = {
		.channels = mcp3208_channels,
		.num_channels = ARRAY_SIZE(mcp3208_channels),
		.resolution = 12
	},
	[mcp3301] = {
		.channels = mcp3201_channels,
		.num_channels = ARRAY_SIZE(mcp3201_channels),
		.resolution = 13
	},
};

static int mcp320x_probe(struct spi_device *spi)
{
	struct iio_dev *indio_dev;
	struct mcp320x *adc;
	const struct mcp320x_chip_info *chip_info;
	int ret;

	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
	if (!indio_dev)
		return -ENOMEM;

	adc = iio_priv(indio_dev);
	adc->spi = spi;

	indio_dev->dev.parent = &spi->dev;
	indio_dev->dev.of_node = spi->dev.of_node;
	indio_dev->name = spi_get_device_id(spi)->name;
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->info = &mcp320x_info;
	spi_set_drvdata(spi, indio_dev);

	chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data];
	indio_dev->channels = chip_info->channels;
	indio_dev->num_channels = chip_info->num_channels;

	adc->chip_info = chip_info;

	adc->transfer[0].tx_buf = &adc->tx_buf;
	adc->transfer[0].len = sizeof(adc->tx_buf);
	adc->transfer[1].rx_buf = adc->rx_buf;
	adc->transfer[1].len = sizeof(adc->rx_buf);

	spi_message_init_with_transfers(&adc->msg, adc->transfer,
					ARRAY_SIZE(adc->transfer));

	adc->reg = devm_regulator_get(&spi->dev, "vref");
	if (IS_ERR(adc->reg))
		return PTR_ERR(adc->reg);

	ret = regulator_enable(adc->reg);
	if (ret < 0)
		return ret;

	mutex_init(&adc->lock);

	ret = iio_device_register(indio_dev);
	if (ret < 0)
		goto reg_disable;

	return 0;

reg_disable:
	regulator_disable(adc->reg);

	return ret;
}

static int mcp320x_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	struct mcp320x *adc = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	regulator_disable(adc->reg);

	return 0;
}

#if defined(CONFIG_OF)
static const struct of_device_id mcp320x_dt_ids[] = {
	/* NOTE: The use of compatibles with no vendor prefix is deprecated. */
	{
		.compatible = "mcp3001",
		.data = &mcp320x_chip_infos[mcp3001],
	}, {
		.compatible = "mcp3002",
		.data = &mcp320x_chip_infos[mcp3002],
	}, {
		.compatible = "mcp3004",
		.data = &mcp320x_chip_infos[mcp3004],
	}, {
		.compatible = "mcp3008",
		.data = &mcp320x_chip_infos[mcp3008],
	}, {
		.compatible = "mcp3201",
		.data = &mcp320x_chip_infos[mcp3201],
	}, {
		.compatible = "mcp3202",
		.data = &mcp320x_chip_infos[mcp3202],
	}, {
		.compatible = "mcp3204",
		.data = &mcp320x_chip_infos[mcp3204],
	}, {
		.compatible = "mcp3208",
		.data = &mcp320x_chip_infos[mcp3208],
	}, {
		.compatible = "mcp3301",
		.data = &mcp320x_chip_infos[mcp3301],
	}, {
		.compatible = "microchip,mcp3001",
		.data = &mcp320x_chip_infos[mcp3001],
	}, {
		.compatible = "microchip,mcp3002",
		.data = &mcp320x_chip_infos[mcp3002],
	}, {
		.compatible = "microchip,mcp3004",
		.data = &mcp320x_chip_infos[mcp3004],
	}, {
		.compatible = "microchip,mcp3008",
		.data = &mcp320x_chip_infos[mcp3008],
	}, {
		.compatible = "microchip,mcp3201",
		.data = &mcp320x_chip_infos[mcp3201],
	}, {
		.compatible = "microchip,mcp3202",
		.data = &mcp320x_chip_infos[mcp3202],
	}, {
		.compatible = "microchip,mcp3204",
		.data = &mcp320x_chip_infos[mcp3204],
	}, {
		.compatible = "microchip,mcp3208",
		.data = &mcp320x_chip_infos[mcp3208],
	}, {
		.compatible = "microchip,mcp3301",
		.data = &mcp320x_chip_infos[mcp3301],
	}, {
	}
};
MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
#endif

static const struct spi_device_id mcp320x_id[] = {
	{ "mcp3001", mcp3001 },
	{ "mcp3002", mcp3002 },
	{ "mcp3004", mcp3004 },
	{ "mcp3008", mcp3008 },
	{ "mcp3201", mcp3201 },
	{ "mcp3202", mcp3202 },
	{ "mcp3204", mcp3204 },
	{ "mcp3208", mcp3208 },
	{ "mcp3301", mcp3301 },
	{ }
};
MODULE_DEVICE_TABLE(spi, mcp320x_id);

static struct spi_driver mcp320x_driver = {
	.driver = {
		.name = "mcp320x",
		.of_match_table = of_match_ptr(mcp320x_dt_ids),
	},
	.probe = mcp320x_probe,
	.remove = mcp320x_remove,
	.id_table = mcp320x_id,
};
module_spi_driver(mcp320x_driver);

MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
f5ce4a7a OA	1	/*
f5ce4a7a OA	2	* Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
b12206e9 SA	3	* Copyright (C) 2014 Rose Technology
	4	* Allan Bendorff Jensen <abj@rosetechnology.dk>
	5	* Soren Andersen <san@rosetechnology.dk>
	6	*
	7	* Driver for following ADC chips from Microchip Technology's:
	8	* 10 Bit converter
	9	* MCP3001
	10	* MCP3002
	11	* MCP3004
	12	* MCP3008
	13	* ------------
	14	* 12 bit converter
	15	* MCP3201
	16	* MCP3202
	17	* MCP3204
	18	* MCP3208
	19	* ------------
f5ce4a7a	20	*
f5ce4a7a	21	* Datasheet can be found here:
b12206e9 SA	22	* http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001
	23	* http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002
	24	* http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08
	25	* http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201
	26	* http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202
	27	* http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08
f686a36b	28	* http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301
f5ce4a7a OA	29	*
	30	* This program is free software; you can redistribute it and/or modify
	31	* it under the terms of the GNU General Public License version 2 as
	32	* published by the Free Software Foundation.
	33	*/
	34
	35	#include <linux/err.h>
b12206e9	36	#include <linux/delay.h>
f5ce4a7a OA	37	#include <linux/spi/spi.h>
	38	#include <linux/module.h>
	39	#include <linux/iio/iio.h>
	40	#include <linux/regulator/consumer.h>
	41
f5ce4a7a	42	enum {
b12206e9 SA	43	mcp3001,
	44	mcp3002,
	45	mcp3004,
	46	mcp3008,
	47	mcp3201,
	48	mcp3202,
f5ce4a7a OA	49	mcp3204,
f5ce4a7a OA	50	mcp3208,
f686a36b	51	mcp3301,
f5ce4a7a OA	52	};
f5ce4a7a OA	53
b12206e9 SA	54	struct mcp320x_chip_info {
	55	const struct iio_chan_spec *channels;
	56	unsigned int num_channels;
	57	unsigned int resolution;
	58	};
	59
f5ce4a7a OA	60	struct mcp320x {
	61	struct spi_device *spi;
	62	struct spi_message msg;
	63	struct spi_transfer transfer[2];
	64
f5ce4a7a OA	65	struct regulator *reg;
f5ce4a7a OA	66	struct mutex lock;
b12206e9	67	const struct mcp320x_chip_info *chip_info;
0e81bc99 MW	68
	69	u8 tx_buf ____cacheline_aligned;
	70	u8 rx_buf[2];
f5ce4a7a OA	71	};
f5ce4a7a OA	72
b12206e9 SA	73	static int mcp320x_channel_to_tx_data(int device_index,
	74	const unsigned int channel, bool differential)
	75	{
	76	int start_bit = 1;
	77
	78	switch (device_index) {
	79	case mcp3001:
	80	case mcp3201:
f686a36b	81	case mcp3301:
b12206e9 SA	82	return 0;
	83	case mcp3002:
	84	case mcp3202:
	85	return ((start_bit << 4) \| (!differential << 3) \|
	86	(channel << 2));
	87	case mcp3004:
	88	case mcp3204:
	89	case mcp3008:
	90	case mcp3208:
	91	return ((start_bit << 6) \| (!differential << 5) \|
	92	(channel << 2));
	93	default:
	94	return -EINVAL;
	95	}
	96	}
	97
	98	static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
	99	bool differential, int device_index)
f5ce4a7a OA	100	{
	101	int ret;
	102
b12206e9 SA	103	adc->rx_buf[0] = 0;
	104	adc->rx_buf[1] = 0;
	105	adc->tx_buf = mcp320x_channel_to_tx_data(device_index,
	106	channel, differential);
	107
f686a36b	108	if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) {
b12206e9 SA	109	ret = spi_sync(adc->spi, &adc->msg);
	110	if (ret < 0)
	111	return ret;
	112	} else {
	113	ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf));
	114	if (ret < 0)
	115	return ret;
	116	}
f5ce4a7a	117
b12206e9 SA	118	switch (device_index) {
	119	case mcp3001:
	120	return (adc->rx_buf[0] << 5 \| adc->rx_buf[1] >> 3);
	121	case mcp3002:
	122	case mcp3004:
	123	case mcp3008:
	124	return (adc->rx_buf[0] << 2 \| adc->rx_buf[1] >> 6);
	125	case mcp3201:
	126	return (adc->rx_buf[0] << 7 \| adc->rx_buf[1] >> 1);
	127	case mcp3202:
	128	case mcp3204:
	129	case mcp3208:
	130	return (adc->rx_buf[0] << 4 \| adc->rx_buf[1] >> 4);
f686a36b AG	131	case mcp3301:
f686a36b AG	132	return sign_extend32((adc->rx_buf[0] & 0x1f) << 8 \| adc->rx_buf[1], 12);
b12206e9 SA	133	default:
	134	return -EINVAL;
	135	}
f5ce4a7a OA	136	}
	137
	138	static int mcp320x_read_raw(struct iio_dev *indio_dev,
	139	struct iio_chan_spec const channel, int val,
	140	int *val2, long mask)
	141	{
	142	struct mcp320x *adc = iio_priv(indio_dev);
	143	int ret = -EINVAL;
b12206e9	144	int device_index = 0;
f5ce4a7a OA	145
	146	mutex_lock(&adc->lock);
	147
b12206e9 SA	148	device_index = spi_get_device_id(adc->spi)->driver_data;
b12206e9 SA	149
f5ce4a7a OA	150	switch (mask) {
f5ce4a7a OA	151	case IIO_CHAN_INFO_RAW:
b12206e9 SA	152	ret = mcp320x_adc_conversion(adc, channel->address,
	153	channel->differential, device_index);
	154
f5ce4a7a OA	155	if (ret < 0)
	156	goto out;
	157
	158	*val = ret;
	159	ret = IIO_VAL_INT;
	160	break;
	161
	162	case IIO_CHAN_INFO_SCALE:
f5ce4a7a OA	163	ret = regulator_get_voltage(adc->reg);
	164	if (ret < 0)
	165	goto out;
	166
b12206e9	167	/* convert regulator output voltage to mV */
f5ce4a7a	168	*val = ret / 1000;
b12206e9	169	*val2 = adc->chip_info->resolution;
f5ce4a7a OA	170	ret = IIO_VAL_FRACTIONAL_LOG2;
f5ce4a7a OA	171	break;
f5ce4a7a OA	172	}
	173
	174	out:
	175	mutex_unlock(&adc->lock);
	176
	177	return ret;
	178	}
	179
	180	#define MCP320X_VOLTAGE_CHANNEL(num) \
	181	{ \
	182	.type = IIO_VOLTAGE, \
	183	.indexed = 1, \
	184	.channel = (num), \
	185	.address = (num), \
	186	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	187	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	188	}
	189
4ea71e5c	190	#define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2) \
f5ce4a7a OA	191	{ \
	192	.type = IIO_VOLTAGE, \
	193	.indexed = 1, \
4ea71e5c AM	194	.channel = (chan1), \
	195	.channel2 = (chan2), \
	196	.address = (chan1), \
f5ce4a7a OA	197	.differential = 1, \
	198	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	199	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	200	}
	201
b12206e9	202	static const struct iio_chan_spec mcp3201_channels[] = {
4ea71e5c	203	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
b12206e9 SA	204	};
	205
	206	static const struct iio_chan_spec mcp3202_channels[] = {
	207	MCP320X_VOLTAGE_CHANNEL(0),
	208	MCP320X_VOLTAGE_CHANNEL(1),
4ea71e5c AM	209	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
4ea71e5c AM	210	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
b12206e9 SA	211	};
b12206e9 SA	212
f5ce4a7a OA	213	static const struct iio_chan_spec mcp3204_channels[] = {
	214	MCP320X_VOLTAGE_CHANNEL(0),
	215	MCP320X_VOLTAGE_CHANNEL(1),
	216	MCP320X_VOLTAGE_CHANNEL(2),
	217	MCP320X_VOLTAGE_CHANNEL(3),
4ea71e5c AM	218	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	219	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
	220	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
	221	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
f5ce4a7a OA	222	};
	223
	224	static const struct iio_chan_spec mcp3208_channels[] = {
	225	MCP320X_VOLTAGE_CHANNEL(0),
	226	MCP320X_VOLTAGE_CHANNEL(1),
	227	MCP320X_VOLTAGE_CHANNEL(2),
	228	MCP320X_VOLTAGE_CHANNEL(3),
	229	MCP320X_VOLTAGE_CHANNEL(4),
	230	MCP320X_VOLTAGE_CHANNEL(5),
	231	MCP320X_VOLTAGE_CHANNEL(6),
	232	MCP320X_VOLTAGE_CHANNEL(7),
4ea71e5c AM	233	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
	234	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
	235	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
	236	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
	237	MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5),
	238	MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4),
	239	MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7),
	240	MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6),
f5ce4a7a OA	241	};
	242
	243	static const struct iio_info mcp320x_info = {
	244	.read_raw = mcp320x_read_raw,
	245	.driver_module = THIS_MODULE,
	246	};
	247
b12206e9 SA	248	static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
	249	[mcp3001] = {
	250	.channels = mcp3201_channels,
	251	.num_channels = ARRAY_SIZE(mcp3201_channels),
	252	.resolution = 10
	253	},
	254	[mcp3002] = {
	255	.channels = mcp3202_channels,
	256	.num_channels = ARRAY_SIZE(mcp3202_channels),
	257	.resolution = 10
	258	},
	259	[mcp3004] = {
	260	.channels = mcp3204_channels,
	261	.num_channels = ARRAY_SIZE(mcp3204_channels),
	262	.resolution = 10
	263	},
	264	[mcp3008] = {
	265	.channels = mcp3208_channels,
	266	.num_channels = ARRAY_SIZE(mcp3208_channels),
	267	.resolution = 10
	268	},
	269	[mcp3201] = {
	270	.channels = mcp3201_channels,
	271	.num_channels = ARRAY_SIZE(mcp3201_channels),
	272	.resolution = 12
	273	},
	274	[mcp3202] = {
	275	.channels = mcp3202_channels,
	276	.num_channels = ARRAY_SIZE(mcp3202_channels),
	277	.resolution = 12
	278	},
f5ce4a7a OA	279	[mcp3204] = {
f5ce4a7a OA	280	.channels = mcp3204_channels,
b12206e9 SA	281	.num_channels = ARRAY_SIZE(mcp3204_channels),
b12206e9 SA	282	.resolution = 12
f5ce4a7a OA	283	},
	284	[mcp3208] = {
	285	.channels = mcp3208_channels,
b12206e9 SA	286	.num_channels = ARRAY_SIZE(mcp3208_channels),
b12206e9 SA	287	.resolution = 12
f5ce4a7a	288	},
f686a36b AG	289	[mcp3301] = {
	290	.channels = mcp3201_channels,
	291	.num_channels = ARRAY_SIZE(mcp3201_channels),
	292	.resolution = 13
	293	},
f5ce4a7a OA	294	};
	295
	296	static int mcp320x_probe(struct spi_device *spi)
	297	{
	298	struct iio_dev *indio_dev;
	299	struct mcp320x *adc;
b12206e9	300	const struct mcp320x_chip_info *chip_info;
f5ce4a7a OA	301	int ret;
f5ce4a7a OA	302
a726dea5	303	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
f5ce4a7a OA	304	if (!indio_dev)
	305	return -ENOMEM;
	306
	307	adc = iio_priv(indio_dev);
	308	adc->spi = spi;
	309
	310	indio_dev->dev.parent = &spi->dev;
b541eaff	311	indio_dev->dev.of_node = spi->dev.of_node;
f5ce4a7a OA	312	indio_dev->name = spi_get_device_id(spi)->name;
	313	indio_dev->modes = INDIO_DIRECT_MODE;
	314	indio_dev->info = &mcp320x_info;
0964e409	315	spi_set_drvdata(spi, indio_dev);
f5ce4a7a	316
b12206e9	317	chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data];
f5ce4a7a OA	318	indio_dev->channels = chip_info->channels;
	319	indio_dev->num_channels = chip_info->num_channels;
	320
41be6a0d MS	321	adc->chip_info = chip_info;
41be6a0d MS	322
f5ce4a7a OA	323	adc->transfer[0].tx_buf = &adc->tx_buf;
	324	adc->transfer[0].len = sizeof(adc->tx_buf);
	325	adc->transfer[1].rx_buf = adc->rx_buf;
	326	adc->transfer[1].len = sizeof(adc->rx_buf);
	327
	328	spi_message_init_with_transfers(&adc->msg, adc->transfer,
	329	ARRAY_SIZE(adc->transfer));
	330
a726dea5 SK	331	adc->reg = devm_regulator_get(&spi->dev, "vref");
	332	if (IS_ERR(adc->reg))
	333	return PTR_ERR(adc->reg);
f5ce4a7a OA	334
	335	ret = regulator_enable(adc->reg);
	336	if (ret < 0)
a726dea5	337	return ret;
f5ce4a7a OA	338
	339	mutex_init(&adc->lock);
	340
	341	ret = iio_device_register(indio_dev);
	342	if (ret < 0)
	343	goto reg_disable;
	344
	345	return 0;
	346
	347	reg_disable:
	348	regulator_disable(adc->reg);
f5ce4a7a OA	349
	350	return ret;
	351	}
	352
	353	static int mcp320x_remove(struct spi_device *spi)
	354	{
	355	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	356	struct mcp320x *adc = iio_priv(indio_dev);
	357
	358	iio_device_unregister(indio_dev);
	359	regulator_disable(adc->reg);
f5ce4a7a OA	360
	361	return 0;
	362	}
	363
b12206e9 SA	364	#if defined(CONFIG_OF)
b12206e9 SA	365	static const struct of_device_id mcp320x_dt_ids[] = {
0d0e5384	366	/* NOTE: The use of compatibles with no vendor prefix is deprecated. */
b12206e9 SA	367	{
	368	.compatible = "mcp3001",
	369	.data = &mcp320x_chip_infos[mcp3001],
	370	}, {
	371	.compatible = "mcp3002",
	372	.data = &mcp320x_chip_infos[mcp3002],
	373	}, {
	374	.compatible = "mcp3004",
	375	.data = &mcp320x_chip_infos[mcp3004],
	376	}, {
	377	.compatible = "mcp3008",
	378	.data = &mcp320x_chip_infos[mcp3008],
	379	}, {
	380	.compatible = "mcp3201",
	381	.data = &mcp320x_chip_infos[mcp3201],
	382	}, {
	383	.compatible = "mcp3202",
	384	.data = &mcp320x_chip_infos[mcp3202],
	385	}, {
	386	.compatible = "mcp3204",
	387	.data = &mcp320x_chip_infos[mcp3204],
	388	}, {
	389	.compatible = "mcp3208",
	390	.data = &mcp320x_chip_infos[mcp3208],
f686a36b AG	391	}, {
	392	.compatible = "mcp3301",
	393	.data = &mcp320x_chip_infos[mcp3301],
0d0e5384 JMC	394	}, {
	395	.compatible = "microchip,mcp3001",
	396	.data = &mcp320x_chip_infos[mcp3001],
	397	}, {
	398	.compatible = "microchip,mcp3002",
	399	.data = &mcp320x_chip_infos[mcp3002],
	400	}, {
	401	.compatible = "microchip,mcp3004",
	402	.data = &mcp320x_chip_infos[mcp3004],
	403	}, {
	404	.compatible = "microchip,mcp3008",
	405	.data = &mcp320x_chip_infos[mcp3008],
	406	}, {
	407	.compatible = "microchip,mcp3201",
	408	.data = &mcp320x_chip_infos[mcp3201],
	409	}, {
	410	.compatible = "microchip,mcp3202",
	411	.data = &mcp320x_chip_infos[mcp3202],
	412	}, {
	413	.compatible = "microchip,mcp3204",
	414	.data = &mcp320x_chip_infos[mcp3204],
	415	}, {
	416	.compatible = "microchip,mcp3208",
	417	.data = &mcp320x_chip_infos[mcp3208],
	418	}, {
	419	.compatible = "microchip,mcp3301",
	420	.data = &mcp320x_chip_infos[mcp3301],
b12206e9 SA	421	}, {
	422	}
	423	};
	424	MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
	425	#endif
	426
f5ce4a7a	427	static const struct spi_device_id mcp320x_id[] = {
b12206e9 SA	428	{ "mcp3001", mcp3001 },
	429	{ "mcp3002", mcp3002 },
	430	{ "mcp3004", mcp3004 },
	431	{ "mcp3008", mcp3008 },
	432	{ "mcp3201", mcp3201 },
	433	{ "mcp3202", mcp3202 },
f5ce4a7a OA	434	{ "mcp3204", mcp3204 },
f5ce4a7a OA	435	{ "mcp3208", mcp3208 },
f686a36b	436	{ "mcp3301", mcp3301 },
f5ce4a7a OA	437	{ }
	438	};
	439	MODULE_DEVICE_TABLE(spi, mcp320x_id);
	440
	441	static struct spi_driver mcp320x_driver = {
	442	.driver = {
	443	.name = "mcp320x",
ab6ff6c6	444	.of_match_table = of_match_ptr(mcp320x_dt_ids),
f5ce4a7a OA	445	},
	446	.probe = mcp320x_probe,
	447	.remove = mcp320x_remove,
	448	.id_table = mcp320x_id,
	449	};
	450	module_spi_driver(mcp320x_driver);
	451
	452	MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
b12206e9	453	MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08");
f5ce4a7a	454	MODULE_LICENSE("GPL v2");