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1a4fbf6a SP |
1 | /* |
2 | * KXCJK-1013 3-axis accelerometer driver | |
3 | * Copyright (c) 2014, Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/i2c.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/bitops.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/string.h> | |
22 | #include <linux/acpi.h> | |
23 | #include <linux/gpio/consumer.h> | |
124e1b1d SP |
24 | #include <linux/pm.h> |
25 | #include <linux/pm_runtime.h> | |
1a4fbf6a SP |
26 | #include <linux/iio/iio.h> |
27 | #include <linux/iio/sysfs.h> | |
28 | #include <linux/iio/buffer.h> | |
29 | #include <linux/iio/trigger.h> | |
b4b491c0 | 30 | #include <linux/iio/events.h> |
1a4fbf6a SP |
31 | #include <linux/iio/trigger_consumer.h> |
32 | #include <linux/iio/triggered_buffer.h> | |
33 | #include <linux/iio/accel/kxcjk_1013.h> | |
34 | ||
35 | #define KXCJK1013_DRV_NAME "kxcjk1013" | |
36 | #define KXCJK1013_IRQ_NAME "kxcjk1013_event" | |
37 | ||
38 | #define KXCJK1013_REG_XOUT_L 0x06 | |
39 | /* | |
40 | * From low byte X axis register, all the other addresses of Y and Z can be | |
41 | * obtained by just applying axis offset. The following axis defines are just | |
42 | * provide clarity, but not used. | |
43 | */ | |
44 | #define KXCJK1013_REG_XOUT_H 0x07 | |
45 | #define KXCJK1013_REG_YOUT_L 0x08 | |
46 | #define KXCJK1013_REG_YOUT_H 0x09 | |
47 | #define KXCJK1013_REG_ZOUT_L 0x0A | |
48 | #define KXCJK1013_REG_ZOUT_H 0x0B | |
49 | ||
50 | #define KXCJK1013_REG_DCST_RESP 0x0C | |
51 | #define KXCJK1013_REG_WHO_AM_I 0x0F | |
52 | #define KXCJK1013_REG_INT_SRC1 0x16 | |
53 | #define KXCJK1013_REG_INT_SRC2 0x17 | |
54 | #define KXCJK1013_REG_STATUS_REG 0x18 | |
55 | #define KXCJK1013_REG_INT_REL 0x1A | |
56 | #define KXCJK1013_REG_CTRL1 0x1B | |
57 | #define KXCJK1013_REG_CTRL2 0x1D | |
58 | #define KXCJK1013_REG_INT_CTRL1 0x1E | |
59 | #define KXCJK1013_REG_INT_CTRL2 0x1F | |
60 | #define KXCJK1013_REG_DATA_CTRL 0x21 | |
61 | #define KXCJK1013_REG_WAKE_TIMER 0x29 | |
62 | #define KXCJK1013_REG_SELF_TEST 0x3A | |
63 | #define KXCJK1013_REG_WAKE_THRES 0x6A | |
64 | ||
65 | #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) | |
66 | #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) | |
67 | #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) | |
68 | #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) | |
69 | #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) | |
70 | #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) | |
71 | #define KXCJK1013_REG_INT_REG1_BIT_IEA BIT(4) | |
72 | #define KXCJK1013_REG_INT_REG1_BIT_IEN BIT(5) | |
73 | ||
74 | #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF | |
75 | #define KXCJK1013_MAX_STARTUP_TIME_US 100000 | |
76 | ||
124e1b1d SP |
77 | #define KXCJK1013_SLEEP_DELAY_MS 2000 |
78 | ||
b4b491c0 SP |
79 | #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) |
80 | #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) | |
81 | #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) | |
82 | #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) | |
83 | #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) | |
84 | #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) | |
85 | ||
86 | #define KXCJK1013_DEFAULT_WAKE_THRES 1 | |
87 | ||
c6861377 DB |
88 | enum kx_chipset { |
89 | KXCJK1013, | |
90 | KXCJ91008, | |
91 | KXTJ21009, | |
92 | KX_MAX_CHIPS /* this must be last */ | |
93 | }; | |
94 | ||
1a4fbf6a SP |
95 | struct kxcjk1013_data { |
96 | struct i2c_client *client; | |
b4b491c0 SP |
97 | struct iio_trigger *dready_trig; |
98 | struct iio_trigger *motion_trig; | |
1a4fbf6a SP |
99 | struct mutex mutex; |
100 | s16 buffer[8]; | |
1a4fbf6a | 101 | u8 odr_bits; |
a735e3d7 | 102 | u8 range; |
b4b491c0 SP |
103 | int wake_thres; |
104 | int wake_dur; | |
1a4fbf6a | 105 | bool active_high_intr; |
b4b491c0 SP |
106 | bool dready_trigger_on; |
107 | int ev_enable_state; | |
108 | bool motion_trigger_on; | |
109 | int64_t timestamp; | |
c6861377 | 110 | enum kx_chipset chipset; |
1a4fbf6a SP |
111 | }; |
112 | ||
113 | enum kxcjk1013_axis { | |
114 | AXIS_X, | |
115 | AXIS_Y, | |
116 | AXIS_Z, | |
117 | }; | |
118 | ||
119 | enum kxcjk1013_mode { | |
120 | STANDBY, | |
121 | OPERATION, | |
122 | }; | |
123 | ||
a735e3d7 SP |
124 | enum kxcjk1013_range { |
125 | KXCJK1013_RANGE_2G, | |
126 | KXCJK1013_RANGE_4G, | |
127 | KXCJK1013_RANGE_8G, | |
128 | }; | |
129 | ||
1a4fbf6a SP |
130 | static const struct { |
131 | int val; | |
132 | int val2; | |
133 | int odr_bits; | |
134 | } samp_freq_table[] = { {0, 781000, 0x08}, {1, 563000, 0x09}, | |
f0ca9749 | 135 | {3, 125000, 0x0A}, {6, 250000, 0x0B}, {12, 500000, 0}, |
1a4fbf6a SP |
136 | {25, 0, 0x01}, {50, 0, 0x02}, {100, 0, 0x03}, |
137 | {200, 0, 0x04}, {400, 0, 0x05}, {800, 0, 0x06}, | |
138 | {1600, 0, 0x07} }; | |
139 | ||
140 | /* Refer to section 4 of the specification */ | |
141 | static const struct { | |
142 | int odr_bits; | |
143 | int usec; | |
c6861377 DB |
144 | } odr_start_up_times[KX_MAX_CHIPS][12] = { |
145 | /* KXCJK-1013 */ | |
146 | { | |
147 | {0x08, 100000}, | |
148 | {0x09, 100000}, | |
149 | {0x0A, 100000}, | |
150 | {0x0B, 100000}, | |
151 | {0, 80000}, | |
152 | {0x01, 41000}, | |
153 | {0x02, 21000}, | |
154 | {0x03, 11000}, | |
155 | {0x04, 6400}, | |
156 | {0x05, 3900}, | |
157 | {0x06, 2700}, | |
158 | {0x07, 2100}, | |
159 | }, | |
160 | /* KXCJ9-1008 */ | |
161 | { | |
162 | {0x08, 100000}, | |
163 | {0x09, 100000}, | |
164 | {0x0A, 100000}, | |
165 | {0x0B, 100000}, | |
166 | {0, 80000}, | |
167 | {0x01, 41000}, | |
168 | {0x02, 21000}, | |
169 | {0x03, 11000}, | |
170 | {0x04, 6400}, | |
171 | {0x05, 3900}, | |
172 | {0x06, 2700}, | |
173 | {0x07, 2100}, | |
174 | }, | |
175 | /* KXCTJ2-1009 */ | |
176 | { | |
177 | {0x08, 1240000}, | |
178 | {0x09, 621000}, | |
179 | {0x0A, 309000}, | |
180 | {0x0B, 151000}, | |
181 | {0, 80000}, | |
182 | {0x01, 41000}, | |
183 | {0x02, 21000}, | |
184 | {0x03, 11000}, | |
185 | {0x04, 6000}, | |
186 | {0x05, 4000}, | |
187 | {0x06, 3000}, | |
188 | {0x07, 2000}, | |
189 | }, | |
190 | }; | |
1a4fbf6a | 191 | |
a735e3d7 SP |
192 | static const struct { |
193 | u16 scale; | |
194 | u8 gsel_0; | |
195 | u8 gsel_1; | |
196 | } KXCJK1013_scale_table[] = { {9582, 0, 0}, | |
197 | {19163, 1, 0}, | |
198 | {38326, 0, 1} }; | |
199 | ||
b4b491c0 SP |
200 | static const struct { |
201 | int val; | |
202 | int val2; | |
203 | int odr_bits; | |
204 | } wake_odr_data_rate_table[] = { {0, 781000, 0x00}, | |
205 | {1, 563000, 0x01}, | |
206 | {3, 125000, 0x02}, | |
207 | {6, 250000, 0x03}, | |
208 | {12, 500000, 0x04}, | |
209 | {25, 0, 0x05}, | |
210 | {50, 0, 0x06}, | |
211 | {100, 0, 0x06}, | |
212 | {200, 0, 0x06}, | |
213 | {400, 0, 0x06}, | |
214 | {800, 0, 0x06}, | |
215 | {1600, 0, 0x06} }; | |
216 | ||
1a4fbf6a SP |
217 | static int kxcjk1013_set_mode(struct kxcjk1013_data *data, |
218 | enum kxcjk1013_mode mode) | |
219 | { | |
220 | int ret; | |
221 | ||
222 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); | |
223 | if (ret < 0) { | |
224 | dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); | |
225 | return ret; | |
226 | } | |
227 | ||
228 | if (mode == STANDBY) | |
229 | ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; | |
230 | else | |
231 | ret |= KXCJK1013_REG_CTRL1_BIT_PC1; | |
232 | ||
233 | ret = i2c_smbus_write_byte_data(data->client, | |
234 | KXCJK1013_REG_CTRL1, ret); | |
235 | if (ret < 0) { | |
236 | dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); | |
237 | return ret; | |
238 | } | |
239 | ||
240 | return 0; | |
241 | } | |
242 | ||
124e1b1d SP |
243 | static int kxcjk1013_get_mode(struct kxcjk1013_data *data, |
244 | enum kxcjk1013_mode *mode) | |
245 | { | |
246 | int ret; | |
247 | ||
248 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); | |
249 | if (ret < 0) { | |
250 | dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); | |
251 | return ret; | |
252 | } | |
253 | ||
254 | if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) | |
255 | *mode = OPERATION; | |
256 | else | |
257 | *mode = STANDBY; | |
258 | ||
259 | return 0; | |
260 | } | |
261 | ||
a735e3d7 SP |
262 | static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) |
263 | { | |
264 | int ret; | |
265 | ||
266 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); | |
267 | if (ret < 0) { | |
268 | dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); | |
269 | return ret; | |
270 | } | |
271 | ||
e90dea6a DB |
272 | ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 | |
273 | KXCJK1013_REG_CTRL1_BIT_GSEL1); | |
a735e3d7 SP |
274 | ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); |
275 | ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); | |
276 | ||
277 | ret = i2c_smbus_write_byte_data(data->client, | |
278 | KXCJK1013_REG_CTRL1, | |
279 | ret); | |
280 | if (ret < 0) { | |
281 | dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); | |
282 | return ret; | |
283 | } | |
284 | ||
285 | data->range = range_index; | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
1a4fbf6a SP |
290 | static int kxcjk1013_chip_init(struct kxcjk1013_data *data) |
291 | { | |
292 | int ret; | |
293 | ||
294 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); | |
295 | if (ret < 0) { | |
296 | dev_err(&data->client->dev, "Error reading who_am_i\n"); | |
297 | return ret; | |
298 | } | |
299 | ||
300 | dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); | |
301 | ||
302 | ret = kxcjk1013_set_mode(data, STANDBY); | |
303 | if (ret < 0) | |
304 | return ret; | |
305 | ||
306 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); | |
307 | if (ret < 0) { | |
308 | dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); | |
309 | return ret; | |
310 | } | |
311 | ||
1a4fbf6a SP |
312 | /* Set 12 bit mode */ |
313 | ret |= KXCJK1013_REG_CTRL1_BIT_RES; | |
314 | ||
315 | ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1, | |
316 | ret); | |
317 | if (ret < 0) { | |
318 | dev_err(&data->client->dev, "Error reading reg_ctrl\n"); | |
319 | return ret; | |
320 | } | |
321 | ||
a735e3d7 SP |
322 | /* Setting range to 4G */ |
323 | ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); | |
324 | if (ret < 0) | |
325 | return ret; | |
326 | ||
1a4fbf6a SP |
327 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL); |
328 | if (ret < 0) { | |
329 | dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); | |
330 | return ret; | |
331 | } | |
332 | ||
333 | data->odr_bits = ret; | |
334 | ||
335 | /* Set up INT polarity */ | |
336 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); | |
337 | if (ret < 0) { | |
338 | dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); | |
339 | return ret; | |
340 | } | |
341 | ||
342 | if (data->active_high_intr) | |
343 | ret |= KXCJK1013_REG_INT_REG1_BIT_IEA; | |
344 | else | |
345 | ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEA; | |
346 | ||
347 | ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, | |
348 | ret); | |
349 | if (ret < 0) { | |
350 | dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); | |
351 | return ret; | |
352 | } | |
353 | ||
124e1b1d SP |
354 | ret = kxcjk1013_set_mode(data, OPERATION); |
355 | if (ret < 0) | |
356 | return ret; | |
357 | ||
b4b491c0 SP |
358 | data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; |
359 | ||
124e1b1d SP |
360 | return 0; |
361 | } | |
362 | ||
c9bf2373 | 363 | #ifdef CONFIG_PM_RUNTIME |
124e1b1d SP |
364 | static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) |
365 | { | |
366 | int i; | |
c6861377 | 367 | int idx = data->chipset; |
124e1b1d | 368 | |
c6861377 DB |
369 | for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) { |
370 | if (odr_start_up_times[idx][i].odr_bits == data->odr_bits) | |
371 | return odr_start_up_times[idx][i].usec; | |
124e1b1d SP |
372 | } |
373 | ||
374 | return KXCJK1013_MAX_STARTUP_TIME_US; | |
375 | } | |
c9bf2373 | 376 | #endif |
124e1b1d SP |
377 | |
378 | static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) | |
379 | { | |
380 | int ret; | |
381 | ||
382 | if (on) | |
383 | ret = pm_runtime_get_sync(&data->client->dev); | |
384 | else { | |
385 | pm_runtime_mark_last_busy(&data->client->dev); | |
386 | ret = pm_runtime_put_autosuspend(&data->client->dev); | |
387 | } | |
388 | if (ret < 0) { | |
389 | dev_err(&data->client->dev, | |
390 | "Failed: kxcjk1013_set_power_state for %d\n", on); | |
391 | return ret; | |
392 | } | |
393 | ||
1a4fbf6a SP |
394 | return 0; |
395 | } | |
396 | ||
b4b491c0 SP |
397 | static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) |
398 | { | |
399 | int ret; | |
400 | ||
401 | ret = i2c_smbus_write_byte_data(data->client, | |
402 | KXCJK1013_REG_WAKE_TIMER, | |
403 | data->wake_dur); | |
404 | if (ret < 0) { | |
405 | dev_err(&data->client->dev, | |
406 | "Error writing reg_wake_timer\n"); | |
407 | return ret; | |
408 | } | |
409 | ||
410 | ret = i2c_smbus_write_byte_data(data->client, | |
411 | KXCJK1013_REG_WAKE_THRES, | |
412 | data->wake_thres); | |
413 | if (ret < 0) { | |
414 | dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); | |
415 | return ret; | |
416 | } | |
417 | ||
418 | return 0; | |
419 | } | |
420 | ||
421 | static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data, | |
422 | bool status) | |
423 | { | |
424 | int ret; | |
425 | enum kxcjk1013_mode store_mode; | |
426 | ||
427 | ret = kxcjk1013_get_mode(data, &store_mode); | |
428 | if (ret < 0) | |
429 | return ret; | |
430 | ||
431 | /* This is requirement by spec to change state to STANDBY */ | |
432 | ret = kxcjk1013_set_mode(data, STANDBY); | |
433 | if (ret < 0) | |
434 | return ret; | |
435 | ||
436 | ret = kxcjk1013_chip_update_thresholds(data); | |
437 | if (ret < 0) | |
438 | return ret; | |
439 | ||
440 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); | |
441 | if (ret < 0) { | |
442 | dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); | |
443 | return ret; | |
444 | } | |
445 | ||
446 | if (status) | |
447 | ret |= KXCJK1013_REG_INT_REG1_BIT_IEN; | |
448 | else | |
449 | ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN; | |
450 | ||
451 | ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, | |
452 | ret); | |
453 | if (ret < 0) { | |
454 | dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); | |
455 | return ret; | |
456 | } | |
457 | ||
458 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); | |
459 | if (ret < 0) { | |
460 | dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); | |
461 | return ret; | |
462 | } | |
463 | ||
464 | if (status) | |
465 | ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; | |
466 | else | |
467 | ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; | |
468 | ||
469 | ret = i2c_smbus_write_byte_data(data->client, | |
470 | KXCJK1013_REG_CTRL1, ret); | |
471 | if (ret < 0) { | |
472 | dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); | |
473 | return ret; | |
474 | } | |
475 | ||
476 | if (store_mode == OPERATION) { | |
477 | ret = kxcjk1013_set_mode(data, OPERATION); | |
478 | if (ret < 0) | |
479 | return ret; | |
480 | } | |
481 | ||
482 | return 0; | |
483 | } | |
484 | ||
485 | static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data, | |
486 | bool status) | |
1a4fbf6a SP |
487 | { |
488 | int ret; | |
124e1b1d SP |
489 | enum kxcjk1013_mode store_mode; |
490 | ||
491 | ret = kxcjk1013_get_mode(data, &store_mode); | |
492 | if (ret < 0) | |
493 | return ret; | |
1a4fbf6a SP |
494 | |
495 | /* This is requirement by spec to change state to STANDBY */ | |
496 | ret = kxcjk1013_set_mode(data, STANDBY); | |
497 | if (ret < 0) | |
498 | return ret; | |
499 | ||
500 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); | |
501 | if (ret < 0) { | |
502 | dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); | |
503 | return ret; | |
504 | } | |
505 | ||
506 | if (status) | |
507 | ret |= KXCJK1013_REG_INT_REG1_BIT_IEN; | |
508 | else | |
509 | ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN; | |
510 | ||
511 | ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, | |
512 | ret); | |
513 | if (ret < 0) { | |
514 | dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); | |
515 | return ret; | |
516 | } | |
517 | ||
518 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); | |
519 | if (ret < 0) { | |
520 | dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); | |
521 | return ret; | |
522 | } | |
523 | ||
524 | if (status) | |
525 | ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; | |
526 | else | |
527 | ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; | |
528 | ||
529 | ret = i2c_smbus_write_byte_data(data->client, | |
530 | KXCJK1013_REG_CTRL1, ret); | |
531 | if (ret < 0) { | |
532 | dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); | |
533 | return ret; | |
534 | } | |
535 | ||
124e1b1d SP |
536 | if (store_mode == OPERATION) { |
537 | ret = kxcjk1013_set_mode(data, OPERATION); | |
538 | if (ret < 0) | |
539 | return ret; | |
540 | } | |
541 | ||
542 | return 0; | |
1a4fbf6a SP |
543 | } |
544 | ||
545 | static int kxcjk1013_convert_freq_to_bit(int val, int val2) | |
546 | { | |
547 | int i; | |
548 | ||
549 | for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) { | |
550 | if (samp_freq_table[i].val == val && | |
551 | samp_freq_table[i].val2 == val2) { | |
552 | return samp_freq_table[i].odr_bits; | |
553 | } | |
554 | } | |
555 | ||
556 | return -EINVAL; | |
557 | } | |
558 | ||
b4b491c0 SP |
559 | static int kxcjk1013_convert_wake_odr_to_bit(int val, int val2) |
560 | { | |
561 | int i; | |
562 | ||
563 | for (i = 0; i < ARRAY_SIZE(wake_odr_data_rate_table); ++i) { | |
564 | if (wake_odr_data_rate_table[i].val == val && | |
565 | wake_odr_data_rate_table[i].val2 == val2) { | |
566 | return wake_odr_data_rate_table[i].odr_bits; | |
567 | } | |
568 | } | |
569 | ||
570 | return -EINVAL; | |
571 | } | |
572 | ||
1a4fbf6a SP |
573 | static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) |
574 | { | |
575 | int ret; | |
576 | int odr_bits; | |
124e1b1d SP |
577 | enum kxcjk1013_mode store_mode; |
578 | ||
579 | ret = kxcjk1013_get_mode(data, &store_mode); | |
580 | if (ret < 0) | |
581 | return ret; | |
1a4fbf6a SP |
582 | |
583 | odr_bits = kxcjk1013_convert_freq_to_bit(val, val2); | |
584 | if (odr_bits < 0) | |
585 | return odr_bits; | |
586 | ||
587 | /* To change ODR, the chip must be set to STANDBY as per spec */ | |
588 | ret = kxcjk1013_set_mode(data, STANDBY); | |
589 | if (ret < 0) | |
590 | return ret; | |
591 | ||
592 | ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL, | |
593 | odr_bits); | |
594 | if (ret < 0) { | |
595 | dev_err(&data->client->dev, "Error writing data_ctrl\n"); | |
596 | return ret; | |
597 | } | |
598 | ||
599 | data->odr_bits = odr_bits; | |
600 | ||
b4b491c0 SP |
601 | odr_bits = kxcjk1013_convert_wake_odr_to_bit(val, val2); |
602 | if (odr_bits < 0) | |
603 | return odr_bits; | |
604 | ||
605 | ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2, | |
606 | odr_bits); | |
607 | if (ret < 0) { | |
608 | dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); | |
609 | return ret; | |
610 | } | |
611 | ||
124e1b1d | 612 | if (store_mode == OPERATION) { |
1a4fbf6a SP |
613 | ret = kxcjk1013_set_mode(data, OPERATION); |
614 | if (ret < 0) | |
615 | return ret; | |
616 | } | |
617 | ||
618 | return 0; | |
619 | } | |
620 | ||
621 | static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) | |
622 | { | |
623 | int i; | |
624 | ||
625 | for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) { | |
626 | if (samp_freq_table[i].odr_bits == data->odr_bits) { | |
627 | *val = samp_freq_table[i].val; | |
628 | *val2 = samp_freq_table[i].val2; | |
629 | return IIO_VAL_INT_PLUS_MICRO; | |
630 | } | |
631 | } | |
632 | ||
633 | return -EINVAL; | |
634 | } | |
635 | ||
636 | static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) | |
637 | { | |
638 | u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; | |
639 | int ret; | |
640 | ||
641 | ret = i2c_smbus_read_word_data(data->client, reg); | |
642 | if (ret < 0) { | |
643 | dev_err(&data->client->dev, | |
644 | "failed to read accel_%c registers\n", 'x' + axis); | |
645 | return ret; | |
646 | } | |
647 | ||
648 | return ret; | |
649 | } | |
650 | ||
a735e3d7 SP |
651 | static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) |
652 | { | |
653 | int ret, i; | |
654 | enum kxcjk1013_mode store_mode; | |
655 | ||
656 | ||
657 | for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { | |
658 | if (KXCJK1013_scale_table[i].scale == val) { | |
659 | ||
660 | ret = kxcjk1013_get_mode(data, &store_mode); | |
661 | if (ret < 0) | |
662 | return ret; | |
663 | ||
664 | ret = kxcjk1013_set_mode(data, STANDBY); | |
665 | if (ret < 0) | |
666 | return ret; | |
667 | ||
668 | ret = kxcjk1013_set_range(data, i); | |
669 | if (ret < 0) | |
670 | return ret; | |
671 | ||
672 | if (store_mode == OPERATION) { | |
673 | ret = kxcjk1013_set_mode(data, OPERATION); | |
674 | if (ret) | |
675 | return ret; | |
676 | } | |
677 | ||
678 | return 0; | |
679 | } | |
680 | } | |
681 | ||
682 | return -EINVAL; | |
683 | } | |
684 | ||
1a4fbf6a SP |
685 | static int kxcjk1013_read_raw(struct iio_dev *indio_dev, |
686 | struct iio_chan_spec const *chan, int *val, | |
687 | int *val2, long mask) | |
688 | { | |
689 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
690 | int ret; | |
691 | ||
692 | switch (mask) { | |
693 | case IIO_CHAN_INFO_RAW: | |
694 | mutex_lock(&data->mutex); | |
695 | if (iio_buffer_enabled(indio_dev)) | |
696 | ret = -EBUSY; | |
697 | else { | |
124e1b1d | 698 | ret = kxcjk1013_set_power_state(data, true); |
88f6da77 SP |
699 | if (ret < 0) { |
700 | mutex_unlock(&data->mutex); | |
1a4fbf6a | 701 | return ret; |
88f6da77 | 702 | } |
1a4fbf6a | 703 | ret = kxcjk1013_get_acc_reg(data, chan->scan_index); |
124e1b1d SP |
704 | if (ret < 0) { |
705 | kxcjk1013_set_power_state(data, false); | |
706 | mutex_unlock(&data->mutex); | |
707 | return ret; | |
708 | } | |
709 | *val = sign_extend32(ret >> 4, 11); | |
710 | ret = kxcjk1013_set_power_state(data, false); | |
1a4fbf6a SP |
711 | } |
712 | mutex_unlock(&data->mutex); | |
713 | ||
714 | if (ret < 0) | |
715 | return ret; | |
716 | ||
1a4fbf6a SP |
717 | return IIO_VAL_INT; |
718 | ||
719 | case IIO_CHAN_INFO_SCALE: | |
720 | *val = 0; | |
a735e3d7 | 721 | *val2 = KXCJK1013_scale_table[data->range].scale; |
1a4fbf6a SP |
722 | return IIO_VAL_INT_PLUS_MICRO; |
723 | ||
724 | case IIO_CHAN_INFO_SAMP_FREQ: | |
725 | mutex_lock(&data->mutex); | |
726 | ret = kxcjk1013_get_odr(data, val, val2); | |
727 | mutex_unlock(&data->mutex); | |
728 | return ret; | |
729 | ||
730 | default: | |
731 | return -EINVAL; | |
732 | } | |
733 | } | |
734 | ||
735 | static int kxcjk1013_write_raw(struct iio_dev *indio_dev, | |
736 | struct iio_chan_spec const *chan, int val, | |
737 | int val2, long mask) | |
738 | { | |
739 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
740 | int ret; | |
741 | ||
742 | switch (mask) { | |
743 | case IIO_CHAN_INFO_SAMP_FREQ: | |
744 | mutex_lock(&data->mutex); | |
745 | ret = kxcjk1013_set_odr(data, val, val2); | |
746 | mutex_unlock(&data->mutex); | |
747 | break; | |
a735e3d7 SP |
748 | case IIO_CHAN_INFO_SCALE: |
749 | if (val) | |
750 | return -EINVAL; | |
751 | ||
752 | mutex_lock(&data->mutex); | |
753 | ret = kxcjk1013_set_scale(data, val2); | |
754 | mutex_unlock(&data->mutex); | |
755 | break; | |
1a4fbf6a SP |
756 | default: |
757 | ret = -EINVAL; | |
758 | } | |
759 | ||
760 | return ret; | |
761 | } | |
762 | ||
b4b491c0 SP |
763 | static int kxcjk1013_read_event(struct iio_dev *indio_dev, |
764 | const struct iio_chan_spec *chan, | |
765 | enum iio_event_type type, | |
766 | enum iio_event_direction dir, | |
767 | enum iio_event_info info, | |
768 | int *val, int *val2) | |
769 | { | |
770 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
771 | ||
772 | *val2 = 0; | |
773 | switch (info) { | |
774 | case IIO_EV_INFO_VALUE: | |
775 | *val = data->wake_thres; | |
776 | break; | |
777 | case IIO_EV_INFO_PERIOD: | |
778 | *val = data->wake_dur; | |
779 | break; | |
780 | default: | |
781 | return -EINVAL; | |
782 | } | |
783 | ||
784 | return IIO_VAL_INT; | |
785 | } | |
786 | ||
787 | static int kxcjk1013_write_event(struct iio_dev *indio_dev, | |
788 | const struct iio_chan_spec *chan, | |
789 | enum iio_event_type type, | |
790 | enum iio_event_direction dir, | |
791 | enum iio_event_info info, | |
792 | int val, int val2) | |
793 | { | |
794 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
795 | ||
796 | if (data->ev_enable_state) | |
797 | return -EBUSY; | |
798 | ||
799 | switch (info) { | |
800 | case IIO_EV_INFO_VALUE: | |
801 | data->wake_thres = val; | |
802 | break; | |
803 | case IIO_EV_INFO_PERIOD: | |
804 | data->wake_dur = val; | |
805 | break; | |
806 | default: | |
807 | return -EINVAL; | |
808 | } | |
809 | ||
810 | return 0; | |
811 | } | |
812 | ||
813 | static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, | |
814 | const struct iio_chan_spec *chan, | |
815 | enum iio_event_type type, | |
816 | enum iio_event_direction dir) | |
817 | { | |
818 | ||
819 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
820 | ||
821 | return data->ev_enable_state; | |
822 | } | |
823 | ||
824 | static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, | |
825 | const struct iio_chan_spec *chan, | |
826 | enum iio_event_type type, | |
827 | enum iio_event_direction dir, | |
828 | int state) | |
829 | { | |
830 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
831 | int ret; | |
832 | ||
833 | if (state && data->ev_enable_state) | |
834 | return 0; | |
835 | ||
836 | mutex_lock(&data->mutex); | |
837 | ||
838 | if (!state && data->motion_trigger_on) { | |
839 | data->ev_enable_state = 0; | |
840 | mutex_unlock(&data->mutex); | |
841 | return 0; | |
842 | } | |
843 | ||
844 | /* | |
845 | * We will expect the enable and disable to do operation in | |
846 | * in reverse order. This will happen here anyway as our | |
847 | * resume operation uses sync mode runtime pm calls, the | |
848 | * suspend operation will be delayed by autosuspend delay | |
849 | * So the disable operation will still happen in reverse of | |
850 | * enable operation. When runtime pm is disabled the mode | |
851 | * is always on so sequence doesn't matter | |
852 | */ | |
853 | ret = kxcjk1013_set_power_state(data, state); | |
854 | if (ret < 0) { | |
855 | mutex_unlock(&data->mutex); | |
856 | return ret; | |
857 | } | |
858 | ||
859 | ret = kxcjk1013_setup_any_motion_interrupt(data, state); | |
860 | if (ret < 0) { | |
861 | mutex_unlock(&data->mutex); | |
862 | return ret; | |
863 | } | |
864 | ||
865 | data->ev_enable_state = state; | |
866 | mutex_unlock(&data->mutex); | |
867 | ||
868 | return 0; | |
869 | } | |
870 | ||
1a4fbf6a SP |
871 | static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev, |
872 | struct iio_trigger *trig) | |
873 | { | |
874 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
875 | ||
b4b491c0 | 876 | if (data->dready_trig != trig && data->motion_trig != trig) |
1a4fbf6a SP |
877 | return -EINVAL; |
878 | ||
879 | return 0; | |
880 | } | |
881 | ||
882 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( | |
883 | "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"); | |
884 | ||
a735e3d7 SP |
885 | static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); |
886 | ||
1a4fbf6a SP |
887 | static struct attribute *kxcjk1013_attributes[] = { |
888 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, | |
a735e3d7 | 889 | &iio_const_attr_in_accel_scale_available.dev_attr.attr, |
1a4fbf6a SP |
890 | NULL, |
891 | }; | |
892 | ||
893 | static const struct attribute_group kxcjk1013_attrs_group = { | |
894 | .attrs = kxcjk1013_attributes, | |
895 | }; | |
896 | ||
b4b491c0 SP |
897 | static const struct iio_event_spec kxcjk1013_event = { |
898 | .type = IIO_EV_TYPE_THRESH, | |
25afffe1 | 899 | .dir = IIO_EV_DIR_EITHER, |
b4b491c0 SP |
900 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | |
901 | BIT(IIO_EV_INFO_ENABLE) | | |
902 | BIT(IIO_EV_INFO_PERIOD) | |
903 | }; | |
904 | ||
1a4fbf6a SP |
905 | #define KXCJK1013_CHANNEL(_axis) { \ |
906 | .type = IIO_ACCEL, \ | |
907 | .modified = 1, \ | |
908 | .channel2 = IIO_MOD_##_axis, \ | |
909 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ | |
910 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ | |
911 | BIT(IIO_CHAN_INFO_SAMP_FREQ), \ | |
912 | .scan_index = AXIS_##_axis, \ | |
913 | .scan_type = { \ | |
914 | .sign = 's', \ | |
915 | .realbits = 12, \ | |
916 | .storagebits = 16, \ | |
917 | .shift = 4, \ | |
f4e2f94d | 918 | .endianness = IIO_CPU, \ |
1a4fbf6a | 919 | }, \ |
b4b491c0 SP |
920 | .event_spec = &kxcjk1013_event, \ |
921 | .num_event_specs = 1 \ | |
1a4fbf6a SP |
922 | } |
923 | ||
924 | static const struct iio_chan_spec kxcjk1013_channels[] = { | |
925 | KXCJK1013_CHANNEL(X), | |
926 | KXCJK1013_CHANNEL(Y), | |
927 | KXCJK1013_CHANNEL(Z), | |
928 | IIO_CHAN_SOFT_TIMESTAMP(3), | |
929 | }; | |
930 | ||
931 | static const struct iio_info kxcjk1013_info = { | |
932 | .attrs = &kxcjk1013_attrs_group, | |
933 | .read_raw = kxcjk1013_read_raw, | |
934 | .write_raw = kxcjk1013_write_raw, | |
b4b491c0 SP |
935 | .read_event_value = kxcjk1013_read_event, |
936 | .write_event_value = kxcjk1013_write_event, | |
937 | .write_event_config = kxcjk1013_write_event_config, | |
938 | .read_event_config = kxcjk1013_read_event_config, | |
1a4fbf6a SP |
939 | .validate_trigger = kxcjk1013_validate_trigger, |
940 | .driver_module = THIS_MODULE, | |
941 | }; | |
942 | ||
943 | static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) | |
944 | { | |
945 | struct iio_poll_func *pf = p; | |
946 | struct iio_dev *indio_dev = pf->indio_dev; | |
947 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
948 | int bit, ret, i = 0; | |
949 | ||
950 | mutex_lock(&data->mutex); | |
951 | ||
952 | for_each_set_bit(bit, indio_dev->buffer->scan_mask, | |
953 | indio_dev->masklength) { | |
954 | ret = kxcjk1013_get_acc_reg(data, bit); | |
955 | if (ret < 0) { | |
1a4fbf6a SP |
956 | mutex_unlock(&data->mutex); |
957 | goto err; | |
958 | } | |
959 | data->buffer[i++] = ret; | |
960 | } | |
1a4fbf6a SP |
961 | mutex_unlock(&data->mutex); |
962 | ||
963 | iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, | |
b4b491c0 | 964 | data->timestamp); |
1a4fbf6a SP |
965 | err: |
966 | iio_trigger_notify_done(indio_dev->trig); | |
967 | ||
968 | return IRQ_HANDLED; | |
969 | } | |
970 | ||
59bfeaba SP |
971 | static int kxcjk1013_trig_try_reen(struct iio_trigger *trig) |
972 | { | |
973 | struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); | |
974 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
975 | int ret; | |
976 | ||
977 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); | |
978 | if (ret < 0) { | |
979 | dev_err(&data->client->dev, "Error reading reg_int_rel\n"); | |
980 | return ret; | |
981 | } | |
982 | ||
983 | return 0; | |
984 | } | |
985 | ||
1a4fbf6a SP |
986 | static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, |
987 | bool state) | |
988 | { | |
989 | struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); | |
990 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
124e1b1d SP |
991 | int ret; |
992 | ||
b4b491c0 SP |
993 | mutex_lock(&data->mutex); |
994 | ||
995 | if (!state && data->ev_enable_state && data->motion_trigger_on) { | |
996 | data->motion_trigger_on = false; | |
997 | mutex_unlock(&data->mutex); | |
124e1b1d | 998 | return 0; |
b4b491c0 | 999 | } |
1a4fbf6a | 1000 | |
b4b491c0 SP |
1001 | ret = kxcjk1013_set_power_state(data, state); |
1002 | if (ret < 0) { | |
1003 | mutex_unlock(&data->mutex); | |
1004 | return ret; | |
1a4fbf6a | 1005 | } |
b4b491c0 SP |
1006 | if (data->motion_trig == trig) |
1007 | ret = kxcjk1013_setup_any_motion_interrupt(data, state); | |
1008 | else | |
1009 | ret = kxcjk1013_setup_new_data_interrupt(data, state); | |
1010 | if (ret < 0) { | |
1011 | mutex_unlock(&data->mutex); | |
1012 | return ret; | |
1013 | } | |
1014 | if (data->motion_trig == trig) | |
1015 | data->motion_trigger_on = state; | |
1016 | else | |
1017 | data->dready_trigger_on = state; | |
1018 | ||
1a4fbf6a SP |
1019 | mutex_unlock(&data->mutex); |
1020 | ||
1021 | return 0; | |
1022 | } | |
1023 | ||
1024 | static const struct iio_trigger_ops kxcjk1013_trigger_ops = { | |
1025 | .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, | |
59bfeaba | 1026 | .try_reenable = kxcjk1013_trig_try_reen, |
1a4fbf6a SP |
1027 | .owner = THIS_MODULE, |
1028 | }; | |
1029 | ||
b4b491c0 SP |
1030 | static irqreturn_t kxcjk1013_event_handler(int irq, void *private) |
1031 | { | |
1032 | struct iio_dev *indio_dev = private; | |
1033 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
1034 | int ret; | |
1035 | ||
1036 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1); | |
1037 | if (ret < 0) { | |
1038 | dev_err(&data->client->dev, "Error reading reg_int_src1\n"); | |
1039 | goto ack_intr; | |
1040 | } | |
1041 | ||
1042 | if (ret & 0x02) { | |
1043 | ret = i2c_smbus_read_byte_data(data->client, | |
1044 | KXCJK1013_REG_INT_SRC2); | |
1045 | if (ret < 0) { | |
1046 | dev_err(&data->client->dev, | |
1047 | "Error reading reg_int_src2\n"); | |
1048 | goto ack_intr; | |
1049 | } | |
1050 | ||
1051 | if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) | |
1052 | iio_push_event(indio_dev, | |
1053 | IIO_MOD_EVENT_CODE(IIO_ACCEL, | |
1054 | 0, | |
1055 | IIO_MOD_X, | |
1056 | IIO_EV_TYPE_THRESH, | |
1057 | IIO_EV_DIR_FALLING), | |
1058 | data->timestamp); | |
1059 | if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) | |
1060 | iio_push_event(indio_dev, | |
1061 | IIO_MOD_EVENT_CODE(IIO_ACCEL, | |
1062 | 0, | |
1063 | IIO_MOD_X, | |
1064 | IIO_EV_TYPE_THRESH, | |
1065 | IIO_EV_DIR_RISING), | |
1066 | data->timestamp); | |
1067 | ||
1068 | ||
1069 | if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) | |
1070 | iio_push_event(indio_dev, | |
1071 | IIO_MOD_EVENT_CODE(IIO_ACCEL, | |
1072 | 0, | |
1073 | IIO_MOD_Y, | |
1074 | IIO_EV_TYPE_THRESH, | |
1075 | IIO_EV_DIR_FALLING), | |
1076 | data->timestamp); | |
1077 | if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) | |
1078 | iio_push_event(indio_dev, | |
1079 | IIO_MOD_EVENT_CODE(IIO_ACCEL, | |
1080 | 0, | |
1081 | IIO_MOD_Y, | |
1082 | IIO_EV_TYPE_THRESH, | |
1083 | IIO_EV_DIR_RISING), | |
1084 | data->timestamp); | |
1085 | ||
1086 | if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) | |
1087 | iio_push_event(indio_dev, | |
1088 | IIO_MOD_EVENT_CODE(IIO_ACCEL, | |
1089 | 0, | |
1090 | IIO_MOD_Z, | |
1091 | IIO_EV_TYPE_THRESH, | |
1092 | IIO_EV_DIR_FALLING), | |
1093 | data->timestamp); | |
1094 | if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) | |
1095 | iio_push_event(indio_dev, | |
1096 | IIO_MOD_EVENT_CODE(IIO_ACCEL, | |
1097 | 0, | |
1098 | IIO_MOD_Z, | |
1099 | IIO_EV_TYPE_THRESH, | |
1100 | IIO_EV_DIR_RISING), | |
1101 | data->timestamp); | |
1102 | } | |
1103 | ||
1104 | ack_intr: | |
1105 | if (data->dready_trigger_on) | |
1106 | return IRQ_HANDLED; | |
1107 | ||
1108 | ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); | |
1109 | if (ret < 0) | |
1110 | dev_err(&data->client->dev, "Error reading reg_int_rel\n"); | |
1111 | ||
1112 | return IRQ_HANDLED; | |
1113 | } | |
1114 | ||
1115 | static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) | |
1116 | { | |
1117 | struct iio_dev *indio_dev = private; | |
1118 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
1119 | ||
1120 | data->timestamp = iio_get_time_ns(); | |
1121 | ||
1122 | if (data->dready_trigger_on) | |
1123 | iio_trigger_poll(data->dready_trig); | |
1124 | else if (data->motion_trigger_on) | |
1125 | iio_trigger_poll(data->motion_trig); | |
1126 | ||
1127 | if (data->ev_enable_state) | |
1128 | return IRQ_WAKE_THREAD; | |
1129 | else | |
1130 | return IRQ_HANDLED; | |
1131 | } | |
1132 | ||
c6861377 DB |
1133 | static const char *kxcjk1013_match_acpi_device(struct device *dev, |
1134 | enum kx_chipset *chipset) | |
1a4fbf6a SP |
1135 | { |
1136 | const struct acpi_device_id *id; | |
c6861377 DB |
1137 | id = acpi_match_device(dev->driver->acpi_match_table, dev); |
1138 | if (!id) | |
1139 | return NULL; | |
1140 | *chipset = (enum kx_chipset)id->driver_data; | |
1141 | ||
1142 | return dev_name(dev); | |
1143 | } | |
1144 | ||
1145 | static int kxcjk1013_gpio_probe(struct i2c_client *client, | |
1146 | struct kxcjk1013_data *data) | |
1147 | { | |
1a4fbf6a SP |
1148 | struct device *dev; |
1149 | struct gpio_desc *gpio; | |
1150 | int ret; | |
1151 | ||
1152 | if (!client) | |
1153 | return -EINVAL; | |
1154 | ||
1155 | dev = &client->dev; | |
1a4fbf6a SP |
1156 | |
1157 | /* data ready gpio interrupt pin */ | |
1158 | gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0); | |
1159 | if (IS_ERR(gpio)) { | |
1160 | dev_err(dev, "acpi gpio get index failed\n"); | |
1161 | return PTR_ERR(gpio); | |
1162 | } | |
1163 | ||
1164 | ret = gpiod_direction_input(gpio); | |
1165 | if (ret) | |
1166 | return ret; | |
1167 | ||
1168 | ret = gpiod_to_irq(gpio); | |
1169 | ||
1170 | dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret); | |
1171 | ||
1172 | return ret; | |
1173 | } | |
1174 | ||
1175 | static int kxcjk1013_probe(struct i2c_client *client, | |
1176 | const struct i2c_device_id *id) | |
1177 | { | |
1178 | struct kxcjk1013_data *data; | |
1179 | struct iio_dev *indio_dev; | |
1a4fbf6a | 1180 | struct kxcjk_1013_platform_data *pdata; |
c6861377 | 1181 | const char *name; |
1a4fbf6a SP |
1182 | int ret; |
1183 | ||
1184 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); | |
1185 | if (!indio_dev) | |
1186 | return -ENOMEM; | |
1187 | ||
1188 | data = iio_priv(indio_dev); | |
1189 | i2c_set_clientdata(client, indio_dev); | |
1190 | data->client = client; | |
1191 | ||
1192 | pdata = dev_get_platdata(&client->dev); | |
1193 | if (pdata) | |
1194 | data->active_high_intr = pdata->active_high_intr; | |
1195 | else | |
1196 | data->active_high_intr = true; /* default polarity */ | |
1197 | ||
c6861377 DB |
1198 | if (id) { |
1199 | data->chipset = (enum kx_chipset)(id->driver_data); | |
1200 | name = id->name; | |
1201 | } else if (ACPI_HANDLE(&client->dev)) { | |
1202 | name = kxcjk1013_match_acpi_device(&client->dev, | |
1203 | &data->chipset); | |
1204 | } else | |
1205 | return -ENODEV; | |
1206 | ||
1a4fbf6a SP |
1207 | ret = kxcjk1013_chip_init(data); |
1208 | if (ret < 0) | |
1209 | return ret; | |
1210 | ||
1211 | mutex_init(&data->mutex); | |
1212 | ||
1213 | indio_dev->dev.parent = &client->dev; | |
1214 | indio_dev->channels = kxcjk1013_channels; | |
1215 | indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); | |
c6861377 | 1216 | indio_dev->name = name; |
1a4fbf6a SP |
1217 | indio_dev->modes = INDIO_DIRECT_MODE; |
1218 | indio_dev->info = &kxcjk1013_info; | |
1219 | ||
1220 | if (client->irq < 0) | |
c6861377 | 1221 | client->irq = kxcjk1013_gpio_probe(client, data); |
1a4fbf6a SP |
1222 | |
1223 | if (client->irq >= 0) { | |
b4b491c0 SP |
1224 | ret = devm_request_threaded_irq(&client->dev, client->irq, |
1225 | kxcjk1013_data_rdy_trig_poll, | |
1226 | kxcjk1013_event_handler, | |
1227 | IRQF_TRIGGER_RISING, | |
1228 | KXCJK1013_IRQ_NAME, | |
1229 | indio_dev); | |
1230 | if (ret) | |
1231 | return ret; | |
1a4fbf6a | 1232 | |
b4b491c0 SP |
1233 | data->dready_trig = devm_iio_trigger_alloc(&client->dev, |
1234 | "%s-dev%d", | |
1235 | indio_dev->name, | |
1236 | indio_dev->id); | |
1237 | if (!data->dready_trig) | |
1238 | return -ENOMEM; | |
1a4fbf6a | 1239 | |
b4b491c0 SP |
1240 | data->motion_trig = devm_iio_trigger_alloc(&client->dev, |
1241 | "%s-any-motion-dev%d", | |
1242 | indio_dev->name, | |
1243 | indio_dev->id); | |
1244 | if (!data->motion_trig) | |
1245 | return -ENOMEM; | |
1a4fbf6a | 1246 | |
b4b491c0 SP |
1247 | data->dready_trig->dev.parent = &client->dev; |
1248 | data->dready_trig->ops = &kxcjk1013_trigger_ops; | |
1249 | iio_trigger_set_drvdata(data->dready_trig, indio_dev); | |
1250 | indio_dev->trig = data->dready_trig; | |
c1288b83 | 1251 | iio_trigger_get(indio_dev->trig); |
b4b491c0 | 1252 | ret = iio_trigger_register(data->dready_trig); |
1a4fbf6a | 1253 | if (ret) |
b4b491c0 SP |
1254 | return ret; |
1255 | ||
1256 | data->motion_trig->dev.parent = &client->dev; | |
1257 | data->motion_trig->ops = &kxcjk1013_trigger_ops; | |
1258 | iio_trigger_set_drvdata(data->motion_trig, indio_dev); | |
1259 | ret = iio_trigger_register(data->motion_trig); | |
1260 | if (ret) { | |
1261 | data->motion_trig = NULL; | |
1262 | goto err_trigger_unregister; | |
1263 | } | |
1a4fbf6a SP |
1264 | |
1265 | ret = iio_triggered_buffer_setup(indio_dev, | |
1266 | &iio_pollfunc_store_time, | |
1267 | kxcjk1013_trigger_handler, | |
1268 | NULL); | |
1269 | if (ret < 0) { | |
1270 | dev_err(&client->dev, | |
1271 | "iio triggered buffer setup failed\n"); | |
1272 | goto err_trigger_unregister; | |
1273 | } | |
1274 | } | |
1275 | ||
124e1b1d | 1276 | ret = iio_device_register(indio_dev); |
1a4fbf6a SP |
1277 | if (ret < 0) { |
1278 | dev_err(&client->dev, "unable to register iio device\n"); | |
1279 | goto err_buffer_cleanup; | |
1280 | } | |
1281 | ||
124e1b1d SP |
1282 | ret = pm_runtime_set_active(&client->dev); |
1283 | if (ret) | |
1284 | goto err_iio_unregister; | |
1285 | ||
1286 | pm_runtime_enable(&client->dev); | |
1287 | pm_runtime_set_autosuspend_delay(&client->dev, | |
1288 | KXCJK1013_SLEEP_DELAY_MS); | |
1289 | pm_runtime_use_autosuspend(&client->dev); | |
1290 | ||
1a4fbf6a SP |
1291 | return 0; |
1292 | ||
124e1b1d SP |
1293 | err_iio_unregister: |
1294 | iio_device_unregister(indio_dev); | |
1a4fbf6a | 1295 | err_buffer_cleanup: |
b4b491c0 | 1296 | if (data->dready_trig) |
1a4fbf6a SP |
1297 | iio_triggered_buffer_cleanup(indio_dev); |
1298 | err_trigger_unregister: | |
b4b491c0 SP |
1299 | if (data->dready_trig) |
1300 | iio_trigger_unregister(data->dready_trig); | |
1301 | if (data->motion_trig) | |
1302 | iio_trigger_unregister(data->motion_trig); | |
1a4fbf6a SP |
1303 | |
1304 | return ret; | |
1305 | } | |
1306 | ||
1307 | static int kxcjk1013_remove(struct i2c_client *client) | |
1308 | { | |
1309 | struct iio_dev *indio_dev = i2c_get_clientdata(client); | |
1310 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
1311 | ||
124e1b1d SP |
1312 | pm_runtime_disable(&client->dev); |
1313 | pm_runtime_set_suspended(&client->dev); | |
1314 | pm_runtime_put_noidle(&client->dev); | |
1315 | ||
1316 | iio_device_unregister(indio_dev); | |
1317 | ||
b4b491c0 | 1318 | if (data->dready_trig) { |
1a4fbf6a | 1319 | iio_triggered_buffer_cleanup(indio_dev); |
b4b491c0 SP |
1320 | iio_trigger_unregister(data->dready_trig); |
1321 | iio_trigger_unregister(data->motion_trig); | |
1a4fbf6a SP |
1322 | } |
1323 | ||
1324 | mutex_lock(&data->mutex); | |
1325 | kxcjk1013_set_mode(data, STANDBY); | |
1326 | mutex_unlock(&data->mutex); | |
1327 | ||
1328 | return 0; | |
1329 | } | |
1330 | ||
1331 | #ifdef CONFIG_PM_SLEEP | |
1332 | static int kxcjk1013_suspend(struct device *dev) | |
1333 | { | |
1334 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1335 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
124e1b1d | 1336 | int ret; |
1a4fbf6a SP |
1337 | |
1338 | mutex_lock(&data->mutex); | |
124e1b1d | 1339 | ret = kxcjk1013_set_mode(data, STANDBY); |
1a4fbf6a SP |
1340 | mutex_unlock(&data->mutex); |
1341 | ||
124e1b1d | 1342 | return ret; |
1a4fbf6a SP |
1343 | } |
1344 | ||
1345 | static int kxcjk1013_resume(struct device *dev) | |
1346 | { | |
1347 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1348 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
124e1b1d | 1349 | int ret = 0; |
1a4fbf6a SP |
1350 | |
1351 | mutex_lock(&data->mutex); | |
124e1b1d | 1352 | /* Check, if the suspend occured while active */ |
b4b491c0 SP |
1353 | if (data->dready_trigger_on || data->motion_trigger_on || |
1354 | data->ev_enable_state) | |
124e1b1d SP |
1355 | ret = kxcjk1013_set_mode(data, OPERATION); |
1356 | mutex_unlock(&data->mutex); | |
1a4fbf6a | 1357 | |
124e1b1d SP |
1358 | return ret; |
1359 | } | |
1360 | #endif | |
1a4fbf6a | 1361 | |
124e1b1d SP |
1362 | #ifdef CONFIG_PM_RUNTIME |
1363 | static int kxcjk1013_runtime_suspend(struct device *dev) | |
1364 | { | |
1365 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1366 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
1a4fbf6a | 1367 | |
124e1b1d | 1368 | return kxcjk1013_set_mode(data, STANDBY); |
1a4fbf6a SP |
1369 | } |
1370 | ||
124e1b1d SP |
1371 | static int kxcjk1013_runtime_resume(struct device *dev) |
1372 | { | |
1373 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1374 | struct kxcjk1013_data *data = iio_priv(indio_dev); | |
1375 | int ret; | |
1376 | int sleep_val; | |
1377 | ||
1378 | ret = kxcjk1013_set_mode(data, OPERATION); | |
1379 | if (ret < 0) | |
1380 | return ret; | |
1381 | ||
1382 | sleep_val = kxcjk1013_get_startup_times(data); | |
1383 | if (sleep_val < 20000) | |
1384 | usleep_range(sleep_val, 20000); | |
1385 | else | |
1386 | msleep_interruptible(sleep_val/1000); | |
1387 | ||
1388 | return 0; | |
1389 | } | |
1a4fbf6a SP |
1390 | #endif |
1391 | ||
124e1b1d SP |
1392 | static const struct dev_pm_ops kxcjk1013_pm_ops = { |
1393 | SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) | |
1394 | SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, | |
1395 | kxcjk1013_runtime_resume, NULL) | |
1396 | }; | |
1397 | ||
1a4fbf6a | 1398 | static const struct acpi_device_id kx_acpi_match[] = { |
c6861377 DB |
1399 | {"KXCJ1013", KXCJK1013}, |
1400 | {"KXCJ1008", KXCJ91008}, | |
1401 | {"KXTJ1009", KXTJ21009}, | |
1a4fbf6a SP |
1402 | { }, |
1403 | }; | |
1404 | MODULE_DEVICE_TABLE(acpi, kx_acpi_match); | |
1405 | ||
1406 | static const struct i2c_device_id kxcjk1013_id[] = { | |
c6861377 DB |
1407 | {"kxcjk1013", KXCJK1013}, |
1408 | {"kxcj91008", KXCJ91008}, | |
1409 | {"kxtj21009", KXTJ21009}, | |
1a4fbf6a SP |
1410 | {} |
1411 | }; | |
1412 | ||
1413 | MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); | |
1414 | ||
1415 | static struct i2c_driver kxcjk1013_driver = { | |
1416 | .driver = { | |
1417 | .name = KXCJK1013_DRV_NAME, | |
1418 | .acpi_match_table = ACPI_PTR(kx_acpi_match), | |
124e1b1d | 1419 | .pm = &kxcjk1013_pm_ops, |
1a4fbf6a SP |
1420 | }, |
1421 | .probe = kxcjk1013_probe, | |
1422 | .remove = kxcjk1013_remove, | |
1423 | .id_table = kxcjk1013_id, | |
1424 | }; | |
1425 | module_i2c_driver(kxcjk1013_driver); | |
1426 | ||
1427 | MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); | |
1428 | MODULE_LICENSE("GPL v2"); | |
1429 | MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); |