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1da177e4 LT |
1 | /* |
2 | * Generic IEEE 1394 definitions | |
3 | */ | |
4 | ||
5 | #ifndef _IEEE1394_IEEE1394_H | |
6 | #define _IEEE1394_IEEE1394_H | |
7 | ||
8 | #define TCODE_WRITEQ 0x0 | |
9 | #define TCODE_WRITEB 0x1 | |
10 | #define TCODE_WRITE_RESPONSE 0x2 | |
11 | #define TCODE_READQ 0x4 | |
12 | #define TCODE_READB 0x5 | |
13 | #define TCODE_READQ_RESPONSE 0x6 | |
14 | #define TCODE_READB_RESPONSE 0x7 | |
15 | #define TCODE_CYCLE_START 0x8 | |
16 | #define TCODE_LOCK_REQUEST 0x9 | |
17 | #define TCODE_ISO_DATA 0xa | |
18 | #define TCODE_STREAM_DATA 0xa | |
19 | #define TCODE_LOCK_RESPONSE 0xb | |
20 | ||
21 | #define RCODE_COMPLETE 0x0 | |
22 | #define RCODE_CONFLICT_ERROR 0x4 | |
23 | #define RCODE_DATA_ERROR 0x5 | |
24 | #define RCODE_TYPE_ERROR 0x6 | |
25 | #define RCODE_ADDRESS_ERROR 0x7 | |
26 | ||
27 | #define EXTCODE_MASK_SWAP 0x1 | |
28 | #define EXTCODE_COMPARE_SWAP 0x2 | |
29 | #define EXTCODE_FETCH_ADD 0x3 | |
30 | #define EXTCODE_LITTLE_ADD 0x4 | |
31 | #define EXTCODE_BOUNDED_ADD 0x5 | |
32 | #define EXTCODE_WRAP_ADD 0x6 | |
33 | ||
34 | #define ACK_COMPLETE 0x1 | |
35 | #define ACK_PENDING 0x2 | |
36 | #define ACK_BUSY_X 0x4 | |
37 | #define ACK_BUSY_A 0x5 | |
38 | #define ACK_BUSY_B 0x6 | |
39 | #define ACK_TARDY 0xb | |
40 | #define ACK_CONFLICT_ERROR 0xc | |
41 | #define ACK_DATA_ERROR 0xd | |
42 | #define ACK_TYPE_ERROR 0xe | |
43 | #define ACK_ADDRESS_ERROR 0xf | |
44 | ||
45 | /* Non-standard "ACK codes" for internal use */ | |
46 | #define ACKX_NONE (-1) | |
47 | #define ACKX_SEND_ERROR (-2) | |
48 | #define ACKX_ABORTED (-3) | |
49 | #define ACKX_TIMEOUT (-4) | |
50 | ||
51 | ||
52 | #define IEEE1394_SPEED_100 0x00 | |
53 | #define IEEE1394_SPEED_200 0x01 | |
54 | #define IEEE1394_SPEED_400 0x02 | |
55 | #define IEEE1394_SPEED_800 0x03 | |
56 | #define IEEE1394_SPEED_1600 0x04 | |
57 | #define IEEE1394_SPEED_3200 0x05 | |
58 | /* The current highest tested speed supported by the subsystem */ | |
59 | #define IEEE1394_SPEED_MAX IEEE1394_SPEED_800 | |
60 | ||
61 | /* Maps speed values above to a string representation */ | |
62 | extern const char *hpsb_speedto_str[]; | |
63 | ||
64 | ||
65 | #define SELFID_PWRCL_NO_POWER 0x0 | |
66 | #define SELFID_PWRCL_PROVIDE_15W 0x1 | |
67 | #define SELFID_PWRCL_PROVIDE_30W 0x2 | |
68 | #define SELFID_PWRCL_PROVIDE_45W 0x3 | |
69 | #define SELFID_PWRCL_USE_1W 0x4 | |
70 | #define SELFID_PWRCL_USE_3W 0x5 | |
71 | #define SELFID_PWRCL_USE_6W 0x6 | |
72 | #define SELFID_PWRCL_USE_10W 0x7 | |
73 | ||
74 | #define SELFID_PORT_CHILD 0x3 | |
75 | #define SELFID_PORT_PARENT 0x2 | |
76 | #define SELFID_PORT_NCONN 0x1 | |
77 | #define SELFID_PORT_NONE 0x0 | |
78 | ||
79 | ||
80 | /* 1394a PHY bitmasks */ | |
81 | #define PHY_00_PHYSICAL_ID 0xFC | |
82 | #define PHY_00_R 0x02 /* Root */ | |
83 | #define PHY_00_PS 0x01 /* Power Status*/ | |
84 | #define PHY_01_RHB 0x80 /* Root Hold-Off */ | |
85 | #define PHY_01_IBR 0x80 /* Initiate Bus Reset */ | |
86 | #define PHY_01_GAP_COUNT 0x3F | |
87 | #define PHY_02_EXTENDED 0xE0 /* 0x7 for 1394a-compliant PHY */ | |
88 | #define PHY_02_TOTAL_PORTS 0x1F | |
89 | #define PHY_03_MAX_SPEED 0xE0 | |
90 | #define PHY_03_DELAY 0x0F | |
91 | #define PHY_04_LCTRL 0x80 /* Link Active Report Control */ | |
92 | #define PHY_04_CONTENDER 0x40 | |
93 | #define PHY_04_JITTER 0x38 | |
94 | #define PHY_04_PWR_CLASS 0x07 /* Power Class */ | |
95 | #define PHY_05_WATCHDOG 0x80 | |
96 | #define PHY_05_ISBR 0x40 /* Initiate Short Bus Reset */ | |
97 | #define PHY_05_LOOP 0x20 /* Loop Detect */ | |
98 | #define PHY_05_PWR_FAIL 0x10 /* Cable Power Failure Detect */ | |
99 | #define PHY_05_TIMEOUT 0x08 /* Arbitration State Machine Timeout */ | |
100 | #define PHY_05_PORT_EVENT 0x04 /* Port Event Detect */ | |
101 | #define PHY_05_ENAB_ACCEL 0x02 /* Enable Arbitration Acceleration */ | |
102 | #define PHY_05_ENAB_MULTI 0x01 /* Ena. Multispeed Packet Concatenation */ | |
103 | ||
104 | #include <asm/byteorder.h> | |
105 | ||
106 | #ifdef __BIG_ENDIAN_BITFIELD | |
107 | ||
108 | struct selfid { | |
109 | u32 packet_identifier:2; /* always binary 10 */ | |
110 | u32 phy_id:6; | |
111 | /* byte */ | |
112 | u32 extended:1; /* if true is struct ext_selfid */ | |
113 | u32 link_active:1; | |
114 | u32 gap_count:6; | |
115 | /* byte */ | |
116 | u32 speed:2; | |
117 | u32 phy_delay:2; | |
118 | u32 contender:1; | |
119 | u32 power_class:3; | |
120 | /* byte */ | |
121 | u32 port0:2; | |
122 | u32 port1:2; | |
123 | u32 port2:2; | |
124 | u32 initiated_reset:1; | |
125 | u32 more_packets:1; | |
126 | } __attribute__((packed)); | |
127 | ||
128 | struct ext_selfid { | |
129 | u32 packet_identifier:2; /* always binary 10 */ | |
130 | u32 phy_id:6; | |
131 | /* byte */ | |
132 | u32 extended:1; /* if false is struct selfid */ | |
133 | u32 seq_nr:3; | |
134 | u32 reserved:2; | |
135 | u32 porta:2; | |
136 | /* byte */ | |
137 | u32 portb:2; | |
138 | u32 portc:2; | |
139 | u32 portd:2; | |
140 | u32 porte:2; | |
141 | /* byte */ | |
142 | u32 portf:2; | |
143 | u32 portg:2; | |
144 | u32 porth:2; | |
145 | u32 reserved2:1; | |
146 | u32 more_packets:1; | |
147 | } __attribute__((packed)); | |
148 | ||
149 | #elif defined __LITTLE_ENDIAN_BITFIELD /* __BIG_ENDIAN_BITFIELD */ | |
150 | ||
151 | /* | |
152 | * Note: these mean to be bit fields of a big endian SelfID as seen on a little | |
153 | * endian machine. Without swapping. | |
154 | */ | |
155 | ||
156 | struct selfid { | |
157 | u32 phy_id:6; | |
158 | u32 packet_identifier:2; /* always binary 10 */ | |
159 | /* byte */ | |
160 | u32 gap_count:6; | |
161 | u32 link_active:1; | |
162 | u32 extended:1; /* if true is struct ext_selfid */ | |
163 | /* byte */ | |
164 | u32 power_class:3; | |
165 | u32 contender:1; | |
166 | u32 phy_delay:2; | |
167 | u32 speed:2; | |
168 | /* byte */ | |
169 | u32 more_packets:1; | |
170 | u32 initiated_reset:1; | |
171 | u32 port2:2; | |
172 | u32 port1:2; | |
173 | u32 port0:2; | |
174 | } __attribute__((packed)); | |
175 | ||
176 | struct ext_selfid { | |
177 | u32 phy_id:6; | |
178 | u32 packet_identifier:2; /* always binary 10 */ | |
179 | /* byte */ | |
180 | u32 porta:2; | |
181 | u32 reserved:2; | |
182 | u32 seq_nr:3; | |
183 | u32 extended:1; /* if false is struct selfid */ | |
184 | /* byte */ | |
185 | u32 porte:2; | |
186 | u32 portd:2; | |
187 | u32 portc:2; | |
188 | u32 portb:2; | |
189 | /* byte */ | |
190 | u32 more_packets:1; | |
191 | u32 reserved2:1; | |
192 | u32 porth:2; | |
193 | u32 portg:2; | |
194 | u32 portf:2; | |
195 | } __attribute__((packed)); | |
196 | ||
197 | #else | |
198 | #error What? PDP endian? | |
199 | #endif /* __BIG_ENDIAN_BITFIELD */ | |
200 | ||
201 | ||
202 | #endif /* _IEEE1394_IEEE1394_H */ |