[linux-2.6-block.git] / drivers / ide / pci / tc86c001.c

/*
 * drivers/ide/pci/tc86c001.c	Version 1.00	Dec 12, 2006
 *
 * Copyright (C) 2002 Toshiba Corporation
 * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/types.h>
#include <linux/pci.h>
#include <linux/ide.h>

static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed)
{
	ide_hwif_t *hwif	= HWIF(drive);
	unsigned long scr_port	= hwif->config_data + (drive->dn ? 0x02 : 0x00);
	u16 mode, scr		= hwif->INW(scr_port);

	speed = ide_rate_filter(drive, speed);

	switch (speed) {
		case XFER_UDMA_4:	mode = 0x00c0; break;
		case XFER_UDMA_3:	mode = 0x00b0; break;
		case XFER_UDMA_2:	mode = 0x00a0; break;
		case XFER_UDMA_1:	mode = 0x0090; break;
		case XFER_UDMA_0:	mode = 0x0080; break;
		case XFER_MW_DMA_2:	mode = 0x0070; break;
		case XFER_MW_DMA_1:	mode = 0x0060; break;
		case XFER_MW_DMA_0:	mode = 0x0050; break;
		case XFER_PIO_4:	mode = 0x0400; break;
		case XFER_PIO_3:	mode = 0x0300; break;
		case XFER_PIO_2:	mode = 0x0200; break;
		case XFER_PIO_1:	mode = 0x0100; break;
		case XFER_PIO_0:
		default:		mode = 0x0000; break;
	}

	scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
	scr |= mode;
	outw(scr, scr_port);

	return ide_config_drive_speed(drive, speed);
}

static void tc86c001_tune_drive(ide_drive_t *drive, u8 pio)
{
	pio = ide_get_best_pio_mode(drive, pio, 4);
	(void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio);
}

/*
 * HACKITY HACK
 *
 * This is a workaround for the limitation 5 of the TC86C001 IDE controller:
 * if a DMA transfer terminates prematurely, the controller leaves the device's
 * interrupt request (INTRQ) pending and does not generate a PCI interrupt (or
 * set the interrupt bit in the DMA status register), thus no PCI interrupt
 * will occur until a DMA transfer has been successfully completed.
 *
 * We work around this by initiating dummy, zero-length DMA transfer on
 * a DMA timeout expiration. I found no better way to do this with the current
 * IDE core than to temporarily replace a higher level driver's timer expiry
 * handler with our own backing up to that handler in case our recovery fails.
 */
static int tc86c001_timer_expiry(ide_drive_t *drive)
{
	ide_hwif_t *hwif	= HWIF(drive);
	ide_expiry_t *expiry	= ide_get_hwifdata(hwif);
	ide_hwgroup_t *hwgroup	= HWGROUP(drive);
	u8 dma_stat		= hwif->INB(hwif->dma_status);

	/* Restore a higher level driver's expiry handler first. */
	hwgroup->expiry	= expiry;

	if ((dma_stat & 5) == 1) {	/* DMA active and no interrupt */
		unsigned long sc_base	= hwif->config_data;
		unsigned long twcr_port	= sc_base + (drive->dn ? 0x06 : 0x04);
		u8 dma_cmd		= hwif->INB(hwif->dma_command);

		printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
		       "attempting recovery...\n", drive->name);

		/* Stop DMA */
		outb(dma_cmd & ~0x01, hwif->dma_command);

		/* Setup the dummy DMA transfer */
		outw(0, sc_base + 0x0a);	/* Sector Count */
		outw(0, twcr_port);	/* Transfer Word Count 1 or 2 */

		/* Start the dummy DMA transfer */
		outb(0x00, hwif->dma_command); /* clear R_OR_WCTR for write */
		outb(0x01, hwif->dma_command); /* set START_STOPBM */

		/*
		 * If an interrupt was pending, it should come thru shortly.
		 * If not, a higher level driver's expiry handler should
		 * eventually cause some kind of recovery from the DMA stall.
		 */
		return WAIT_MIN_SLEEP;
	}

	/* Chain to the restored expiry handler if DMA wasn't active. */
	if (likely(expiry != NULL))
		return expiry(drive);

	/* If there was no handler, "emulate" that for ide_timer_expiry()... */
	return -1;
}

static void tc86c001_dma_start(ide_drive_t *drive)
{
	ide_hwif_t *hwif	= HWIF(drive);
	ide_hwgroup_t *hwgroup	= HWGROUP(drive);
	unsigned long sc_base	= hwif->config_data;
	unsigned long twcr_port	= sc_base + (drive->dn ? 0x06 : 0x04);
	unsigned long nsectors	= hwgroup->rq->nr_sectors;

	/*
	 * We have to manually load the sector count and size into
	 * the appropriate system control registers for DMA to work
	 * with LBA48 and ATAPI devices...
	 */
	outw(nsectors, sc_base + 0x0a);	/* Sector Count */
	outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */

	/* Install our timeout expiry hook, saving the current handler... */
	ide_set_hwifdata(hwif, hwgroup->expiry);
	hwgroup->expiry = &tc86c001_timer_expiry;

	ide_dma_start(drive);
}

static int tc86c001_busproc(ide_drive_t *drive, int state)
{
	ide_hwif_t *hwif	= HWIF(drive);
	unsigned long sc_base	= hwif->config_data;
	u16 scr1;

	/* System Control 1 Register bit 11 (ATA Hard Reset) read */
	scr1 = hwif->INW(sc_base + 0x00);

	switch (state) {
		case BUSSTATE_ON:
			if (!(scr1 & 0x0800))
				return 0;
			scr1 &= ~0x0800;

			hwif->drives[0].failures = hwif->drives[1].failures = 0;
			break;
		case BUSSTATE_OFF:
			if (scr1 & 0x0800)
				return 0;
			scr1 |= 0x0800;

			hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
			hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
			break;
		default:
			return -EINVAL;
	}

	/* System Control 1 Register bit 11 (ATA Hard Reset) write */
	outw(scr1, sc_base + 0x00);
	return 0;
}

static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
{
	if (ide_tune_dma(drive))
		return 0;

	if (ide_use_fast_pio(drive))
		tc86c001_tune_drive(drive, 255);

	return -1;
}

static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
{
	unsigned long sc_base	= pci_resource_start(hwif->pci_dev, 5);
	u16 scr1		= hwif->INW(sc_base + 0x00);;

	/* System Control 1 Register bit 15 (Soft Reset) set */
	outw(scr1 |  0x8000, sc_base + 0x00);

	/* System Control 1 Register bit 14 (FIFO Reset) set */
	outw(scr1 |  0x4000, sc_base + 0x00);

	/* System Control 1 Register: reset clear */
	outw(scr1 & ~0xc000, sc_base + 0x00);

	/* Store the system control register base for convenience... */
	hwif->config_data = sc_base;

	hwif->tuneproc	= &tc86c001_tune_drive;
	hwif->speedproc = &tc86c001_tune_chipset;
	hwif->busproc	= &tc86c001_busproc;

	hwif->drives[0].autotune = hwif->drives[1].autotune = 1;

	if (!hwif->dma_base)
		return;

	/*
	 * Sector Count Control Register bits 0 and 1 set:
	 * software sets Sector Count Register for master and slave device
	 */
	outw(0x0003, sc_base + 0x0c);

	/* Sector Count Register limit */
	hwif->rqsize	 = 0xffff;

	hwif->atapi_dma  = 1;
	hwif->ultra_mask = 0x1f;
	hwif->mwdma_mask = 0x07;

	hwif->ide_dma_check	= &tc86c001_config_drive_xfer_rate;
	hwif->dma_start 	= &tc86c001_dma_start;

	if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
		/*
		 * System Control  1 Register bit 13 (PDIAGN):
		 * 0=80-pin cable, 1=40-pin cable
		 */
		scr1 = hwif->INW(sc_base + 0x00);
		hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
	}

	if (!noautodma)
		hwif->autodma = 1;
	hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
}

static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
							const char *name)
{
	int err = pci_request_region(dev, 5, name);

	if (err)
		printk(KERN_ERR "%s: system control regs already in use", name);
	return err;
}

static ide_pci_device_t tc86c001_chipset __devinitdata = {
	.name		= "TC86C001",
	.init_chipset	= init_chipset_tc86c001,
	.init_hwif	= init_hwif_tc86c001,
	.autodma	= AUTODMA,
	.bootable	= OFF_BOARD,
	.host_flags	= IDE_HFLAG_SINGLE,
	.pio_mask	= ATA_PIO4,
};

static int __devinit tc86c001_init_one(struct pci_dev *dev,
				       const struct pci_device_id *id)
{
	return ide_setup_pci_device(dev, &tc86c001_chipset);
}

static struct pci_device_id tc86c001_pci_tbl[] = {
	{ PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE,
	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);

static struct pci_driver driver = {
	.name		= "TC86C001",
	.id_table	= tc86c001_pci_tbl,
	.probe		= tc86c001_init_one
};

static int __init tc86c001_ide_init(void)
{
	return ide_pci_register_driver(&driver);
}
module_init(tc86c001_ide_init);

MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
MODULE_LICENSE("GPL");
Commit	Line	Data
33dced2e SS	1	/*
	2	* drivers/ide/pci/tc86c001.c Version 1.00 Dec 12, 2006
	3	*
	4	* Copyright (C) 2002 Toshiba Corporation
	5	* Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
	6	*
	7	* This file is licensed under the terms of the GNU General Public
	8	* License version 2. This program is licensed "as is" without any
	9	* warranty of any kind, whether express or implied.
	10	*/
	11
	12	#include <linux/types.h>
	13	#include <linux/pci.h>
	14	#include <linux/ide.h>
	15
33dced2e SS	16	static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed)
	17	{
	18	ide_hwif_t *hwif = HWIF(drive);
	19	unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
	20	u16 mode, scr = hwif->INW(scr_port);
	21
2d5eaa6d	22	speed = ide_rate_filter(drive, speed);
33dced2e SS	23
	24	switch (speed) {
	25	case XFER_UDMA_4: mode = 0x00c0; break;
	26	case XFER_UDMA_3: mode = 0x00b0; break;
	27	case XFER_UDMA_2: mode = 0x00a0; break;
	28	case XFER_UDMA_1: mode = 0x0090; break;
	29	case XFER_UDMA_0: mode = 0x0080; break;
	30	case XFER_MW_DMA_2: mode = 0x0070; break;
	31	case XFER_MW_DMA_1: mode = 0x0060; break;
	32	case XFER_MW_DMA_0: mode = 0x0050; break;
	33	case XFER_PIO_4: mode = 0x0400; break;
	34	case XFER_PIO_3: mode = 0x0300; break;
	35	case XFER_PIO_2: mode = 0x0200; break;
	36	case XFER_PIO_1: mode = 0x0100; break;
	37	case XFER_PIO_0:
	38	default: mode = 0x0000; break;
	39	}
	40
	41	scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
	42	scr \|= mode;
0ecdca26	43	outw(scr, scr_port);
33dced2e SS	44
	45	return ide_config_drive_speed(drive, speed);
	46	}
	47
	48	static void tc86c001_tune_drive(ide_drive_t *drive, u8 pio)
	49	{
2134758d	50	pio = ide_get_best_pio_mode(drive, pio, 4);
33dced2e SS	51	(void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio);
	52	}
	53
	54	/*
	55	* HACKITY HACK
	56	*
	57	* This is a workaround for the limitation 5 of the TC86C001 IDE controller:
	58	* if a DMA transfer terminates prematurely, the controller leaves the device's
	59	* interrupt request (INTRQ) pending and does not generate a PCI interrupt (or
	60	* set the interrupt bit in the DMA status register), thus no PCI interrupt
	61	* will occur until a DMA transfer has been successfully completed.
	62	*
	63	* We work around this by initiating dummy, zero-length DMA transfer on
	64	* a DMA timeout expiration. I found no better way to do this with the current
	65	* IDE core than to temporarily replace a higher level driver's timer expiry
	66	* handler with our own backing up to that handler in case our recovery fails.
	67	*/
	68	static int tc86c001_timer_expiry(ide_drive_t *drive)
	69	{
	70	ide_hwif_t *hwif = HWIF(drive);
	71	ide_expiry_t *expiry = ide_get_hwifdata(hwif);
	72	ide_hwgroup_t *hwgroup = HWGROUP(drive);
	73	u8 dma_stat = hwif->INB(hwif->dma_status);
	74
	75	/* Restore a higher level driver's expiry handler first. */
	76	hwgroup->expiry = expiry;
	77
	78	if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */
	79	unsigned long sc_base = hwif->config_data;
	80	unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
	81	u8 dma_cmd = hwif->INB(hwif->dma_command);
	82
	83	printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
	84	"attempting recovery...\n", drive->name);
	85
	86	/* Stop DMA */
0ecdca26	87	outb(dma_cmd & ~0x01, hwif->dma_command);
33dced2e SS	88
33dced2e SS	89	/* Setup the dummy DMA transfer */
0ecdca26 BZ	90	outw(0, sc_base + 0x0a); /* Sector Count */
0ecdca26 BZ	91	outw(0, twcr_port); /* Transfer Word Count 1 or 2 */
33dced2e SS	92
33dced2e SS	93	/* Start the dummy DMA transfer */
0ecdca26 BZ	94	outb(0x00, hwif->dma_command); /* clear R_OR_WCTR for write */
0ecdca26 BZ	95	outb(0x01, hwif->dma_command); /* set START_STOPBM */
33dced2e SS	96
	97	/*
	98	* If an interrupt was pending, it should come thru shortly.
	99	* If not, a higher level driver's expiry handler should
	100	* eventually cause some kind of recovery from the DMA stall.
	101	*/
	102	return WAIT_MIN_SLEEP;
	103	}
	104
	105	/* Chain to the restored expiry handler if DMA wasn't active. */
	106	if (likely(expiry != NULL))
	107	return expiry(drive);
	108
	109	/* If there was no handler, "emulate" that for ide_timer_expiry()... */
	110	return -1;
	111	}
	112
	113	static void tc86c001_dma_start(ide_drive_t *drive)
	114	{
	115	ide_hwif_t *hwif = HWIF(drive);
	116	ide_hwgroup_t *hwgroup = HWGROUP(drive);
	117	unsigned long sc_base = hwif->config_data;
	118	unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
	119	unsigned long nsectors = hwgroup->rq->nr_sectors;
	120
	121	/*
	122	* We have to manually load the sector count and size into
	123	* the appropriate system control registers for DMA to work
	124	* with LBA48 and ATAPI devices...
	125	*/
0ecdca26 BZ	126	outw(nsectors, sc_base + 0x0a); /* Sector Count */
0ecdca26 BZ	127	outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
33dced2e SS	128
	129	/* Install our timeout expiry hook, saving the current handler... */
	130	ide_set_hwifdata(hwif, hwgroup->expiry);
	131	hwgroup->expiry = &tc86c001_timer_expiry;
	132
	133	ide_dma_start(drive);
	134	}
	135
	136	static int tc86c001_busproc(ide_drive_t *drive, int state)
	137	{
	138	ide_hwif_t *hwif = HWIF(drive);
	139	unsigned long sc_base = hwif->config_data;
	140	u16 scr1;
	141
	142	/* System Control 1 Register bit 11 (ATA Hard Reset) read */
	143	scr1 = hwif->INW(sc_base + 0x00);
	144
	145	switch (state) {
	146	case BUSSTATE_ON:
	147	if (!(scr1 & 0x0800))
	148	return 0;
	149	scr1 &= ~0x0800;
	150
	151	hwif->drives[0].failures = hwif->drives[1].failures = 0;
	152	break;
	153	case BUSSTATE_OFF:
	154	if (scr1 & 0x0800)
	155	return 0;
	156	scr1 \|= 0x0800;
	157
	158	hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
	159	hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
	160	break;
	161	default:
	162	return -EINVAL;
	163	}
	164
	165	/* System Control 1 Register bit 11 (ATA Hard Reset) write */
0ecdca26	166	outw(scr1, sc_base + 0x00);
33dced2e SS	167	return 0;
	168	}
	169
33dced2e SS	170	static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
33dced2e SS	171	{
29e744d0	172	if (ide_tune_dma(drive))
3608b5d7	173	return 0;
33dced2e	174
d8f4469d	175	if (ide_use_fast_pio(drive))
33dced2e	176	tc86c001_tune_drive(drive, 255);
d8f4469d	177
3608b5d7	178	return -1;
33dced2e SS	179	}
33dced2e SS	180
e8ab7f53	181	static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
33dced2e SS	182	{
	183	unsigned long sc_base = pci_resource_start(hwif->pci_dev, 5);
	184	u16 scr1 = hwif->INW(sc_base + 0x00);;
	185
	186	/* System Control 1 Register bit 15 (Soft Reset) set */
0ecdca26	187	outw(scr1 \| 0x8000, sc_base + 0x00);
33dced2e SS	188
33dced2e SS	189	/* System Control 1 Register bit 14 (FIFO Reset) set */
0ecdca26	190	outw(scr1 \| 0x4000, sc_base + 0x00);
33dced2e SS	191
33dced2e SS	192	/* System Control 1 Register: reset clear */
0ecdca26	193	outw(scr1 & ~0xc000, sc_base + 0x00);
33dced2e SS	194
	195	/* Store the system control register base for convenience... */
	196	hwif->config_data = sc_base;
	197
	198	hwif->tuneproc = &tc86c001_tune_drive;
	199	hwif->speedproc = &tc86c001_tune_chipset;
	200	hwif->busproc = &tc86c001_busproc;
	201
	202	hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
	203
	204	if (!hwif->dma_base)
	205	return;
	206
	207	/*
	208	* Sector Count Control Register bits 0 and 1 set:
	209	* software sets Sector Count Register for master and slave device
	210	*/
0ecdca26	211	outw(0x0003, sc_base + 0x0c);
33dced2e SS	212
	213	/* Sector Count Register limit */
	214	hwif->rqsize = 0xffff;
	215
	216	hwif->atapi_dma = 1;
	217	hwif->ultra_mask = 0x1f;
	218	hwif->mwdma_mask = 0x07;
	219
	220	hwif->ide_dma_check = &tc86c001_config_drive_xfer_rate;
	221	hwif->dma_start = &tc86c001_dma_start;
	222
49521f97	223	if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
33dced2e SS	224	/*
	225	* System Control 1 Register bit 13 (PDIAGN):
	226	* 0=80-pin cable, 1=40-pin cable
	227	*/
	228	scr1 = hwif->INW(sc_base + 0x00);
49521f97	229	hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
33dced2e SS	230	}
	231
	232	if (!noautodma)
	233	hwif->autodma = 1;
	234	hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
	235	}
	236
ba59c4b8 AM	237	static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
ba59c4b8 AM	238	const char *name)
33dced2e SS	239	{
	240	int err = pci_request_region(dev, 5, name);
	241
	242	if (err)
	243	printk(KERN_ERR "%s: system control regs already in use", name);
	244	return err;
	245	}
	246
	247	static ide_pci_device_t tc86c001_chipset __devinitdata = {
	248	.name = "TC86C001",
	249	.init_chipset = init_chipset_tc86c001,
	250	.init_hwif = init_hwif_tc86c001,
33dced2e	251	.autodma = AUTODMA,
a5d8c5c8 BZ	252	.bootable = OFF_BOARD,
a5d8c5c8 BZ	253	.host_flags = IDE_HFLAG_SINGLE,
4099d143	254	.pio_mask = ATA_PIO4,
33dced2e SS	255	};
	256
	257	static int __devinit tc86c001_init_one(struct pci_dev *dev,
	258	const struct pci_device_id *id)
	259	{
	260	return ide_setup_pci_device(dev, &tc86c001_chipset);
	261	}
	262
	263	static struct pci_device_id tc86c001_pci_tbl[] = {
	264	{ PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE,
	265	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	266	{ 0, }
	267	};
	268	MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);
	269
	270	static struct pci_driver driver = {
	271	.name = "TC86C001",
	272	.id_table = tc86c001_pci_tbl,
	273	.probe = tc86c001_init_one
	274	};
	275
a534b68d	276	static int __init tc86c001_ide_init(void)
33dced2e SS	277	{
	278	return ide_pci_register_driver(&driver);
	279	}
	280	module_init(tc86c001_ide_init);
	281
	282	MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
	283	MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
	284	MODULE_LICENSE("GPL");