[linux-2.6-block.git] / drivers / ide / legacy / qd65xx.c

/*
 *  linux/drivers/ide/legacy/qd65xx.c		Version 0.07	Sep 30, 2001
 *
 *  Copyright (C) 1996-2001  Linus Torvalds & author (see below)
 */

/*
 *  Version 0.03	Cleaned auto-tune, added probe
 *  Version 0.04	Added second channel tuning
 *  Version 0.05	Enhanced tuning ; added qd6500 support
 *  Version 0.06	Added dos driver's list
 *  Version 0.07	Second channel bug fix 
 *
 * QDI QD6500/QD6580 EIDE controller fast support
 *
 * Please set local bus speed using kernel parameter idebus
 * 	for example, "idebus=33" stands for 33Mhz VLbus
 * To activate controller support, use "ide0=qd65xx"
 * To enable tuning, use "hda=autotune hdb=autotune"
 * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
 */

/*
 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
 * Samuel Thibault <samuel.thibault@fnac.net>
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/blkdev.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <asm/system.h>
#include <asm/io.h>

#include "qd65xx.h"

/*
 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
 *            or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
 *	-- qd6500 is a single IDE interface
 *	-- qd6580 is a dual IDE interface
 *
 * More research on qd6580 being done by willmore@cig.mot.com (David)
 * More Information given by Petr Soucek (petr@ryston.cz)
 * http://www.ryston.cz/petr/vlb
 */

/*
 * base: Timer1
 *
 *
 * base+0x01: Config (R/O)
 *
 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
 * bit 3: qd6500: 1 = disabled, 0 = enabled
 *        qd6580: 1
 * upper nibble:
 *        qd6500: 1100
 *        qd6580: either 1010 or 0101
 *
 *
 * base+0x02: Timer2 (qd6580 only)
 *
 *
 * base+0x03: Control (qd6580 only)
 *
 * bits 0-3 must always be set 1
 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
 *         0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
 *                                                   channel 1 for hdc & hdd
 * bit 1 : 1 = only disks on primary port
 *         0 = disks & ATAPI devices on primary port
 * bit 2-4 : always 0
 * bit 5 : status, but of what ?
 * bit 6 : always set 1 by dos driver
 * bit 7 : set 1 for non-ATAPI devices on primary port
 *	(maybe read-ahead and post-write buffer ?)
 */

static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */

static void qd_write_reg (u8 content, unsigned long reg)
{
	unsigned long flags;

	spin_lock_irqsave(&ide_lock, flags);
	outb(content,reg);
	spin_unlock_irqrestore(&ide_lock, flags);
}

static u8 __init qd_read_reg (unsigned long reg)
{
	unsigned long flags;
	u8 read;

	spin_lock_irqsave(&ide_lock, flags);
	read = inb(reg);
	spin_unlock_irqrestore(&ide_lock, flags);
	return read;
}

/*
 * qd_select:
 *
 * This routine is invoked from ide.c to prepare for access to a given drive.
 */

static void qd_select (ide_drive_t *drive)
{
	u8 index = ((	(QD_TIMREG(drive)) & 0x80 ) >> 7) |
			(QD_TIMREG(drive) & 0x02);

	if (timings[index] != QD_TIMING(drive))
		qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
}

/*
 * qd6500_compute_timing
 *
 * computes the timing value where
 *	lower nibble represents active time,   in count of VLB clocks
 *	upper nibble represents recovery time, in count of VLB clocks
 */

static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
{
	u8 active_cycle,recovery_cycle;

	if (system_bus_clock()<=33) {
		active_cycle =   9  - IDE_IN(active_time   * system_bus_clock() / 1000 + 1, 2, 9);
		recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
	} else {
		active_cycle =   8  - IDE_IN(active_time   * system_bus_clock() / 1000 + 1, 1, 8);
		recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
	}

	return((recovery_cycle<<4) | 0x08 | active_cycle);
}

/*
 * qd6580_compute_timing
 *
 * idem for qd6580
 */

static u8 qd6580_compute_timing (int active_time, int recovery_time)
{
	u8 active_cycle   = 17 - IDE_IN(active_time   * system_bus_clock() / 1000 + 1, 2, 17);
	u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);

	return((recovery_cycle<<4) | active_cycle);
}

/*
 * qd_find_disk_type
 *
 * tries to find timing from dos driver's table
 */

static int qd_find_disk_type (ide_drive_t *drive,
		int *active_time, int *recovery_time)
{
	struct qd65xx_timing_s *p;
	char model[40];

	if (!*drive->id->model) return 0;

	strncpy(model,drive->id->model,40);
	ide_fixstring(model,40,1); /* byte-swap */

	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
		if (!strncmp(p->model, model+p->offset, 4)) {
			printk(KERN_DEBUG "%s: listed !\n", drive->name);
			*active_time = p->active;
			*recovery_time = p->recovery;
			return 1;
		}
	}
	return 0;
}

/*
 * qd_timing_ok:
 *
 * check whether timings don't conflict
 */

static int qd_timing_ok (ide_drive_t drives[])
{
	return (IDE_IMPLY(drives[0].present && drives[1].present,
			IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
			          QD_TIMING(drives) == QD_TIMING(drives+1))));
	/* if same timing register, must be same timing */
}

/*
 * qd_set_timing:
 *
 * records the timing, and enables selectproc as needed
 */

static void qd_set_timing (ide_drive_t *drive, u8 timing)
{
	ide_hwif_t *hwif = HWIF(drive);

	drive->drive_data &= 0xff00;
	drive->drive_data |= timing;
	if (qd_timing_ok(hwif->drives)) {
		qd_select(drive); /* selects once */
		hwif->selectproc = NULL;
	} else
		hwif->selectproc = &qd_select;

	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
}

/*
 * qd6500_tune_drive
 */

static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
{
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */

	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
		&& drive->id->tPIO && (drive->id->field_valid & 0x02)
		&& drive->id->eide_pio >= 240) {

		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
				drive->id->tPIO);
		active_time = 110;
		recovery_time = drive->id->eide_pio - 120;
	}

	qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
}

/*
 * qd6580_tune_drive
 */

static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
{
	int base = HWIF(drive)->select_data;
	unsigned int cycle_time;
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */

	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
		pio = ide_get_best_pio_mode(drive, pio, 4);
		cycle_time = ide_pio_cycle_time(drive, pio);

		switch (pio) {
			case 0: break;
			case 3:
				if (cycle_time >= 110) {
					active_time = 86;
					recovery_time = cycle_time - 102;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			case 4:
				if (cycle_time >= 69) {
					active_time = 70;
					recovery_time = cycle_time - 61;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			default:
				if (cycle_time >= 180) {
					active_time = 110;
					recovery_time = cycle_time - 120;
				} else {
					active_time = ide_pio_timings[pio].active_time;
					recovery_time = cycle_time - active_time;
				}
		}
		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	}

	if (!HWIF(drive)->channel && drive->media != ide_disk) {
		qd_write_reg(0x5f, QD_CONTROL_PORT);
		printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
			"and post-write buffer on %s.\n",
			drive->name, HWIF(drive)->name);
	}

	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
}

/*
 * qd_testreg
 *
 * tests if the given port is a register
 */

static int __init qd_testreg(int port)
{
	u8 savereg;
	u8 readreg;
	unsigned long flags;

	spin_lock_irqsave(&ide_lock, flags);
	savereg = inb_p(port);
	outb_p(QD_TESTVAL, port);	/* safe value */
	readreg = inb_p(port);
	outb(savereg, port);
	spin_unlock_irqrestore(&ide_lock, flags);

	if (savereg == QD_TESTVAL) {
		printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
		printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
		printk(KERN_ERR "Assuming qd65xx is not present.\n");
		return 1;
	}

	return (readreg != QD_TESTVAL);
}

/*
 * qd_setup:
 *
 * called to setup an ata channel : adjusts attributes & links for tuning
 */

static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
			    unsigned int data0, unsigned int data1,
			    void (*tuneproc) (ide_drive_t *, u8 pio))
{
	hwif->chipset = ide_qd65xx;
	hwif->channel = hwif->index;
	hwif->select_data = base;
	hwif->config_data = config;
	hwif->drives[0].drive_data = data0;
	hwif->drives[1].drive_data = data1;
	hwif->drives[0].io_32bit =
	hwif->drives[1].io_32bit = 1;
	hwif->pio_mask = ATA_PIO4;
	hwif->tuneproc = tuneproc;
	probe_hwif_init(hwif);
}

/*
 * qd_unsetup:
 *
 * called to unsetup an ata channel : back to default values, unlinks tuning
 */
/*
static void __exit qd_unsetup(ide_hwif_t *hwif)
{
	u8 config = hwif->config_data;
	int base = hwif->select_data;
	void *tuneproc = (void *) hwif->tuneproc;

	if (hwif->chipset != ide_qd65xx)
		return;

	printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);

	hwif->selectproc = NULL;
	hwif->tuneproc = NULL;

	if (tuneproc == (void *) qd6500_tune_drive) {
		// will do it for both
		qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
	} else if (tuneproc == (void *) qd6580_tune_drive) {
		if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
			qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
			qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
		} else {
			qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
		}
	} else {
		printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
		printk(KERN_WARNING "keeping settings !\n");
	}
}
*/

/*
 * qd_probe:
 *
 * looks at the specified baseport, and if qd found, registers & initialises it
 * return 1 if another qd may be probed
 */

static int __init qd_probe(int base)
{
	ide_hwif_t *hwif;
	u8 config;
	u8 unit;

	config = qd_read_reg(QD_CONFIG_PORT);

	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
		return 1;

	unit = ! (config & QD_CONFIG_IDE_BASEPORT);

	if ((config & 0xf0) == QD_CONFIG_QD6500) {

		if (qd_testreg(base)) return 1;		/* bad register */

		/* qd6500 found */

		hwif = &ide_hwifs[unit];
		printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
		printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
			config, QD_ID3);
		
		if (config & QD_CONFIG_DISABLED) {
			printk(KERN_WARNING "qd6500 is disabled !\n");
			return 1;
		}

		qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA,
			 &qd6500_tune_drive);

		ide_proc_register_port(hwif);

		return 1;
	}

	if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
	    ((config & 0xf0) == QD_CONFIG_QD6580_B)) {

		u8 control;

		if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
			/* bad registers */

		/* qd6580 found */

		control = qd_read_reg(QD_CONTROL_PORT);

		printk(KERN_NOTICE "qd6580 at %#x\n", base);
		printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
			config, control, QD_ID3);

		if (control & QD_CONTR_SEC_DISABLED) {
			/* secondary disabled */

			hwif = &ide_hwifs[unit];
			printk(KERN_INFO "%s: qd6580: single IDE board\n",
					 hwif->name);
			qd_setup(hwif, base, config | (control << 8),
				 QD6580_DEF_DATA, QD6580_DEF_DATA2,
				 &qd6580_tune_drive);
			qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);

			ide_proc_register_port(hwif);

			return 1;
		} else {
			ide_hwif_t *mate;

			hwif = &ide_hwifs[0];
			mate = &ide_hwifs[1];
			/* secondary enabled */
			printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
					hwif->name, mate->name);

			qd_setup(hwif, base, config | (control << 8),
				 QD6580_DEF_DATA, QD6580_DEF_DATA,
				 &qd6580_tune_drive);
			qd_setup(mate, base, config | (control << 8),
				 QD6580_DEF_DATA2, QD6580_DEF_DATA2,
				 &qd6580_tune_drive);
			qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);

			ide_proc_register_port(hwif);
			ide_proc_register_port(mate);

			return 0; /* no other qd65xx possible */
		}
	}
	/* no qd65xx found */
	return 1;
}

int probe_qd65xx = 0;

module_param_named(probe, probe_qd65xx, bool, 0);
MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");

/* Can be called directly from ide.c. */
int __init qd65xx_init(void)
{
	if (probe_qd65xx == 0)
		return -ENODEV;

	if (qd_probe(0x30))
		qd_probe(0xb0);
	if (ide_hwifs[0].chipset != ide_qd65xx &&
	    ide_hwifs[1].chipset != ide_qd65xx)
		return -ENODEV;
	return 0;
}

#ifdef MODULE
module_init(qd65xx_init);
#endif

MODULE_AUTHOR("Samuel Thibault");
MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
	3	*
	4	* Copyright (C) 1996-2001 Linus Torvalds & author (see below)
	5	*/
	6
	7	/*
	8	* Version 0.03 Cleaned auto-tune, added probe
	9	* Version 0.04 Added second channel tuning
	10	* Version 0.05 Enhanced tuning ; added qd6500 support
	11	* Version 0.06 Added dos driver's list
	12	* Version 0.07 Second channel bug fix
	13	*
	14	* QDI QD6500/QD6580 EIDE controller fast support
	15	*
	16	* Please set local bus speed using kernel parameter idebus
	17	* for example, "idebus=33" stands for 33Mhz VLbus
	18	* To activate controller support, use "ide0=qd65xx"
b6209a90 BZ	19	* To enable tuning, use "hda=autotune hdb=autotune"
b6209a90 BZ	20	* To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
1da177e4 LT	21	*/
	22
	23	/*
	24	* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
	25	* Samuel Thibault <samuel.thibault@fnac.net>
	26	*/
	27
1da177e4	28	#include <linux/module.h>
1da177e4 LT	29	#include <linux/types.h>
	30	#include <linux/kernel.h>
	31	#include <linux/delay.h>
	32	#include <linux/timer.h>
	33	#include <linux/mm.h>
	34	#include <linux/ioport.h>
	35	#include <linux/blkdev.h>
	36	#include <linux/hdreg.h>
	37	#include <linux/ide.h>
	38	#include <linux/init.h>
	39	#include <asm/system.h>
	40	#include <asm/io.h>
	41
	42	#include "qd65xx.h"
	43
	44	/*
	45	* I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
	46	* or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
	47	* -- qd6500 is a single IDE interface
	48	* -- qd6580 is a dual IDE interface
	49	*
	50	* More research on qd6580 being done by willmore@cig.mot.com (David)
	51	* More Information given by Petr Soucek (petr@ryston.cz)
	52	* http://www.ryston.cz/petr/vlb
	53	*/
	54
	55	/*
	56	* base: Timer1
	57	*
	58	*
	59	* base+0x01: Config (R/O)
	60	*
	61	* bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
	62	* bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
	63	* bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
	64	* bit 3: qd6500: 1 = disabled, 0 = enabled
	65	* qd6580: 1
	66	* upper nibble:
	67	* qd6500: 1100
	68	* qd6580: either 1010 or 0101
	69	*
	70	*
	71	* base+0x02: Timer2 (qd6580 only)
	72	*
	73	*
	74	* base+0x03: Control (qd6580 only)
	75	*
	76	* bits 0-3 must always be set 1
	77	* bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
	78	* bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
	79	* 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
	80	* channel 1 for hdc & hdd
	81	* bit 1 : 1 = only disks on primary port
	82	* 0 = disks & ATAPI devices on primary port
	83	* bit 2-4 : always 0
	84	* bit 5 : status, but of what ?
	85	* bit 6 : always set 1 by dos driver
	86	* bit 7 : set 1 for non-ATAPI devices on primary port
	87	* (maybe read-ahead and post-write buffer ?)
	88	*/
	89
	90	static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
	91
	92	static void qd_write_reg (u8 content, unsigned long reg)
93	{
94	unsigned long flags;
95
96	spin_lock_irqsave(&ide_lock, flags);
97	outb(content,reg);
98	spin_unlock_irqrestore(&ide_lock, flags);
99	}
100
101	static u8 __init qd_read_reg (unsigned long reg)
102	{
103	unsigned long flags;
104	u8 read;
105
106	spin_lock_irqsave(&ide_lock, flags);
107	read = inb(reg);
108	spin_unlock_irqrestore(&ide_lock, flags);
109	return read;
110	}
111
112	/*
113	* qd_select:
114	*
115	* This routine is invoked from ide.c to prepare for access to a given drive.
116	*/
117
118	static void qd_select (ide_drive_t *drive)
119	{
120	u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) \|
121	(QD_TIMREG(drive) & 0x02);
122
123	if (timings[index] != QD_TIMING(drive))
124	qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
125	}
126
127	/*
128	* qd6500_compute_timing
129	*
130	* computes the timing value where
131	* lower nibble represents active time, in count of VLB clocks
132	* upper nibble represents recovery time, in count of VLB clocks
133	*/
134
135	static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
136	{
137	u8 active_cycle,recovery_cycle;
138
139	if (system_bus_clock()<=33) {
140	active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
141	recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
142	} else {
143	active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
144	recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
145	}
146
147	return((recovery_cycle<<4) \| 0x08 \| active_cycle);
148	}
149
150	/*
151	* qd6580_compute_timing
152	*
153	* idem for qd6580
154	*/
155
156	static u8 qd6580_compute_timing (int active_time, int recovery_time)
157	{
158	u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
159	u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
160
161	return((recovery_cycle<<4) \| active_cycle);
162	}
163
164	/*
165	* qd_find_disk_type
166	*
167	* tries to find timing from dos driver's table
168	*/
169
170	static int qd_find_disk_type (ide_drive_t *drive,
171	int active_time, int recovery_time)
172	{
173	struct qd65xx_timing_s *p;
174	char model[40];
175
176	if (!*drive->id->model) return 0;
177
178	strncpy(model,drive->id->model,40);
179	ide_fixstring(model,40,1); /* byte-swap */
180
181	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
182	if (!strncmp(p->model, model+p->offset, 4)) {
183	printk(KERN_DEBUG "%s: listed !\n", drive->name);
184	*active_time = p->active;
185	*recovery_time = p->recovery;
186	return 1;
187	}
188	}
189	return 0;
190	}
191
192	/*
193	* qd_timing_ok:
194	*
195	* check whether timings don't conflict
196	*/
197
198	static int qd_timing_ok (ide_drive_t drives[])
199	{
200	return (IDE_IMPLY(drives[0].present && drives[1].present,
201	IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
202	QD_TIMING(drives) == QD_TIMING(drives+1))));
203	/* if same timing register, must be same timing */
204	}
205
206	/*
207	* qd_set_timing:
208	*
209	* records the timing, and enables selectproc as needed
210	*/
211
212	static void qd_set_timing (ide_drive_t *drive, u8 timing)
213	{
214	ide_hwif_t *hwif = HWIF(drive);
215
216	drive->drive_data &= 0xff00;
217	drive->drive_data \|= timing;
218	if (qd_timing_ok(hwif->drives)) {
219	qd_select(drive); /* selects once */
220	hwif->selectproc = NULL;
221	} else
222	hwif->selectproc = &qd_select;
223
224	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
225	}
226
227	/*
228	* qd6500_tune_drive
229	*/
230
231	static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
232	{
233	int active_time = 175;
234	int recovery_time = 415; /* worst case values from the dos driver */
235
236	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
237	&& drive->id->tPIO && (drive->id->field_valid & 0x02)
238	&& drive->id->eide_pio >= 240) {
239
240	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
241	drive->id->tPIO);
242	active_time = 110;
243	recovery_time = drive->id->eide_pio - 120;
244	}
245
246	qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
247	}
248
249	/*
250	* qd6580_tune_drive
251	*/
252
253	static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
254	{
1da177e4	255	int base = HWIF(drive)->select_data;
7dd00083	256	unsigned int cycle_time;
1da177e4 LT	257	int active_time = 175;
	258	int recovery_time = 415; /* worst case values from the dos driver */
	259
	260	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
2134758d	261	pio = ide_get_best_pio_mode(drive, pio, 4);
7dd00083	262	cycle_time = ide_pio_cycle_time(drive, pio);
1da177e4 LT	263
	264	switch (pio) {
	265	case 0: break;
	266	case 3:
7dd00083	267	if (cycle_time >= 110) {
1da177e4	268	active_time = 86;
7dd00083	269	recovery_time = cycle_time - 102;
1da177e4 LT	270	} else
	271	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	272	break;
	273	case 4:
7dd00083	274	if (cycle_time >= 69) {
1da177e4	275	active_time = 70;
7dd00083	276	recovery_time = cycle_time - 61;
1da177e4 LT	277	} else
	278	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	279	break;
	280	default:
7dd00083	281	if (cycle_time >= 180) {
1da177e4	282	active_time = 110;
7dd00083	283	recovery_time = cycle_time - 120;
1da177e4 LT	284	} else {
1da177e4 LT	285	active_time = ide_pio_timings[pio].active_time;
7dd00083	286	recovery_time = cycle_time - active_time;
1da177e4 LT	287	}
	288	}
	289	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	290	}
	291
	292	if (!HWIF(drive)->channel && drive->media != ide_disk) {
	293	qd_write_reg(0x5f, QD_CONTROL_PORT);
	294	printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
	295	"and post-write buffer on %s.\n",
	296	drive->name, HWIF(drive)->name);
	297	}
	298
	299	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
	300	}
	301
	302	/*
	303	* qd_testreg
	304	*
	305	* tests if the given port is a register
	306	*/
	307
	308	static int __init qd_testreg(int port)
	309	{
	310	u8 savereg;
	311	u8 readreg;
	312	unsigned long flags;
	313
	314	spin_lock_irqsave(&ide_lock, flags);
	315	savereg = inb_p(port);
	316	outb_p(QD_TESTVAL, port); /* safe value */
	317	readreg = inb_p(port);
	318	outb(savereg, port);
	319	spin_unlock_irqrestore(&ide_lock, flags);
	320
	321	if (savereg == QD_TESTVAL) {
	322	printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
	323	printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
	324	printk(KERN_ERR "Assuming qd65xx is not present.\n");
	325	return 1;
	326	}
	327
	328	return (readreg != QD_TESTVAL);
	329	}
	330
	331	/*
	332	* qd_setup:
	333	*
	334	* called to setup an ata channel : adjusts attributes & links for tuning
	335	*/
	336
	337	static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
	338	unsigned int data0, unsigned int data1,
	339	void (tuneproc) (ide_drive_t , u8 pio))
	340	{
	341	hwif->chipset = ide_qd65xx;
	342	hwif->channel = hwif->index;
	343	hwif->select_data = base;
	344	hwif->config_data = config;
	345	hwif->drives[0].drive_data = data0;
	346	hwif->drives[1].drive_data = data1;
	347	hwif->drives[0].io_32bit =
	348	hwif->drives[1].io_32bit = 1;
4099d143	349	hwif->pio_mask = ATA_PIO4;
1da177e4 LT	350	hwif->tuneproc = tuneproc;
	351	probe_hwif_init(hwif);
	352	}
	353
	354	/*
	355	* qd_unsetup:
	356	*
	357	* called to unsetup an ata channel : back to default values, unlinks tuning
	358	*/
	359	/*
	360	static void __exit qd_unsetup(ide_hwif_t *hwif)
	361	{
	362	u8 config = hwif->config_data;
	363	int base = hwif->select_data;
	364	void tuneproc = (void ) hwif->tuneproc;
	365
	366	if (hwif->chipset != ide_qd65xx)
	367	return;
	368
	369	printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
	370
	371	hwif->selectproc = NULL;
	372	hwif->tuneproc = NULL;
	373
	374	if (tuneproc == (void *) qd6500_tune_drive) {
	375	// will do it for both
	376	qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
	377	} else if (tuneproc == (void *) qd6580_tune_drive) {
	378	if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
	379	qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
	380	qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
	381	} else {
	382	qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
	383	}
	384	} else {
	385	printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
	386	printk(KERN_WARNING "keeping settings !\n");
	387	}
	388	}
	389	*/
	390
	391	/*
	392	* qd_probe:
	393	*
	394	* looks at the specified baseport, and if qd found, registers & initialises it
	395	* return 1 if another qd may be probed
	396	*/
	397
	398	static int __init qd_probe(int base)
	399	{
	400	ide_hwif_t *hwif;
	401	u8 config;
	402	u8 unit;
	403
	404	config = qd_read_reg(QD_CONFIG_PORT);
	405
	406	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
	407	return 1;
	408
	409	unit = ! (config & QD_CONFIG_IDE_BASEPORT);
	410
	411	if ((config & 0xf0) == QD_CONFIG_QD6500) {
	412
	413	if (qd_testreg(base)) return 1; /* bad register */
414
415	/* qd6500 found */
416
417	hwif = &ide_hwifs[unit];
418	printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
419	printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
420	config, QD_ID3);
421
422	if (config & QD_CONFIG_DISABLED) {
423	printk(KERN_WARNING "qd6500 is disabled !\n");
424	return 1;
425	}
426
427	qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA,
428	&qd6500_tune_drive);
429
5cbf79cd	430	ide_proc_register_port(hwif);
1da177e4 LT	431
	432	return 1;
	433	}
	434
	435	if (((config & 0xf0) == QD_CONFIG_QD6580_A) \|\|
	436	((config & 0xf0) == QD_CONFIG_QD6580_B)) {
	437
	438	u8 control;
	439
	440	if (qd_testreg(base) \|\| qd_testreg(base+0x02)) return 1;
	441	/* bad registers */
	442
	443	/* qd6580 found */
	444
	445	control = qd_read_reg(QD_CONTROL_PORT);
	446
	447	printk(KERN_NOTICE "qd6580 at %#x\n", base);
	448	printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
	449	config, control, QD_ID3);
	450
	451	if (control & QD_CONTR_SEC_DISABLED) {
	452	/* secondary disabled */
	453
	454	hwif = &ide_hwifs[unit];
	455	printk(KERN_INFO "%s: qd6580: single IDE board\n",
	456	hwif->name);
	457	qd_setup(hwif, base, config \| (control << 8),
	458	QD6580_DEF_DATA, QD6580_DEF_DATA2,
	459	&qd6580_tune_drive);
	460	qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
	461
5cbf79cd	462	ide_proc_register_port(hwif);
1da177e4 LT	463
	464	return 1;
	465	} else {
	466	ide_hwif_t *mate;
	467
	468	hwif = &ide_hwifs[0];
	469	mate = &ide_hwifs[1];
	470	/* secondary enabled */
	471	printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
	472	hwif->name, mate->name);
	473
	474	qd_setup(hwif, base, config \| (control << 8),
	475	QD6580_DEF_DATA, QD6580_DEF_DATA,
	476	&qd6580_tune_drive);
	477	qd_setup(mate, base, config \| (control << 8),
	478	QD6580_DEF_DATA2, QD6580_DEF_DATA2,
	479	&qd6580_tune_drive);
	480	qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
	481
5cbf79cd BZ	482	ide_proc_register_port(hwif);
5cbf79cd BZ	483	ide_proc_register_port(mate);
1da177e4 LT	484
	485	return 0; /* no other qd65xx possible */
	486	}
	487	}
	488	/* no qd65xx found */
	489	return 1;
	490	}
	491
84913882 BZ	492	int probe_qd65xx = 0;
	493
	494	module_param_named(probe, probe_qd65xx, bool, 0);
	495	MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
	496
1da177e4 LT	497	/* Can be called directly from ide.c. */
	498	int __init qd65xx_init(void)
	499	{
84913882 BZ	500	if (probe_qd65xx == 0)
	501	return -ENODEV;
	502
1da177e4 LT	503	if (qd_probe(0x30))
	504	qd_probe(0xb0);
	505	if (ide_hwifs[0].chipset != ide_qd65xx &&
	506	ide_hwifs[1].chipset != ide_qd65xx)
	507	return -ENODEV;
	508	return 0;
	509	}
	510
	511	#ifdef MODULE
	512	module_init(qd65xx_init);
	513	#endif
	514
	515	MODULE_AUTHOR("Samuel Thibault");
	516	MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
	517	MODULE_LICENSE("GPL");