[linux-block.git] / drivers / ide / ide_platform.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Platform IDE driver
 *
 * Copyright (C) 2007 MontaVista Software
 *
 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
 */

#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/ata_platform.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/io.h>

static void plat_ide_setup_ports(struct ide_hw *hw, void __iomem *base,
				 void __iomem *ctrl,
				 struct pata_platform_info *pdata, int irq)
{
	unsigned long port = (unsigned long)base;
	int i;

	hw->io_ports.data_addr = port;

	port += (1 << pdata->ioport_shift);
	for (i = 1; i <= 7;
	     i++, port += (1 << pdata->ioport_shift))
		hw->io_ports_array[i] = port;

	hw->io_ports.ctl_addr = (unsigned long)ctrl;

	hw->irq = irq;
}

static const struct ide_port_info platform_ide_port_info = {
	.host_flags		= IDE_HFLAG_NO_DMA,
	.chipset		= ide_generic,
};

static int plat_ide_probe(struct platform_device *pdev)
{
	struct resource *res_base, *res_alt, *res_irq;
	void __iomem *base, *alt_base;
	struct pata_platform_info *pdata;
	struct ide_host *host;
	int ret = 0, mmio = 0;
	struct ide_hw hw, *hws[] = { &hw };
	struct ide_port_info d = platform_ide_port_info;

	pdata = dev_get_platdata(&pdev->dev);

	/* get a pointer to the register memory */
	res_base = platform_get_resource(pdev, IORESOURCE_IO, 0);
	res_alt = platform_get_resource(pdev, IORESOURCE_IO, 1);

	if (!res_base || !res_alt) {
		res_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
		res_alt = platform_get_resource(pdev, IORESOURCE_MEM, 1);
		if (!res_base || !res_alt) {
			ret = -ENOMEM;
			goto out;
		}
		mmio = 1;
	}

	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	if (!res_irq) {
		ret = -EINVAL;
		goto out;
	}

	if (mmio) {
		base = devm_ioremap(&pdev->dev,
			res_base->start, resource_size(res_base));
		alt_base = devm_ioremap(&pdev->dev,
			res_alt->start, resource_size(res_alt));
	} else {
		base = devm_ioport_map(&pdev->dev,
			res_base->start, resource_size(res_base));
		alt_base = devm_ioport_map(&pdev->dev,
			res_alt->start, resource_size(res_alt));
	}

	memset(&hw, 0, sizeof(hw));
	plat_ide_setup_ports(&hw, base, alt_base, pdata, res_irq->start);
	hw.dev = &pdev->dev;

	d.irq_flags = res_irq->flags & IRQF_TRIGGER_MASK;
	if (res_irq->flags & IORESOURCE_IRQ_SHAREABLE)
		d.irq_flags |= IRQF_SHARED;

	if (mmio)
		d.host_flags |= IDE_HFLAG_MMIO;

	ret = ide_host_add(&d, hws, 1, &host);
	if (ret)
		goto out;

	platform_set_drvdata(pdev, host);

	return 0;

out:
	return ret;
}

static int plat_ide_remove(struct platform_device *pdev)
{
	struct ide_host *host = dev_get_drvdata(&pdev->dev);

	ide_host_remove(host);

	return 0;
}

static struct platform_driver platform_ide_driver = {
	.driver = {
		.name = "pata_platform",
	},
	.probe = plat_ide_probe,
	.remove = plat_ide_remove,
};

module_platform_driver(platform_ide_driver);

MODULE_DESCRIPTION("Platform IDE driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:pata_platform");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
8cb1f567 AV	2	/*
	3	* Platform IDE driver
	4	*
	5	* Copyright (C) 2007 MontaVista Software
	6	*
	7	* Maintainer: Kumar Gala <galak@kernel.crashing.org>
8cb1f567 AV	8	*/
	9
	10	#include <linux/types.h>
	11	#include <linux/init.h>
	12	#include <linux/kernel.h>
	13	#include <linux/ide.h>
	14	#include <linux/ioport.h>
	15	#include <linux/module.h>
0a87e3e9	16	#include <linux/ata_platform.h>
8cb1f567	17	#include <linux/platform_device.h>
89e9aad6	18	#include <linux/interrupt.h>
8cb1f567 AV	19	#include <linux/io.h>
8cb1f567 AV	20
fe31edc8 GKH	21	static void plat_ide_setup_ports(struct ide_hw hw, void __iomem base,
	22	void __iomem *ctrl,
	23	struct pata_platform_info *pdata, int irq)
8cb1f567 AV	24	{
8cb1f567 AV	25	unsigned long port = (unsigned long)base;
baa8f3e9	26	int i;
8cb1f567	27
4c3032d8	28	hw->io_ports.data_addr = port;
8cb1f567 AV	29
8cb1f567 AV	30	port += (1 << pdata->ioport_shift);
4c3032d8	31	for (i = 1; i <= 7;
8cb1f567	32	i++, port += (1 << pdata->ioport_shift))
4c3032d8	33	hw->io_ports_array[i] = port;
8cb1f567	34
4c3032d8	35	hw->io_ports.ctl_addr = (unsigned long)ctrl;
8cb1f567	36
57c802e8	37	hw->irq = irq;
8cb1f567 AV	38	}
8cb1f567 AV	39
7b60fa16 BZ	40	static const struct ide_port_info platform_ide_port_info = {
7b60fa16 BZ	41	.host_flags = IDE_HFLAG_NO_DMA,
29e52cf7	42	.chipset = ide_generic,
7b60fa16 BZ	43	};
7b60fa16 BZ	44
fe31edc8	45	static int plat_ide_probe(struct platform_device *pdev)
8cb1f567 AV	46	{
8cb1f567 AV	47	struct resource res_base, res_alt, *res_irq;
04244937	48	void __iomem base, alt_base;
8cb1f567	49	struct pata_platform_info *pdata;
48c3c107	50	struct ide_host *host;
c97c6aca	51	int ret = 0, mmio = 0;
9f36d314	52	struct ide_hw hw, *hws[] = { &hw };
7b60fa16	53	struct ide_port_info d = platform_ide_port_info;
8cb1f567	54
7b6b5612	55	pdata = dev_get_platdata(&pdev->dev);
8cb1f567 AV	56
	57	/* get a pointer to the register memory */
	58	res_base = platform_get_resource(pdev, IORESOURCE_IO, 0);
	59	res_alt = platform_get_resource(pdev, IORESOURCE_IO, 1);
	60
	61	if (!res_base \|\| !res_alt) {
	62	res_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	63	res_alt = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	64	if (!res_base \|\| !res_alt) {
	65	ret = -ENOMEM;
	66	goto out;
	67	}
	68	mmio = 1;
	69	}
	70
	71	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	72	if (!res_irq) {
	73	ret = -EINVAL;
	74	goto out;
	75	}
	76
	77	if (mmio) {
04244937	78	base = devm_ioremap(&pdev->dev,
30433d81	79	res_base->start, resource_size(res_base));
04244937	80	alt_base = devm_ioremap(&pdev->dev,
30433d81	81	res_alt->start, resource_size(res_alt));
8cb1f567	82	} else {
04244937	83	base = devm_ioport_map(&pdev->dev,
30433d81	84	res_base->start, resource_size(res_base));
04244937	85	alt_base = devm_ioport_map(&pdev->dev,
30433d81	86	res_alt->start, resource_size(res_alt));
8cb1f567 AV	87	}
8cb1f567 AV	88
57c802e8	89	memset(&hw, 0, sizeof(hw));
04244937	90	plat_ide_setup_ports(&hw, base, alt_base, pdata, res_irq->start);
57c802e8 BZ	91	hw.dev = &pdev->dev;
57c802e8 BZ	92
89e9aad6 TG	93	d.irq_flags = res_irq->flags & IRQF_TRIGGER_MASK;
	94	if (res_irq->flags & IORESOURCE_IRQ_SHAREABLE)
	95	d.irq_flags \|= IRQF_SHARED;
	96
761052e6	97	if (mmio)
7b60fa16	98	d.host_flags \|= IDE_HFLAG_MMIO;
57c802e8	99
dca39830	100	ret = ide_host_add(&d, hws, 1, &host);
6f904d01	101	if (ret)
48c3c107	102	goto out;
8cb1f567	103
48c3c107	104	platform_set_drvdata(pdev, host);
8cb1f567 AV	105
	106	return 0;
	107
	108	out:
	109	return ret;
	110	}
	111
fe31edc8	112	static int plat_ide_remove(struct platform_device *pdev)
8cb1f567	113	{
fcb52077	114	struct ide_host *host = dev_get_drvdata(&pdev->dev);
8cb1f567	115
48c3c107	116	ide_host_remove(host);
8cb1f567 AV	117
	118	return 0;
	119	}
	120
	121	static struct platform_driver platform_ide_driver = {
	122	.driver = {
	123	.name = "pata_platform",
	124	},
	125	.probe = plat_ide_probe,
fe31edc8	126	.remove = plat_ide_remove,
8cb1f567 AV	127	};
8cb1f567 AV	128
a53dae49	129	module_platform_driver(platform_ide_driver);
8cb1f567 AV	130
	131	MODULE_DESCRIPTION("Platform IDE driver");
	132	MODULE_LICENSE("GPL");
458622fc	133	MODULE_ALIAS("platform:pata_platform");