[linux-2.6-block.git] / drivers / ide / ide-generic.c

/*
 * generic/default IDE host driver
 *
 * Copyright (C) 2004, 2008-2009 Bartlomiej Zolnierkiewicz
 * This code was split off from ide.c.  See it for original copyrights.
 *
 * May be copied or modified under the terms of the GNU General Public License.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/ide.h>
#include <linux/pci_ids.h>

/* FIXME: convert arm and m32r to use ide_platform host driver */
#ifdef CONFIG_ARM
#include <asm/irq.h>
#endif
#ifdef CONFIG_M32R
#include <asm/m32r.h>
#endif

#define DRV_NAME	"ide_generic"

static int probe_mask;
module_param(probe_mask, int, 0);
MODULE_PARM_DESC(probe_mask, "probe mask for legacy ISA IDE ports");

static const struct ide_port_info ide_generic_port_info = {
	.host_flags		= IDE_HFLAG_NO_DMA,
};

#ifdef CONFIG_ARM
static const u16 legacy_bases[] = { 0x1f0 };
static const int legacy_irqs[]  = { IRQ_HARDDISK };
#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) || \
      defined(CONFIG_PLAT_OPSPUT)
static const u16 legacy_bases[] = { 0x1f0 };
static const int legacy_irqs[]  = { PLD_IRQ_CFIREQ };
#elif defined(CONFIG_PLAT_MAPPI3)
static const u16 legacy_bases[] = { 0x1f0, 0x170 };
static const int legacy_irqs[]  = { PLD_IRQ_CFIREQ, PLD_IRQ_IDEIREQ };
#elif defined(CONFIG_ALPHA)
static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168 };
static const int legacy_irqs[]  = { 14, 15, 11, 10 };
#else
static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
static const int legacy_irqs[]  = { 14, 15, 11, 10, 8, 12 };
#endif

static void ide_generic_check_pci_legacy_iobases(int *primary, int *secondary)
{
#ifdef CONFIG_PCI
	struct pci_dev *p = NULL;
	u16 val;

	for_each_pci_dev(p) {
		if (pci_resource_start(p, 0) == 0x1f0)
			*primary = 1;
		if (pci_resource_start(p, 2) == 0x170)
			*secondary = 1;

		/* Cyrix CS55{1,2}0 pre SFF MWDMA ATA on the bridge */
		if (p->vendor == PCI_VENDOR_ID_CYRIX &&
		    (p->device == PCI_DEVICE_ID_CYRIX_5510 ||
		     p->device == PCI_DEVICE_ID_CYRIX_5520))
			*primary = *secondary = 1;

		/* Intel MPIIX - PIO ATA on non PCI side of bridge */
		if (p->vendor == PCI_VENDOR_ID_INTEL &&
		    p->device == PCI_DEVICE_ID_INTEL_82371MX) {
			pci_read_config_word(p, 0x6C, &val);
			if (val & 0x8000) {
				/* ATA port enabled */
				if (val & 0x4000)
					*secondary = 1;
				else
					*primary = 1;
			}
		}
	}
#endif
}

static int __init ide_generic_init(void)
{
	hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
	unsigned long io_addr;
	int i, rc = 0, primary = 0, secondary = 0;

	ide_generic_check_pci_legacy_iobases(&primary, &secondary);

	if (!probe_mask) {
		printk(KERN_INFO DRV_NAME ": please use \"probe_mask=0x3f\" "
		     "module parameter for probing all legacy ISA IDE ports\n");

		if (primary == 0)
			probe_mask |= 0x1;

		if (secondary == 0)
			probe_mask |= 0x2;
	} else
		printk(KERN_INFO DRV_NAME ": enforcing probing of I/O ports "
			"upon user request\n");

	for (i = 0; i < ARRAY_SIZE(legacy_bases); i++) {
		io_addr = legacy_bases[i];

		if ((probe_mask & (1 << i)) && io_addr) {
			if (!request_region(io_addr, 8, DRV_NAME)) {
				printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX "
						"not free.\n",
						DRV_NAME, io_addr, io_addr + 7);
				rc = -EBUSY;
				continue;
			}

			if (!request_region(io_addr + 0x206, 1, DRV_NAME)) {
				printk(KERN_ERR "%s: I/O resource 0x%lX "
						"not free.\n",
						DRV_NAME, io_addr + 0x206);
				release_region(io_addr, 8);
				rc = -EBUSY;
				continue;
			}

			memset(&hw, 0, sizeof(hw));
			ide_std_init_ports(&hw, io_addr, io_addr + 0x206);
#ifdef CONFIG_IA64
			hw.irq = isa_irq_to_vector(legacy_irqs[i]);
#else
			hw.irq = legacy_irqs[i];
#endif
			hw.chipset = ide_generic;

			rc = ide_host_add(&ide_generic_port_info, hws, NULL);
			if (rc) {
				release_region(io_addr + 0x206, 1);
				release_region(io_addr, 8);
			}
		}
	}

	return rc;
}

module_init(ide_generic_init);

MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* generic/default IDE host driver
	3	*
52913ab2	4	* Copyright (C) 2004, 2008-2009 Bartlomiej Zolnierkiewicz
1da177e4 LT	5	* This code was split off from ide.c. See it for original copyrights.
	6	*
	7	* May be copied or modified under the terms of the GNU General Public License.
	8	*/
	9
	10	#include <linux/kernel.h>
	11	#include <linux/init.h>
	12	#include <linux/module.h>
	13	#include <linux/ide.h>
20df429d	14	#include <linux/pci_ids.h>
1da177e4	15
4465461e BZ	16	/* FIXME: convert arm and m32r to use ide_platform host driver */
	17	#ifdef CONFIG_ARM
	18	#include <asm/irq.h>
	19	#endif
f01d35d8 BZ	20	#ifdef CONFIG_M32R
	21	#include <asm/m32r.h>
	22	#endif
	23
f0298512 BZ	24	#define DRV_NAME "ide_generic"
f0298512 BZ	25
20df429d	26	static int probe_mask;
0cbccbc3 BZ	27	module_param(probe_mask, int, 0);
	28	MODULE_PARM_DESC(probe_mask, "probe mask for legacy ISA IDE ports");
	29
e518e587 BZ	30	static const struct ide_port_info ide_generic_port_info = {
	31	.host_flags = IDE_HFLAG_NO_DMA,
	32	};
	33
4465461e BZ	34	#ifdef CONFIG_ARM
	35	static const u16 legacy_bases[] = { 0x1f0 };
	36	static const int legacy_irqs[] = { IRQ_HARDDISK };
	37	#elif defined(CONFIG_PLAT_M32700UT) \|\| defined(CONFIG_PLAT_MAPPI2) \|\| \
	38	defined(CONFIG_PLAT_OPSPUT)
f01d35d8 BZ	39	static const u16 legacy_bases[] = { 0x1f0 };
	40	static const int legacy_irqs[] = { PLD_IRQ_CFIREQ };
	41	#elif defined(CONFIG_PLAT_MAPPI3)
	42	static const u16 legacy_bases[] = { 0x1f0, 0x170 };
	43	static const int legacy_irqs[] = { PLD_IRQ_CFIREQ, PLD_IRQ_IDEIREQ };
	44	#elif defined(CONFIG_ALPHA)
	45	static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168 };
	46	static const int legacy_irqs[] = { 14, 15, 11, 10 };
	47	#else
	48	static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
	49	static const int legacy_irqs[] = { 14, 15, 11, 10, 8, 12 };
	50	#endif
	51
20df429d BP	52	static void ide_generic_check_pci_legacy_iobases(int primary, int secondary)
20df429d BP	53	{
4465461e	54	#ifdef CONFIG_PCI
20df429d BP	55	struct pci_dev *p = NULL;
	56	u16 val;
	57
	58	for_each_pci_dev(p) {
20df429d BP	59	if (pci_resource_start(p, 0) == 0x1f0)
	60	*primary = 1;
	61	if (pci_resource_start(p, 2) == 0x170)
	62	*secondary = 1;
	63
	64	/* Cyrix CS55{1,2}0 pre SFF MWDMA ATA on the bridge */
	65	if (p->vendor == PCI_VENDOR_ID_CYRIX &&
	66	(p->device == PCI_DEVICE_ID_CYRIX_5510 \|\|
	67	p->device == PCI_DEVICE_ID_CYRIX_5520))
	68	primary = secondary = 1;
	69
	70	/* Intel MPIIX - PIO ATA on non PCI side of bridge */
	71	if (p->vendor == PCI_VENDOR_ID_INTEL &&
	72	p->device == PCI_DEVICE_ID_INTEL_82371MX) {
20df429d BP	73	pci_read_config_word(p, 0x6C, &val);
	74	if (val & 0x8000) {
	75	/* ATA port enabled */
	76	if (val & 0x4000)
	77	*secondary = 1;
	78	else
	79	*primary = 1;
	80	}
	81	}
	82	}
4465461e	83	#endif
20df429d BP	84	}
20df429d BP	85
1da177e4 LT	86	static int __init ide_generic_init(void)
1da177e4 LT	87	{
6ccc6d7e	88	hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
8a69580e	89	unsigned long io_addr;
6ccc6d7e	90	int i, rc = 0, primary = 0, secondary = 0;
151575e4	91
20df429d BP	92	ide_generic_check_pci_legacy_iobases(&primary, &secondary);
	93
	94	if (!probe_mask) {
	95	printk(KERN_INFO DRV_NAME ": please use \"probe_mask=0x3f\" "
	96	"module parameter for probing all legacy ISA IDE ports\n");
	97
	98	if (primary == 0)
	99	probe_mask \|= 0x1;
	100
	101	if (secondary == 0)
	102	probe_mask \|= 0x2;
	103	} else
	104	printk(KERN_INFO DRV_NAME ": enforcing probing of I/O ports "
	105	"upon user request\n");
0cbccbc3	106
f01d35d8 BZ	107	for (i = 0; i < ARRAY_SIZE(legacy_bases); i++) {
f01d35d8 BZ	108	io_addr = legacy_bases[i];
486c92e2	109
0cbccbc3	110	if ((probe_mask & (1 << i)) && io_addr) {
16649498 BZ	111	if (!request_region(io_addr, 8, DRV_NAME)) {
	112	printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX "
	113	"not free.\n",
	114	DRV_NAME, io_addr, io_addr + 7);
4465461e	115	rc = -EBUSY;
16649498 BZ	116	continue;
	117	}
	118
	119	if (!request_region(io_addr + 0x206, 1, DRV_NAME)) {
	120	printk(KERN_ERR "%s: I/O resource 0x%lX "
	121	"not free.\n",
	122	DRV_NAME, io_addr + 0x206);
	123	release_region(io_addr, 8);
4465461e	124	rc = -EBUSY;
16649498 BZ	125	continue;
	126	}
	127
6ccc6d7e BZ	128	memset(&hw, 0, sizeof(hw));
6ccc6d7e BZ	129	ide_std_init_ports(&hw, io_addr, io_addr + 0x206);
f01d35d8	130	#ifdef CONFIG_IA64
6ccc6d7e	131	hw.irq = isa_irq_to_vector(legacy_irqs[i]);
f01d35d8	132	#else
6ccc6d7e	133	hw.irq = legacy_irqs[i];
f01d35d8	134	#endif
6ccc6d7e	135	hw.chipset = ide_generic;
b2a53bc6	136
e518e587	137	rc = ide_host_add(&ide_generic_port_info, hws, NULL);
6ccc6d7e BZ	138	if (rc) {
	139	release_region(io_addr + 0x206, 1);
	140	release_region(io_addr, 8);
	141	}
16649498	142	}
b2a53bc6	143	}
151575e4	144
8a69580e	145	return rc;
1da177e4 LT	146	}
	147
	148	module_init(ide_generic_init);
	149
	150	MODULE_LICENSE("GPL");