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1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * Copyright (C) 2018 Cadence Design Systems Inc. | |
4 | * | |
5 | * Author: Boris Brezillon <boris.brezillon@bootlin.com> | |
6 | */ | |
7 | ||
8 | #include <linux/atomic.h> | |
9 | #include <linux/bug.h> | |
10 | #include <linux/device.h> | |
11 | #include <linux/err.h> | |
12 | #include <linux/export.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/list.h> | |
15 | #include <linux/of.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/spinlock.h> | |
18 | #include <linux/workqueue.h> | |
19 | ||
20 | #include "internals.h" | |
21 | ||
22 | static DEFINE_IDR(i3c_bus_idr); | |
23 | static DEFINE_MUTEX(i3c_core_lock); | |
24 | ||
25 | /** | |
26 | * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation | |
27 | * @bus: I3C bus to take the lock on | |
28 | * | |
29 | * This function takes the bus lock so that no other operations can occur on | |
30 | * the bus. This is needed for all kind of bus maintenance operation, like | |
31 | * - enabling/disabling slave events | |
32 | * - re-triggering DAA | |
33 | * - changing the dynamic address of a device | |
34 | * - relinquishing mastership | |
35 | * - ... | |
36 | * | |
37 | * The reason for this kind of locking is that we don't want drivers and core | |
38 | * logic to rely on I3C device information that could be changed behind their | |
39 | * back. | |
40 | */ | |
41 | static void i3c_bus_maintenance_lock(struct i3c_bus *bus) | |
42 | { | |
43 | down_write(&bus->lock); | |
44 | } | |
45 | ||
46 | /** | |
47 | * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance | |
48 | * operation | |
49 | * @bus: I3C bus to release the lock on | |
50 | * | |
51 | * Should be called when the bus maintenance operation is done. See | |
52 | * i3c_bus_maintenance_lock() for more details on what these maintenance | |
53 | * operations are. | |
54 | */ | |
55 | static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) | |
56 | { | |
57 | up_write(&bus->lock); | |
58 | } | |
59 | ||
60 | /** | |
61 | * i3c_bus_normaluse_lock - Lock the bus for a normal operation | |
62 | * @bus: I3C bus to take the lock on | |
63 | * | |
64 | * This function takes the bus lock for any operation that is not a maintenance | |
65 | * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of | |
66 | * maintenance operations). Basically all communications with I3C devices are | |
67 | * normal operations (HDR, SDR transfers or CCC commands that do not change bus | |
68 | * state or I3C dynamic address). | |
69 | * | |
70 | * Note that this lock is not guaranteeing serialization of normal operations. | |
71 | * In other words, transfer requests passed to the I3C master can be submitted | |
72 | * in parallel and I3C master drivers have to use their own locking to make | |
73 | * sure two different communications are not inter-mixed, or access to the | |
74 | * output/input queue is not done while the engine is busy. | |
75 | */ | |
76 | void i3c_bus_normaluse_lock(struct i3c_bus *bus) | |
77 | { | |
78 | down_read(&bus->lock); | |
79 | } | |
80 | ||
81 | /** | |
82 | * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation | |
83 | * @bus: I3C bus to release the lock on | |
84 | * | |
85 | * Should be called when a normal operation is done. See | |
86 | * i3c_bus_normaluse_lock() for more details on what these normal operations | |
87 | * are. | |
88 | */ | |
89 | void i3c_bus_normaluse_unlock(struct i3c_bus *bus) | |
90 | { | |
91 | up_read(&bus->lock); | |
92 | } | |
93 | ||
94 | static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) | |
95 | { | |
96 | return container_of(dev, struct i3c_master_controller, dev); | |
97 | } | |
98 | ||
99 | static const struct device_type i3c_device_type; | |
100 | ||
101 | static struct i3c_bus *dev_to_i3cbus(struct device *dev) | |
102 | { | |
103 | struct i3c_master_controller *master; | |
104 | ||
105 | if (dev->type == &i3c_device_type) | |
106 | return dev_to_i3cdev(dev)->bus; | |
107 | ||
108 | master = dev_to_i3cmaster(dev); | |
109 | ||
110 | return &master->bus; | |
111 | } | |
112 | ||
113 | static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) | |
114 | { | |
115 | struct i3c_master_controller *master; | |
116 | ||
117 | if (dev->type == &i3c_device_type) | |
118 | return dev_to_i3cdev(dev)->desc; | |
119 | ||
120 | master = container_of(dev, struct i3c_master_controller, dev); | |
121 | ||
122 | return master->this; | |
123 | } | |
124 | ||
125 | static ssize_t bcr_show(struct device *dev, | |
126 | struct device_attribute *da, | |
127 | char *buf) | |
128 | { | |
129 | struct i3c_bus *bus = dev_to_i3cbus(dev); | |
130 | struct i3c_dev_desc *desc; | |
131 | ssize_t ret; | |
132 | ||
133 | i3c_bus_normaluse_lock(bus); | |
134 | desc = dev_to_i3cdesc(dev); | |
135 | ret = sprintf(buf, "%x\n", desc->info.bcr); | |
136 | i3c_bus_normaluse_unlock(bus); | |
137 | ||
138 | return ret; | |
139 | } | |
140 | static DEVICE_ATTR_RO(bcr); | |
141 | ||
142 | static ssize_t dcr_show(struct device *dev, | |
143 | struct device_attribute *da, | |
144 | char *buf) | |
145 | { | |
146 | struct i3c_bus *bus = dev_to_i3cbus(dev); | |
147 | struct i3c_dev_desc *desc; | |
148 | ssize_t ret; | |
149 | ||
150 | i3c_bus_normaluse_lock(bus); | |
151 | desc = dev_to_i3cdesc(dev); | |
152 | ret = sprintf(buf, "%x\n", desc->info.dcr); | |
153 | i3c_bus_normaluse_unlock(bus); | |
154 | ||
155 | return ret; | |
156 | } | |
157 | static DEVICE_ATTR_RO(dcr); | |
158 | ||
159 | static ssize_t pid_show(struct device *dev, | |
160 | struct device_attribute *da, | |
161 | char *buf) | |
162 | { | |
163 | struct i3c_bus *bus = dev_to_i3cbus(dev); | |
164 | struct i3c_dev_desc *desc; | |
165 | ssize_t ret; | |
166 | ||
167 | i3c_bus_normaluse_lock(bus); | |
168 | desc = dev_to_i3cdesc(dev); | |
169 | ret = sprintf(buf, "%llx\n", desc->info.pid); | |
170 | i3c_bus_normaluse_unlock(bus); | |
171 | ||
172 | return ret; | |
173 | } | |
174 | static DEVICE_ATTR_RO(pid); | |
175 | ||
176 | static ssize_t dynamic_address_show(struct device *dev, | |
177 | struct device_attribute *da, | |
178 | char *buf) | |
179 | { | |
180 | struct i3c_bus *bus = dev_to_i3cbus(dev); | |
181 | struct i3c_dev_desc *desc; | |
182 | ssize_t ret; | |
183 | ||
184 | i3c_bus_normaluse_lock(bus); | |
185 | desc = dev_to_i3cdesc(dev); | |
186 | ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); | |
187 | i3c_bus_normaluse_unlock(bus); | |
188 | ||
189 | return ret; | |
190 | } | |
191 | static DEVICE_ATTR_RO(dynamic_address); | |
192 | ||
193 | static const char * const hdrcap_strings[] = { | |
194 | "hdr-ddr", "hdr-tsp", "hdr-tsl", | |
195 | }; | |
196 | ||
197 | static ssize_t hdrcap_show(struct device *dev, | |
198 | struct device_attribute *da, | |
199 | char *buf) | |
200 | { | |
201 | struct i3c_bus *bus = dev_to_i3cbus(dev); | |
202 | struct i3c_dev_desc *desc; | |
203 | ssize_t offset = 0, ret; | |
204 | unsigned long caps; | |
205 | int mode; | |
206 | ||
207 | i3c_bus_normaluse_lock(bus); | |
208 | desc = dev_to_i3cdesc(dev); | |
209 | caps = desc->info.hdr_cap; | |
210 | for_each_set_bit(mode, &caps, 8) { | |
211 | if (mode >= ARRAY_SIZE(hdrcap_strings)) | |
212 | break; | |
213 | ||
214 | if (!hdrcap_strings[mode]) | |
215 | continue; | |
216 | ||
217 | ret = sprintf(buf + offset, offset ? " %s" : "%s", | |
218 | hdrcap_strings[mode]); | |
219 | if (ret < 0) | |
220 | goto out; | |
221 | ||
222 | offset += ret; | |
223 | } | |
224 | ||
225 | ret = sprintf(buf + offset, "\n"); | |
226 | if (ret < 0) | |
227 | goto out; | |
228 | ||
229 | ret = offset + ret; | |
230 | ||
231 | out: | |
232 | i3c_bus_normaluse_unlock(bus); | |
233 | ||
234 | return ret; | |
235 | } | |
236 | static DEVICE_ATTR_RO(hdrcap); | |
237 | ||
238 | static struct attribute *i3c_device_attrs[] = { | |
239 | &dev_attr_bcr.attr, | |
240 | &dev_attr_dcr.attr, | |
241 | &dev_attr_pid.attr, | |
242 | &dev_attr_dynamic_address.attr, | |
243 | &dev_attr_hdrcap.attr, | |
244 | NULL, | |
245 | }; | |
246 | ATTRIBUTE_GROUPS(i3c_device); | |
247 | ||
248 | static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env) | |
249 | { | |
250 | struct i3c_device *i3cdev = dev_to_i3cdev(dev); | |
251 | struct i3c_device_info devinfo; | |
252 | u16 manuf, part, ext; | |
253 | ||
254 | i3c_device_get_info(i3cdev, &devinfo); | |
255 | manuf = I3C_PID_MANUF_ID(devinfo.pid); | |
256 | part = I3C_PID_PART_ID(devinfo.pid); | |
257 | ext = I3C_PID_EXTRA_INFO(devinfo.pid); | |
258 | ||
259 | if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) | |
260 | return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", | |
261 | devinfo.dcr, manuf); | |
262 | ||
263 | return add_uevent_var(env, | |
264 | "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04xext%04x", | |
265 | devinfo.dcr, manuf, part, ext); | |
266 | } | |
267 | ||
268 | static const struct device_type i3c_device_type = { | |
269 | .groups = i3c_device_groups, | |
270 | .uevent = i3c_device_uevent, | |
271 | }; | |
272 | ||
273 | static const struct i3c_device_id * | |
274 | i3c_device_match_id(struct i3c_device *i3cdev, | |
275 | const struct i3c_device_id *id_table) | |
276 | { | |
277 | struct i3c_device_info devinfo; | |
278 | const struct i3c_device_id *id; | |
279 | ||
280 | i3c_device_get_info(i3cdev, &devinfo); | |
281 | ||
282 | /* | |
283 | * The lower 32bits of the provisional ID is just filled with a random | |
284 | * value, try to match using DCR info. | |
285 | */ | |
286 | if (!I3C_PID_RND_LOWER_32BITS(devinfo.pid)) { | |
287 | u16 manuf = I3C_PID_MANUF_ID(devinfo.pid); | |
288 | u16 part = I3C_PID_PART_ID(devinfo.pid); | |
289 | u16 ext_info = I3C_PID_EXTRA_INFO(devinfo.pid); | |
290 | ||
291 | /* First try to match by manufacturer/part ID. */ | |
292 | for (id = id_table; id->match_flags != 0; id++) { | |
293 | if ((id->match_flags & I3C_MATCH_MANUF_AND_PART) != | |
294 | I3C_MATCH_MANUF_AND_PART) | |
295 | continue; | |
296 | ||
297 | if (manuf != id->manuf_id || part != id->part_id) | |
298 | continue; | |
299 | ||
300 | if ((id->match_flags & I3C_MATCH_EXTRA_INFO) && | |
301 | ext_info != id->extra_info) | |
302 | continue; | |
303 | ||
304 | return id; | |
305 | } | |
306 | } | |
307 | ||
308 | /* Fallback to DCR match. */ | |
309 | for (id = id_table; id->match_flags != 0; id++) { | |
310 | if ((id->match_flags & I3C_MATCH_DCR) && | |
311 | id->dcr == devinfo.dcr) | |
312 | return id; | |
313 | } | |
314 | ||
315 | return NULL; | |
316 | } | |
317 | ||
318 | static int i3c_device_match(struct device *dev, struct device_driver *drv) | |
319 | { | |
320 | struct i3c_device *i3cdev; | |
321 | struct i3c_driver *i3cdrv; | |
322 | ||
323 | if (dev->type != &i3c_device_type) | |
324 | return 0; | |
325 | ||
326 | i3cdev = dev_to_i3cdev(dev); | |
327 | i3cdrv = drv_to_i3cdrv(drv); | |
328 | if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) | |
329 | return 1; | |
330 | ||
331 | return 0; | |
332 | } | |
333 | ||
334 | static int i3c_device_probe(struct device *dev) | |
335 | { | |
336 | struct i3c_device *i3cdev = dev_to_i3cdev(dev); | |
337 | struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); | |
338 | ||
339 | return driver->probe(i3cdev); | |
340 | } | |
341 | ||
342 | static int i3c_device_remove(struct device *dev) | |
343 | { | |
344 | struct i3c_device *i3cdev = dev_to_i3cdev(dev); | |
345 | struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); | |
346 | int ret; | |
347 | ||
348 | ret = driver->remove(i3cdev); | |
349 | if (ret) | |
350 | return ret; | |
351 | ||
352 | i3c_device_free_ibi(i3cdev); | |
353 | ||
354 | return ret; | |
355 | } | |
356 | ||
357 | struct bus_type i3c_bus_type = { | |
358 | .name = "i3c", | |
359 | .match = i3c_device_match, | |
360 | .probe = i3c_device_probe, | |
361 | .remove = i3c_device_remove, | |
362 | }; | |
363 | ||
364 | static enum i3c_addr_slot_status | |
365 | i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) | |
366 | { | |
367 | int status, bitpos = addr * 2; | |
368 | ||
369 | if (addr > I2C_MAX_ADDR) | |
370 | return I3C_ADDR_SLOT_RSVD; | |
371 | ||
372 | status = bus->addrslots[bitpos / BITS_PER_LONG]; | |
373 | status >>= bitpos % BITS_PER_LONG; | |
374 | ||
375 | return status & I3C_ADDR_SLOT_STATUS_MASK; | |
376 | } | |
377 | ||
378 | static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, | |
379 | enum i3c_addr_slot_status status) | |
380 | { | |
381 | int bitpos = addr * 2; | |
382 | unsigned long *ptr; | |
383 | ||
384 | if (addr > I2C_MAX_ADDR) | |
385 | return; | |
386 | ||
387 | ptr = bus->addrslots + (bitpos / BITS_PER_LONG); | |
388 | *ptr &= ~(I3C_ADDR_SLOT_STATUS_MASK << (bitpos % BITS_PER_LONG)); | |
389 | *ptr |= status << (bitpos % BITS_PER_LONG); | |
390 | } | |
391 | ||
392 | static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) | |
393 | { | |
394 | enum i3c_addr_slot_status status; | |
395 | ||
396 | status = i3c_bus_get_addr_slot_status(bus, addr); | |
397 | ||
398 | return status == I3C_ADDR_SLOT_FREE; | |
399 | } | |
400 | ||
401 | static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) | |
402 | { | |
403 | enum i3c_addr_slot_status status; | |
404 | u8 addr; | |
405 | ||
406 | for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { | |
407 | status = i3c_bus_get_addr_slot_status(bus, addr); | |
408 | if (status == I3C_ADDR_SLOT_FREE) | |
409 | return addr; | |
410 | } | |
411 | ||
412 | return -ENOMEM; | |
413 | } | |
414 | ||
415 | static void i3c_bus_init_addrslots(struct i3c_bus *bus) | |
416 | { | |
417 | int i; | |
418 | ||
419 | /* Addresses 0 to 7 are reserved. */ | |
420 | for (i = 0; i < 8; i++) | |
421 | i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); | |
422 | ||
423 | /* | |
424 | * Reserve broadcast address and all addresses that might collide | |
425 | * with the broadcast address when facing a single bit error. | |
426 | */ | |
427 | i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, | |
428 | I3C_ADDR_SLOT_RSVD); | |
429 | for (i = 0; i < 7; i++) | |
430 | i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), | |
431 | I3C_ADDR_SLOT_RSVD); | |
432 | } | |
433 | ||
434 | static void i3c_bus_cleanup(struct i3c_bus *i3cbus) | |
435 | { | |
436 | mutex_lock(&i3c_core_lock); | |
437 | idr_remove(&i3c_bus_idr, i3cbus->id); | |
438 | mutex_unlock(&i3c_core_lock); | |
439 | } | |
440 | ||
441 | static int i3c_bus_init(struct i3c_bus *i3cbus) | |
442 | { | |
443 | int ret; | |
444 | ||
445 | init_rwsem(&i3cbus->lock); | |
446 | INIT_LIST_HEAD(&i3cbus->devs.i2c); | |
447 | INIT_LIST_HEAD(&i3cbus->devs.i3c); | |
448 | i3c_bus_init_addrslots(i3cbus); | |
449 | i3cbus->mode = I3C_BUS_MODE_PURE; | |
450 | ||
451 | mutex_lock(&i3c_core_lock); | |
452 | ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL); | |
453 | mutex_unlock(&i3c_core_lock); | |
454 | ||
455 | if (ret < 0) | |
456 | return ret; | |
457 | ||
458 | i3cbus->id = ret; | |
459 | ||
460 | return 0; | |
461 | } | |
462 | ||
463 | static const char * const i3c_bus_mode_strings[] = { | |
464 | [I3C_BUS_MODE_PURE] = "pure", | |
465 | [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", | |
466 | [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", | |
467 | }; | |
468 | ||
469 | static ssize_t mode_show(struct device *dev, | |
470 | struct device_attribute *da, | |
471 | char *buf) | |
472 | { | |
473 | struct i3c_bus *i3cbus = dev_to_i3cbus(dev); | |
474 | ssize_t ret; | |
475 | ||
476 | i3c_bus_normaluse_lock(i3cbus); | |
477 | if (i3cbus->mode < 0 || | |
afe120c7 | 478 | i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || |
3a379bbc BB |
479 | !i3c_bus_mode_strings[i3cbus->mode]) |
480 | ret = sprintf(buf, "unknown\n"); | |
481 | else | |
482 | ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); | |
483 | i3c_bus_normaluse_unlock(i3cbus); | |
484 | ||
485 | return ret; | |
486 | } | |
487 | static DEVICE_ATTR_RO(mode); | |
488 | ||
489 | static ssize_t current_master_show(struct device *dev, | |
490 | struct device_attribute *da, | |
491 | char *buf) | |
492 | { | |
493 | struct i3c_bus *i3cbus = dev_to_i3cbus(dev); | |
494 | ssize_t ret; | |
495 | ||
496 | i3c_bus_normaluse_lock(i3cbus); | |
497 | ret = sprintf(buf, "%d-%llx\n", i3cbus->id, | |
498 | i3cbus->cur_master->info.pid); | |
499 | i3c_bus_normaluse_unlock(i3cbus); | |
500 | ||
501 | return ret; | |
502 | } | |
503 | static DEVICE_ATTR_RO(current_master); | |
504 | ||
505 | static ssize_t i3c_scl_frequency_show(struct device *dev, | |
506 | struct device_attribute *da, | |
507 | char *buf) | |
508 | { | |
509 | struct i3c_bus *i3cbus = dev_to_i3cbus(dev); | |
510 | ssize_t ret; | |
511 | ||
512 | i3c_bus_normaluse_lock(i3cbus); | |
513 | ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); | |
514 | i3c_bus_normaluse_unlock(i3cbus); | |
515 | ||
516 | return ret; | |
517 | } | |
518 | static DEVICE_ATTR_RO(i3c_scl_frequency); | |
519 | ||
520 | static ssize_t i2c_scl_frequency_show(struct device *dev, | |
521 | struct device_attribute *da, | |
522 | char *buf) | |
523 | { | |
524 | struct i3c_bus *i3cbus = dev_to_i3cbus(dev); | |
525 | ssize_t ret; | |
526 | ||
527 | i3c_bus_normaluse_lock(i3cbus); | |
528 | ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); | |
529 | i3c_bus_normaluse_unlock(i3cbus); | |
530 | ||
531 | return ret; | |
532 | } | |
533 | static DEVICE_ATTR_RO(i2c_scl_frequency); | |
534 | ||
535 | static struct attribute *i3c_masterdev_attrs[] = { | |
536 | &dev_attr_mode.attr, | |
537 | &dev_attr_current_master.attr, | |
538 | &dev_attr_i3c_scl_frequency.attr, | |
539 | &dev_attr_i2c_scl_frequency.attr, | |
540 | &dev_attr_bcr.attr, | |
541 | &dev_attr_dcr.attr, | |
542 | &dev_attr_pid.attr, | |
543 | &dev_attr_dynamic_address.attr, | |
544 | &dev_attr_hdrcap.attr, | |
545 | NULL, | |
546 | }; | |
547 | ATTRIBUTE_GROUPS(i3c_masterdev); | |
548 | ||
549 | static void i3c_masterdev_release(struct device *dev) | |
550 | { | |
551 | struct i3c_master_controller *master = dev_to_i3cmaster(dev); | |
552 | struct i3c_bus *bus = dev_to_i3cbus(dev); | |
553 | ||
554 | if (master->wq) | |
555 | destroy_workqueue(master->wq); | |
556 | ||
557 | WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); | |
558 | i3c_bus_cleanup(bus); | |
559 | ||
560 | of_node_put(dev->of_node); | |
561 | } | |
562 | ||
563 | static const struct device_type i3c_masterdev_type = { | |
564 | .groups = i3c_masterdev_groups, | |
565 | }; | |
566 | ||
567 | int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode) | |
568 | { | |
569 | i3cbus->mode = mode; | |
570 | ||
571 | if (!i3cbus->scl_rate.i3c) | |
572 | i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; | |
573 | ||
574 | if (!i3cbus->scl_rate.i2c) { | |
575 | if (i3cbus->mode == I3C_BUS_MODE_MIXED_SLOW) | |
576 | i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_SCL_RATE; | |
577 | else | |
578 | i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_PLUS_SCL_RATE; | |
579 | } | |
580 | ||
581 | /* | |
582 | * I3C/I2C frequency may have been overridden, check that user-provided | |
583 | * values are not exceeding max possible frequency. | |
584 | */ | |
585 | if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || | |
586 | i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) | |
587 | return -EINVAL; | |
588 | ||
589 | return 0; | |
590 | } | |
591 | ||
592 | static struct i3c_master_controller * | |
593 | i2c_adapter_to_i3c_master(struct i2c_adapter *adap) | |
594 | { | |
595 | return container_of(adap, struct i3c_master_controller, i2c); | |
596 | } | |
597 | ||
598 | static struct i2c_adapter * | |
599 | i3c_master_to_i2c_adapter(struct i3c_master_controller *master) | |
600 | { | |
601 | return &master->i2c; | |
602 | } | |
603 | ||
604 | static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) | |
605 | { | |
606 | kfree(dev); | |
607 | } | |
608 | ||
609 | static struct i2c_dev_desc * | |
610 | i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, | |
611 | const struct i2c_dev_boardinfo *boardinfo) | |
612 | { | |
613 | struct i2c_dev_desc *dev; | |
614 | ||
615 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
616 | if (!dev) | |
617 | return ERR_PTR(-ENOMEM); | |
618 | ||
619 | dev->common.master = master; | |
620 | dev->boardinfo = boardinfo; | |
621 | ||
622 | return dev; | |
623 | } | |
624 | ||
625 | static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, | |
626 | u16 payloadlen) | |
627 | { | |
628 | dest->addr = addr; | |
629 | dest->payload.len = payloadlen; | |
630 | if (payloadlen) | |
631 | dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); | |
632 | else | |
633 | dest->payload.data = NULL; | |
634 | ||
635 | return dest->payload.data; | |
636 | } | |
637 | ||
638 | static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) | |
639 | { | |
640 | kfree(dest->payload.data); | |
641 | } | |
642 | ||
643 | static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, | |
644 | struct i3c_ccc_cmd_dest *dests, | |
645 | unsigned int ndests) | |
646 | { | |
647 | cmd->rnw = rnw ? 1 : 0; | |
648 | cmd->id = id; | |
649 | cmd->dests = dests; | |
650 | cmd->ndests = ndests; | |
651 | cmd->err = I3C_ERROR_UNKNOWN; | |
652 | } | |
653 | ||
654 | static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, | |
655 | struct i3c_ccc_cmd *cmd) | |
656 | { | |
657 | int ret; | |
658 | ||
659 | if (!cmd || !master) | |
660 | return -EINVAL; | |
661 | ||
662 | if (WARN_ON(master->init_done && | |
663 | !rwsem_is_locked(&master->bus.lock))) | |
664 | return -EINVAL; | |
665 | ||
666 | if (!master->ops->send_ccc_cmd) | |
667 | return -ENOTSUPP; | |
668 | ||
669 | if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) | |
670 | return -EINVAL; | |
671 | ||
672 | if (master->ops->supports_ccc_cmd && | |
673 | !master->ops->supports_ccc_cmd(master, cmd)) | |
674 | return -ENOTSUPP; | |
675 | ||
676 | ret = master->ops->send_ccc_cmd(master, cmd); | |
677 | if (ret) { | |
678 | if (cmd->err != I3C_ERROR_UNKNOWN) | |
679 | return cmd->err; | |
680 | ||
681 | return ret; | |
682 | } | |
683 | ||
684 | return 0; | |
685 | } | |
686 | ||
687 | static struct i2c_dev_desc * | |
688 | i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, | |
689 | u16 addr) | |
690 | { | |
691 | struct i2c_dev_desc *dev; | |
692 | ||
693 | i3c_bus_for_each_i2cdev(&master->bus, dev) { | |
694 | if (dev->boardinfo->base.addr == addr) | |
695 | return dev; | |
696 | } | |
697 | ||
698 | return NULL; | |
699 | } | |
700 | ||
701 | /** | |
702 | * i3c_master_get_free_addr() - get a free address on the bus | |
703 | * @master: I3C master object | |
704 | * @start_addr: where to start searching | |
705 | * | |
706 | * This function must be called with the bus lock held in write mode. | |
707 | * | |
708 | * Return: the first free address starting at @start_addr (included) or -ENOMEM | |
709 | * if there's no more address available. | |
710 | */ | |
711 | int i3c_master_get_free_addr(struct i3c_master_controller *master, | |
712 | u8 start_addr) | |
713 | { | |
714 | return i3c_bus_get_free_addr(&master->bus, start_addr); | |
715 | } | |
716 | EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); | |
717 | ||
718 | static void i3c_device_release(struct device *dev) | |
719 | { | |
720 | struct i3c_device *i3cdev = dev_to_i3cdev(dev); | |
721 | ||
722 | WARN_ON(i3cdev->desc); | |
723 | ||
724 | of_node_put(i3cdev->dev.of_node); | |
725 | kfree(i3cdev); | |
726 | } | |
727 | ||
728 | static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) | |
729 | { | |
730 | kfree(dev); | |
731 | } | |
732 | ||
733 | static struct i3c_dev_desc * | |
734 | i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, | |
735 | const struct i3c_device_info *info) | |
736 | { | |
737 | struct i3c_dev_desc *dev; | |
738 | ||
739 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
740 | if (!dev) | |
741 | return ERR_PTR(-ENOMEM); | |
742 | ||
743 | dev->common.master = master; | |
744 | dev->info = *info; | |
745 | mutex_init(&dev->ibi_lock); | |
746 | ||
747 | return dev; | |
748 | } | |
749 | ||
750 | static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, | |
751 | u8 addr) | |
752 | { | |
753 | enum i3c_addr_slot_status addrstat; | |
754 | struct i3c_ccc_cmd_dest dest; | |
755 | struct i3c_ccc_cmd cmd; | |
756 | int ret; | |
757 | ||
758 | if (!master) | |
759 | return -EINVAL; | |
760 | ||
761 | addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); | |
762 | if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) | |
763 | return -EINVAL; | |
764 | ||
765 | i3c_ccc_cmd_dest_init(&dest, addr, 0); | |
766 | i3c_ccc_cmd_init(&cmd, false, | |
767 | I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), | |
768 | &dest, 1); | |
769 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
770 | i3c_ccc_cmd_dest_cleanup(&dest); | |
771 | ||
772 | return ret; | |
773 | } | |
774 | ||
775 | /** | |
776 | * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) | |
777 | * procedure | |
778 | * @master: master used to send frames on the bus | |
779 | * | |
780 | * Send a ENTDAA CCC command to start a DAA procedure. | |
781 | * | |
782 | * Note that this function only sends the ENTDAA CCC command, all the logic | |
783 | * behind dynamic address assignment has to be handled in the I3C master | |
784 | * driver. | |
785 | * | |
786 | * This function must be called with the bus lock held in write mode. | |
787 | * | |
788 | * Return: 0 in case of success, a positive I3C error code if the error is | |
789 | * one of the official Mx error codes, and a negative error code otherwise. | |
790 | */ | |
791 | int i3c_master_entdaa_locked(struct i3c_master_controller *master) | |
792 | { | |
793 | struct i3c_ccc_cmd_dest dest; | |
794 | struct i3c_ccc_cmd cmd; | |
795 | int ret; | |
796 | ||
797 | i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); | |
798 | i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); | |
799 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
800 | i3c_ccc_cmd_dest_cleanup(&dest); | |
801 | ||
802 | return ret; | |
803 | } | |
804 | EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); | |
805 | ||
806 | static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, | |
807 | u8 addr, bool enable, u8 evts) | |
808 | { | |
809 | struct i3c_ccc_events *events; | |
810 | struct i3c_ccc_cmd_dest dest; | |
811 | struct i3c_ccc_cmd cmd; | |
812 | int ret; | |
813 | ||
814 | events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); | |
815 | if (!events) | |
816 | return -ENOMEM; | |
817 | ||
818 | events->events = evts; | |
819 | i3c_ccc_cmd_init(&cmd, false, | |
820 | enable ? | |
821 | I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : | |
822 | I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), | |
823 | &dest, 1); | |
824 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
825 | i3c_ccc_cmd_dest_cleanup(&dest); | |
826 | ||
827 | return ret; | |
828 | } | |
829 | ||
830 | /** | |
831 | * i3c_master_disec_locked() - send a DISEC CCC command | |
832 | * @master: master used to send frames on the bus | |
833 | * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR | |
834 | * @evts: events to disable | |
835 | * | |
836 | * Send a DISEC CCC command to disable some or all events coming from a | |
837 | * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. | |
838 | * | |
839 | * This function must be called with the bus lock held in write mode. | |
840 | * | |
841 | * Return: 0 in case of success, a positive I3C error code if the error is | |
842 | * one of the official Mx error codes, and a negative error code otherwise. | |
843 | */ | |
844 | int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, | |
845 | u8 evts) | |
846 | { | |
847 | return i3c_master_enec_disec_locked(master, addr, false, evts); | |
848 | } | |
849 | EXPORT_SYMBOL_GPL(i3c_master_disec_locked); | |
850 | ||
851 | /** | |
852 | * i3c_master_enec_locked() - send an ENEC CCC command | |
853 | * @master: master used to send frames on the bus | |
854 | * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR | |
855 | * @evts: events to disable | |
856 | * | |
857 | * Sends an ENEC CCC command to enable some or all events coming from a | |
858 | * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. | |
859 | * | |
860 | * This function must be called with the bus lock held in write mode. | |
861 | * | |
862 | * Return: 0 in case of success, a positive I3C error code if the error is | |
863 | * one of the official Mx error codes, and a negative error code otherwise. | |
864 | */ | |
865 | int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, | |
866 | u8 evts) | |
867 | { | |
868 | return i3c_master_enec_disec_locked(master, addr, true, evts); | |
869 | } | |
870 | EXPORT_SYMBOL_GPL(i3c_master_enec_locked); | |
871 | ||
872 | /** | |
873 | * i3c_master_defslvs_locked() - send a DEFSLVS CCC command | |
874 | * @master: master used to send frames on the bus | |
875 | * | |
876 | * Send a DEFSLVS CCC command containing all the devices known to the @master. | |
877 | * This is useful when you have secondary masters on the bus to propagate | |
878 | * device information. | |
879 | * | |
880 | * This should be called after all I3C devices have been discovered (in other | |
881 | * words, after the DAA procedure has finished) and instantiated in | |
882 | * &i3c_master_controller_ops->bus_init(). | |
883 | * It should also be called if a master ACKed an Hot-Join request and assigned | |
884 | * a dynamic address to the device joining the bus. | |
885 | * | |
886 | * This function must be called with the bus lock held in write mode. | |
887 | * | |
888 | * Return: 0 in case of success, a positive I3C error code if the error is | |
889 | * one of the official Mx error codes, and a negative error code otherwise. | |
890 | */ | |
891 | int i3c_master_defslvs_locked(struct i3c_master_controller *master) | |
892 | { | |
893 | struct i3c_ccc_defslvs *defslvs; | |
894 | struct i3c_ccc_dev_desc *desc; | |
895 | struct i3c_ccc_cmd_dest dest; | |
896 | struct i3c_dev_desc *i3cdev; | |
897 | struct i2c_dev_desc *i2cdev; | |
898 | struct i3c_ccc_cmd cmd; | |
899 | struct i3c_bus *bus; | |
900 | bool send = false; | |
901 | int ndevs = 0, ret; | |
902 | ||
903 | if (!master) | |
904 | return -EINVAL; | |
905 | ||
906 | bus = i3c_master_get_bus(master); | |
907 | i3c_bus_for_each_i3cdev(bus, i3cdev) { | |
908 | ndevs++; | |
909 | ||
910 | if (i3cdev == master->this) | |
911 | continue; | |
912 | ||
913 | if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == | |
914 | I3C_BCR_I3C_MASTER) | |
915 | send = true; | |
916 | } | |
917 | ||
918 | /* No other master on the bus, skip DEFSLVS. */ | |
919 | if (!send) | |
920 | return 0; | |
921 | ||
922 | i3c_bus_for_each_i2cdev(bus, i2cdev) | |
923 | ndevs++; | |
924 | ||
925 | defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, | |
926 | sizeof(*defslvs) + | |
927 | ((ndevs - 1) * | |
928 | sizeof(struct i3c_ccc_dev_desc))); | |
929 | if (!defslvs) | |
930 | return -ENOMEM; | |
931 | ||
932 | defslvs->count = ndevs; | |
933 | defslvs->master.bcr = master->this->info.bcr; | |
934 | defslvs->master.dcr = master->this->info.dcr; | |
935 | defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; | |
936 | defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; | |
937 | ||
938 | desc = defslvs->slaves; | |
939 | i3c_bus_for_each_i2cdev(bus, i2cdev) { | |
940 | desc->lvr = i2cdev->boardinfo->lvr; | |
941 | desc->static_addr = i2cdev->boardinfo->base.addr << 1; | |
942 | desc++; | |
943 | } | |
944 | ||
945 | i3c_bus_for_each_i3cdev(bus, i3cdev) { | |
946 | /* Skip the I3C dev representing this master. */ | |
947 | if (i3cdev == master->this) | |
948 | continue; | |
949 | ||
950 | desc->bcr = i3cdev->info.bcr; | |
951 | desc->dcr = i3cdev->info.dcr; | |
952 | desc->dyn_addr = i3cdev->info.dyn_addr << 1; | |
953 | desc->static_addr = i3cdev->info.static_addr << 1; | |
954 | desc++; | |
955 | } | |
956 | ||
957 | i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); | |
958 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
959 | i3c_ccc_cmd_dest_cleanup(&dest); | |
960 | ||
961 | return ret; | |
962 | } | |
963 | EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); | |
964 | ||
965 | static int i3c_master_setda_locked(struct i3c_master_controller *master, | |
966 | u8 oldaddr, u8 newaddr, bool setdasa) | |
967 | { | |
968 | struct i3c_ccc_cmd_dest dest; | |
969 | struct i3c_ccc_setda *setda; | |
970 | struct i3c_ccc_cmd cmd; | |
971 | int ret; | |
972 | ||
973 | if (!oldaddr || !newaddr) | |
974 | return -EINVAL; | |
975 | ||
976 | setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); | |
977 | if (!setda) | |
978 | return -ENOMEM; | |
979 | ||
980 | setda->addr = newaddr << 1; | |
981 | i3c_ccc_cmd_init(&cmd, false, | |
982 | setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, | |
983 | &dest, 1); | |
984 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
985 | i3c_ccc_cmd_dest_cleanup(&dest); | |
986 | ||
987 | return ret; | |
988 | } | |
989 | ||
990 | static int i3c_master_setdasa_locked(struct i3c_master_controller *master, | |
991 | u8 static_addr, u8 dyn_addr) | |
992 | { | |
993 | return i3c_master_setda_locked(master, static_addr, dyn_addr, true); | |
994 | } | |
995 | ||
996 | static int i3c_master_setnewda_locked(struct i3c_master_controller *master, | |
997 | u8 oldaddr, u8 newaddr) | |
998 | { | |
999 | return i3c_master_setda_locked(master, oldaddr, newaddr, false); | |
1000 | } | |
1001 | ||
1002 | static int i3c_master_getmrl_locked(struct i3c_master_controller *master, | |
1003 | struct i3c_device_info *info) | |
1004 | { | |
1005 | struct i3c_ccc_cmd_dest dest; | |
1006 | unsigned int expected_len; | |
1007 | struct i3c_ccc_mrl *mrl; | |
1008 | struct i3c_ccc_cmd cmd; | |
1009 | int ret; | |
1010 | ||
1011 | mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); | |
1012 | if (!mrl) | |
1013 | return -ENOMEM; | |
1014 | ||
1015 | /* | |
1016 | * When the device does not have IBI payload GETMRL only returns 2 | |
1017 | * bytes of data. | |
1018 | */ | |
1019 | if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) | |
1020 | dest.payload.len -= 1; | |
1021 | ||
1022 | expected_len = dest.payload.len; | |
1023 | i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); | |
1024 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
1025 | if (ret) | |
1026 | goto out; | |
1027 | ||
1028 | if (dest.payload.len != expected_len) { | |
1029 | ret = -EIO; | |
1030 | goto out; | |
1031 | } | |
1032 | ||
1033 | info->max_read_len = be16_to_cpu(mrl->read_len); | |
1034 | ||
1035 | if (info->bcr & I3C_BCR_IBI_PAYLOAD) | |
1036 | info->max_ibi_len = mrl->ibi_len; | |
1037 | ||
1038 | out: | |
1039 | i3c_ccc_cmd_dest_cleanup(&dest); | |
1040 | ||
1041 | return ret; | |
1042 | } | |
1043 | ||
1044 | static int i3c_master_getmwl_locked(struct i3c_master_controller *master, | |
1045 | struct i3c_device_info *info) | |
1046 | { | |
1047 | struct i3c_ccc_cmd_dest dest; | |
1048 | struct i3c_ccc_mwl *mwl; | |
1049 | struct i3c_ccc_cmd cmd; | |
1050 | int ret; | |
1051 | ||
1052 | mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); | |
1053 | if (!mwl) | |
1054 | return -ENOMEM; | |
1055 | ||
1056 | i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); | |
1057 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
1058 | if (ret) | |
1059 | goto out; | |
1060 | ||
1061 | if (dest.payload.len != sizeof(*mwl)) | |
1062 | return -EIO; | |
1063 | ||
1064 | info->max_write_len = be16_to_cpu(mwl->len); | |
1065 | ||
1066 | out: | |
1067 | i3c_ccc_cmd_dest_cleanup(&dest); | |
1068 | ||
1069 | return ret; | |
1070 | } | |
1071 | ||
1072 | static int i3c_master_getmxds_locked(struct i3c_master_controller *master, | |
1073 | struct i3c_device_info *info) | |
1074 | { | |
1075 | struct i3c_ccc_getmxds *getmaxds; | |
1076 | struct i3c_ccc_cmd_dest dest; | |
1077 | struct i3c_ccc_cmd cmd; | |
1078 | int ret; | |
1079 | ||
1080 | getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, | |
1081 | sizeof(*getmaxds)); | |
1082 | if (!getmaxds) | |
1083 | return -ENOMEM; | |
1084 | ||
1085 | i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); | |
1086 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
1087 | if (ret) | |
1088 | goto out; | |
1089 | ||
1090 | if (dest.payload.len != 2 && dest.payload.len != 5) { | |
1091 | ret = -EIO; | |
1092 | goto out; | |
1093 | } | |
1094 | ||
1095 | info->max_read_ds = getmaxds->maxrd; | |
1096 | info->max_write_ds = getmaxds->maxwr; | |
1097 | if (dest.payload.len == 5) | |
1098 | info->max_read_turnaround = getmaxds->maxrdturn[0] | | |
1099 | ((u32)getmaxds->maxrdturn[1] << 8) | | |
1100 | ((u32)getmaxds->maxrdturn[2] << 16); | |
1101 | ||
1102 | out: | |
1103 | i3c_ccc_cmd_dest_cleanup(&dest); | |
1104 | ||
1105 | return ret; | |
1106 | } | |
1107 | ||
1108 | static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, | |
1109 | struct i3c_device_info *info) | |
1110 | { | |
1111 | struct i3c_ccc_gethdrcap *gethdrcap; | |
1112 | struct i3c_ccc_cmd_dest dest; | |
1113 | struct i3c_ccc_cmd cmd; | |
1114 | int ret; | |
1115 | ||
1116 | gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, | |
1117 | sizeof(*gethdrcap)); | |
1118 | if (!gethdrcap) | |
1119 | return -ENOMEM; | |
1120 | ||
1121 | i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); | |
1122 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
1123 | if (ret) | |
1124 | goto out; | |
1125 | ||
1126 | if (dest.payload.len != 1) { | |
1127 | ret = -EIO; | |
1128 | goto out; | |
1129 | } | |
1130 | ||
1131 | info->hdr_cap = gethdrcap->modes; | |
1132 | ||
1133 | out: | |
1134 | i3c_ccc_cmd_dest_cleanup(&dest); | |
1135 | ||
1136 | return ret; | |
1137 | } | |
1138 | ||
1139 | static int i3c_master_getpid_locked(struct i3c_master_controller *master, | |
1140 | struct i3c_device_info *info) | |
1141 | { | |
1142 | struct i3c_ccc_getpid *getpid; | |
1143 | struct i3c_ccc_cmd_dest dest; | |
1144 | struct i3c_ccc_cmd cmd; | |
1145 | int ret, i; | |
1146 | ||
1147 | getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); | |
1148 | if (!getpid) | |
1149 | return -ENOMEM; | |
1150 | ||
1151 | i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); | |
1152 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
1153 | if (ret) | |
1154 | goto out; | |
1155 | ||
1156 | info->pid = 0; | |
1157 | for (i = 0; i < sizeof(getpid->pid); i++) { | |
1158 | int sft = (sizeof(getpid->pid) - i - 1) * 8; | |
1159 | ||
1160 | info->pid |= (u64)getpid->pid[i] << sft; | |
1161 | } | |
1162 | ||
1163 | out: | |
1164 | i3c_ccc_cmd_dest_cleanup(&dest); | |
1165 | ||
1166 | return ret; | |
1167 | } | |
1168 | ||
1169 | static int i3c_master_getbcr_locked(struct i3c_master_controller *master, | |
1170 | struct i3c_device_info *info) | |
1171 | { | |
1172 | struct i3c_ccc_getbcr *getbcr; | |
1173 | struct i3c_ccc_cmd_dest dest; | |
1174 | struct i3c_ccc_cmd cmd; | |
1175 | int ret; | |
1176 | ||
1177 | getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); | |
1178 | if (!getbcr) | |
1179 | return -ENOMEM; | |
1180 | ||
1181 | i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); | |
1182 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
1183 | if (ret) | |
1184 | goto out; | |
1185 | ||
1186 | info->bcr = getbcr->bcr; | |
1187 | ||
1188 | out: | |
1189 | i3c_ccc_cmd_dest_cleanup(&dest); | |
1190 | ||
1191 | return ret; | |
1192 | } | |
1193 | ||
1194 | static int i3c_master_getdcr_locked(struct i3c_master_controller *master, | |
1195 | struct i3c_device_info *info) | |
1196 | { | |
1197 | struct i3c_ccc_getdcr *getdcr; | |
1198 | struct i3c_ccc_cmd_dest dest; | |
1199 | struct i3c_ccc_cmd cmd; | |
1200 | int ret; | |
1201 | ||
1202 | getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); | |
1203 | if (!getdcr) | |
1204 | return -ENOMEM; | |
1205 | ||
1206 | i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); | |
1207 | ret = i3c_master_send_ccc_cmd_locked(master, &cmd); | |
1208 | if (ret) | |
1209 | goto out; | |
1210 | ||
1211 | info->dcr = getdcr->dcr; | |
1212 | ||
1213 | out: | |
1214 | i3c_ccc_cmd_dest_cleanup(&dest); | |
1215 | ||
1216 | return ret; | |
1217 | } | |
1218 | ||
1219 | static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) | |
1220 | { | |
1221 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
1222 | enum i3c_addr_slot_status slot_status; | |
1223 | int ret; | |
1224 | ||
1225 | if (!dev->info.dyn_addr) | |
1226 | return -EINVAL; | |
1227 | ||
1228 | slot_status = i3c_bus_get_addr_slot_status(&master->bus, | |
1229 | dev->info.dyn_addr); | |
1230 | if (slot_status == I3C_ADDR_SLOT_RSVD || | |
1231 | slot_status == I3C_ADDR_SLOT_I2C_DEV) | |
1232 | return -EINVAL; | |
1233 | ||
1234 | ret = i3c_master_getpid_locked(master, &dev->info); | |
1235 | if (ret) | |
1236 | return ret; | |
1237 | ||
1238 | ret = i3c_master_getbcr_locked(master, &dev->info); | |
1239 | if (ret) | |
1240 | return ret; | |
1241 | ||
1242 | ret = i3c_master_getdcr_locked(master, &dev->info); | |
1243 | if (ret) | |
1244 | return ret; | |
1245 | ||
1246 | if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { | |
1247 | ret = i3c_master_getmxds_locked(master, &dev->info); | |
1248 | if (ret) | |
1249 | return ret; | |
1250 | } | |
1251 | ||
1252 | if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) | |
1253 | dev->info.max_ibi_len = 1; | |
1254 | ||
1255 | i3c_master_getmrl_locked(master, &dev->info); | |
1256 | i3c_master_getmwl_locked(master, &dev->info); | |
1257 | ||
1258 | if (dev->info.bcr & I3C_BCR_HDR_CAP) { | |
1259 | ret = i3c_master_gethdrcap_locked(master, &dev->info); | |
1260 | if (ret) | |
1261 | return ret; | |
1262 | } | |
1263 | ||
1264 | return 0; | |
1265 | } | |
1266 | ||
1267 | static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) | |
1268 | { | |
1269 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
1270 | ||
1271 | if (dev->info.static_addr) | |
1272 | i3c_bus_set_addr_slot_status(&master->bus, | |
1273 | dev->info.static_addr, | |
1274 | I3C_ADDR_SLOT_FREE); | |
1275 | ||
1276 | if (dev->info.dyn_addr) | |
1277 | i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, | |
1278 | I3C_ADDR_SLOT_FREE); | |
1279 | ||
1280 | if (dev->boardinfo && dev->boardinfo->init_dyn_addr) | |
1281 | i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, | |
1282 | I3C_ADDR_SLOT_FREE); | |
1283 | } | |
1284 | ||
1285 | static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) | |
1286 | { | |
1287 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
1288 | enum i3c_addr_slot_status status; | |
1289 | ||
1290 | if (!dev->info.static_addr && !dev->info.dyn_addr) | |
1291 | return 0; | |
1292 | ||
1293 | if (dev->info.static_addr) { | |
1294 | status = i3c_bus_get_addr_slot_status(&master->bus, | |
1295 | dev->info.static_addr); | |
1296 | if (status != I3C_ADDR_SLOT_FREE) | |
1297 | return -EBUSY; | |
1298 | ||
1299 | i3c_bus_set_addr_slot_status(&master->bus, | |
1300 | dev->info.static_addr, | |
1301 | I3C_ADDR_SLOT_I3C_DEV); | |
1302 | } | |
1303 | ||
1304 | /* | |
1305 | * ->init_dyn_addr should have been reserved before that, so, if we're | |
1306 | * trying to apply a pre-reserved dynamic address, we should not try | |
1307 | * to reserve the address slot a second time. | |
1308 | */ | |
1309 | if (dev->info.dyn_addr && | |
1310 | (!dev->boardinfo || | |
1311 | dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { | |
1312 | status = i3c_bus_get_addr_slot_status(&master->bus, | |
1313 | dev->info.dyn_addr); | |
1314 | if (status != I3C_ADDR_SLOT_FREE) | |
1315 | goto err_release_static_addr; | |
1316 | ||
1317 | i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, | |
1318 | I3C_ADDR_SLOT_I3C_DEV); | |
1319 | } | |
1320 | ||
1321 | return 0; | |
1322 | ||
1323 | err_release_static_addr: | |
1324 | if (dev->info.static_addr) | |
1325 | i3c_bus_set_addr_slot_status(&master->bus, | |
1326 | dev->info.static_addr, | |
1327 | I3C_ADDR_SLOT_FREE); | |
1328 | ||
1329 | return -EBUSY; | |
1330 | } | |
1331 | ||
1332 | static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, | |
1333 | struct i3c_dev_desc *dev) | |
1334 | { | |
1335 | int ret; | |
1336 | ||
1337 | /* | |
1338 | * We don't attach devices to the controller until they are | |
1339 | * addressable on the bus. | |
1340 | */ | |
1341 | if (!dev->info.static_addr && !dev->info.dyn_addr) | |
1342 | return 0; | |
1343 | ||
1344 | ret = i3c_master_get_i3c_addrs(dev); | |
1345 | if (ret) | |
1346 | return ret; | |
1347 | ||
1348 | /* Do not attach the master device itself. */ | |
1349 | if (master->this != dev && master->ops->attach_i3c_dev) { | |
1350 | ret = master->ops->attach_i3c_dev(dev); | |
1351 | if (ret) { | |
1352 | i3c_master_put_i3c_addrs(dev); | |
1353 | return ret; | |
1354 | } | |
1355 | } | |
1356 | ||
1357 | list_add_tail(&dev->common.node, &master->bus.devs.i3c); | |
1358 | ||
1359 | return 0; | |
1360 | } | |
1361 | ||
1362 | static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, | |
1363 | u8 old_dyn_addr) | |
1364 | { | |
1365 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
1366 | enum i3c_addr_slot_status status; | |
1367 | int ret; | |
1368 | ||
1369 | if (dev->info.dyn_addr != old_dyn_addr) { | |
1370 | status = i3c_bus_get_addr_slot_status(&master->bus, | |
1371 | dev->info.dyn_addr); | |
1372 | if (status != I3C_ADDR_SLOT_FREE) | |
1373 | return -EBUSY; | |
1374 | i3c_bus_set_addr_slot_status(&master->bus, | |
1375 | dev->info.dyn_addr, | |
1376 | I3C_ADDR_SLOT_I3C_DEV); | |
1377 | } | |
1378 | ||
1379 | if (master->ops->reattach_i3c_dev) { | |
1380 | ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); | |
1381 | if (ret) { | |
1382 | i3c_master_put_i3c_addrs(dev); | |
1383 | return ret; | |
1384 | } | |
1385 | } | |
1386 | ||
1387 | return 0; | |
1388 | } | |
1389 | ||
1390 | static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) | |
1391 | { | |
1392 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
1393 | ||
1394 | /* Do not detach the master device itself. */ | |
1395 | if (master->this != dev && master->ops->detach_i3c_dev) | |
1396 | master->ops->detach_i3c_dev(dev); | |
1397 | ||
1398 | i3c_master_put_i3c_addrs(dev); | |
1399 | list_del(&dev->common.node); | |
1400 | } | |
1401 | ||
1402 | static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, | |
1403 | struct i2c_dev_desc *dev) | |
1404 | { | |
1405 | int ret; | |
1406 | ||
1407 | if (master->ops->attach_i2c_dev) { | |
1408 | ret = master->ops->attach_i2c_dev(dev); | |
1409 | if (ret) | |
1410 | return ret; | |
1411 | } | |
1412 | ||
1413 | list_add_tail(&dev->common.node, &master->bus.devs.i2c); | |
1414 | ||
1415 | return 0; | |
1416 | } | |
1417 | ||
1418 | static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) | |
1419 | { | |
1420 | struct i3c_master_controller *master = i2c_dev_get_master(dev); | |
1421 | ||
1422 | list_del(&dev->common.node); | |
1423 | ||
1424 | if (master->ops->detach_i2c_dev) | |
1425 | master->ops->detach_i2c_dev(dev); | |
1426 | } | |
1427 | ||
1428 | static void i3c_master_pre_assign_dyn_addr(struct i3c_dev_desc *dev) | |
1429 | { | |
1430 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
1431 | int ret; | |
1432 | ||
1433 | if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr || | |
1434 | !dev->boardinfo->static_addr) | |
1435 | return; | |
1436 | ||
1437 | ret = i3c_master_setdasa_locked(master, dev->info.static_addr, | |
1438 | dev->boardinfo->init_dyn_addr); | |
1439 | if (ret) | |
1440 | return; | |
1441 | ||
1442 | dev->info.dyn_addr = dev->boardinfo->init_dyn_addr; | |
1443 | ret = i3c_master_reattach_i3c_dev(dev, 0); | |
1444 | if (ret) | |
1445 | goto err_rstdaa; | |
1446 | ||
1447 | ret = i3c_master_retrieve_dev_info(dev); | |
1448 | if (ret) | |
1449 | goto err_rstdaa; | |
1450 | ||
1451 | return; | |
1452 | ||
1453 | err_rstdaa: | |
1454 | i3c_master_rstdaa_locked(master, dev->boardinfo->init_dyn_addr); | |
1455 | } | |
1456 | ||
1457 | static void | |
1458 | i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) | |
1459 | { | |
1460 | struct i3c_dev_desc *desc; | |
1461 | int ret; | |
1462 | ||
1463 | if (!master->init_done) | |
1464 | return; | |
1465 | ||
1466 | i3c_bus_for_each_i3cdev(&master->bus, desc) { | |
1467 | if (desc->dev || !desc->info.dyn_addr || desc == master->this) | |
1468 | continue; | |
1469 | ||
1470 | desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); | |
1471 | if (!desc->dev) | |
1472 | continue; | |
1473 | ||
1474 | desc->dev->bus = &master->bus; | |
1475 | desc->dev->desc = desc; | |
1476 | desc->dev->dev.parent = &master->dev; | |
1477 | desc->dev->dev.type = &i3c_device_type; | |
1478 | desc->dev->dev.bus = &i3c_bus_type; | |
1479 | desc->dev->dev.release = i3c_device_release; | |
1480 | dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, | |
1481 | desc->info.pid); | |
1482 | ||
1483 | if (desc->boardinfo) | |
1484 | desc->dev->dev.of_node = desc->boardinfo->of_node; | |
1485 | ||
1486 | ret = device_register(&desc->dev->dev); | |
1487 | if (ret) | |
1488 | dev_err(&master->dev, | |
1489 | "Failed to add I3C device (err = %d)\n", ret); | |
1490 | } | |
1491 | } | |
1492 | ||
1493 | /** | |
1494 | * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) | |
1495 | * @master: master doing the DAA | |
1496 | * | |
1497 | * This function is instantiating an I3C device object and adding it to the | |
1498 | * I3C device list. All device information are automatically retrieved using | |
1499 | * standard CCC commands. | |
1500 | * | |
1501 | * The I3C device object is returned in case the master wants to attach | |
1502 | * private data to it using i3c_dev_set_master_data(). | |
1503 | * | |
1504 | * This function must be called with the bus lock held in write mode. | |
1505 | * | |
1506 | * Return: a 0 in case of success, an negative error code otherwise. | |
1507 | */ | |
1508 | int i3c_master_do_daa(struct i3c_master_controller *master) | |
1509 | { | |
1510 | int ret; | |
1511 | ||
1512 | i3c_bus_maintenance_lock(&master->bus); | |
1513 | ret = master->ops->do_daa(master); | |
1514 | i3c_bus_maintenance_unlock(&master->bus); | |
1515 | ||
1516 | if (ret) | |
1517 | return ret; | |
1518 | ||
1519 | i3c_bus_normaluse_lock(&master->bus); | |
1520 | i3c_master_register_new_i3c_devs(master); | |
1521 | i3c_bus_normaluse_unlock(&master->bus); | |
1522 | ||
1523 | return 0; | |
1524 | } | |
1525 | EXPORT_SYMBOL_GPL(i3c_master_do_daa); | |
1526 | ||
1527 | /** | |
1528 | * i3c_master_set_info() - set master device information | |
1529 | * @master: master used to send frames on the bus | |
1530 | * @info: I3C device information | |
1531 | * | |
1532 | * Set master device info. This should be called from | |
1533 | * &i3c_master_controller_ops->bus_init(). | |
1534 | * | |
1535 | * Not all &i3c_device_info fields are meaningful for a master device. | |
1536 | * Here is a list of fields that should be properly filled: | |
1537 | * | |
1538 | * - &i3c_device_info->dyn_addr | |
1539 | * - &i3c_device_info->bcr | |
1540 | * - &i3c_device_info->dcr | |
1541 | * - &i3c_device_info->pid | |
1542 | * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in | |
1543 | * &i3c_device_info->bcr | |
1544 | * | |
1545 | * This function must be called with the bus lock held in maintenance mode. | |
1546 | * | |
1547 | * Return: 0 if @info contains valid information (not every piece of | |
1548 | * information can be checked, but we can at least make sure @info->dyn_addr | |
1549 | * and @info->bcr are correct), -EINVAL otherwise. | |
1550 | */ | |
1551 | int i3c_master_set_info(struct i3c_master_controller *master, | |
1552 | const struct i3c_device_info *info) | |
1553 | { | |
1554 | struct i3c_dev_desc *i3cdev; | |
1555 | int ret; | |
1556 | ||
1557 | if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) | |
1558 | return -EINVAL; | |
1559 | ||
1560 | if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && | |
1561 | master->secondary) | |
1562 | return -EINVAL; | |
1563 | ||
1564 | if (master->this) | |
1565 | return -EINVAL; | |
1566 | ||
1567 | i3cdev = i3c_master_alloc_i3c_dev(master, info); | |
1568 | if (IS_ERR(i3cdev)) | |
1569 | return PTR_ERR(i3cdev); | |
1570 | ||
1571 | master->this = i3cdev; | |
1572 | master->bus.cur_master = master->this; | |
1573 | ||
1574 | ret = i3c_master_attach_i3c_dev(master, i3cdev); | |
1575 | if (ret) | |
1576 | goto err_free_dev; | |
1577 | ||
1578 | return 0; | |
1579 | ||
1580 | err_free_dev: | |
1581 | i3c_master_free_i3c_dev(i3cdev); | |
1582 | ||
1583 | return ret; | |
1584 | } | |
1585 | EXPORT_SYMBOL_GPL(i3c_master_set_info); | |
1586 | ||
1587 | static void i3c_master_detach_free_devs(struct i3c_master_controller *master) | |
1588 | { | |
1589 | struct i3c_dev_desc *i3cdev, *i3ctmp; | |
1590 | struct i2c_dev_desc *i2cdev, *i2ctmp; | |
1591 | ||
1592 | list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, | |
1593 | common.node) { | |
1594 | i3c_master_detach_i3c_dev(i3cdev); | |
1595 | ||
1596 | if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) | |
1597 | i3c_bus_set_addr_slot_status(&master->bus, | |
1598 | i3cdev->boardinfo->init_dyn_addr, | |
1599 | I3C_ADDR_SLOT_FREE); | |
1600 | ||
1601 | i3c_master_free_i3c_dev(i3cdev); | |
1602 | } | |
1603 | ||
1604 | list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, | |
1605 | common.node) { | |
1606 | i3c_master_detach_i2c_dev(i2cdev); | |
1607 | i3c_bus_set_addr_slot_status(&master->bus, | |
1608 | i2cdev->boardinfo->base.addr, | |
1609 | I3C_ADDR_SLOT_FREE); | |
1610 | i3c_master_free_i2c_dev(i2cdev); | |
1611 | } | |
1612 | } | |
1613 | ||
1614 | /** | |
1615 | * i3c_master_bus_init() - initialize an I3C bus | |
1616 | * @master: main master initializing the bus | |
1617 | * | |
1618 | * This function is following all initialisation steps described in the I3C | |
1619 | * specification: | |
1620 | * | |
1621 | * 1. Attach I2C and statically defined I3C devs to the master so that the | |
1622 | * master can fill its internal device table appropriately | |
1623 | * | |
1624 | * 2. Call &i3c_master_controller_ops->bus_init() method to initialize | |
1625 | * the master controller. That's usually where the bus mode is selected | |
1626 | * (pure bus or mixed fast/slow bus) | |
1627 | * | |
1628 | * 3. Instruct all devices on the bus to drop their dynamic address. This is | |
1629 | * particularly important when the bus was previously configured by someone | |
1630 | * else (for example the bootloader) | |
1631 | * | |
1632 | * 4. Disable all slave events. | |
1633 | * | |
1634 | * 5. Pre-assign dynamic addresses requested by the FW with SETDASA for I3C | |
1635 | * devices that have a static address | |
1636 | * | |
1637 | * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all | |
1638 | * remaining I3C devices | |
1639 | * | |
1640 | * Once this is done, all I3C and I2C devices should be usable. | |
1641 | * | |
1642 | * Return: a 0 in case of success, an negative error code otherwise. | |
1643 | */ | |
1644 | static int i3c_master_bus_init(struct i3c_master_controller *master) | |
1645 | { | |
1646 | enum i3c_addr_slot_status status; | |
1647 | struct i2c_dev_boardinfo *i2cboardinfo; | |
1648 | struct i3c_dev_boardinfo *i3cboardinfo; | |
1649 | struct i3c_dev_desc *i3cdev; | |
1650 | struct i2c_dev_desc *i2cdev; | |
1651 | int ret; | |
1652 | ||
1653 | /* | |
1654 | * First attach all devices with static definitions provided by the | |
1655 | * FW. | |
1656 | */ | |
1657 | list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { | |
1658 | status = i3c_bus_get_addr_slot_status(&master->bus, | |
1659 | i2cboardinfo->base.addr); | |
1660 | if (status != I3C_ADDR_SLOT_FREE) { | |
1661 | ret = -EBUSY; | |
1662 | goto err_detach_devs; | |
1663 | } | |
1664 | ||
1665 | i3c_bus_set_addr_slot_status(&master->bus, | |
1666 | i2cboardinfo->base.addr, | |
1667 | I3C_ADDR_SLOT_I2C_DEV); | |
1668 | ||
1669 | i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo); | |
1670 | if (IS_ERR(i2cdev)) { | |
1671 | ret = PTR_ERR(i2cdev); | |
1672 | goto err_detach_devs; | |
1673 | } | |
1674 | ||
1675 | ret = i3c_master_attach_i2c_dev(master, i2cdev); | |
1676 | if (ret) { | |
1677 | i3c_master_free_i2c_dev(i2cdev); | |
1678 | goto err_detach_devs; | |
1679 | } | |
1680 | } | |
1681 | list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { | |
1682 | struct i3c_device_info info = { | |
1683 | .static_addr = i3cboardinfo->static_addr, | |
1684 | }; | |
1685 | ||
1686 | if (i3cboardinfo->init_dyn_addr) { | |
1687 | status = i3c_bus_get_addr_slot_status(&master->bus, | |
1688 | i3cboardinfo->init_dyn_addr); | |
1689 | if (status != I3C_ADDR_SLOT_FREE) { | |
1690 | ret = -EBUSY; | |
1691 | goto err_detach_devs; | |
1692 | } | |
1693 | } | |
1694 | ||
1695 | i3cdev = i3c_master_alloc_i3c_dev(master, &info); | |
1696 | if (IS_ERR(i3cdev)) { | |
1697 | ret = PTR_ERR(i3cdev); | |
1698 | goto err_detach_devs; | |
1699 | } | |
1700 | ||
1701 | i3cdev->boardinfo = i3cboardinfo; | |
1702 | ||
1703 | ret = i3c_master_attach_i3c_dev(master, i3cdev); | |
1704 | if (ret) { | |
1705 | i3c_master_free_i3c_dev(i3cdev); | |
1706 | goto err_detach_devs; | |
1707 | } | |
1708 | } | |
1709 | ||
1710 | /* | |
1711 | * Now execute the controller specific ->bus_init() routine, which | |
1712 | * might configure its internal logic to match the bus limitations. | |
1713 | */ | |
1714 | ret = master->ops->bus_init(master); | |
1715 | if (ret) | |
1716 | goto err_detach_devs; | |
1717 | ||
1718 | /* | |
1719 | * The master device should have been instantiated in ->bus_init(), | |
1720 | * complain if this was not the case. | |
1721 | */ | |
1722 | if (!master->this) { | |
1723 | dev_err(&master->dev, | |
1724 | "master_set_info() was not called in ->bus_init()\n"); | |
1725 | ret = -EINVAL; | |
1726 | goto err_bus_cleanup; | |
1727 | } | |
1728 | ||
1729 | /* | |
1730 | * Reset all dynamic address that may have been assigned before | |
1731 | * (assigned by the bootloader for example). | |
1732 | */ | |
1733 | ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); | |
1734 | if (ret && ret != I3C_ERROR_M2) | |
1735 | goto err_bus_cleanup; | |
1736 | ||
1737 | /* Disable all slave events before starting DAA. */ | |
1738 | ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, | |
1739 | I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | | |
1740 | I3C_CCC_EVENT_HJ); | |
1741 | if (ret && ret != I3C_ERROR_M2) | |
1742 | goto err_bus_cleanup; | |
1743 | ||
1744 | /* | |
1745 | * Pre-assign dynamic address and retrieve device information if | |
1746 | * needed. | |
1747 | */ | |
1748 | i3c_bus_for_each_i3cdev(&master->bus, i3cdev) | |
1749 | i3c_master_pre_assign_dyn_addr(i3cdev); | |
1750 | ||
1751 | ret = i3c_master_do_daa(master); | |
1752 | if (ret) | |
1753 | goto err_rstdaa; | |
1754 | ||
1755 | return 0; | |
1756 | ||
1757 | err_rstdaa: | |
1758 | i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); | |
1759 | ||
1760 | err_bus_cleanup: | |
1761 | if (master->ops->bus_cleanup) | |
1762 | master->ops->bus_cleanup(master); | |
1763 | ||
1764 | err_detach_devs: | |
1765 | i3c_master_detach_free_devs(master); | |
1766 | ||
1767 | return ret; | |
1768 | } | |
1769 | ||
1770 | static void i3c_master_bus_cleanup(struct i3c_master_controller *master) | |
1771 | { | |
1772 | if (master->ops->bus_cleanup) | |
1773 | master->ops->bus_cleanup(master); | |
1774 | ||
1775 | i3c_master_detach_free_devs(master); | |
1776 | } | |
1777 | ||
1778 | static struct i3c_dev_desc * | |
1779 | i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) | |
1780 | { | |
1781 | struct i3c_master_controller *master = refdev->common.master; | |
1782 | struct i3c_dev_desc *i3cdev; | |
1783 | ||
1784 | i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { | |
1785 | if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) | |
1786 | return i3cdev; | |
1787 | } | |
1788 | ||
1789 | return NULL; | |
1790 | } | |
1791 | ||
1792 | /** | |
1793 | * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus | |
1794 | * @master: master used to send frames on the bus | |
1795 | * @addr: I3C slave dynamic address assigned to the device | |
1796 | * | |
1797 | * This function is instantiating an I3C device object and adding it to the | |
1798 | * I3C device list. All device information are automatically retrieved using | |
1799 | * standard CCC commands. | |
1800 | * | |
1801 | * The I3C device object is returned in case the master wants to attach | |
1802 | * private data to it using i3c_dev_set_master_data(). | |
1803 | * | |
1804 | * This function must be called with the bus lock held in write mode. | |
1805 | * | |
1806 | * Return: a 0 in case of success, an negative error code otherwise. | |
1807 | */ | |
1808 | int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, | |
1809 | u8 addr) | |
1810 | { | |
1811 | struct i3c_device_info info = { .dyn_addr = addr }; | |
1812 | struct i3c_dev_desc *newdev, *olddev; | |
1813 | u8 old_dyn_addr = addr, expected_dyn_addr; | |
1814 | struct i3c_ibi_setup ibireq = { }; | |
1815 | bool enable_ibi = false; | |
1816 | int ret; | |
1817 | ||
1818 | if (!master) | |
1819 | return -EINVAL; | |
1820 | ||
1821 | newdev = i3c_master_alloc_i3c_dev(master, &info); | |
1822 | if (IS_ERR(newdev)) | |
1823 | return PTR_ERR(newdev); | |
1824 | ||
1825 | ret = i3c_master_attach_i3c_dev(master, newdev); | |
840414ae | 1826 | if (ret) |
3a379bbc | 1827 | goto err_free_dev; |
3a379bbc BB |
1828 | |
1829 | ret = i3c_master_retrieve_dev_info(newdev); | |
1830 | if (ret) | |
093c61b6 | 1831 | goto err_detach_dev; |
3a379bbc BB |
1832 | |
1833 | olddev = i3c_master_search_i3c_dev_duplicate(newdev); | |
1834 | if (olddev) { | |
1835 | newdev->boardinfo = olddev->boardinfo; | |
1836 | newdev->info.static_addr = olddev->info.static_addr; | |
1837 | newdev->dev = olddev->dev; | |
1838 | if (newdev->dev) | |
1839 | newdev->dev->desc = newdev; | |
1840 | ||
1841 | /* | |
1842 | * We need to restore the IBI state too, so let's save the | |
1843 | * IBI information and try to restore them after olddev has | |
1844 | * been detached+released and its IBI has been stopped and | |
1845 | * the associated resources have been freed. | |
1846 | */ | |
1847 | mutex_lock(&olddev->ibi_lock); | |
1848 | if (olddev->ibi) { | |
1849 | ibireq.handler = olddev->ibi->handler; | |
1850 | ibireq.max_payload_len = olddev->ibi->max_payload_len; | |
1851 | ibireq.num_slots = olddev->ibi->num_slots; | |
1852 | ||
1853 | if (olddev->ibi->enabled) { | |
1854 | enable_ibi = true; | |
1855 | i3c_dev_disable_ibi_locked(olddev); | |
1856 | } | |
1857 | ||
1858 | i3c_dev_free_ibi_locked(olddev); | |
1859 | } | |
1860 | mutex_unlock(&olddev->ibi_lock); | |
1861 | ||
1862 | old_dyn_addr = olddev->info.dyn_addr; | |
1863 | ||
1864 | i3c_master_detach_i3c_dev(olddev); | |
1865 | i3c_master_free_i3c_dev(olddev); | |
1866 | } | |
1867 | ||
1868 | ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); | |
1869 | if (ret) | |
1870 | goto err_detach_dev; | |
1871 | ||
1872 | /* | |
1873 | * Depending on our previous state, the expected dynamic address might | |
1874 | * differ: | |
1875 | * - if the device already had a dynamic address assigned, let's try to | |
1876 | * re-apply this one | |
1877 | * - if the device did not have a dynamic address and the firmware | |
1878 | * requested a specific address, pick this one | |
1879 | * - in any other case, keep the address automatically assigned by the | |
1880 | * master | |
1881 | */ | |
1882 | if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) | |
1883 | expected_dyn_addr = old_dyn_addr; | |
1884 | else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) | |
1885 | expected_dyn_addr = newdev->boardinfo->init_dyn_addr; | |
1886 | else | |
1887 | expected_dyn_addr = newdev->info.dyn_addr; | |
1888 | ||
1889 | if (newdev->info.dyn_addr != expected_dyn_addr) { | |
1890 | /* | |
1891 | * Try to apply the expected dynamic address. If it fails, keep | |
1892 | * the address assigned by the master. | |
1893 | */ | |
1894 | ret = i3c_master_setnewda_locked(master, | |
1895 | newdev->info.dyn_addr, | |
1896 | expected_dyn_addr); | |
1897 | if (!ret) { | |
1898 | old_dyn_addr = newdev->info.dyn_addr; | |
1899 | newdev->info.dyn_addr = expected_dyn_addr; | |
1900 | i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); | |
1901 | } else { | |
1902 | dev_err(&master->dev, | |
1903 | "Failed to assign reserved/old address to device %d%llx", | |
1904 | master->bus.id, newdev->info.pid); | |
1905 | } | |
1906 | } | |
1907 | ||
1908 | /* | |
1909 | * Now is time to try to restore the IBI setup. If we're lucky, | |
1910 | * everything works as before, otherwise, all we can do is complain. | |
1911 | * FIXME: maybe we should add callback to inform the driver that it | |
1912 | * should request the IBI again instead of trying to hide that from | |
1913 | * him. | |
1914 | */ | |
1915 | if (ibireq.handler) { | |
1916 | mutex_lock(&newdev->ibi_lock); | |
1917 | ret = i3c_dev_request_ibi_locked(newdev, &ibireq); | |
1918 | if (ret) { | |
1919 | dev_err(&master->dev, | |
1920 | "Failed to request IBI on device %d-%llx", | |
1921 | master->bus.id, newdev->info.pid); | |
1922 | } else if (enable_ibi) { | |
1923 | ret = i3c_dev_enable_ibi_locked(newdev); | |
1924 | if (ret) | |
1925 | dev_err(&master->dev, | |
1926 | "Failed to re-enable IBI on device %d-%llx", | |
1927 | master->bus.id, newdev->info.pid); | |
1928 | } | |
1929 | mutex_unlock(&newdev->ibi_lock); | |
1930 | } | |
1931 | ||
1932 | return 0; | |
1933 | ||
1934 | err_detach_dev: | |
1935 | if (newdev->dev && newdev->dev->desc) | |
1936 | newdev->dev->desc = NULL; | |
1937 | ||
1938 | i3c_master_detach_i3c_dev(newdev); | |
1939 | ||
1940 | err_free_dev: | |
1941 | i3c_master_free_i3c_dev(newdev); | |
1942 | ||
1943 | return ret; | |
1944 | } | |
1945 | EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); | |
1946 | ||
1947 | #define OF_I3C_REG1_IS_I2C_DEV BIT(31) | |
1948 | ||
1949 | static int | |
1950 | of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, | |
1951 | struct device_node *node, u32 *reg) | |
1952 | { | |
1953 | struct i2c_dev_boardinfo *boardinfo; | |
1954 | struct device *dev = &master->dev; | |
1955 | int ret; | |
1956 | ||
1957 | boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); | |
1958 | if (!boardinfo) | |
1959 | return -ENOMEM; | |
1960 | ||
1961 | ret = of_i2c_get_board_info(dev, node, &boardinfo->base); | |
1962 | if (ret) | |
1963 | return ret; | |
1964 | ||
1965 | /* LVR is encoded in reg[2]. */ | |
1966 | boardinfo->lvr = reg[2]; | |
1967 | ||
1968 | if (boardinfo->lvr & I3C_LVR_I2C_FM_MODE) | |
1969 | master->bus.scl_rate.i2c = I3C_BUS_I2C_FM_SCL_RATE; | |
1970 | ||
1971 | list_add_tail(&boardinfo->node, &master->boardinfo.i2c); | |
1972 | of_node_get(node); | |
1973 | ||
1974 | return 0; | |
1975 | } | |
1976 | ||
1977 | static int | |
1978 | of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, | |
1979 | struct device_node *node, u32 *reg) | |
1980 | { | |
1981 | struct i3c_dev_boardinfo *boardinfo; | |
1982 | struct device *dev = &master->dev; | |
1983 | struct i3c_device_info info = { }; | |
1984 | enum i3c_addr_slot_status addrstatus; | |
1985 | u32 init_dyn_addr = 0; | |
1986 | ||
1987 | boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); | |
1988 | if (!boardinfo) | |
1989 | return -ENOMEM; | |
1990 | ||
1991 | if (reg[0]) { | |
1992 | if (reg[0] > I3C_MAX_ADDR) | |
1993 | return -EINVAL; | |
1994 | ||
1995 | addrstatus = i3c_bus_get_addr_slot_status(&master->bus, | |
1996 | reg[0]); | |
1997 | if (addrstatus != I3C_ADDR_SLOT_FREE) | |
1998 | return -EINVAL; | |
1999 | } | |
2000 | ||
2001 | boardinfo->static_addr = reg[0]; | |
2002 | ||
2003 | if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { | |
2004 | if (init_dyn_addr > I3C_MAX_ADDR) | |
2005 | return -EINVAL; | |
2006 | ||
2007 | addrstatus = i3c_bus_get_addr_slot_status(&master->bus, | |
2008 | init_dyn_addr); | |
2009 | if (addrstatus != I3C_ADDR_SLOT_FREE) | |
2010 | return -EINVAL; | |
2011 | } | |
2012 | ||
2013 | boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; | |
2014 | ||
2015 | if ((info.pid & GENMASK_ULL(63, 48)) || | |
2016 | I3C_PID_RND_LOWER_32BITS(info.pid)) | |
2017 | return -EINVAL; | |
2018 | ||
2019 | boardinfo->init_dyn_addr = init_dyn_addr; | |
2020 | boardinfo->of_node = of_node_get(node); | |
2021 | list_add_tail(&boardinfo->node, &master->boardinfo.i3c); | |
2022 | ||
2023 | return 0; | |
2024 | } | |
2025 | ||
2026 | static int of_i3c_master_add_dev(struct i3c_master_controller *master, | |
2027 | struct device_node *node) | |
2028 | { | |
2029 | u32 reg[3]; | |
2030 | int ret; | |
2031 | ||
2032 | if (!master || !node) | |
2033 | return -EINVAL; | |
2034 | ||
2035 | ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); | |
2036 | if (ret) | |
2037 | return ret; | |
2038 | ||
2039 | /* | |
2040 | * The manufacturer ID can't be 0. If reg[1] == 0 that means we're | |
2041 | * dealing with an I2C device. | |
2042 | */ | |
2043 | if (!reg[1]) | |
2044 | ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); | |
2045 | else | |
2046 | ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); | |
2047 | ||
2048 | return ret; | |
2049 | } | |
2050 | ||
2051 | static int of_populate_i3c_bus(struct i3c_master_controller *master) | |
2052 | { | |
2053 | struct device *dev = &master->dev; | |
2054 | struct device_node *i3cbus_np = dev->of_node; | |
2055 | struct device_node *node; | |
2056 | int ret; | |
2057 | u32 val; | |
2058 | ||
2059 | if (!i3cbus_np) | |
2060 | return 0; | |
2061 | ||
2062 | for_each_available_child_of_node(i3cbus_np, node) { | |
2063 | ret = of_i3c_master_add_dev(master, node); | |
2064 | if (ret) | |
2065 | return ret; | |
2066 | } | |
2067 | ||
2068 | /* | |
2069 | * The user might want to limit I2C and I3C speed in case some devices | |
2070 | * on the bus are not supporting typical rates, or if the bus topology | |
2071 | * prevents it from using max possible rate. | |
2072 | */ | |
2073 | if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) | |
2074 | master->bus.scl_rate.i2c = val; | |
2075 | ||
2076 | if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) | |
2077 | master->bus.scl_rate.i3c = val; | |
2078 | ||
2079 | return 0; | |
2080 | } | |
2081 | ||
2082 | static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, | |
2083 | struct i2c_msg *xfers, int nxfers) | |
2084 | { | |
2085 | struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); | |
2086 | struct i2c_dev_desc *dev; | |
2087 | int i, ret; | |
2088 | u16 addr; | |
2089 | ||
2090 | if (!xfers || !master || nxfers <= 0) | |
2091 | return -EINVAL; | |
2092 | ||
2093 | if (!master->ops->i2c_xfers) | |
2094 | return -ENOTSUPP; | |
2095 | ||
2096 | /* Doing transfers to different devices is not supported. */ | |
2097 | addr = xfers[0].addr; | |
2098 | for (i = 1; i < nxfers; i++) { | |
2099 | if (addr != xfers[i].addr) | |
2100 | return -ENOTSUPP; | |
2101 | } | |
2102 | ||
2103 | i3c_bus_normaluse_lock(&master->bus); | |
2104 | dev = i3c_master_find_i2c_dev_by_addr(master, addr); | |
2105 | if (!dev) | |
2106 | ret = -ENOENT; | |
2107 | else | |
2108 | ret = master->ops->i2c_xfers(dev, xfers, nxfers); | |
2109 | i3c_bus_normaluse_unlock(&master->bus); | |
2110 | ||
2111 | return ret ? ret : nxfers; | |
2112 | } | |
2113 | ||
2114 | static u32 i3c_master_i2c_functionalities(struct i2c_adapter *adap) | |
2115 | { | |
2116 | struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); | |
2117 | ||
2118 | return master->ops->i2c_funcs(master); | |
2119 | } | |
2120 | ||
2121 | static const struct i2c_algorithm i3c_master_i2c_algo = { | |
2122 | .master_xfer = i3c_master_i2c_adapter_xfer, | |
2123 | .functionality = i3c_master_i2c_functionalities, | |
2124 | }; | |
2125 | ||
2126 | static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) | |
2127 | { | |
2128 | struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); | |
2129 | struct i2c_dev_desc *i2cdev; | |
2130 | int ret; | |
2131 | ||
2132 | adap->dev.parent = master->dev.parent; | |
2133 | adap->owner = master->dev.parent->driver->owner; | |
2134 | adap->algo = &i3c_master_i2c_algo; | |
2135 | strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); | |
2136 | ||
2137 | /* FIXME: Should we allow i3c masters to override these values? */ | |
2138 | adap->timeout = 1000; | |
2139 | adap->retries = 3; | |
2140 | ||
2141 | ret = i2c_add_adapter(adap); | |
2142 | if (ret) | |
2143 | return ret; | |
2144 | ||
2145 | /* | |
2146 | * We silently ignore failures here. The bus should keep working | |
2147 | * correctly even if one or more i2c devices are not registered. | |
2148 | */ | |
2149 | i3c_bus_for_each_i2cdev(&master->bus, i2cdev) | |
2150 | i2cdev->dev = i2c_new_device(adap, &i2cdev->boardinfo->base); | |
2151 | ||
2152 | return 0; | |
2153 | } | |
2154 | ||
2155 | static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) | |
2156 | { | |
2157 | struct i2c_dev_desc *i2cdev; | |
2158 | ||
2159 | i2c_del_adapter(&master->i2c); | |
2160 | ||
2161 | i3c_bus_for_each_i2cdev(&master->bus, i2cdev) | |
2162 | i2cdev->dev = NULL; | |
2163 | } | |
2164 | ||
2165 | static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) | |
2166 | { | |
2167 | struct i3c_dev_desc *i3cdev; | |
2168 | ||
2169 | i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { | |
2170 | if (!i3cdev->dev) | |
2171 | continue; | |
2172 | ||
2173 | i3cdev->dev->desc = NULL; | |
2174 | if (device_is_registered(&i3cdev->dev->dev)) | |
2175 | device_unregister(&i3cdev->dev->dev); | |
2176 | else | |
2177 | put_device(&i3cdev->dev->dev); | |
2178 | i3cdev->dev = NULL; | |
2179 | } | |
2180 | } | |
2181 | ||
2182 | /** | |
2183 | * i3c_master_queue_ibi() - Queue an IBI | |
2184 | * @dev: the device this IBI is coming from | |
2185 | * @slot: the IBI slot used to store the payload | |
2186 | * | |
2187 | * Queue an IBI to the controller workqueue. The IBI handler attached to | |
2188 | * the dev will be called from a workqueue context. | |
2189 | */ | |
2190 | void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) | |
2191 | { | |
2192 | atomic_inc(&dev->ibi->pending_ibis); | |
2193 | queue_work(dev->common.master->wq, &slot->work); | |
2194 | } | |
2195 | EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); | |
2196 | ||
2197 | static void i3c_master_handle_ibi(struct work_struct *work) | |
2198 | { | |
2199 | struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, | |
2200 | work); | |
2201 | struct i3c_dev_desc *dev = slot->dev; | |
2202 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
2203 | struct i3c_ibi_payload payload; | |
2204 | ||
2205 | payload.data = slot->data; | |
2206 | payload.len = slot->len; | |
2207 | ||
2208 | if (dev->dev) | |
2209 | dev->ibi->handler(dev->dev, &payload); | |
2210 | ||
2211 | master->ops->recycle_ibi_slot(dev, slot); | |
2212 | if (atomic_dec_and_test(&dev->ibi->pending_ibis)) | |
2213 | complete(&dev->ibi->all_ibis_handled); | |
2214 | } | |
2215 | ||
2216 | static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, | |
2217 | struct i3c_ibi_slot *slot) | |
2218 | { | |
2219 | slot->dev = dev; | |
2220 | INIT_WORK(&slot->work, i3c_master_handle_ibi); | |
2221 | } | |
2222 | ||
2223 | struct i3c_generic_ibi_slot { | |
2224 | struct list_head node; | |
2225 | struct i3c_ibi_slot base; | |
2226 | }; | |
2227 | ||
2228 | struct i3c_generic_ibi_pool { | |
2229 | spinlock_t lock; | |
2230 | unsigned int num_slots; | |
2231 | struct i3c_generic_ibi_slot *slots; | |
2232 | void *payload_buf; | |
2233 | struct list_head free_slots; | |
2234 | struct list_head pending; | |
2235 | }; | |
2236 | ||
2237 | /** | |
2238 | * i3c_generic_ibi_free_pool() - Free a generic IBI pool | |
2239 | * @pool: the IBI pool to free | |
2240 | * | |
2241 | * Free all IBI slots allated by a generic IBI pool. | |
2242 | */ | |
2243 | void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) | |
2244 | { | |
2245 | struct i3c_generic_ibi_slot *slot; | |
2246 | unsigned int nslots = 0; | |
2247 | ||
2248 | while (!list_empty(&pool->free_slots)) { | |
2249 | slot = list_first_entry(&pool->free_slots, | |
2250 | struct i3c_generic_ibi_slot, node); | |
2251 | list_del(&slot->node); | |
2252 | nslots++; | |
2253 | } | |
2254 | ||
2255 | /* | |
2256 | * If the number of freed slots is not equal to the number of allocated | |
2257 | * slots we have a leak somewhere. | |
2258 | */ | |
2259 | WARN_ON(nslots != pool->num_slots); | |
2260 | ||
2261 | kfree(pool->payload_buf); | |
2262 | kfree(pool->slots); | |
2263 | kfree(pool); | |
2264 | } | |
2265 | EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); | |
2266 | ||
2267 | /** | |
2268 | * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool | |
2269 | * @dev: the device this pool will be used for | |
2270 | * @req: IBI setup request describing what the device driver expects | |
2271 | * | |
2272 | * Create a generic IBI pool based on the information provided in @req. | |
2273 | * | |
2274 | * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. | |
2275 | */ | |
2276 | struct i3c_generic_ibi_pool * | |
2277 | i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, | |
2278 | const struct i3c_ibi_setup *req) | |
2279 | { | |
2280 | struct i3c_generic_ibi_pool *pool; | |
2281 | struct i3c_generic_ibi_slot *slot; | |
2282 | unsigned int i; | |
2283 | int ret; | |
2284 | ||
2285 | pool = kzalloc(sizeof(*pool), GFP_KERNEL); | |
2286 | if (!pool) | |
2287 | return ERR_PTR(-ENOMEM); | |
2288 | ||
2289 | spin_lock_init(&pool->lock); | |
2290 | INIT_LIST_HEAD(&pool->free_slots); | |
2291 | INIT_LIST_HEAD(&pool->pending); | |
2292 | ||
2293 | pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); | |
2294 | if (!pool->slots) { | |
2295 | ret = -ENOMEM; | |
2296 | goto err_free_pool; | |
2297 | } | |
2298 | ||
2299 | if (req->max_payload_len) { | |
2300 | pool->payload_buf = kcalloc(req->num_slots, | |
2301 | req->max_payload_len, GFP_KERNEL); | |
2302 | if (!pool->payload_buf) { | |
2303 | ret = -ENOMEM; | |
2304 | goto err_free_pool; | |
2305 | } | |
2306 | } | |
2307 | ||
2308 | for (i = 0; i < req->num_slots; i++) { | |
2309 | slot = &pool->slots[i]; | |
2310 | i3c_master_init_ibi_slot(dev, &slot->base); | |
2311 | ||
2312 | if (req->max_payload_len) | |
2313 | slot->base.data = pool->payload_buf + | |
2314 | (i * req->max_payload_len); | |
2315 | ||
2316 | list_add_tail(&slot->node, &pool->free_slots); | |
2317 | pool->num_slots++; | |
2318 | } | |
2319 | ||
2320 | return pool; | |
2321 | ||
2322 | err_free_pool: | |
2323 | i3c_generic_ibi_free_pool(pool); | |
2324 | return ERR_PTR(ret); | |
2325 | } | |
2326 | EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); | |
2327 | ||
2328 | /** | |
2329 | * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool | |
2330 | * @pool: the pool to query an IBI slot on | |
2331 | * | |
2332 | * Search for a free slot in a generic IBI pool. | |
2333 | * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() | |
2334 | * when it's no longer needed. | |
2335 | * | |
2336 | * Return: a pointer to a free slot, or NULL if there's no free slot available. | |
2337 | */ | |
2338 | struct i3c_ibi_slot * | |
2339 | i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) | |
2340 | { | |
2341 | struct i3c_generic_ibi_slot *slot; | |
2342 | unsigned long flags; | |
2343 | ||
2344 | spin_lock_irqsave(&pool->lock, flags); | |
2345 | slot = list_first_entry_or_null(&pool->free_slots, | |
2346 | struct i3c_generic_ibi_slot, node); | |
2347 | if (slot) | |
2348 | list_del(&slot->node); | |
2349 | spin_unlock_irqrestore(&pool->lock, flags); | |
2350 | ||
2351 | return slot ? &slot->base : NULL; | |
2352 | } | |
2353 | EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); | |
2354 | ||
2355 | /** | |
2356 | * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool | |
2357 | * @pool: the pool to return the IBI slot to | |
2358 | * @s: IBI slot to recycle | |
2359 | * | |
2360 | * Add an IBI slot back to its generic IBI pool. Should be called from the | |
2361 | * master driver struct_master_controller_ops->recycle_ibi() method. | |
2362 | */ | |
2363 | void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, | |
2364 | struct i3c_ibi_slot *s) | |
2365 | { | |
2366 | struct i3c_generic_ibi_slot *slot; | |
2367 | unsigned long flags; | |
2368 | ||
2369 | if (!s) | |
2370 | return; | |
2371 | ||
2372 | slot = container_of(s, struct i3c_generic_ibi_slot, base); | |
2373 | spin_lock_irqsave(&pool->lock, flags); | |
2374 | list_add_tail(&slot->node, &pool->free_slots); | |
2375 | spin_unlock_irqrestore(&pool->lock, flags); | |
2376 | } | |
2377 | EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); | |
2378 | ||
2379 | static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) | |
2380 | { | |
2381 | if (!ops || !ops->bus_init || !ops->priv_xfers || | |
2382 | !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers || | |
2383 | !ops->i2c_funcs) | |
2384 | return -EINVAL; | |
2385 | ||
2386 | if (ops->request_ibi && | |
2387 | (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || | |
2388 | !ops->recycle_ibi_slot)) | |
2389 | return -EINVAL; | |
2390 | ||
2391 | return 0; | |
2392 | } | |
2393 | ||
2394 | /** | |
2395 | * i3c_master_register() - register an I3C master | |
2396 | * @master: master used to send frames on the bus | |
2397 | * @parent: the parent device (the one that provides this I3C master | |
2398 | * controller) | |
2399 | * @ops: the master controller operations | |
2400 | * @secondary: true if you are registering a secondary master. Will return | |
2401 | * -ENOTSUPP if set to true since secondary masters are not yet | |
2402 | * supported | |
2403 | * | |
2404 | * This function takes care of everything for you: | |
2405 | * | |
2406 | * - creates and initializes the I3C bus | |
2407 | * - populates the bus with static I2C devs if @parent->of_node is not | |
2408 | * NULL | |
2409 | * - registers all I3C devices added by the controller during bus | |
2410 | * initialization | |
2411 | * - registers the I2C adapter and all I2C devices | |
2412 | * | |
2413 | * Return: 0 in case of success, a negative error code otherwise. | |
2414 | */ | |
2415 | int i3c_master_register(struct i3c_master_controller *master, | |
2416 | struct device *parent, | |
2417 | const struct i3c_master_controller_ops *ops, | |
2418 | bool secondary) | |
2419 | { | |
2420 | struct i3c_bus *i3cbus = i3c_master_get_bus(master); | |
2421 | enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; | |
2422 | struct i2c_dev_boardinfo *i2cbi; | |
2423 | int ret; | |
2424 | ||
2425 | /* We do not support secondary masters yet. */ | |
2426 | if (secondary) | |
2427 | return -ENOTSUPP; | |
2428 | ||
2429 | ret = i3c_master_check_ops(ops); | |
2430 | if (ret) | |
2431 | return ret; | |
2432 | ||
2433 | master->dev.parent = parent; | |
2434 | master->dev.of_node = of_node_get(parent->of_node); | |
2435 | master->dev.bus = &i3c_bus_type; | |
2436 | master->dev.type = &i3c_masterdev_type; | |
2437 | master->dev.release = i3c_masterdev_release; | |
2438 | master->ops = ops; | |
2439 | master->secondary = secondary; | |
2440 | INIT_LIST_HEAD(&master->boardinfo.i2c); | |
2441 | INIT_LIST_HEAD(&master->boardinfo.i3c); | |
2442 | ||
2443 | ret = i3c_bus_init(i3cbus); | |
2444 | if (ret) | |
2445 | return ret; | |
2446 | ||
2447 | device_initialize(&master->dev); | |
2448 | dev_set_name(&master->dev, "i3c-%d", i3cbus->id); | |
2449 | ||
2450 | ret = of_populate_i3c_bus(master); | |
2451 | if (ret) | |
2452 | goto err_put_dev; | |
2453 | ||
2454 | list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { | |
2455 | switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { | |
2456 | case I3C_LVR_I2C_INDEX(0): | |
2457 | if (mode < I3C_BUS_MODE_MIXED_FAST) | |
2458 | mode = I3C_BUS_MODE_MIXED_FAST; | |
2459 | break; | |
2460 | case I3C_LVR_I2C_INDEX(1): | |
2461 | case I3C_LVR_I2C_INDEX(2): | |
2462 | if (mode < I3C_BUS_MODE_MIXED_SLOW) | |
2463 | mode = I3C_BUS_MODE_MIXED_SLOW; | |
2464 | break; | |
2465 | default: | |
2466 | ret = -EINVAL; | |
2467 | goto err_put_dev; | |
2468 | } | |
2469 | } | |
2470 | ||
2471 | ret = i3c_bus_set_mode(i3cbus, mode); | |
2472 | if (ret) | |
2473 | goto err_put_dev; | |
2474 | ||
2475 | master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); | |
2476 | if (!master->wq) { | |
2477 | ret = -ENOMEM; | |
2478 | goto err_put_dev; | |
2479 | } | |
2480 | ||
2481 | ret = i3c_master_bus_init(master); | |
2482 | if (ret) | |
2483 | goto err_put_dev; | |
2484 | ||
2485 | ret = device_add(&master->dev); | |
2486 | if (ret) | |
2487 | goto err_cleanup_bus; | |
2488 | ||
2489 | /* | |
2490 | * Expose our I3C bus as an I2C adapter so that I2C devices are exposed | |
2491 | * through the I2C subsystem. | |
2492 | */ | |
2493 | ret = i3c_master_i2c_adapter_init(master); | |
2494 | if (ret) | |
2495 | goto err_del_dev; | |
2496 | ||
2497 | /* | |
2498 | * We're done initializing the bus and the controller, we can now | |
2499 | * register I3C devices dicovered during the initial DAA. | |
2500 | */ | |
2501 | master->init_done = true; | |
2502 | i3c_bus_normaluse_lock(&master->bus); | |
2503 | i3c_master_register_new_i3c_devs(master); | |
2504 | i3c_bus_normaluse_unlock(&master->bus); | |
2505 | ||
2506 | return 0; | |
2507 | ||
2508 | err_del_dev: | |
2509 | device_del(&master->dev); | |
2510 | ||
2511 | err_cleanup_bus: | |
2512 | i3c_master_bus_cleanup(master); | |
2513 | ||
2514 | err_put_dev: | |
2515 | put_device(&master->dev); | |
2516 | ||
2517 | return ret; | |
2518 | } | |
2519 | EXPORT_SYMBOL_GPL(i3c_master_register); | |
2520 | ||
2521 | /** | |
2522 | * i3c_master_unregister() - unregister an I3C master | |
2523 | * @master: master used to send frames on the bus | |
2524 | * | |
2525 | * Basically undo everything done in i3c_master_register(). | |
2526 | * | |
2527 | * Return: 0 in case of success, a negative error code otherwise. | |
2528 | */ | |
2529 | int i3c_master_unregister(struct i3c_master_controller *master) | |
2530 | { | |
2531 | i3c_master_i2c_adapter_cleanup(master); | |
2532 | i3c_master_unregister_i3c_devs(master); | |
2533 | i3c_master_bus_cleanup(master); | |
2534 | device_unregister(&master->dev); | |
2535 | ||
2536 | return 0; | |
2537 | } | |
2538 | EXPORT_SYMBOL_GPL(i3c_master_unregister); | |
2539 | ||
2540 | int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, | |
2541 | struct i3c_priv_xfer *xfers, | |
2542 | int nxfers) | |
2543 | { | |
2544 | struct i3c_master_controller *master; | |
2545 | ||
2546 | if (!dev) | |
2547 | return -ENOENT; | |
2548 | ||
2549 | master = i3c_dev_get_master(dev); | |
2550 | if (!master || !xfers) | |
2551 | return -EINVAL; | |
2552 | ||
2553 | if (!master->ops->priv_xfers) | |
2554 | return -ENOTSUPP; | |
2555 | ||
2556 | return master->ops->priv_xfers(dev, xfers, nxfers); | |
2557 | } | |
2558 | ||
2559 | int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) | |
2560 | { | |
2561 | struct i3c_master_controller *master; | |
2562 | int ret; | |
2563 | ||
2564 | if (!dev->ibi) | |
2565 | return -EINVAL; | |
2566 | ||
2567 | master = i3c_dev_get_master(dev); | |
2568 | ret = master->ops->disable_ibi(dev); | |
2569 | if (ret) | |
2570 | return ret; | |
2571 | ||
2572 | reinit_completion(&dev->ibi->all_ibis_handled); | |
2573 | if (atomic_read(&dev->ibi->pending_ibis)) | |
2574 | wait_for_completion(&dev->ibi->all_ibis_handled); | |
2575 | ||
2576 | dev->ibi->enabled = false; | |
2577 | ||
2578 | return 0; | |
2579 | } | |
2580 | ||
2581 | int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) | |
2582 | { | |
2583 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
2584 | int ret; | |
2585 | ||
2586 | if (!dev->ibi) | |
2587 | return -EINVAL; | |
2588 | ||
2589 | ret = master->ops->enable_ibi(dev); | |
2590 | if (!ret) | |
2591 | dev->ibi->enabled = true; | |
2592 | ||
2593 | return ret; | |
2594 | } | |
2595 | ||
2596 | int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, | |
2597 | const struct i3c_ibi_setup *req) | |
2598 | { | |
2599 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
2600 | struct i3c_device_ibi_info *ibi; | |
2601 | int ret; | |
2602 | ||
2603 | if (!master->ops->request_ibi) | |
2604 | return -ENOTSUPP; | |
2605 | ||
2606 | if (dev->ibi) | |
2607 | return -EBUSY; | |
2608 | ||
2609 | ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); | |
2610 | if (!ibi) | |
2611 | return -ENOMEM; | |
2612 | ||
2613 | atomic_set(&ibi->pending_ibis, 0); | |
2614 | init_completion(&ibi->all_ibis_handled); | |
2615 | ibi->handler = req->handler; | |
2616 | ibi->max_payload_len = req->max_payload_len; | |
2617 | ibi->num_slots = req->num_slots; | |
2618 | ||
2619 | dev->ibi = ibi; | |
2620 | ret = master->ops->request_ibi(dev, req); | |
2621 | if (ret) { | |
2622 | kfree(ibi); | |
2623 | dev->ibi = NULL; | |
2624 | } | |
2625 | ||
2626 | return ret; | |
2627 | } | |
2628 | ||
2629 | void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) | |
2630 | { | |
2631 | struct i3c_master_controller *master = i3c_dev_get_master(dev); | |
2632 | ||
2633 | if (!dev->ibi) | |
2634 | return; | |
2635 | ||
2636 | if (WARN_ON(dev->ibi->enabled)) | |
2637 | WARN_ON(i3c_dev_disable_ibi_locked(dev)); | |
2638 | ||
2639 | master->ops->free_ibi(dev); | |
2640 | kfree(dev->ibi); | |
2641 | dev->ibi = NULL; | |
2642 | } | |
2643 | ||
2644 | static int __init i3c_init(void) | |
2645 | { | |
2646 | return bus_register(&i3c_bus_type); | |
2647 | } | |
2648 | subsys_initcall(i3c_init); | |
2649 | ||
2650 | static void __exit i3c_exit(void) | |
2651 | { | |
2652 | idr_destroy(&i3c_bus_idr); | |
2653 | bus_unregister(&i3c_bus_type); | |
2654 | } | |
2655 | module_exit(i3c_exit); | |
2656 | ||
2657 | MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); | |
2658 | MODULE_DESCRIPTION("I3C core"); | |
2659 | MODULE_LICENSE("GPL v2"); |