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libnvdimm/altmap: Track namespace boundaries in altmap
[linux-2.6-block.git] / drivers / i3c / master.c
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3a379bbc
BB		 1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8#include <linux/atomic.h>
9#include <linux/bug.h>
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/export.h>
13#include <linux/kernel.h>
14#include <linux/list.h>
15#include <linux/of.h>
16#include <linux/slab.h>
17#include <linux/spinlock.h>
18#include <linux/workqueue.h>
19
20#include "internals.h"
21
22static DEFINE_IDR(i3c_bus_idr);
23static DEFINE_MUTEX(i3c_core_lock);
24
25/**
26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27 * @bus: I3C bus to take the lock on
28 *
29 * This function takes the bus lock so that no other operations can occur on
30 * the bus. This is needed for all kind of bus maintenance operation, like
31 * - enabling/disabling slave events
32 * - re-triggering DAA
33 * - changing the dynamic address of a device
34 * - relinquishing mastership
35 * - ...
36 *
37 * The reason for this kind of locking is that we don't want drivers and core
38 * logic to rely on I3C device information that could be changed behind their
39 * back.
40 */
41static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
42{
43 down_write(&bus->lock);
44}
45
46/**
47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
48 * operation
49 * @bus: I3C bus to release the lock on
50 *
51 * Should be called when the bus maintenance operation is done. See
52 * i3c_bus_maintenance_lock() for more details on what these maintenance
53 * operations are.
54 */
55static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
56{
57 up_write(&bus->lock);
58}
59
60/**
61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62 * @bus: I3C bus to take the lock on
63 *
64 * This function takes the bus lock for any operation that is not a maintenance
65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66 * maintenance operations). Basically all communications with I3C devices are
67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68 * state or I3C dynamic address).
69 *
70 * Note that this lock is not guaranteeing serialization of normal operations.
71 * In other words, transfer requests passed to the I3C master can be submitted
72 * in parallel and I3C master drivers have to use their own locking to make
73 * sure two different communications are not inter-mixed, or access to the
74 * output/input queue is not done while the engine is busy.
75 */
76void i3c_bus_normaluse_lock(struct i3c_bus *bus)
77{
78 down_read(&bus->lock);
79}
80
81/**
82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83 * @bus: I3C bus to release the lock on
84 *
85 * Should be called when a normal operation is done. See
86 * i3c_bus_normaluse_lock() for more details on what these normal operations
87 * are.
88 */
89void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
90{
91 up_read(&bus->lock);
92}
93
ecc8fb54
VS		 94static struct i3c_master_controller *
95i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
96{
97 return container_of(i3cbus, struct i3c_master_controller, bus);
98}
99
3a379bbc
BB		 100static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
101{
102 return container_of(dev, struct i3c_master_controller, dev);
103}
104
105static const struct device_type i3c_device_type;
106
107static struct i3c_bus *dev_to_i3cbus(struct device *dev)
108{
109 struct i3c_master_controller *master;
110
111 if (dev->type == &i3c_device_type)
112 return dev_to_i3cdev(dev)->bus;
113
114 master = dev_to_i3cmaster(dev);
115
116 return &master->bus;
117}
118
119static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
120{
121 struct i3c_master_controller *master;
122
123 if (dev->type == &i3c_device_type)
124 return dev_to_i3cdev(dev)->desc;
125
126 master = container_of(dev, struct i3c_master_controller, dev);
127
128 return master->this;
129}
130
131static ssize_t bcr_show(struct device *dev,
132 struct device_attribute *da,
133 char *buf)
134{
135 struct i3c_bus *bus = dev_to_i3cbus(dev);
136 struct i3c_dev_desc *desc;
137 ssize_t ret;
138
139 i3c_bus_normaluse_lock(bus);
140 desc = dev_to_i3cdesc(dev);
141 ret = sprintf(buf, "%x\n", desc->info.bcr);
142 i3c_bus_normaluse_unlock(bus);
143
144 return ret;
145}
146static DEVICE_ATTR_RO(bcr);
147
148static ssize_t dcr_show(struct device *dev,
149 struct device_attribute *da,
150 char *buf)
151{
152 struct i3c_bus *bus = dev_to_i3cbus(dev);
153 struct i3c_dev_desc *desc;
154 ssize_t ret;
155
156 i3c_bus_normaluse_lock(bus);
157 desc = dev_to_i3cdesc(dev);
158 ret = sprintf(buf, "%x\n", desc->info.dcr);
159 i3c_bus_normaluse_unlock(bus);
160
161 return ret;
162}
163static DEVICE_ATTR_RO(dcr);
164
165static ssize_t pid_show(struct device *dev,
166 struct device_attribute *da,
167 char *buf)
168{
169 struct i3c_bus *bus = dev_to_i3cbus(dev);
170 struct i3c_dev_desc *desc;
171 ssize_t ret;
172
173 i3c_bus_normaluse_lock(bus);
174 desc = dev_to_i3cdesc(dev);
175 ret = sprintf(buf, "%llx\n", desc->info.pid);
176 i3c_bus_normaluse_unlock(bus);
177
178 return ret;
179}
180static DEVICE_ATTR_RO(pid);
181
182static ssize_t dynamic_address_show(struct device *dev,
183 struct device_attribute *da,
184 char *buf)
185{
186 struct i3c_bus *bus = dev_to_i3cbus(dev);
187 struct i3c_dev_desc *desc;
188 ssize_t ret;
189
190 i3c_bus_normaluse_lock(bus);
191 desc = dev_to_i3cdesc(dev);
192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 i3c_bus_normaluse_unlock(bus);
194
195 return ret;
196}
197static DEVICE_ATTR_RO(dynamic_address);
198
199static const char * const hdrcap_strings[] = {
200 "hdr-ddr", "hdr-tsp", "hdr-tsl",
201};
202
203static ssize_t hdrcap_show(struct device *dev,
204 struct device_attribute *da,
205 char *buf)
206{
207 struct i3c_bus *bus = dev_to_i3cbus(dev);
208 struct i3c_dev_desc *desc;
209 ssize_t offset = 0, ret;
210 unsigned long caps;
211 int mode;
212
213 i3c_bus_normaluse_lock(bus);
214 desc = dev_to_i3cdesc(dev);
215 caps = desc->info.hdr_cap;
216 for_each_set_bit(mode, &caps, 8) {
217 if (mode >= ARRAY_SIZE(hdrcap_strings))
218 break;
219
220 if (!hdrcap_strings[mode])
221 continue;
222
223 ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 hdrcap_strings[mode]);
225 if (ret < 0)
226 goto out;
227
228 offset += ret;
229 }
230
231 ret = sprintf(buf + offset, "\n");
232 if (ret < 0)
233 goto out;
234
235 ret = offset + ret;
236
237out:
238 i3c_bus_normaluse_unlock(bus);
239
240 return ret;
241}
242static DEVICE_ATTR_RO(hdrcap);
243
244static struct attribute *i3c_device_attrs[] = {
245 &dev_attr_bcr.attr,
246 &dev_attr_dcr.attr,
247 &dev_attr_pid.attr,
248 &dev_attr_dynamic_address.attr,
249 &dev_attr_hdrcap.attr,
250 NULL,
251};
252ATTRIBUTE_GROUPS(i3c_device);
253
254static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
255{
256 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
257 struct i3c_device_info devinfo;
258 u16 manuf, part, ext;
259
260 i3c_device_get_info(i3cdev, &devinfo);
261 manuf = I3C_PID_MANUF_ID(devinfo.pid);
262 part = I3C_PID_PART_ID(devinfo.pid);
263 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
264
265 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
266 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
267 devinfo.dcr, manuf);
268
269 return add_uevent_var(env,
270 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04xext%04x",
271 devinfo.dcr, manuf, part, ext);
272}
273
274static const struct device_type i3c_device_type = {
275 .groups = i3c_device_groups,
276 .uevent = i3c_device_uevent,
277};
278
279static const struct i3c_device_id *
280i3c_device_match_id(struct i3c_device *i3cdev,
281 const struct i3c_device_id *id_table)
282{
283 struct i3c_device_info devinfo;
284 const struct i3c_device_id *id;
285
286 i3c_device_get_info(i3cdev, &devinfo);
287
288 /*
289 * The lower 32bits of the provisional ID is just filled with a random
290 * value, try to match using DCR info.
291 */
292 if (!I3C_PID_RND_LOWER_32BITS(devinfo.pid)) {
293 u16 manuf = I3C_PID_MANUF_ID(devinfo.pid);
294 u16 part = I3C_PID_PART_ID(devinfo.pid);
295 u16 ext_info = I3C_PID_EXTRA_INFO(devinfo.pid);
296
297 /* First try to match by manufacturer/part ID. */
298 for (id = id_table; id->match_flags != 0; id++) {
299 if ((id->match_flags & I3C_MATCH_MANUF_AND_PART) !=
300 I3C_MATCH_MANUF_AND_PART)
301 continue;
302
303 if (manuf != id->manuf_id || part != id->part_id)
304 continue;
305
306 if ((id->match_flags & I3C_MATCH_EXTRA_INFO) &&
307 ext_info != id->extra_info)
308 continue;
309
310 return id;
311 }
312 }
313
314 /* Fallback to DCR match. */
315 for (id = id_table; id->match_flags != 0; id++) {
316 if ((id->match_flags & I3C_MATCH_DCR) &&
317 id->dcr == devinfo.dcr)
318 return id;
319 }
320
321 return NULL;
322}
323
324static int i3c_device_match(struct device *dev, struct device_driver *drv)
325{
326 struct i3c_device *i3cdev;
327 struct i3c_driver *i3cdrv;
328
329 if (dev->type != &i3c_device_type)
330 return 0;
331
332 i3cdev = dev_to_i3cdev(dev);
333 i3cdrv = drv_to_i3cdrv(drv);
334 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
335 return 1;
336
337 return 0;
338}
339
340static int i3c_device_probe(struct device *dev)
341{
342 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
343 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
344
345 return driver->probe(i3cdev);
346}
347
348static int i3c_device_remove(struct device *dev)
349{
350 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
351 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
352 int ret;
353
354 ret = driver->remove(i3cdev);
355 if (ret)
356 return ret;
357
358 i3c_device_free_ibi(i3cdev);
359
360 return ret;
361}
362
363struct bus_type i3c_bus_type = {
364 .name = "i3c",
365 .match = i3c_device_match,
366 .probe = i3c_device_probe,
367 .remove = i3c_device_remove,
368};
369
370static enum i3c_addr_slot_status
371i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
372{
373 int status, bitpos = addr * 2;
374
375 if (addr > I2C_MAX_ADDR)
376 return I3C_ADDR_SLOT_RSVD;
377
378 status = bus->addrslots[bitpos / BITS_PER_LONG];
379 status >>= bitpos % BITS_PER_LONG;
380
381 return status & I3C_ADDR_SLOT_STATUS_MASK;
382}
383
384static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
385 enum i3c_addr_slot_status status)
386{
387 int bitpos = addr * 2;
388 unsigned long *ptr;
389
390 if (addr > I2C_MAX_ADDR)
391 return;
392
393 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
476c7e1d
DC		 394 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
395 (bitpos % BITS_PER_LONG));
396 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
3a379bbc
BB		 397}
398
399static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
400{
401 enum i3c_addr_slot_status status;
402
403 status = i3c_bus_get_addr_slot_status(bus, addr);
404
405 return status == I3C_ADDR_SLOT_FREE;
406}
407
408static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
409{
410 enum i3c_addr_slot_status status;
411 u8 addr;
412
413 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
414 status = i3c_bus_get_addr_slot_status(bus, addr);
415 if (status == I3C_ADDR_SLOT_FREE)
416 return addr;
417 }
418
419 return -ENOMEM;
420}
421
422static void i3c_bus_init_addrslots(struct i3c_bus *bus)
423{
424 int i;
425
426 /* Addresses 0 to 7 are reserved. */
427 for (i = 0; i < 8; i++)
428 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
429
430 /*
431 * Reserve broadcast address and all addresses that might collide
432 * with the broadcast address when facing a single bit error.
433 */
434 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
435 I3C_ADDR_SLOT_RSVD);
436 for (i = 0; i < 7; i++)
437 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
438 I3C_ADDR_SLOT_RSVD);
439}
440
441static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
442{
443 mutex_lock(&i3c_core_lock);
444 idr_remove(&i3c_bus_idr, i3cbus->id);
445 mutex_unlock(&i3c_core_lock);
446}
447
448static int i3c_bus_init(struct i3c_bus *i3cbus)
449{
450 int ret;
451
452 init_rwsem(&i3cbus->lock);
453 INIT_LIST_HEAD(&i3cbus->devs.i2c);
454 INIT_LIST_HEAD(&i3cbus->devs.i3c);
455 i3c_bus_init_addrslots(i3cbus);
456 i3cbus->mode = I3C_BUS_MODE_PURE;
457
458 mutex_lock(&i3c_core_lock);
459 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
460 mutex_unlock(&i3c_core_lock);
461
462 if (ret < 0)
463 return ret;
464
465 i3cbus->id = ret;
466
467 return 0;
468}
469
470static const char * const i3c_bus_mode_strings[] = {
471 [I3C_BUS_MODE_PURE] = "pure",
472 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
cbf4f732 473 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
3a379bbc
BB		 474 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
475};
476
477static ssize_t mode_show(struct device *dev,
478 struct device_attribute *da,
479 char *buf)
480{
481 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
482 ssize_t ret;
483
484 i3c_bus_normaluse_lock(i3cbus);
485 if (i3cbus->mode < 0 ||
afe120c7 486 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
3a379bbc
BB		 487 !i3c_bus_mode_strings[i3cbus->mode])
488 ret = sprintf(buf, "unknown\n");
489 else
490 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
491 i3c_bus_normaluse_unlock(i3cbus);
492
493 return ret;
494}
495static DEVICE_ATTR_RO(mode);
496
497static ssize_t current_master_show(struct device *dev,
498 struct device_attribute *da,
499 char *buf)
500{
501 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
502 ssize_t ret;
503
504 i3c_bus_normaluse_lock(i3cbus);
505 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
506 i3cbus->cur_master->info.pid);
507 i3c_bus_normaluse_unlock(i3cbus);
508
509 return ret;
510}
511static DEVICE_ATTR_RO(current_master);
512
513static ssize_t i3c_scl_frequency_show(struct device *dev,
514 struct device_attribute *da,
515 char *buf)
516{
517 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
518 ssize_t ret;
519
520 i3c_bus_normaluse_lock(i3cbus);
521 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
522 i3c_bus_normaluse_unlock(i3cbus);
523
524 return ret;
525}
526static DEVICE_ATTR_RO(i3c_scl_frequency);
527
528static ssize_t i2c_scl_frequency_show(struct device *dev,
529 struct device_attribute *da,
530 char *buf)
531{
532 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
533 ssize_t ret;
534
535 i3c_bus_normaluse_lock(i3cbus);
536 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
537 i3c_bus_normaluse_unlock(i3cbus);
538
539 return ret;
540}
541static DEVICE_ATTR_RO(i2c_scl_frequency);
542
543static struct attribute *i3c_masterdev_attrs[] = {
544 &dev_attr_mode.attr,
545 &dev_attr_current_master.attr,
546 &dev_attr_i3c_scl_frequency.attr,
547 &dev_attr_i2c_scl_frequency.attr,
548 &dev_attr_bcr.attr,
549 &dev_attr_dcr.attr,
550 &dev_attr_pid.attr,
551 &dev_attr_dynamic_address.attr,
552 &dev_attr_hdrcap.attr,
553 NULL,
554};
555ATTRIBUTE_GROUPS(i3c_masterdev);
556
557static void i3c_masterdev_release(struct device *dev)
558{
559 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
560 struct i3c_bus *bus = dev_to_i3cbus(dev);
561
562 if (master->wq)
563 destroy_workqueue(master->wq);
564
565 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
566 i3c_bus_cleanup(bus);
567
568 of_node_put(dev->of_node);
569}
570
571static const struct device_type i3c_masterdev_type = {
572 .groups = i3c_masterdev_groups,
573};
574
ecc8fb54
VS		 575int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
576 unsigned long max_i2c_scl_rate)
3a379bbc 577{
ecc8fb54 578 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
3a379bbc 579
ecc8fb54 580 i3cbus->mode = mode;
3a379bbc 581
ecc8fb54
VS		 582 switch (i3cbus->mode) {
583 case I3C_BUS_MODE_PURE:
584 if (!i3cbus->scl_rate.i3c)
585 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
586 break;
587 case I3C_BUS_MODE_MIXED_FAST:
cbf4f732 588 case I3C_BUS_MODE_MIXED_LIMITED:
ecc8fb54
VS		 589 if (!i3cbus->scl_rate.i3c)
590 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
591 if (!i3cbus->scl_rate.i2c)
592 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
593 break;
594 case I3C_BUS_MODE_MIXED_SLOW:
595 if (!i3cbus->scl_rate.i2c)
596 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
597 if (!i3cbus->scl_rate.i3c ||
598 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
599 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
600 break;
601 default:
602 return -EINVAL;
3a379bbc
BB		 603 }
604
ecc8fb54
VS		 605 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
606 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
607
3a379bbc
BB		 608 /*
609 * I3C/I2C frequency may have been overridden, check that user-provided
610 * values are not exceeding max possible frequency.
611 */
612 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
613 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
614 return -EINVAL;
615
616 return 0;
617}
618
619static struct i3c_master_controller *
620i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
621{
622 return container_of(adap, struct i3c_master_controller, i2c);
623}
624
625static struct i2c_adapter *
626i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
627{
628 return &master->i2c;
629}
630
631static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
632{
633 kfree(dev);
634}
635
636static struct i2c_dev_desc *
637i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
638 const struct i2c_dev_boardinfo *boardinfo)
639{
640 struct i2c_dev_desc *dev;
641
642 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
643 if (!dev)
644 return ERR_PTR(-ENOMEM);
645
646 dev->common.master = master;
647 dev->boardinfo = boardinfo;
648
649 return dev;
650}
651
652static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
653 u16 payloadlen)
654{
655 dest->addr = addr;
656 dest->payload.len = payloadlen;
657 if (payloadlen)
658 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
659 else
660 dest->payload.data = NULL;
661
662 return dest->payload.data;
663}
664
665static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
666{
667 kfree(dest->payload.data);
668}
669
670static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
671 struct i3c_ccc_cmd_dest *dests,
672 unsigned int ndests)
673{
674 cmd->rnw = rnw ? 1 : 0;
675 cmd->id = id;
676 cmd->dests = dests;
677 cmd->ndests = ndests;
678 cmd->err = I3C_ERROR_UNKNOWN;
679}
680
681static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
682 struct i3c_ccc_cmd *cmd)
683{
684 int ret;
685
686 if (!cmd || !master)
687 return -EINVAL;
688
689 if (WARN_ON(master->init_done &&
690 !rwsem_is_locked(&master->bus.lock)))
691 return -EINVAL;
692
693 if (!master->ops->send_ccc_cmd)
694 return -ENOTSUPP;
695
696 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
697 return -EINVAL;
698
699 if (master->ops->supports_ccc_cmd &&
700 !master->ops->supports_ccc_cmd(master, cmd))
701 return -ENOTSUPP;
702
703 ret = master->ops->send_ccc_cmd(master, cmd);
704 if (ret) {
705 if (cmd->err != I3C_ERROR_UNKNOWN)
706 return cmd->err;
707
708 return ret;
709 }
710
711 return 0;
712}
713
714static struct i2c_dev_desc *
715i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
716 u16 addr)
717{
718 struct i2c_dev_desc *dev;
719
720 i3c_bus_for_each_i2cdev(&master->bus, dev) {
721 if (dev->boardinfo->base.addr == addr)
722 return dev;
723 }
724
725 return NULL;
726}
727
728/**
729 * i3c_master_get_free_addr() - get a free address on the bus
730 * @master: I3C master object
731 * @start_addr: where to start searching
732 *
733 * This function must be called with the bus lock held in write mode.
734 *
735 * Return: the first free address starting at @start_addr (included) or -ENOMEM
736 * if there's no more address available.
737 */
738int i3c_master_get_free_addr(struct i3c_master_controller *master,
739 u8 start_addr)
740{
741 return i3c_bus_get_free_addr(&master->bus, start_addr);
742}
743EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
744
745static void i3c_device_release(struct device *dev)
746{
747 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
748
749 WARN_ON(i3cdev->desc);
750
751 of_node_put(i3cdev->dev.of_node);
752 kfree(i3cdev);
753}
754
755static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
756{
757 kfree(dev);
758}
759
760static struct i3c_dev_desc *
761i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
762 const struct i3c_device_info *info)
763{
764 struct i3c_dev_desc *dev;
765
766 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
767 if (!dev)
768 return ERR_PTR(-ENOMEM);
769
770 dev->common.master = master;
771 dev->info = *info;
772 mutex_init(&dev->ibi_lock);
773
774 return dev;
775}
776
777static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
778 u8 addr)
779{
780 enum i3c_addr_slot_status addrstat;
781 struct i3c_ccc_cmd_dest dest;
782 struct i3c_ccc_cmd cmd;
783 int ret;
784
785 if (!master)
786 return -EINVAL;
787
788 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
789 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
790 return -EINVAL;
791
792 i3c_ccc_cmd_dest_init(&dest, addr, 0);
793 i3c_ccc_cmd_init(&cmd, false,
794 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
795 &dest, 1);
796 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
797 i3c_ccc_cmd_dest_cleanup(&dest);
798
799 return ret;
800}
801
802/**
803 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
804 * procedure
805 * @master: master used to send frames on the bus
806 *
807 * Send a ENTDAA CCC command to start a DAA procedure.
808 *
809 * Note that this function only sends the ENTDAA CCC command, all the logic
810 * behind dynamic address assignment has to be handled in the I3C master
811 * driver.
812 *
813 * This function must be called with the bus lock held in write mode.
814 *
815 * Return: 0 in case of success, a positive I3C error code if the error is
816 * one of the official Mx error codes, and a negative error code otherwise.
817 */
818int i3c_master_entdaa_locked(struct i3c_master_controller *master)
819{
820 struct i3c_ccc_cmd_dest dest;
821 struct i3c_ccc_cmd cmd;
822 int ret;
823
824 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
825 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
826 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
827 i3c_ccc_cmd_dest_cleanup(&dest);
828
829 return ret;
830}
831EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
832
833static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
834 u8 addr, bool enable, u8 evts)
835{
836 struct i3c_ccc_events *events;
837 struct i3c_ccc_cmd_dest dest;
838 struct i3c_ccc_cmd cmd;
839 int ret;
840
841 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
842 if (!events)
843 return -ENOMEM;
844
845 events->events = evts;
846 i3c_ccc_cmd_init(&cmd, false,
847 enable ?
848 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
849 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
850 &dest, 1);
851 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
852 i3c_ccc_cmd_dest_cleanup(&dest);
853
854 return ret;
855}
856
857/**
858 * i3c_master_disec_locked() - send a DISEC CCC command
859 * @master: master used to send frames on the bus
860 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
861 * @evts: events to disable
862 *
863 * Send a DISEC CCC command to disable some or all events coming from a
864 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
865 *
866 * This function must be called with the bus lock held in write mode.
867 *
868 * Return: 0 in case of success, a positive I3C error code if the error is
869 * one of the official Mx error codes, and a negative error code otherwise.
870 */
871int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
872 u8 evts)
873{
874 return i3c_master_enec_disec_locked(master, addr, false, evts);
875}
876EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
877
878/**
879 * i3c_master_enec_locked() - send an ENEC CCC command
880 * @master: master used to send frames on the bus
881 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
882 * @evts: events to disable
883 *
884 * Sends an ENEC CCC command to enable some or all events coming from a
885 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
886 *
887 * This function must be called with the bus lock held in write mode.
888 *
889 * Return: 0 in case of success, a positive I3C error code if the error is
890 * one of the official Mx error codes, and a negative error code otherwise.
891 */
892int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
893 u8 evts)
894{
895 return i3c_master_enec_disec_locked(master, addr, true, evts);
896}
897EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
898
899/**
900 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
901 * @master: master used to send frames on the bus
902 *
903 * Send a DEFSLVS CCC command containing all the devices known to the @master.
904 * This is useful when you have secondary masters on the bus to propagate
905 * device information.
906 *
907 * This should be called after all I3C devices have been discovered (in other
908 * words, after the DAA procedure has finished) and instantiated in
909 * &i3c_master_controller_ops->bus_init().
910 * It should also be called if a master ACKed an Hot-Join request and assigned
911 * a dynamic address to the device joining the bus.
912 *
913 * This function must be called with the bus lock held in write mode.
914 *
915 * Return: 0 in case of success, a positive I3C error code if the error is
916 * one of the official Mx error codes, and a negative error code otherwise.
917 */
918int i3c_master_defslvs_locked(struct i3c_master_controller *master)
919{
920 struct i3c_ccc_defslvs *defslvs;
921 struct i3c_ccc_dev_desc *desc;
922 struct i3c_ccc_cmd_dest dest;
923 struct i3c_dev_desc *i3cdev;
924 struct i2c_dev_desc *i2cdev;
925 struct i3c_ccc_cmd cmd;
926 struct i3c_bus *bus;
927 bool send = false;
928 int ndevs = 0, ret;
929
930 if (!master)
931 return -EINVAL;
932
933 bus = i3c_master_get_bus(master);
934 i3c_bus_for_each_i3cdev(bus, i3cdev) {
935 ndevs++;
936
937 if (i3cdev == master->this)
938 continue;
939
940 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
941 I3C_BCR_I3C_MASTER)
942 send = true;
943 }
944
945 /* No other master on the bus, skip DEFSLVS. */
946 if (!send)
947 return 0;
948
949 i3c_bus_for_each_i2cdev(bus, i2cdev)
950 ndevs++;
951
952 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
ede20015
GS		 953 struct_size(defslvs, slaves,
954 ndevs - 1));
3a379bbc
BB		 955 if (!defslvs)
956 return -ENOMEM;
957
958 defslvs->count = ndevs;
959 defslvs->master.bcr = master->this->info.bcr;
960 defslvs->master.dcr = master->this->info.dcr;
961 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
962 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
963
964 desc = defslvs->slaves;
965 i3c_bus_for_each_i2cdev(bus, i2cdev) {
966 desc->lvr = i2cdev->boardinfo->lvr;
967 desc->static_addr = i2cdev->boardinfo->base.addr << 1;
968 desc++;
969 }
970
971 i3c_bus_for_each_i3cdev(bus, i3cdev) {
972 /* Skip the I3C dev representing this master. */
973 if (i3cdev == master->this)
974 continue;
975
976 desc->bcr = i3cdev->info.bcr;
977 desc->dcr = i3cdev->info.dcr;
978 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
979 desc->static_addr = i3cdev->info.static_addr << 1;
980 desc++;
981 }
982
983 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
984 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
985 i3c_ccc_cmd_dest_cleanup(&dest);
986
987 return ret;
988}
989EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
990
991static int i3c_master_setda_locked(struct i3c_master_controller *master,
992 u8 oldaddr, u8 newaddr, bool setdasa)
993{
994 struct i3c_ccc_cmd_dest dest;
995 struct i3c_ccc_setda *setda;
996 struct i3c_ccc_cmd cmd;
997 int ret;
998
999 if (!oldaddr || !newaddr)
1000 return -EINVAL;
1001
1002 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1003 if (!setda)
1004 return -ENOMEM;
1005
1006 setda->addr = newaddr << 1;
1007 i3c_ccc_cmd_init(&cmd, false,
1008 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1009 &dest, 1);
1010 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1011 i3c_ccc_cmd_dest_cleanup(&dest);
1012
1013 return ret;
1014}
1015
1016static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1017 u8 static_addr, u8 dyn_addr)
1018{
1019 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1020}
1021
1022static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1023 u8 oldaddr, u8 newaddr)
1024{
1025 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1026}
1027
1028static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1029 struct i3c_device_info *info)
1030{
1031 struct i3c_ccc_cmd_dest dest;
1032 unsigned int expected_len;
1033 struct i3c_ccc_mrl *mrl;
1034 struct i3c_ccc_cmd cmd;
1035 int ret;
1036
1037 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1038 if (!mrl)
1039 return -ENOMEM;
1040
1041 /*
1042 * When the device does not have IBI payload GETMRL only returns 2
1043 * bytes of data.
1044 */
1045 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1046 dest.payload.len -= 1;
1047
1048 expected_len = dest.payload.len;
1049 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1050 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1051 if (ret)
1052 goto out;
1053
1054 if (dest.payload.len != expected_len) {
1055 ret = -EIO;
1056 goto out;
1057 }
1058
1059 info->max_read_len = be16_to_cpu(mrl->read_len);
1060
1061 if (info->bcr & I3C_BCR_IBI_PAYLOAD)
1062 info->max_ibi_len = mrl->ibi_len;
1063
1064out:
1065 i3c_ccc_cmd_dest_cleanup(&dest);
1066
1067 return ret;
1068}
1069
1070static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1071 struct i3c_device_info *info)
1072{
1073 struct i3c_ccc_cmd_dest dest;
1074 struct i3c_ccc_mwl *mwl;
1075 struct i3c_ccc_cmd cmd;
1076 int ret;
1077
1078 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1079 if (!mwl)
1080 return -ENOMEM;
1081
1082 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1083 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1084 if (ret)
1085 goto out;
1086
1087 if (dest.payload.len != sizeof(*mwl))
1088 return -EIO;
1089
1090 info->max_write_len = be16_to_cpu(mwl->len);
1091
1092out:
1093 i3c_ccc_cmd_dest_cleanup(&dest);
1094
1095 return ret;
1096}
1097
1098static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1099 struct i3c_device_info *info)
1100{
1101 struct i3c_ccc_getmxds *getmaxds;
1102 struct i3c_ccc_cmd_dest dest;
1103 struct i3c_ccc_cmd cmd;
1104 int ret;
1105
1106 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1107 sizeof(*getmaxds));
1108 if (!getmaxds)
1109 return -ENOMEM;
1110
1111 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1112 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1113 if (ret)
1114 goto out;
1115
1116 if (dest.payload.len != 2 && dest.payload.len != 5) {
1117 ret = -EIO;
1118 goto out;
1119 }
1120
1121 info->max_read_ds = getmaxds->maxrd;
1122 info->max_write_ds = getmaxds->maxwr;
1123 if (dest.payload.len == 5)
1124 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1125 ((u32)getmaxds->maxrdturn[1] << 8) |
1126 ((u32)getmaxds->maxrdturn[2] << 16);
1127
1128out:
1129 i3c_ccc_cmd_dest_cleanup(&dest);
1130
1131 return ret;
1132}
1133
1134static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1135 struct i3c_device_info *info)
1136{
1137 struct i3c_ccc_gethdrcap *gethdrcap;
1138 struct i3c_ccc_cmd_dest dest;
1139 struct i3c_ccc_cmd cmd;
1140 int ret;
1141
1142 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1143 sizeof(*gethdrcap));
1144 if (!gethdrcap)
1145 return -ENOMEM;
1146
1147 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1148 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1149 if (ret)
1150 goto out;
1151
1152 if (dest.payload.len != 1) {
1153 ret = -EIO;
1154 goto out;
1155 }
1156
1157 info->hdr_cap = gethdrcap->modes;
1158
1159out:
1160 i3c_ccc_cmd_dest_cleanup(&dest);
1161
1162 return ret;
1163}
1164
1165static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1166 struct i3c_device_info *info)
1167{
1168 struct i3c_ccc_getpid *getpid;
1169 struct i3c_ccc_cmd_dest dest;
1170 struct i3c_ccc_cmd cmd;
1171 int ret, i;
1172
1173 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1174 if (!getpid)
1175 return -ENOMEM;
1176
1177 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1178 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1179 if (ret)
1180 goto out;
1181
1182 info->pid = 0;
1183 for (i = 0; i < sizeof(getpid->pid); i++) {
1184 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1185
1186 info->pid |= (u64)getpid->pid[i] << sft;
1187 }
1188
1189out:
1190 i3c_ccc_cmd_dest_cleanup(&dest);
1191
1192 return ret;
1193}
1194
1195static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1196 struct i3c_device_info *info)
1197{
1198 struct i3c_ccc_getbcr *getbcr;
1199 struct i3c_ccc_cmd_dest dest;
1200 struct i3c_ccc_cmd cmd;
1201 int ret;
1202
1203 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1204 if (!getbcr)
1205 return -ENOMEM;
1206
1207 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1208 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1209 if (ret)
1210 goto out;
1211
1212 info->bcr = getbcr->bcr;
1213
1214out:
1215 i3c_ccc_cmd_dest_cleanup(&dest);
1216
1217 return ret;
1218}
1219
1220static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1221 struct i3c_device_info *info)
1222{
1223 struct i3c_ccc_getdcr *getdcr;
1224 struct i3c_ccc_cmd_dest dest;
1225 struct i3c_ccc_cmd cmd;
1226 int ret;
1227
1228 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1229 if (!getdcr)
1230 return -ENOMEM;
1231
1232 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1233 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1234 if (ret)
1235 goto out;
1236
1237 info->dcr = getdcr->dcr;
1238
1239out:
1240 i3c_ccc_cmd_dest_cleanup(&dest);
1241
1242 return ret;
1243}
1244
1245static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1246{
1247 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1248 enum i3c_addr_slot_status slot_status;
1249 int ret;
1250
1251 if (!dev->info.dyn_addr)
1252 return -EINVAL;
1253
1254 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1255 dev->info.dyn_addr);
1256 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1257 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1258 return -EINVAL;
1259
1260 ret = i3c_master_getpid_locked(master, &dev->info);
1261 if (ret)
1262 return ret;
1263
1264 ret = i3c_master_getbcr_locked(master, &dev->info);
1265 if (ret)
1266 return ret;
1267
1268 ret = i3c_master_getdcr_locked(master, &dev->info);
1269 if (ret)
1270 return ret;
1271
1272 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1273 ret = i3c_master_getmxds_locked(master, &dev->info);
1274 if (ret)
1275 return ret;
1276 }
1277
1278 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1279 dev->info.max_ibi_len = 1;
1280
1281 i3c_master_getmrl_locked(master, &dev->info);
1282 i3c_master_getmwl_locked(master, &dev->info);
1283
1284 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1285 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1286 if (ret)
1287 return ret;
1288 }
1289
1290 return 0;
1291}
1292
1293static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1294{
1295 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1296
1297 if (dev->info.static_addr)
1298 i3c_bus_set_addr_slot_status(&master->bus,
1299 dev->info.static_addr,
1300 I3C_ADDR_SLOT_FREE);
1301
1302 if (dev->info.dyn_addr)
1303 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1304 I3C_ADDR_SLOT_FREE);
1305
1306 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1307 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1308 I3C_ADDR_SLOT_FREE);
1309}
1310
1311static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1312{
1313 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1314 enum i3c_addr_slot_status status;
1315
1316 if (!dev->info.static_addr && !dev->info.dyn_addr)
1317 return 0;
1318
1319 if (dev->info.static_addr) {
1320 status = i3c_bus_get_addr_slot_status(&master->bus,
1321 dev->info.static_addr);
1322 if (status != I3C_ADDR_SLOT_FREE)
1323 return -EBUSY;
1324
1325 i3c_bus_set_addr_slot_status(&master->bus,
1326 dev->info.static_addr,
1327 I3C_ADDR_SLOT_I3C_DEV);
1328 }
1329
1330 /*
1331 * ->init_dyn_addr should have been reserved before that, so, if we're
1332 * trying to apply a pre-reserved dynamic address, we should not try
1333 * to reserve the address slot a second time.
1334 */
1335 if (dev->info.dyn_addr &&
1336 (!dev->boardinfo ||
1337 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1338 status = i3c_bus_get_addr_slot_status(&master->bus,
1339 dev->info.dyn_addr);
1340 if (status != I3C_ADDR_SLOT_FREE)
1341 goto err_release_static_addr;
1342
1343 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1344 I3C_ADDR_SLOT_I3C_DEV);
1345 }
1346
1347 return 0;
1348
1349err_release_static_addr:
1350 if (dev->info.static_addr)
1351 i3c_bus_set_addr_slot_status(&master->bus,
1352 dev->info.static_addr,
1353 I3C_ADDR_SLOT_FREE);
1354
1355 return -EBUSY;
1356}
1357
1358static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1359 struct i3c_dev_desc *dev)
1360{
1361 int ret;
1362
1363 /*
1364 * We don't attach devices to the controller until they are
1365 * addressable on the bus.
1366 */
1367 if (!dev->info.static_addr && !dev->info.dyn_addr)
1368 return 0;
1369
1370 ret = i3c_master_get_i3c_addrs(dev);
1371 if (ret)
1372 return ret;
1373
1374 /* Do not attach the master device itself. */
1375 if (master->this != dev && master->ops->attach_i3c_dev) {
1376 ret = master->ops->attach_i3c_dev(dev);
1377 if (ret) {
1378 i3c_master_put_i3c_addrs(dev);
1379 return ret;
1380 }
1381 }
1382
1383 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1384
1385 return 0;
1386}
1387
1388static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1389 u8 old_dyn_addr)
1390{
1391 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1392 enum i3c_addr_slot_status status;
1393 int ret;
1394
1395 if (dev->info.dyn_addr != old_dyn_addr) {
1396 status = i3c_bus_get_addr_slot_status(&master->bus,
1397 dev->info.dyn_addr);
1398 if (status != I3C_ADDR_SLOT_FREE)
1399 return -EBUSY;
1400 i3c_bus_set_addr_slot_status(&master->bus,
1401 dev->info.dyn_addr,
1402 I3C_ADDR_SLOT_I3C_DEV);
1403 }
1404
1405 if (master->ops->reattach_i3c_dev) {
1406 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1407 if (ret) {
1408 i3c_master_put_i3c_addrs(dev);
1409 return ret;
1410 }
1411 }
1412
1413 return 0;
1414}
1415
1416static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1417{
1418 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1419
1420 /* Do not detach the master device itself. */
1421 if (master->this != dev && master->ops->detach_i3c_dev)
1422 master->ops->detach_i3c_dev(dev);
1423
1424 i3c_master_put_i3c_addrs(dev);
1425 list_del(&dev->common.node);
1426}
1427
1428static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1429 struct i2c_dev_desc *dev)
1430{
1431 int ret;
1432
1433 if (master->ops->attach_i2c_dev) {
1434 ret = master->ops->attach_i2c_dev(dev);
1435 if (ret)
1436 return ret;
1437 }
1438
1439 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1440
1441 return 0;
1442}
1443
1444static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1445{
1446 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1447
1448 list_del(&dev->common.node);
1449
1450 if (master->ops->detach_i2c_dev)
1451 master->ops->detach_i2c_dev(dev);
1452}
1453
1454static void i3c_master_pre_assign_dyn_addr(struct i3c_dev_desc *dev)
1455{
1456 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1457 int ret;
1458
1459 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
1460 !dev->boardinfo->static_addr)
1461 return;
1462
1463 ret = i3c_master_setdasa_locked(master, dev->info.static_addr,
1464 dev->boardinfo->init_dyn_addr);
1465 if (ret)
1466 return;
1467
1468 dev->info.dyn_addr = dev->boardinfo->init_dyn_addr;
1469 ret = i3c_master_reattach_i3c_dev(dev, 0);
1470 if (ret)
1471 goto err_rstdaa;
1472
1473 ret = i3c_master_retrieve_dev_info(dev);
1474 if (ret)
1475 goto err_rstdaa;
1476
1477 return;
1478
1479err_rstdaa:
1480 i3c_master_rstdaa_locked(master, dev->boardinfo->init_dyn_addr);
1481}
1482
1483static void
1484i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1485{
1486 struct i3c_dev_desc *desc;
1487 int ret;
1488
1489 if (!master->init_done)
1490 return;
1491
1492 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1493 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1494 continue;
1495
1496 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1497 if (!desc->dev)
1498 continue;
1499
1500 desc->dev->bus = &master->bus;
1501 desc->dev->desc = desc;
1502 desc->dev->dev.parent = &master->dev;
1503 desc->dev->dev.type = &i3c_device_type;
1504 desc->dev->dev.bus = &i3c_bus_type;
1505 desc->dev->dev.release = i3c_device_release;
1506 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1507 desc->info.pid);
1508
1509 if (desc->boardinfo)
1510 desc->dev->dev.of_node = desc->boardinfo->of_node;
1511
1512 ret = device_register(&desc->dev->dev);
1513 if (ret)
1514 dev_err(&master->dev,
1515 "Failed to add I3C device (err = %d)\n", ret);
1516 }
1517}
1518
1519/**
1520 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1521 * @master: master doing the DAA
1522 *
1523 * This function is instantiating an I3C device object and adding it to the
1524 * I3C device list. All device information are automatically retrieved using
1525 * standard CCC commands.
1526 *
1527 * The I3C device object is returned in case the master wants to attach
1528 * private data to it using i3c_dev_set_master_data().
1529 *
1530 * This function must be called with the bus lock held in write mode.
1531 *
1532 * Return: a 0 in case of success, an negative error code otherwise.
1533 */
1534int i3c_master_do_daa(struct i3c_master_controller *master)
1535{
1536 int ret;
1537
1538 i3c_bus_maintenance_lock(&master->bus);
1539 ret = master->ops->do_daa(master);
1540 i3c_bus_maintenance_unlock(&master->bus);
1541
1542 if (ret)
1543 return ret;
1544
1545 i3c_bus_normaluse_lock(&master->bus);
1546 i3c_master_register_new_i3c_devs(master);
1547 i3c_bus_normaluse_unlock(&master->bus);
1548
1549 return 0;
1550}
1551EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1552
1553/**
1554 * i3c_master_set_info() - set master device information
1555 * @master: master used to send frames on the bus
1556 * @info: I3C device information
1557 *
1558 * Set master device info. This should be called from
1559 * &i3c_master_controller_ops->bus_init().
1560 *
1561 * Not all &i3c_device_info fields are meaningful for a master device.
1562 * Here is a list of fields that should be properly filled:
1563 *
1564 * - &i3c_device_info->dyn_addr
1565 * - &i3c_device_info->bcr
1566 * - &i3c_device_info->dcr
1567 * - &i3c_device_info->pid
1568 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1569 * &i3c_device_info->bcr
1570 *
1571 * This function must be called with the bus lock held in maintenance mode.
1572 *
1573 * Return: 0 if @info contains valid information (not every piece of
1574 * information can be checked, but we can at least make sure @info->dyn_addr
1575 * and @info->bcr are correct), -EINVAL otherwise.
1576 */
1577int i3c_master_set_info(struct i3c_master_controller *master,
1578 const struct i3c_device_info *info)
1579{
1580 struct i3c_dev_desc *i3cdev;
1581 int ret;
1582
1583 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1584 return -EINVAL;
1585
1586 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1587 master->secondary)
1588 return -EINVAL;
1589
1590 if (master->this)
1591 return -EINVAL;
1592
1593 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1594 if (IS_ERR(i3cdev))
1595 return PTR_ERR(i3cdev);
1596
1597 master->this = i3cdev;
1598 master->bus.cur_master = master->this;
1599
1600 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1601 if (ret)
1602 goto err_free_dev;
1603
1604 return 0;
1605
1606err_free_dev:
1607 i3c_master_free_i3c_dev(i3cdev);
1608
1609 return ret;
1610}
1611EXPORT_SYMBOL_GPL(i3c_master_set_info);
1612
1613static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1614{
1615 struct i3c_dev_desc *i3cdev, *i3ctmp;
1616 struct i2c_dev_desc *i2cdev, *i2ctmp;
1617
1618 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1619 common.node) {
1620 i3c_master_detach_i3c_dev(i3cdev);
1621
1622 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1623 i3c_bus_set_addr_slot_status(&master->bus,
1624 i3cdev->boardinfo->init_dyn_addr,
1625 I3C_ADDR_SLOT_FREE);
1626
1627 i3c_master_free_i3c_dev(i3cdev);
1628 }
1629
1630 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1631 common.node) {
1632 i3c_master_detach_i2c_dev(i2cdev);
1633 i3c_bus_set_addr_slot_status(&master->bus,
1634 i2cdev->boardinfo->base.addr,
1635 I3C_ADDR_SLOT_FREE);
1636 i3c_master_free_i2c_dev(i2cdev);
1637 }
1638}
1639
1640/**
1641 * i3c_master_bus_init() - initialize an I3C bus
1642 * @master: main master initializing the bus
1643 *
1644 * This function is following all initialisation steps described in the I3C
1645 * specification:
1646 *
1647 * 1. Attach I2C and statically defined I3C devs to the master so that the
1648 * master can fill its internal device table appropriately
1649 *
1650 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1651 * the master controller. That's usually where the bus mode is selected
1652 * (pure bus or mixed fast/slow bus)
1653 *
1654 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1655 * particularly important when the bus was previously configured by someone
1656 * else (for example the bootloader)
1657 *
1658 * 4. Disable all slave events.
1659 *
1660 * 5. Pre-assign dynamic addresses requested by the FW with SETDASA for I3C
1661 * devices that have a static address
1662 *
1663 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1664 * remaining I3C devices
1665 *
1666 * Once this is done, all I3C and I2C devices should be usable.
1667 *
1668 * Return: a 0 in case of success, an negative error code otherwise.
1669 */
1670static int i3c_master_bus_init(struct i3c_master_controller *master)
1671{
1672 enum i3c_addr_slot_status status;
1673 struct i2c_dev_boardinfo *i2cboardinfo;
1674 struct i3c_dev_boardinfo *i3cboardinfo;
1675 struct i3c_dev_desc *i3cdev;
1676 struct i2c_dev_desc *i2cdev;
1677 int ret;
1678
1679 /*
1680 * First attach all devices with static definitions provided by the
1681 * FW.
1682 */
1683 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1684 status = i3c_bus_get_addr_slot_status(&master->bus,
1685 i2cboardinfo->base.addr);
1686 if (status != I3C_ADDR_SLOT_FREE) {
1687 ret = -EBUSY;
1688 goto err_detach_devs;
1689 }
1690
1691 i3c_bus_set_addr_slot_status(&master->bus,
1692 i2cboardinfo->base.addr,
1693 I3C_ADDR_SLOT_I2C_DEV);
1694
1695 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1696 if (IS_ERR(i2cdev)) {
1697 ret = PTR_ERR(i2cdev);
1698 goto err_detach_devs;
1699 }
1700
1701 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1702 if (ret) {
1703 i3c_master_free_i2c_dev(i2cdev);
1704 goto err_detach_devs;
1705 }
1706 }
1707 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1708 struct i3c_device_info info = {
1709 .static_addr = i3cboardinfo->static_addr,
1710 };
1711
1712 if (i3cboardinfo->init_dyn_addr) {
1713 status = i3c_bus_get_addr_slot_status(&master->bus,
1714 i3cboardinfo->init_dyn_addr);
1715 if (status != I3C_ADDR_SLOT_FREE) {
1716 ret = -EBUSY;
1717 goto err_detach_devs;
1718 }
1719 }
1720
1721 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1722 if (IS_ERR(i3cdev)) {
1723 ret = PTR_ERR(i3cdev);
1724 goto err_detach_devs;
1725 }
1726
1727 i3cdev->boardinfo = i3cboardinfo;
1728
1729 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1730 if (ret) {
1731 i3c_master_free_i3c_dev(i3cdev);
1732 goto err_detach_devs;
1733 }
1734 }
1735
1736 /*
1737 * Now execute the controller specific ->bus_init() routine, which
1738 * might configure its internal logic to match the bus limitations.
1739 */
1740 ret = master->ops->bus_init(master);
1741 if (ret)
1742 goto err_detach_devs;
1743
1744 /*
1745 * The master device should have been instantiated in ->bus_init(),
1746 * complain if this was not the case.
1747 */
1748 if (!master->this) {
1749 dev_err(&master->dev,
1750 "master_set_info() was not called in ->bus_init()\n");
1751 ret = -EINVAL;
1752 goto err_bus_cleanup;
1753 }
1754
1755 /*
1756 * Reset all dynamic address that may have been assigned before
1757 * (assigned by the bootloader for example).
1758 */
1759 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1760 if (ret && ret != I3C_ERROR_M2)
1761 goto err_bus_cleanup;
1762
1763 /* Disable all slave events before starting DAA. */
1764 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1765 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1766 I3C_CCC_EVENT_HJ);
1767 if (ret && ret != I3C_ERROR_M2)
1768 goto err_bus_cleanup;
1769
1770 /*
1771 * Pre-assign dynamic address and retrieve device information if
1772 * needed.
1773 */
1774 i3c_bus_for_each_i3cdev(&master->bus, i3cdev)
1775 i3c_master_pre_assign_dyn_addr(i3cdev);
1776
1777 ret = i3c_master_do_daa(master);
1778 if (ret)
1779 goto err_rstdaa;
1780
1781 return 0;
1782
1783err_rstdaa:
1784 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1785
1786err_bus_cleanup:
1787 if (master->ops->bus_cleanup)
1788 master->ops->bus_cleanup(master);
1789
1790err_detach_devs:
1791 i3c_master_detach_free_devs(master);
1792
1793 return ret;
1794}
1795
1796static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1797{
1798 if (master->ops->bus_cleanup)
1799 master->ops->bus_cleanup(master);
1800
1801 i3c_master_detach_free_devs(master);
1802}
1803
1804static struct i3c_dev_desc *
1805i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1806{
1807 struct i3c_master_controller *master = refdev->common.master;
1808 struct i3c_dev_desc *i3cdev;
1809
1810 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1811 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1812 return i3cdev;
1813 }
1814
1815 return NULL;
1816}
1817
1818/**
1819 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1820 * @master: master used to send frames on the bus
1821 * @addr: I3C slave dynamic address assigned to the device
1822 *
1823 * This function is instantiating an I3C device object and adding it to the
1824 * I3C device list. All device information are automatically retrieved using
1825 * standard CCC commands.
1826 *
1827 * The I3C device object is returned in case the master wants to attach
1828 * private data to it using i3c_dev_set_master_data().
1829 *
1830 * This function must be called with the bus lock held in write mode.
1831 *
1832 * Return: a 0 in case of success, an negative error code otherwise.
1833 */
1834int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1835 u8 addr)
1836{
1837 struct i3c_device_info info = { .dyn_addr = addr };
1838 struct i3c_dev_desc *newdev, *olddev;
1839 u8 old_dyn_addr = addr, expected_dyn_addr;
1840 struct i3c_ibi_setup ibireq = { };
1841 bool enable_ibi = false;
1842 int ret;
1843
1844 if (!master)
1845 return -EINVAL;
1846
1847 newdev = i3c_master_alloc_i3c_dev(master, &info);
1848 if (IS_ERR(newdev))
1849 return PTR_ERR(newdev);
1850
1851 ret = i3c_master_attach_i3c_dev(master, newdev);
840414ae 1852 if (ret)
3a379bbc 1853 goto err_free_dev;
3a379bbc
BB		 1854
1855 ret = i3c_master_retrieve_dev_info(newdev);
1856 if (ret)
093c61b6 1857 goto err_detach_dev;
3a379bbc
BB		 1858
1859 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1860 if (olddev) {
1861 newdev->boardinfo = olddev->boardinfo;
1862 newdev->info.static_addr = olddev->info.static_addr;
1863 newdev->dev = olddev->dev;
1864 if (newdev->dev)
1865 newdev->dev->desc = newdev;
1866
1867 /*
1868 * We need to restore the IBI state too, so let's save the
1869 * IBI information and try to restore them after olddev has
1870 * been detached+released and its IBI has been stopped and
1871 * the associated resources have been freed.
1872 */
1873 mutex_lock(&olddev->ibi_lock);
1874 if (olddev->ibi) {
1875 ibireq.handler = olddev->ibi->handler;
1876 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1877 ibireq.num_slots = olddev->ibi->num_slots;
1878
1879 if (olddev->ibi->enabled) {
1880 enable_ibi = true;
1881 i3c_dev_disable_ibi_locked(olddev);
1882 }
1883
1884 i3c_dev_free_ibi_locked(olddev);
1885 }
1886 mutex_unlock(&olddev->ibi_lock);
1887
1888 old_dyn_addr = olddev->info.dyn_addr;
1889
1890 i3c_master_detach_i3c_dev(olddev);
1891 i3c_master_free_i3c_dev(olddev);
1892 }
1893
1894 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1895 if (ret)
1896 goto err_detach_dev;
1897
1898 /*
1899 * Depending on our previous state, the expected dynamic address might
1900 * differ:
1901 * - if the device already had a dynamic address assigned, let's try to
1902 * re-apply this one
1903 * - if the device did not have a dynamic address and the firmware
1904 * requested a specific address, pick this one
1905 * - in any other case, keep the address automatically assigned by the
1906 * master
1907 */
1908 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1909 expected_dyn_addr = old_dyn_addr;
1910 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1911 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1912 else
1913 expected_dyn_addr = newdev->info.dyn_addr;
1914
1915 if (newdev->info.dyn_addr != expected_dyn_addr) {
1916 /*
1917 * Try to apply the expected dynamic address. If it fails, keep
1918 * the address assigned by the master.
1919 */
1920 ret = i3c_master_setnewda_locked(master,
1921 newdev->info.dyn_addr,
1922 expected_dyn_addr);
1923 if (!ret) {
1924 old_dyn_addr = newdev->info.dyn_addr;
1925 newdev->info.dyn_addr = expected_dyn_addr;
1926 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1927 } else {
1928 dev_err(&master->dev,
1929 "Failed to assign reserved/old address to device %d%llx",
1930 master->bus.id, newdev->info.pid);
1931 }
1932 }
1933
1934 /*
1935 * Now is time to try to restore the IBI setup. If we're lucky,
1936 * everything works as before, otherwise, all we can do is complain.
1937 * FIXME: maybe we should add callback to inform the driver that it
1938 * should request the IBI again instead of trying to hide that from
1939 * him.
1940 */
1941 if (ibireq.handler) {
1942 mutex_lock(&newdev->ibi_lock);
1943 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1944 if (ret) {
1945 dev_err(&master->dev,
1946 "Failed to request IBI on device %d-%llx",
1947 master->bus.id, newdev->info.pid);
1948 } else if (enable_ibi) {
1949 ret = i3c_dev_enable_ibi_locked(newdev);
1950 if (ret)
1951 dev_err(&master->dev,
1952 "Failed to re-enable IBI on device %d-%llx",
1953 master->bus.id, newdev->info.pid);
1954 }
1955 mutex_unlock(&newdev->ibi_lock);
1956 }
1957
1958 return 0;
1959
1960err_detach_dev:
1961 if (newdev->dev && newdev->dev->desc)
1962 newdev->dev->desc = NULL;
1963
1964 i3c_master_detach_i3c_dev(newdev);
1965
1966err_free_dev:
1967 i3c_master_free_i3c_dev(newdev);
1968
1969 return ret;
1970}
1971EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1972
1973#define OF_I3C_REG1_IS_I2C_DEV BIT(31)
1974
1975static int
1976of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1977 struct device_node *node, u32 *reg)
1978{
1979 struct i2c_dev_boardinfo *boardinfo;
1980 struct device *dev = &master->dev;
1981 int ret;
1982
1983 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
1984 if (!boardinfo)
1985 return -ENOMEM;
1986
1987 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
1988 if (ret)
1989 return ret;
1990
88c50322
PG		 1991 /*
1992 * The I3C Specification does not clearly say I2C devices with 10-bit
1993 * address are supported. These devices can't be passed properly through
1994 * DEFSLVS command.
1995 */
1996 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
1997 dev_err(&master->dev, "I2C device with 10 bit address not supported.");
1998 return -ENOTSUPP;
1999 }
2000
3a379bbc
BB		 2001 /* LVR is encoded in reg[2]. */
2002 boardinfo->lvr = reg[2];
2003
3a379bbc
BB		 2004 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2005 of_node_get(node);
2006
2007 return 0;
2008}
2009
2010static int
2011of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2012 struct device_node *node, u32 *reg)
2013{
2014 struct i3c_dev_boardinfo *boardinfo;
2015 struct device *dev = &master->dev;
3a379bbc
BB		 2016 enum i3c_addr_slot_status addrstatus;
2017 u32 init_dyn_addr = 0;
2018
2019 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2020 if (!boardinfo)
2021 return -ENOMEM;
2022
2023 if (reg[0]) {
2024 if (reg[0] > I3C_MAX_ADDR)
2025 return -EINVAL;
2026
2027 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2028 reg[0]);
2029 if (addrstatus != I3C_ADDR_SLOT_FREE)
2030 return -EINVAL;
2031 }
2032
2033 boardinfo->static_addr = reg[0];
2034
2035 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2036 if (init_dyn_addr > I3C_MAX_ADDR)
2037 return -EINVAL;
2038
2039 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2040 init_dyn_addr);
2041 if (addrstatus != I3C_ADDR_SLOT_FREE)
2042 return -EINVAL;
2043 }
2044
2045 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2046
9752c37c
VS		 2047 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2048 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
3a379bbc
BB		 2049 return -EINVAL;
2050
2051 boardinfo->init_dyn_addr = init_dyn_addr;
2052 boardinfo->of_node = of_node_get(node);
2053 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2054
2055 return 0;
2056}
2057
2058static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2059 struct device_node *node)
2060{
2061 u32 reg[3];
2062 int ret;
2063
2064 if (!master || !node)
2065 return -EINVAL;
2066
2067 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2068 if (ret)
2069 return ret;
2070
2071 /*
2072 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2073 * dealing with an I2C device.
2074 */
2075 if (!reg[1])
2076 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2077 else
2078 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2079
2080 return ret;
2081}
2082
2083static int of_populate_i3c_bus(struct i3c_master_controller *master)
2084{
2085 struct device *dev = &master->dev;
2086 struct device_node *i3cbus_np = dev->of_node;
2087 struct device_node *node;
2088 int ret;
2089 u32 val;
2090
2091 if (!i3cbus_np)
2092 return 0;
2093
2094 for_each_available_child_of_node(i3cbus_np, node) {
2095 ret = of_i3c_master_add_dev(master, node);
2096 if (ret)
2097 return ret;
2098 }
2099
2100 /*
2101 * The user might want to limit I2C and I3C speed in case some devices
2102 * on the bus are not supporting typical rates, or if the bus topology
2103 * prevents it from using max possible rate.
2104 */
2105 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2106 master->bus.scl_rate.i2c = val;
2107
2108 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2109 master->bus.scl_rate.i3c = val;
2110
2111 return 0;
2112}
2113
2114static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2115 struct i2c_msg *xfers, int nxfers)
2116{
2117 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2118 struct i2c_dev_desc *dev;
2119 int i, ret;
2120 u16 addr;
2121
2122 if (!xfers || !master || nxfers <= 0)
2123 return -EINVAL;
2124
2125 if (!master->ops->i2c_xfers)
2126 return -ENOTSUPP;
2127
2128 /* Doing transfers to different devices is not supported. */
2129 addr = xfers[0].addr;
2130 for (i = 1; i < nxfers; i++) {
2131 if (addr != xfers[i].addr)
2132 return -ENOTSUPP;
2133 }
2134
2135 i3c_bus_normaluse_lock(&master->bus);
2136 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2137 if (!dev)
2138 ret = -ENOENT;
2139 else
2140 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2141 i3c_bus_normaluse_unlock(&master->bus);
2142
2143 return ret ? ret : nxfers;
2144}
2145
88c50322 2146static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
3a379bbc 2147{
88c50322 2148 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
3a379bbc
BB		 2149}
2150
2151static const struct i2c_algorithm i3c_master_i2c_algo = {
2152 .master_xfer = i3c_master_i2c_adapter_xfer,
88c50322 2153 .functionality = i3c_master_i2c_funcs,
3a379bbc
BB		 2154};
2155
2156static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2157{
2158 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2159 struct i2c_dev_desc *i2cdev;
2160 int ret;
2161
2162 adap->dev.parent = master->dev.parent;
2163 adap->owner = master->dev.parent->driver->owner;
2164 adap->algo = &i3c_master_i2c_algo;
2165 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2166
2167 /* FIXME: Should we allow i3c masters to override these values? */
2168 adap->timeout = 1000;
2169 adap->retries = 3;
2170
2171 ret = i2c_add_adapter(adap);
2172 if (ret)
2173 return ret;
2174
2175 /*
2176 * We silently ignore failures here. The bus should keep working
2177 * correctly even if one or more i2c devices are not registered.
2178 */
2179 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2180 i2cdev->dev = i2c_new_device(adap, &i2cdev->boardinfo->base);
2181
2182 return 0;
2183}
2184
2185static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2186{
2187 struct i2c_dev_desc *i2cdev;
2188
2189 i2c_del_adapter(&master->i2c);
2190
2191 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2192 i2cdev->dev = NULL;
2193}
2194
2195static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2196{
2197 struct i3c_dev_desc *i3cdev;
2198
2199 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2200 if (!i3cdev->dev)
2201 continue;
2202
2203 i3cdev->dev->desc = NULL;
2204 if (device_is_registered(&i3cdev->dev->dev))
2205 device_unregister(&i3cdev->dev->dev);
2206 else
2207 put_device(&i3cdev->dev->dev);
2208 i3cdev->dev = NULL;
2209 }
2210}
2211
2212/**
2213 * i3c_master_queue_ibi() - Queue an IBI
2214 * @dev: the device this IBI is coming from
2215 * @slot: the IBI slot used to store the payload
2216 *
2217 * Queue an IBI to the controller workqueue. The IBI handler attached to
2218 * the dev will be called from a workqueue context.
2219 */
2220void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2221{
2222 atomic_inc(&dev->ibi->pending_ibis);
2223 queue_work(dev->common.master->wq, &slot->work);
2224}
2225EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2226
2227static void i3c_master_handle_ibi(struct work_struct *work)
2228{
2229 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2230 work);
2231 struct i3c_dev_desc *dev = slot->dev;
2232 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2233 struct i3c_ibi_payload payload;
2234
2235 payload.data = slot->data;
2236 payload.len = slot->len;
2237
2238 if (dev->dev)
2239 dev->ibi->handler(dev->dev, &payload);
2240
2241 master->ops->recycle_ibi_slot(dev, slot);
2242 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2243 complete(&dev->ibi->all_ibis_handled);
2244}
2245
2246static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2247 struct i3c_ibi_slot *slot)
2248{
2249 slot->dev = dev;
2250 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2251}
2252
2253struct i3c_generic_ibi_slot {
2254 struct list_head node;
2255 struct i3c_ibi_slot base;
2256};
2257
2258struct i3c_generic_ibi_pool {
2259 spinlock_t lock;
2260 unsigned int num_slots;
2261 struct i3c_generic_ibi_slot *slots;
2262 void *payload_buf;
2263 struct list_head free_slots;
2264 struct list_head pending;
2265};
2266
2267/**
2268 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2269 * @pool: the IBI pool to free
2270 *
2271 * Free all IBI slots allated by a generic IBI pool.
2272 */
2273void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2274{
2275 struct i3c_generic_ibi_slot *slot;
2276 unsigned int nslots = 0;
2277
2278 while (!list_empty(&pool->free_slots)) {
2279 slot = list_first_entry(&pool->free_slots,
2280 struct i3c_generic_ibi_slot, node);
2281 list_del(&slot->node);
2282 nslots++;
2283 }
2284
2285 /*
2286 * If the number of freed slots is not equal to the number of allocated
2287 * slots we have a leak somewhere.
2288 */
2289 WARN_ON(nslots != pool->num_slots);
2290
2291 kfree(pool->payload_buf);
2292 kfree(pool->slots);
2293 kfree(pool);
2294}
2295EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2296
2297/**
2298 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2299 * @dev: the device this pool will be used for
2300 * @req: IBI setup request describing what the device driver expects
2301 *
2302 * Create a generic IBI pool based on the information provided in @req.
2303 *
2304 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2305 */
2306struct i3c_generic_ibi_pool *
2307i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2308 const struct i3c_ibi_setup *req)
2309{
2310 struct i3c_generic_ibi_pool *pool;
2311 struct i3c_generic_ibi_slot *slot;
2312 unsigned int i;
2313 int ret;
2314
2315 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2316 if (!pool)
2317 return ERR_PTR(-ENOMEM);
2318
2319 spin_lock_init(&pool->lock);
2320 INIT_LIST_HEAD(&pool->free_slots);
2321 INIT_LIST_HEAD(&pool->pending);
2322
2323 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2324 if (!pool->slots) {
2325 ret = -ENOMEM;
2326 goto err_free_pool;
2327 }
2328
2329 if (req->max_payload_len) {
2330 pool->payload_buf = kcalloc(req->num_slots,
2331 req->max_payload_len, GFP_KERNEL);
2332 if (!pool->payload_buf) {
2333 ret = -ENOMEM;
2334 goto err_free_pool;
2335 }
2336 }
2337
2338 for (i = 0; i < req->num_slots; i++) {
2339 slot = &pool->slots[i];
2340 i3c_master_init_ibi_slot(dev, &slot->base);
2341
2342 if (req->max_payload_len)
2343 slot->base.data = pool->payload_buf +
2344 (i * req->max_payload_len);
2345
2346 list_add_tail(&slot->node, &pool->free_slots);
2347 pool->num_slots++;
2348 }
2349
2350 return pool;
2351
2352err_free_pool:
2353 i3c_generic_ibi_free_pool(pool);
2354 return ERR_PTR(ret);
2355}
2356EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2357
2358/**
2359 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2360 * @pool: the pool to query an IBI slot on
2361 *
2362 * Search for a free slot in a generic IBI pool.
2363 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2364 * when it's no longer needed.
2365 *
2366 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2367 */
2368struct i3c_ibi_slot *
2369i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2370{
2371 struct i3c_generic_ibi_slot *slot;
2372 unsigned long flags;
2373
2374 spin_lock_irqsave(&pool->lock, flags);
2375 slot = list_first_entry_or_null(&pool->free_slots,
2376 struct i3c_generic_ibi_slot, node);
2377 if (slot)
2378 list_del(&slot->node);
2379 spin_unlock_irqrestore(&pool->lock, flags);
2380
2381 return slot ? &slot->base : NULL;
2382}
2383EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2384
2385/**
2386 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2387 * @pool: the pool to return the IBI slot to
2388 * @s: IBI slot to recycle
2389 *
2390 * Add an IBI slot back to its generic IBI pool. Should be called from the
2391 * master driver struct_master_controller_ops->recycle_ibi() method.
2392 */
2393void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2394 struct i3c_ibi_slot *s)
2395{
2396 struct i3c_generic_ibi_slot *slot;
2397 unsigned long flags;
2398
2399 if (!s)
2400 return;
2401
2402 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2403 spin_lock_irqsave(&pool->lock, flags);
2404 list_add_tail(&slot->node, &pool->free_slots);
2405 spin_unlock_irqrestore(&pool->lock, flags);
2406}
2407EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2408
2409static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2410{
2411 if (!ops || !ops->bus_init || !ops->priv_xfers ||
88c50322 2412 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
3a379bbc
BB		 2413 return -EINVAL;
2414
2415 if (ops->request_ibi &&
2416 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2417 !ops->recycle_ibi_slot))
2418 return -EINVAL;
2419
2420 return 0;
2421}
2422
2423/**
2424 * i3c_master_register() - register an I3C master
2425 * @master: master used to send frames on the bus
2426 * @parent: the parent device (the one that provides this I3C master
2427 * controller)
2428 * @ops: the master controller operations
2429 * @secondary: true if you are registering a secondary master. Will return
2430 * -ENOTSUPP if set to true since secondary masters are not yet
2431 * supported
2432 *
2433 * This function takes care of everything for you:
2434 *
2435 * - creates and initializes the I3C bus
2436 * - populates the bus with static I2C devs if @parent->of_node is not
2437 * NULL
2438 * - registers all I3C devices added by the controller during bus
2439 * initialization
2440 * - registers the I2C adapter and all I2C devices
2441 *
2442 * Return: 0 in case of success, a negative error code otherwise.
2443 */
2444int i3c_master_register(struct i3c_master_controller *master,
2445 struct device *parent,
2446 const struct i3c_master_controller_ops *ops,
2447 bool secondary)
2448{
ecc8fb54 2449 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
3a379bbc
BB		 2450 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2451 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2452 struct i2c_dev_boardinfo *i2cbi;
2453 int ret;
2454
2455 /* We do not support secondary masters yet. */
2456 if (secondary)
2457 return -ENOTSUPP;
2458
2459 ret = i3c_master_check_ops(ops);
2460 if (ret)
2461 return ret;
2462
2463 master->dev.parent = parent;
2464 master->dev.of_node = of_node_get(parent->of_node);
2465 master->dev.bus = &i3c_bus_type;
2466 master->dev.type = &i3c_masterdev_type;
2467 master->dev.release = i3c_masterdev_release;
2468 master->ops = ops;
2469 master->secondary = secondary;
2470 INIT_LIST_HEAD(&master->boardinfo.i2c);
2471 INIT_LIST_HEAD(&master->boardinfo.i3c);
2472
2473 ret = i3c_bus_init(i3cbus);
2474 if (ret)
2475 return ret;
2476
2477 device_initialize(&master->dev);
2478 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2479
2480 ret = of_populate_i3c_bus(master);
2481 if (ret)
2482 goto err_put_dev;
2483
2484 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2485 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2486 case I3C_LVR_I2C_INDEX(0):
2487 if (mode < I3C_BUS_MODE_MIXED_FAST)
2488 mode = I3C_BUS_MODE_MIXED_FAST;
2489 break;
2490 case I3C_LVR_I2C_INDEX(1):
cbf4f732
VS		 2491 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2492 mode = I3C_BUS_MODE_MIXED_LIMITED;
2493 break;
3a379bbc
BB		 2494 case I3C_LVR_I2C_INDEX(2):
2495 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2496 mode = I3C_BUS_MODE_MIXED_SLOW;
2497 break;
2498 default:
2499 ret = -EINVAL;
2500 goto err_put_dev;
2501 }
ecc8fb54
VS		 2502
2503 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2504 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
3a379bbc
BB		 2505 }
2506
ecc8fb54 2507 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
3a379bbc
BB		 2508 if (ret)
2509 goto err_put_dev;
2510
2511 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2512 if (!master->wq) {
2513 ret = -ENOMEM;
2514 goto err_put_dev;
2515 }
2516
2517 ret = i3c_master_bus_init(master);
2518 if (ret)
2519 goto err_put_dev;
2520
2521 ret = device_add(&master->dev);
2522 if (ret)
2523 goto err_cleanup_bus;
2524
2525 /*
2526 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2527 * through the I2C subsystem.
2528 */
2529 ret = i3c_master_i2c_adapter_init(master);
2530 if (ret)
2531 goto err_del_dev;
2532
2533 /*
2534 * We're done initializing the bus and the controller, we can now
2535 * register I3C devices dicovered during the initial DAA.
2536 */
2537 master->init_done = true;
2538 i3c_bus_normaluse_lock(&master->bus);
2539 i3c_master_register_new_i3c_devs(master);
2540 i3c_bus_normaluse_unlock(&master->bus);
2541
2542 return 0;
2543
2544err_del_dev:
2545 device_del(&master->dev);
2546
2547err_cleanup_bus:
2548 i3c_master_bus_cleanup(master);
2549
2550err_put_dev:
2551 put_device(&master->dev);
2552
2553 return ret;
2554}
2555EXPORT_SYMBOL_GPL(i3c_master_register);
2556
2557/**
2558 * i3c_master_unregister() - unregister an I3C master
2559 * @master: master used to send frames on the bus
2560 *
2561 * Basically undo everything done in i3c_master_register().
2562 *
2563 * Return: 0 in case of success, a negative error code otherwise.
2564 */
2565int i3c_master_unregister(struct i3c_master_controller *master)
2566{
2567 i3c_master_i2c_adapter_cleanup(master);
2568 i3c_master_unregister_i3c_devs(master);
2569 i3c_master_bus_cleanup(master);
2570 device_unregister(&master->dev);
2571
2572 return 0;
2573}
2574EXPORT_SYMBOL_GPL(i3c_master_unregister);
2575
2576int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2577 struct i3c_priv_xfer *xfers,
2578 int nxfers)
2579{
2580 struct i3c_master_controller *master;
2581
2582 if (!dev)
2583 return -ENOENT;
2584
2585 master = i3c_dev_get_master(dev);
2586 if (!master || !xfers)
2587 return -EINVAL;
2588
2589 if (!master->ops->priv_xfers)
2590 return -ENOTSUPP;
2591
2592 return master->ops->priv_xfers(dev, xfers, nxfers);
2593}
2594
2595int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2596{
2597 struct i3c_master_controller *master;
2598 int ret;
2599
2600 if (!dev->ibi)
2601 return -EINVAL;
2602
2603 master = i3c_dev_get_master(dev);
2604 ret = master->ops->disable_ibi(dev);
2605 if (ret)
2606 return ret;
2607
2608 reinit_completion(&dev->ibi->all_ibis_handled);
2609 if (atomic_read(&dev->ibi->pending_ibis))
2610 wait_for_completion(&dev->ibi->all_ibis_handled);
2611
2612 dev->ibi->enabled = false;
2613
2614 return 0;
2615}
2616
2617int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2618{
2619 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2620 int ret;
2621
2622 if (!dev->ibi)
2623 return -EINVAL;
2624
2625 ret = master->ops->enable_ibi(dev);
2626 if (!ret)
2627 dev->ibi->enabled = true;
2628
2629 return ret;
2630}
2631
2632int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2633 const struct i3c_ibi_setup *req)
2634{
2635 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2636 struct i3c_device_ibi_info *ibi;
2637 int ret;
2638
2639 if (!master->ops->request_ibi)
2640 return -ENOTSUPP;
2641
2642 if (dev->ibi)
2643 return -EBUSY;
2644
2645 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2646 if (!ibi)
2647 return -ENOMEM;
2648
2649 atomic_set(&ibi->pending_ibis, 0);
2650 init_completion(&ibi->all_ibis_handled);
2651 ibi->handler = req->handler;
2652 ibi->max_payload_len = req->max_payload_len;
2653 ibi->num_slots = req->num_slots;
2654
2655 dev->ibi = ibi;
2656 ret = master->ops->request_ibi(dev, req);
2657 if (ret) {
2658 kfree(ibi);
2659 dev->ibi = NULL;
2660 }
2661
2662 return ret;
2663}
2664
2665void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2666{
2667 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2668
2669 if (!dev->ibi)
2670 return;
2671
2672 if (WARN_ON(dev->ibi->enabled))
2673 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2674
2675 master->ops->free_ibi(dev);
2676 kfree(dev->ibi);
2677 dev->ibi = NULL;
2678}
2679
2680static int __init i3c_init(void)
2681{
2682 return bus_register(&i3c_bus_type);
2683}
2684subsys_initcall(i3c_init);
2685
2686static void __exit i3c_exit(void)
2687{
2688 idr_destroy(&i3c_bus_idr);
2689 bus_unregister(&i3c_bus_type);
2690}
2691module_exit(i3c_exit);
2692
2693MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2694MODULE_DESCRIPTION("I3C core");
2695MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)