Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
[linux-2.6-block.git] / drivers / i3c / master.c
CommitLineData
3a379bbc
BB
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8#include <linux/atomic.h>
9#include <linux/bug.h>
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/export.h>
13#include <linux/kernel.h>
14#include <linux/list.h>
15#include <linux/of.h>
16#include <linux/slab.h>
17#include <linux/spinlock.h>
18#include <linux/workqueue.h>
19
20#include "internals.h"
21
22static DEFINE_IDR(i3c_bus_idr);
23static DEFINE_MUTEX(i3c_core_lock);
24
25/**
26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27 * @bus: I3C bus to take the lock on
28 *
29 * This function takes the bus lock so that no other operations can occur on
30 * the bus. This is needed for all kind of bus maintenance operation, like
31 * - enabling/disabling slave events
32 * - re-triggering DAA
33 * - changing the dynamic address of a device
34 * - relinquishing mastership
35 * - ...
36 *
37 * The reason for this kind of locking is that we don't want drivers and core
38 * logic to rely on I3C device information that could be changed behind their
39 * back.
40 */
41static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
42{
43 down_write(&bus->lock);
44}
45
46/**
47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
48 * operation
49 * @bus: I3C bus to release the lock on
50 *
51 * Should be called when the bus maintenance operation is done. See
52 * i3c_bus_maintenance_lock() for more details on what these maintenance
53 * operations are.
54 */
55static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
56{
57 up_write(&bus->lock);
58}
59
60/**
61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62 * @bus: I3C bus to take the lock on
63 *
64 * This function takes the bus lock for any operation that is not a maintenance
65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66 * maintenance operations). Basically all communications with I3C devices are
67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68 * state or I3C dynamic address).
69 *
70 * Note that this lock is not guaranteeing serialization of normal operations.
71 * In other words, transfer requests passed to the I3C master can be submitted
72 * in parallel and I3C master drivers have to use their own locking to make
73 * sure two different communications are not inter-mixed, or access to the
74 * output/input queue is not done while the engine is busy.
75 */
76void i3c_bus_normaluse_lock(struct i3c_bus *bus)
77{
78 down_read(&bus->lock);
79}
80
81/**
82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83 * @bus: I3C bus to release the lock on
84 *
85 * Should be called when a normal operation is done. See
86 * i3c_bus_normaluse_lock() for more details on what these normal operations
87 * are.
88 */
89void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
90{
91 up_read(&bus->lock);
92}
93
ecc8fb54
VS
94static struct i3c_master_controller *
95i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
96{
97 return container_of(i3cbus, struct i3c_master_controller, bus);
98}
99
3a379bbc
BB
100static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
101{
102 return container_of(dev, struct i3c_master_controller, dev);
103}
104
105static const struct device_type i3c_device_type;
106
107static struct i3c_bus *dev_to_i3cbus(struct device *dev)
108{
109 struct i3c_master_controller *master;
110
111 if (dev->type == &i3c_device_type)
112 return dev_to_i3cdev(dev)->bus;
113
114 master = dev_to_i3cmaster(dev);
115
116 return &master->bus;
117}
118
119static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
120{
121 struct i3c_master_controller *master;
122
123 if (dev->type == &i3c_device_type)
124 return dev_to_i3cdev(dev)->desc;
125
6030f42d 126 master = dev_to_i3cmaster(dev);
3a379bbc
BB
127
128 return master->this;
129}
130
131static ssize_t bcr_show(struct device *dev,
132 struct device_attribute *da,
133 char *buf)
134{
135 struct i3c_bus *bus = dev_to_i3cbus(dev);
136 struct i3c_dev_desc *desc;
137 ssize_t ret;
138
139 i3c_bus_normaluse_lock(bus);
140 desc = dev_to_i3cdesc(dev);
141 ret = sprintf(buf, "%x\n", desc->info.bcr);
142 i3c_bus_normaluse_unlock(bus);
143
144 return ret;
145}
146static DEVICE_ATTR_RO(bcr);
147
148static ssize_t dcr_show(struct device *dev,
149 struct device_attribute *da,
150 char *buf)
151{
152 struct i3c_bus *bus = dev_to_i3cbus(dev);
153 struct i3c_dev_desc *desc;
154 ssize_t ret;
155
156 i3c_bus_normaluse_lock(bus);
157 desc = dev_to_i3cdesc(dev);
158 ret = sprintf(buf, "%x\n", desc->info.dcr);
159 i3c_bus_normaluse_unlock(bus);
160
161 return ret;
162}
163static DEVICE_ATTR_RO(dcr);
164
165static ssize_t pid_show(struct device *dev,
166 struct device_attribute *da,
167 char *buf)
168{
169 struct i3c_bus *bus = dev_to_i3cbus(dev);
170 struct i3c_dev_desc *desc;
171 ssize_t ret;
172
173 i3c_bus_normaluse_lock(bus);
174 desc = dev_to_i3cdesc(dev);
175 ret = sprintf(buf, "%llx\n", desc->info.pid);
176 i3c_bus_normaluse_unlock(bus);
177
178 return ret;
179}
180static DEVICE_ATTR_RO(pid);
181
182static ssize_t dynamic_address_show(struct device *dev,
183 struct device_attribute *da,
184 char *buf)
185{
186 struct i3c_bus *bus = dev_to_i3cbus(dev);
187 struct i3c_dev_desc *desc;
188 ssize_t ret;
189
190 i3c_bus_normaluse_lock(bus);
191 desc = dev_to_i3cdesc(dev);
192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 i3c_bus_normaluse_unlock(bus);
194
195 return ret;
196}
197static DEVICE_ATTR_RO(dynamic_address);
198
199static const char * const hdrcap_strings[] = {
200 "hdr-ddr", "hdr-tsp", "hdr-tsl",
201};
202
203static ssize_t hdrcap_show(struct device *dev,
204 struct device_attribute *da,
205 char *buf)
206{
207 struct i3c_bus *bus = dev_to_i3cbus(dev);
208 struct i3c_dev_desc *desc;
209 ssize_t offset = 0, ret;
210 unsigned long caps;
211 int mode;
212
213 i3c_bus_normaluse_lock(bus);
214 desc = dev_to_i3cdesc(dev);
215 caps = desc->info.hdr_cap;
216 for_each_set_bit(mode, &caps, 8) {
217 if (mode >= ARRAY_SIZE(hdrcap_strings))
218 break;
219
220 if (!hdrcap_strings[mode])
221 continue;
222
223 ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 hdrcap_strings[mode]);
225 if (ret < 0)
226 goto out;
227
228 offset += ret;
229 }
230
231 ret = sprintf(buf + offset, "\n");
232 if (ret < 0)
233 goto out;
234
235 ret = offset + ret;
236
237out:
238 i3c_bus_normaluse_unlock(bus);
239
240 return ret;
241}
242static DEVICE_ATTR_RO(hdrcap);
243
7ec0ddb0
BB
244static ssize_t modalias_show(struct device *dev,
245 struct device_attribute *da, char *buf)
246{
247 struct i3c_device *i3c = dev_to_i3cdev(dev);
248 struct i3c_device_info devinfo;
249 u16 manuf, part, ext;
250
251 i3c_device_get_info(i3c, &devinfo);
252 manuf = I3C_PID_MANUF_ID(devinfo.pid);
253 part = I3C_PID_PART_ID(devinfo.pid);
254 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
255
256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
258 manuf);
259
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
261 devinfo.dcr, manuf, part, ext);
262}
263static DEVICE_ATTR_RO(modalias);
264
3a379bbc
BB
265static struct attribute *i3c_device_attrs[] = {
266 &dev_attr_bcr.attr,
267 &dev_attr_dcr.attr,
268 &dev_attr_pid.attr,
269 &dev_attr_dynamic_address.attr,
270 &dev_attr_hdrcap.attr,
7ec0ddb0 271 &dev_attr_modalias.attr,
3a379bbc
BB
272 NULL,
273};
274ATTRIBUTE_GROUPS(i3c_device);
275
276static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
277{
278 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
279 struct i3c_device_info devinfo;
280 u16 manuf, part, ext;
281
282 i3c_device_get_info(i3cdev, &devinfo);
283 manuf = I3C_PID_MANUF_ID(devinfo.pid);
284 part = I3C_PID_PART_ID(devinfo.pid);
285 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
286
287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
289 devinfo.dcr, manuf);
290
291 return add_uevent_var(env,
12e21a23 292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
3a379bbc
BB
293 devinfo.dcr, manuf, part, ext);
294}
295
296static const struct device_type i3c_device_type = {
297 .groups = i3c_device_groups,
298 .uevent = i3c_device_uevent,
299};
300
3a379bbc
BB
301static int i3c_device_match(struct device *dev, struct device_driver *drv)
302{
303 struct i3c_device *i3cdev;
304 struct i3c_driver *i3cdrv;
305
306 if (dev->type != &i3c_device_type)
307 return 0;
308
309 i3cdev = dev_to_i3cdev(dev);
310 i3cdrv = drv_to_i3cdrv(drv);
311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
312 return 1;
313
314 return 0;
315}
316
317static int i3c_device_probe(struct device *dev)
318{
319 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
321
322 return driver->probe(i3cdev);
323}
324
fc7a6209 325static void i3c_device_remove(struct device *dev)
3a379bbc
BB
326{
327 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
3a379bbc 329
dd926703
UKK
330 if (driver->remove)
331 driver->remove(i3cdev);
3a379bbc
BB
332
333 i3c_device_free_ibi(i3cdev);
3a379bbc
BB
334}
335
336struct bus_type i3c_bus_type = {
337 .name = "i3c",
338 .match = i3c_device_match,
339 .probe = i3c_device_probe,
340 .remove = i3c_device_remove,
341};
342
343static enum i3c_addr_slot_status
344i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
345{
f18f9811
JI
346 unsigned long status;
347 int bitpos = addr * 2;
3a379bbc
BB
348
349 if (addr > I2C_MAX_ADDR)
350 return I3C_ADDR_SLOT_RSVD;
351
352 status = bus->addrslots[bitpos / BITS_PER_LONG];
353 status >>= bitpos % BITS_PER_LONG;
354
355 return status & I3C_ADDR_SLOT_STATUS_MASK;
356}
357
358static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
359 enum i3c_addr_slot_status status)
360{
361 int bitpos = addr * 2;
362 unsigned long *ptr;
363
364 if (addr > I2C_MAX_ADDR)
365 return;
366
367 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
476c7e1d
DC
368 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
369 (bitpos % BITS_PER_LONG));
370 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
3a379bbc
BB
371}
372
373static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
374{
375 enum i3c_addr_slot_status status;
376
377 status = i3c_bus_get_addr_slot_status(bus, addr);
378
379 return status == I3C_ADDR_SLOT_FREE;
380}
381
382static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
383{
384 enum i3c_addr_slot_status status;
385 u8 addr;
386
387 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
388 status = i3c_bus_get_addr_slot_status(bus, addr);
389 if (status == I3C_ADDR_SLOT_FREE)
390 return addr;
391 }
392
393 return -ENOMEM;
394}
395
396static void i3c_bus_init_addrslots(struct i3c_bus *bus)
397{
398 int i;
399
400 /* Addresses 0 to 7 are reserved. */
401 for (i = 0; i < 8; i++)
402 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
403
404 /*
405 * Reserve broadcast address and all addresses that might collide
406 * with the broadcast address when facing a single bit error.
407 */
408 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
409 I3C_ADDR_SLOT_RSVD);
410 for (i = 0; i < 7; i++)
411 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
412 I3C_ADDR_SLOT_RSVD);
413}
414
415static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
416{
417 mutex_lock(&i3c_core_lock);
418 idr_remove(&i3c_bus_idr, i3cbus->id);
419 mutex_unlock(&i3c_core_lock);
420}
421
422static int i3c_bus_init(struct i3c_bus *i3cbus)
423{
424 int ret;
425
426 init_rwsem(&i3cbus->lock);
427 INIT_LIST_HEAD(&i3cbus->devs.i2c);
428 INIT_LIST_HEAD(&i3cbus->devs.i3c);
429 i3c_bus_init_addrslots(i3cbus);
430 i3cbus->mode = I3C_BUS_MODE_PURE;
431
432 mutex_lock(&i3c_core_lock);
433 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
434 mutex_unlock(&i3c_core_lock);
435
436 if (ret < 0)
437 return ret;
438
439 i3cbus->id = ret;
440
441 return 0;
442}
443
444static const char * const i3c_bus_mode_strings[] = {
445 [I3C_BUS_MODE_PURE] = "pure",
446 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
cbf4f732 447 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
3a379bbc
BB
448 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
449};
450
451static ssize_t mode_show(struct device *dev,
452 struct device_attribute *da,
453 char *buf)
454{
455 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
456 ssize_t ret;
457
458 i3c_bus_normaluse_lock(i3cbus);
459 if (i3cbus->mode < 0 ||
afe120c7 460 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
3a379bbc
BB
461 !i3c_bus_mode_strings[i3cbus->mode])
462 ret = sprintf(buf, "unknown\n");
463 else
464 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
465 i3c_bus_normaluse_unlock(i3cbus);
466
467 return ret;
468}
469static DEVICE_ATTR_RO(mode);
470
471static ssize_t current_master_show(struct device *dev,
472 struct device_attribute *da,
473 char *buf)
474{
475 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
476 ssize_t ret;
477
478 i3c_bus_normaluse_lock(i3cbus);
479 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
480 i3cbus->cur_master->info.pid);
481 i3c_bus_normaluse_unlock(i3cbus);
482
483 return ret;
484}
485static DEVICE_ATTR_RO(current_master);
486
487static ssize_t i3c_scl_frequency_show(struct device *dev,
488 struct device_attribute *da,
489 char *buf)
490{
491 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
492 ssize_t ret;
493
494 i3c_bus_normaluse_lock(i3cbus);
495 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
496 i3c_bus_normaluse_unlock(i3cbus);
497
498 return ret;
499}
500static DEVICE_ATTR_RO(i3c_scl_frequency);
501
502static ssize_t i2c_scl_frequency_show(struct device *dev,
503 struct device_attribute *da,
504 char *buf)
505{
506 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
507 ssize_t ret;
508
509 i3c_bus_normaluse_lock(i3cbus);
510 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
511 i3c_bus_normaluse_unlock(i3cbus);
512
513 return ret;
514}
515static DEVICE_ATTR_RO(i2c_scl_frequency);
516
517static struct attribute *i3c_masterdev_attrs[] = {
518 &dev_attr_mode.attr,
519 &dev_attr_current_master.attr,
520 &dev_attr_i3c_scl_frequency.attr,
521 &dev_attr_i2c_scl_frequency.attr,
522 &dev_attr_bcr.attr,
523 &dev_attr_dcr.attr,
524 &dev_attr_pid.attr,
525 &dev_attr_dynamic_address.attr,
526 &dev_attr_hdrcap.attr,
527 NULL,
528};
529ATTRIBUTE_GROUPS(i3c_masterdev);
530
531static void i3c_masterdev_release(struct device *dev)
532{
533 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
534 struct i3c_bus *bus = dev_to_i3cbus(dev);
535
536 if (master->wq)
537 destroy_workqueue(master->wq);
538
539 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
540 i3c_bus_cleanup(bus);
541
542 of_node_put(dev->of_node);
543}
544
545static const struct device_type i3c_masterdev_type = {
546 .groups = i3c_masterdev_groups,
547};
548
026d8450
BG
549static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
550 unsigned long max_i2c_scl_rate)
3a379bbc 551{
ecc8fb54 552 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
3a379bbc 553
ecc8fb54 554 i3cbus->mode = mode;
3a379bbc 555
ecc8fb54
VS
556 switch (i3cbus->mode) {
557 case I3C_BUS_MODE_PURE:
558 if (!i3cbus->scl_rate.i3c)
559 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
560 break;
561 case I3C_BUS_MODE_MIXED_FAST:
cbf4f732 562 case I3C_BUS_MODE_MIXED_LIMITED:
ecc8fb54
VS
563 if (!i3cbus->scl_rate.i3c)
564 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
565 if (!i3cbus->scl_rate.i2c)
566 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
567 break;
568 case I3C_BUS_MODE_MIXED_SLOW:
569 if (!i3cbus->scl_rate.i2c)
570 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
571 if (!i3cbus->scl_rate.i3c ||
572 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
573 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
574 break;
575 default:
576 return -EINVAL;
3a379bbc
BB
577 }
578
ecc8fb54
VS
579 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
580 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
581
3a379bbc
BB
582 /*
583 * I3C/I2C frequency may have been overridden, check that user-provided
584 * values are not exceeding max possible frequency.
585 */
586 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
587 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
588 return -EINVAL;
589
590 return 0;
591}
592
593static struct i3c_master_controller *
594i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
595{
596 return container_of(adap, struct i3c_master_controller, i2c);
597}
598
599static struct i2c_adapter *
600i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
601{
602 return &master->i2c;
603}
604
605static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
606{
607 kfree(dev);
608}
609
610static struct i2c_dev_desc *
611i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
31b9887c 612 u16 addr, u8 lvr)
3a379bbc
BB
613{
614 struct i2c_dev_desc *dev;
615
616 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
617 if (!dev)
618 return ERR_PTR(-ENOMEM);
619
620 dev->common.master = master;
31b9887c
JI
621 dev->addr = addr;
622 dev->lvr = lvr;
3a379bbc
BB
623
624 return dev;
625}
626
627static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
628 u16 payloadlen)
629{
630 dest->addr = addr;
631 dest->payload.len = payloadlen;
632 if (payloadlen)
633 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
634 else
635 dest->payload.data = NULL;
636
637 return dest->payload.data;
638}
639
640static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
641{
642 kfree(dest->payload.data);
643}
644
645static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
646 struct i3c_ccc_cmd_dest *dests,
647 unsigned int ndests)
648{
649 cmd->rnw = rnw ? 1 : 0;
650 cmd->id = id;
651 cmd->dests = dests;
652 cmd->ndests = ndests;
653 cmd->err = I3C_ERROR_UNKNOWN;
654}
655
656static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
657 struct i3c_ccc_cmd *cmd)
658{
659 int ret;
660
661 if (!cmd || !master)
662 return -EINVAL;
663
664 if (WARN_ON(master->init_done &&
665 !rwsem_is_locked(&master->bus.lock)))
666 return -EINVAL;
667
668 if (!master->ops->send_ccc_cmd)
669 return -ENOTSUPP;
670
671 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
672 return -EINVAL;
673
674 if (master->ops->supports_ccc_cmd &&
675 !master->ops->supports_ccc_cmd(master, cmd))
676 return -ENOTSUPP;
677
678 ret = master->ops->send_ccc_cmd(master, cmd);
679 if (ret) {
680 if (cmd->err != I3C_ERROR_UNKNOWN)
681 return cmd->err;
682
683 return ret;
684 }
685
686 return 0;
687}
688
689static struct i2c_dev_desc *
690i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
691 u16 addr)
692{
693 struct i2c_dev_desc *dev;
694
695 i3c_bus_for_each_i2cdev(&master->bus, dev) {
31b9887c 696 if (dev->addr == addr)
3a379bbc
BB
697 return dev;
698 }
699
700 return NULL;
701}
702
703/**
704 * i3c_master_get_free_addr() - get a free address on the bus
705 * @master: I3C master object
706 * @start_addr: where to start searching
707 *
708 * This function must be called with the bus lock held in write mode.
709 *
710 * Return: the first free address starting at @start_addr (included) or -ENOMEM
711 * if there's no more address available.
712 */
713int i3c_master_get_free_addr(struct i3c_master_controller *master,
714 u8 start_addr)
715{
716 return i3c_bus_get_free_addr(&master->bus, start_addr);
717}
718EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
719
720static void i3c_device_release(struct device *dev)
721{
722 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
723
724 WARN_ON(i3cdev->desc);
725
726 of_node_put(i3cdev->dev.of_node);
727 kfree(i3cdev);
728}
729
730static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
731{
732 kfree(dev);
733}
734
735static struct i3c_dev_desc *
736i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
737 const struct i3c_device_info *info)
738{
739 struct i3c_dev_desc *dev;
740
741 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
742 if (!dev)
743 return ERR_PTR(-ENOMEM);
744
745 dev->common.master = master;
746 dev->info = *info;
747 mutex_init(&dev->ibi_lock);
748
749 return dev;
750}
751
752static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
753 u8 addr)
754{
755 enum i3c_addr_slot_status addrstat;
756 struct i3c_ccc_cmd_dest dest;
757 struct i3c_ccc_cmd cmd;
758 int ret;
759
760 if (!master)
761 return -EINVAL;
762
763 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
764 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
765 return -EINVAL;
766
767 i3c_ccc_cmd_dest_init(&dest, addr, 0);
768 i3c_ccc_cmd_init(&cmd, false,
769 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
770 &dest, 1);
771 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
772 i3c_ccc_cmd_dest_cleanup(&dest);
773
774 return ret;
775}
776
777/**
778 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
779 * procedure
780 * @master: master used to send frames on the bus
781 *
782 * Send a ENTDAA CCC command to start a DAA procedure.
783 *
784 * Note that this function only sends the ENTDAA CCC command, all the logic
785 * behind dynamic address assignment has to be handled in the I3C master
786 * driver.
787 *
788 * This function must be called with the bus lock held in write mode.
789 *
790 * Return: 0 in case of success, a positive I3C error code if the error is
791 * one of the official Mx error codes, and a negative error code otherwise.
792 */
793int i3c_master_entdaa_locked(struct i3c_master_controller *master)
794{
795 struct i3c_ccc_cmd_dest dest;
796 struct i3c_ccc_cmd cmd;
797 int ret;
798
799 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
800 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
801 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
802 i3c_ccc_cmd_dest_cleanup(&dest);
803
804 return ret;
805}
806EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
807
808static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
809 u8 addr, bool enable, u8 evts)
810{
811 struct i3c_ccc_events *events;
812 struct i3c_ccc_cmd_dest dest;
813 struct i3c_ccc_cmd cmd;
814 int ret;
815
816 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
817 if (!events)
818 return -ENOMEM;
819
820 events->events = evts;
821 i3c_ccc_cmd_init(&cmd, false,
822 enable ?
823 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
824 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
825 &dest, 1);
826 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
827 i3c_ccc_cmd_dest_cleanup(&dest);
828
829 return ret;
830}
831
832/**
833 * i3c_master_disec_locked() - send a DISEC CCC command
834 * @master: master used to send frames on the bus
835 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
836 * @evts: events to disable
837 *
838 * Send a DISEC CCC command to disable some or all events coming from a
839 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
840 *
841 * This function must be called with the bus lock held in write mode.
842 *
843 * Return: 0 in case of success, a positive I3C error code if the error is
844 * one of the official Mx error codes, and a negative error code otherwise.
845 */
846int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
847 u8 evts)
848{
849 return i3c_master_enec_disec_locked(master, addr, false, evts);
850}
851EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
852
853/**
854 * i3c_master_enec_locked() - send an ENEC CCC command
855 * @master: master used to send frames on the bus
856 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
857 * @evts: events to disable
858 *
859 * Sends an ENEC CCC command to enable some or all events coming from a
860 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
861 *
862 * This function must be called with the bus lock held in write mode.
863 *
864 * Return: 0 in case of success, a positive I3C error code if the error is
865 * one of the official Mx error codes, and a negative error code otherwise.
866 */
867int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
868 u8 evts)
869{
870 return i3c_master_enec_disec_locked(master, addr, true, evts);
871}
872EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
873
874/**
875 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
876 * @master: master used to send frames on the bus
877 *
878 * Send a DEFSLVS CCC command containing all the devices known to the @master.
879 * This is useful when you have secondary masters on the bus to propagate
880 * device information.
881 *
882 * This should be called after all I3C devices have been discovered (in other
883 * words, after the DAA procedure has finished) and instantiated in
884 * &i3c_master_controller_ops->bus_init().
885 * It should also be called if a master ACKed an Hot-Join request and assigned
886 * a dynamic address to the device joining the bus.
887 *
888 * This function must be called with the bus lock held in write mode.
889 *
890 * Return: 0 in case of success, a positive I3C error code if the error is
891 * one of the official Mx error codes, and a negative error code otherwise.
892 */
893int i3c_master_defslvs_locked(struct i3c_master_controller *master)
894{
895 struct i3c_ccc_defslvs *defslvs;
896 struct i3c_ccc_dev_desc *desc;
897 struct i3c_ccc_cmd_dest dest;
898 struct i3c_dev_desc *i3cdev;
899 struct i2c_dev_desc *i2cdev;
900 struct i3c_ccc_cmd cmd;
901 struct i3c_bus *bus;
902 bool send = false;
903 int ndevs = 0, ret;
904
905 if (!master)
906 return -EINVAL;
907
908 bus = i3c_master_get_bus(master);
909 i3c_bus_for_each_i3cdev(bus, i3cdev) {
910 ndevs++;
911
912 if (i3cdev == master->this)
913 continue;
914
915 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
916 I3C_BCR_I3C_MASTER)
917 send = true;
918 }
919
920 /* No other master on the bus, skip DEFSLVS. */
921 if (!send)
922 return 0;
923
924 i3c_bus_for_each_i2cdev(bus, i2cdev)
925 ndevs++;
926
927 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
ede20015
GS
928 struct_size(defslvs, slaves,
929 ndevs - 1));
3a379bbc
BB
930 if (!defslvs)
931 return -ENOMEM;
932
933 defslvs->count = ndevs;
934 defslvs->master.bcr = master->this->info.bcr;
935 defslvs->master.dcr = master->this->info.dcr;
936 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
937 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
938
939 desc = defslvs->slaves;
940 i3c_bus_for_each_i2cdev(bus, i2cdev) {
b1ac3a4b
PG
941 desc->lvr = i2cdev->lvr;
942 desc->static_addr = i2cdev->addr << 1;
3a379bbc
BB
943 desc++;
944 }
945
946 i3c_bus_for_each_i3cdev(bus, i3cdev) {
947 /* Skip the I3C dev representing this master. */
948 if (i3cdev == master->this)
949 continue;
950
951 desc->bcr = i3cdev->info.bcr;
952 desc->dcr = i3cdev->info.dcr;
953 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
954 desc->static_addr = i3cdev->info.static_addr << 1;
955 desc++;
956 }
957
958 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
959 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
960 i3c_ccc_cmd_dest_cleanup(&dest);
961
962 return ret;
963}
964EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
965
966static int i3c_master_setda_locked(struct i3c_master_controller *master,
967 u8 oldaddr, u8 newaddr, bool setdasa)
968{
969 struct i3c_ccc_cmd_dest dest;
970 struct i3c_ccc_setda *setda;
971 struct i3c_ccc_cmd cmd;
972 int ret;
973
974 if (!oldaddr || !newaddr)
975 return -EINVAL;
976
977 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
978 if (!setda)
979 return -ENOMEM;
980
981 setda->addr = newaddr << 1;
982 i3c_ccc_cmd_init(&cmd, false,
983 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
984 &dest, 1);
985 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
986 i3c_ccc_cmd_dest_cleanup(&dest);
987
988 return ret;
989}
990
991static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
992 u8 static_addr, u8 dyn_addr)
993{
994 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
995}
996
997static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
998 u8 oldaddr, u8 newaddr)
999{
1000 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1001}
1002
1003static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1004 struct i3c_device_info *info)
1005{
1006 struct i3c_ccc_cmd_dest dest;
3a379bbc
BB
1007 struct i3c_ccc_mrl *mrl;
1008 struct i3c_ccc_cmd cmd;
1009 int ret;
1010
1011 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1012 if (!mrl)
1013 return -ENOMEM;
1014
1015 /*
1016 * When the device does not have IBI payload GETMRL only returns 2
1017 * bytes of data.
1018 */
1019 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1020 dest.payload.len -= 1;
1021
3a379bbc
BB
1022 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1023 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1024 if (ret)
1025 goto out;
1026
b4203ce0
NP
1027 switch (dest.payload.len) {
1028 case 3:
1029 info->max_ibi_len = mrl->ibi_len;
1030 fallthrough;
1031 case 2:
1032 info->max_read_len = be16_to_cpu(mrl->read_len);
1033 break;
1034 default:
3a379bbc
BB
1035 ret = -EIO;
1036 goto out;
1037 }
1038
3a379bbc
BB
1039out:
1040 i3c_ccc_cmd_dest_cleanup(&dest);
1041
1042 return ret;
1043}
1044
1045static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1046 struct i3c_device_info *info)
1047{
1048 struct i3c_ccc_cmd_dest dest;
1049 struct i3c_ccc_mwl *mwl;
1050 struct i3c_ccc_cmd cmd;
1051 int ret;
1052
1053 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1054 if (!mwl)
1055 return -ENOMEM;
1056
1057 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1058 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1059 if (ret)
1060 goto out;
1061
7afe9a4e
WW
1062 if (dest.payload.len != sizeof(*mwl)) {
1063 ret = -EIO;
1064 goto out;
1065 }
3a379bbc
BB
1066
1067 info->max_write_len = be16_to_cpu(mwl->len);
1068
1069out:
1070 i3c_ccc_cmd_dest_cleanup(&dest);
1071
1072 return ret;
1073}
1074
1075static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1076 struct i3c_device_info *info)
1077{
1078 struct i3c_ccc_getmxds *getmaxds;
1079 struct i3c_ccc_cmd_dest dest;
1080 struct i3c_ccc_cmd cmd;
1081 int ret;
1082
1083 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1084 sizeof(*getmaxds));
1085 if (!getmaxds)
1086 return -ENOMEM;
1087
1088 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1089 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1090 if (ret)
1091 goto out;
1092
1093 if (dest.payload.len != 2 && dest.payload.len != 5) {
1094 ret = -EIO;
1095 goto out;
1096 }
1097
1098 info->max_read_ds = getmaxds->maxrd;
1099 info->max_write_ds = getmaxds->maxwr;
1100 if (dest.payload.len == 5)
1101 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1102 ((u32)getmaxds->maxrdturn[1] << 8) |
1103 ((u32)getmaxds->maxrdturn[2] << 16);
1104
1105out:
1106 i3c_ccc_cmd_dest_cleanup(&dest);
1107
1108 return ret;
1109}
1110
1111static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1112 struct i3c_device_info *info)
1113{
1114 struct i3c_ccc_gethdrcap *gethdrcap;
1115 struct i3c_ccc_cmd_dest dest;
1116 struct i3c_ccc_cmd cmd;
1117 int ret;
1118
1119 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1120 sizeof(*gethdrcap));
1121 if (!gethdrcap)
1122 return -ENOMEM;
1123
1124 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1125 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1126 if (ret)
1127 goto out;
1128
1129 if (dest.payload.len != 1) {
1130 ret = -EIO;
1131 goto out;
1132 }
1133
1134 info->hdr_cap = gethdrcap->modes;
1135
1136out:
1137 i3c_ccc_cmd_dest_cleanup(&dest);
1138
1139 return ret;
1140}
1141
1142static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1143 struct i3c_device_info *info)
1144{
1145 struct i3c_ccc_getpid *getpid;
1146 struct i3c_ccc_cmd_dest dest;
1147 struct i3c_ccc_cmd cmd;
1148 int ret, i;
1149
1150 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1151 if (!getpid)
1152 return -ENOMEM;
1153
1154 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1155 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1156 if (ret)
1157 goto out;
1158
1159 info->pid = 0;
1160 for (i = 0; i < sizeof(getpid->pid); i++) {
1161 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1162
1163 info->pid |= (u64)getpid->pid[i] << sft;
1164 }
1165
1166out:
1167 i3c_ccc_cmd_dest_cleanup(&dest);
1168
1169 return ret;
1170}
1171
1172static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1173 struct i3c_device_info *info)
1174{
1175 struct i3c_ccc_getbcr *getbcr;
1176 struct i3c_ccc_cmd_dest dest;
1177 struct i3c_ccc_cmd cmd;
1178 int ret;
1179
1180 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1181 if (!getbcr)
1182 return -ENOMEM;
1183
1184 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1185 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1186 if (ret)
1187 goto out;
1188
1189 info->bcr = getbcr->bcr;
1190
1191out:
1192 i3c_ccc_cmd_dest_cleanup(&dest);
1193
1194 return ret;
1195}
1196
1197static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1198 struct i3c_device_info *info)
1199{
1200 struct i3c_ccc_getdcr *getdcr;
1201 struct i3c_ccc_cmd_dest dest;
1202 struct i3c_ccc_cmd cmd;
1203 int ret;
1204
1205 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1206 if (!getdcr)
1207 return -ENOMEM;
1208
1209 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1210 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1211 if (ret)
1212 goto out;
1213
1214 info->dcr = getdcr->dcr;
1215
1216out:
1217 i3c_ccc_cmd_dest_cleanup(&dest);
1218
1219 return ret;
1220}
1221
1222static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1223{
1224 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1225 enum i3c_addr_slot_status slot_status;
1226 int ret;
1227
1228 if (!dev->info.dyn_addr)
1229 return -EINVAL;
1230
1231 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1232 dev->info.dyn_addr);
1233 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1234 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1235 return -EINVAL;
1236
1237 ret = i3c_master_getpid_locked(master, &dev->info);
1238 if (ret)
1239 return ret;
1240
1241 ret = i3c_master_getbcr_locked(master, &dev->info);
1242 if (ret)
1243 return ret;
1244
1245 ret = i3c_master_getdcr_locked(master, &dev->info);
1246 if (ret)
1247 return ret;
1248
1249 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1250 ret = i3c_master_getmxds_locked(master, &dev->info);
1251 if (ret)
1252 return ret;
1253 }
1254
1255 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1256 dev->info.max_ibi_len = 1;
1257
1258 i3c_master_getmrl_locked(master, &dev->info);
1259 i3c_master_getmwl_locked(master, &dev->info);
1260
1261 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1262 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1263 if (ret)
1264 return ret;
1265 }
1266
1267 return 0;
1268}
1269
1270static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1271{
1272 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1273
1274 if (dev->info.static_addr)
1275 i3c_bus_set_addr_slot_status(&master->bus,
1276 dev->info.static_addr,
1277 I3C_ADDR_SLOT_FREE);
1278
1279 if (dev->info.dyn_addr)
1280 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1281 I3C_ADDR_SLOT_FREE);
1282
1283 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1284 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1285 I3C_ADDR_SLOT_FREE);
1286}
1287
1288static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1289{
1290 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1291 enum i3c_addr_slot_status status;
1292
1293 if (!dev->info.static_addr && !dev->info.dyn_addr)
1294 return 0;
1295
1296 if (dev->info.static_addr) {
1297 status = i3c_bus_get_addr_slot_status(&master->bus,
1298 dev->info.static_addr);
1299 if (status != I3C_ADDR_SLOT_FREE)
1300 return -EBUSY;
1301
1302 i3c_bus_set_addr_slot_status(&master->bus,
1303 dev->info.static_addr,
1304 I3C_ADDR_SLOT_I3C_DEV);
1305 }
1306
1307 /*
1308 * ->init_dyn_addr should have been reserved before that, so, if we're
1309 * trying to apply a pre-reserved dynamic address, we should not try
1310 * to reserve the address slot a second time.
1311 */
1312 if (dev->info.dyn_addr &&
1313 (!dev->boardinfo ||
1314 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1315 status = i3c_bus_get_addr_slot_status(&master->bus,
1316 dev->info.dyn_addr);
1317 if (status != I3C_ADDR_SLOT_FREE)
1318 goto err_release_static_addr;
1319
1320 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1321 I3C_ADDR_SLOT_I3C_DEV);
1322 }
1323
1324 return 0;
1325
1326err_release_static_addr:
1327 if (dev->info.static_addr)
1328 i3c_bus_set_addr_slot_status(&master->bus,
1329 dev->info.static_addr,
1330 I3C_ADDR_SLOT_FREE);
1331
1332 return -EBUSY;
1333}
1334
1335static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1336 struct i3c_dev_desc *dev)
1337{
1338 int ret;
1339
1340 /*
1341 * We don't attach devices to the controller until they are
1342 * addressable on the bus.
1343 */
1344 if (!dev->info.static_addr && !dev->info.dyn_addr)
1345 return 0;
1346
1347 ret = i3c_master_get_i3c_addrs(dev);
1348 if (ret)
1349 return ret;
1350
1351 /* Do not attach the master device itself. */
1352 if (master->this != dev && master->ops->attach_i3c_dev) {
1353 ret = master->ops->attach_i3c_dev(dev);
1354 if (ret) {
1355 i3c_master_put_i3c_addrs(dev);
1356 return ret;
1357 }
1358 }
1359
1360 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1361
1362 return 0;
1363}
1364
1365static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1366 u8 old_dyn_addr)
1367{
1368 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1369 enum i3c_addr_slot_status status;
1370 int ret;
1371
cc3a392d
PT
1372 if (dev->info.dyn_addr != old_dyn_addr &&
1373 (!dev->boardinfo ||
1374 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
3a379bbc
BB
1375 status = i3c_bus_get_addr_slot_status(&master->bus,
1376 dev->info.dyn_addr);
1377 if (status != I3C_ADDR_SLOT_FREE)
1378 return -EBUSY;
1379 i3c_bus_set_addr_slot_status(&master->bus,
1380 dev->info.dyn_addr,
1381 I3C_ADDR_SLOT_I3C_DEV);
1382 }
1383
1384 if (master->ops->reattach_i3c_dev) {
1385 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1386 if (ret) {
1387 i3c_master_put_i3c_addrs(dev);
1388 return ret;
1389 }
1390 }
1391
1392 return 0;
1393}
1394
1395static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1396{
1397 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1398
1399 /* Do not detach the master device itself. */
1400 if (master->this != dev && master->ops->detach_i3c_dev)
1401 master->ops->detach_i3c_dev(dev);
1402
1403 i3c_master_put_i3c_addrs(dev);
1404 list_del(&dev->common.node);
1405}
1406
1407static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1408 struct i2c_dev_desc *dev)
1409{
1410 int ret;
1411
1412 if (master->ops->attach_i2c_dev) {
1413 ret = master->ops->attach_i2c_dev(dev);
1414 if (ret)
1415 return ret;
1416 }
1417
1418 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1419
1420 return 0;
1421}
1422
1423static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1424{
1425 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1426
1427 list_del(&dev->common.node);
1428
1429 if (master->ops->detach_i2c_dev)
1430 master->ops->detach_i2c_dev(dev);
1431}
1432
cc3a392d
PT
1433static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1434 struct i3c_dev_boardinfo *boardinfo)
3a379bbc 1435{
cc3a392d
PT
1436 struct i3c_device_info info = {
1437 .static_addr = boardinfo->static_addr,
1438 };
1439 struct i3c_dev_desc *i3cdev;
3a379bbc
BB
1440 int ret;
1441
cc3a392d
PT
1442 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1443 if (IS_ERR(i3cdev))
1444 return -ENOMEM;
3a379bbc 1445
cc3a392d
PT
1446 i3cdev->boardinfo = boardinfo;
1447
1448 ret = i3c_master_attach_i3c_dev(master, i3cdev);
3a379bbc 1449 if (ret)
cc3a392d 1450 goto err_free_dev;
3a379bbc 1451
cc3a392d
PT
1452 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1453 i3cdev->boardinfo->init_dyn_addr);
1454 if (ret)
1455 goto err_detach_dev;
1456
1457 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1458 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
3a379bbc
BB
1459 if (ret)
1460 goto err_rstdaa;
1461
cc3a392d 1462 ret = i3c_master_retrieve_dev_info(i3cdev);
3a379bbc
BB
1463 if (ret)
1464 goto err_rstdaa;
1465
cc3a392d 1466 return 0;
3a379bbc
BB
1467
1468err_rstdaa:
cc3a392d
PT
1469 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1470err_detach_dev:
1471 i3c_master_detach_i3c_dev(i3cdev);
1472err_free_dev:
1473 i3c_master_free_i3c_dev(i3cdev);
1474
1475 return ret;
3a379bbc
BB
1476}
1477
1478static void
1479i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1480{
1481 struct i3c_dev_desc *desc;
1482 int ret;
1483
1484 if (!master->init_done)
1485 return;
1486
1487 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1488 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1489 continue;
1490
1491 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1492 if (!desc->dev)
1493 continue;
1494
1495 desc->dev->bus = &master->bus;
1496 desc->dev->desc = desc;
1497 desc->dev->dev.parent = &master->dev;
1498 desc->dev->dev.type = &i3c_device_type;
1499 desc->dev->dev.bus = &i3c_bus_type;
1500 desc->dev->dev.release = i3c_device_release;
1501 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1502 desc->info.pid);
1503
1504 if (desc->boardinfo)
1505 desc->dev->dev.of_node = desc->boardinfo->of_node;
1506
1507 ret = device_register(&desc->dev->dev);
1508 if (ret)
1509 dev_err(&master->dev,
1510 "Failed to add I3C device (err = %d)\n", ret);
1511 }
1512}
1513
1514/**
1515 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1516 * @master: master doing the DAA
1517 *
1518 * This function is instantiating an I3C device object and adding it to the
1519 * I3C device list. All device information are automatically retrieved using
1520 * standard CCC commands.
1521 *
1522 * The I3C device object is returned in case the master wants to attach
1523 * private data to it using i3c_dev_set_master_data().
1524 *
1525 * This function must be called with the bus lock held in write mode.
1526 *
1527 * Return: a 0 in case of success, an negative error code otherwise.
1528 */
1529int i3c_master_do_daa(struct i3c_master_controller *master)
1530{
1531 int ret;
1532
1533 i3c_bus_maintenance_lock(&master->bus);
1534 ret = master->ops->do_daa(master);
1535 i3c_bus_maintenance_unlock(&master->bus);
1536
1537 if (ret)
1538 return ret;
1539
1540 i3c_bus_normaluse_lock(&master->bus);
1541 i3c_master_register_new_i3c_devs(master);
1542 i3c_bus_normaluse_unlock(&master->bus);
1543
1544 return 0;
1545}
1546EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1547
1548/**
1549 * i3c_master_set_info() - set master device information
1550 * @master: master used to send frames on the bus
1551 * @info: I3C device information
1552 *
1553 * Set master device info. This should be called from
1554 * &i3c_master_controller_ops->bus_init().
1555 *
1556 * Not all &i3c_device_info fields are meaningful for a master device.
1557 * Here is a list of fields that should be properly filled:
1558 *
1559 * - &i3c_device_info->dyn_addr
1560 * - &i3c_device_info->bcr
1561 * - &i3c_device_info->dcr
1562 * - &i3c_device_info->pid
1563 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1564 * &i3c_device_info->bcr
1565 *
1566 * This function must be called with the bus lock held in maintenance mode.
1567 *
1568 * Return: 0 if @info contains valid information (not every piece of
1569 * information can be checked, but we can at least make sure @info->dyn_addr
1570 * and @info->bcr are correct), -EINVAL otherwise.
1571 */
1572int i3c_master_set_info(struct i3c_master_controller *master,
1573 const struct i3c_device_info *info)
1574{
1575 struct i3c_dev_desc *i3cdev;
1576 int ret;
1577
1578 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1579 return -EINVAL;
1580
1581 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1582 master->secondary)
1583 return -EINVAL;
1584
1585 if (master->this)
1586 return -EINVAL;
1587
1588 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1589 if (IS_ERR(i3cdev))
1590 return PTR_ERR(i3cdev);
1591
1592 master->this = i3cdev;
1593 master->bus.cur_master = master->this;
1594
1595 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1596 if (ret)
1597 goto err_free_dev;
1598
1599 return 0;
1600
1601err_free_dev:
1602 i3c_master_free_i3c_dev(i3cdev);
1603
1604 return ret;
1605}
1606EXPORT_SYMBOL_GPL(i3c_master_set_info);
1607
1608static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1609{
1610 struct i3c_dev_desc *i3cdev, *i3ctmp;
1611 struct i2c_dev_desc *i2cdev, *i2ctmp;
1612
1613 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1614 common.node) {
1615 i3c_master_detach_i3c_dev(i3cdev);
1616
1617 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1618 i3c_bus_set_addr_slot_status(&master->bus,
1619 i3cdev->boardinfo->init_dyn_addr,
1620 I3C_ADDR_SLOT_FREE);
1621
1622 i3c_master_free_i3c_dev(i3cdev);
1623 }
1624
1625 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1626 common.node) {
1627 i3c_master_detach_i2c_dev(i2cdev);
1628 i3c_bus_set_addr_slot_status(&master->bus,
b1ac3a4b
PG
1629 i2cdev->addr,
1630 I3C_ADDR_SLOT_FREE);
3a379bbc
BB
1631 i3c_master_free_i2c_dev(i2cdev);
1632 }
1633}
1634
1635/**
1636 * i3c_master_bus_init() - initialize an I3C bus
1637 * @master: main master initializing the bus
1638 *
1639 * This function is following all initialisation steps described in the I3C
1640 * specification:
1641 *
cc3a392d
PT
1642 * 1. Attach I2C devs to the master so that the master can fill its internal
1643 * device table appropriately
3a379bbc
BB
1644 *
1645 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1646 * the master controller. That's usually where the bus mode is selected
1647 * (pure bus or mixed fast/slow bus)
1648 *
1649 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1650 * particularly important when the bus was previously configured by someone
1651 * else (for example the bootloader)
1652 *
1653 * 4. Disable all slave events.
1654 *
cc3a392d
PT
1655 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1656 * also have static_addr, try to pre-assign dynamic addresses requested by
1657 * the FW with SETDASA and attach corresponding statically defined I3C
1658 * devices to the master.
3a379bbc
BB
1659 *
1660 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1661 * remaining I3C devices
1662 *
1663 * Once this is done, all I3C and I2C devices should be usable.
1664 *
1665 * Return: a 0 in case of success, an negative error code otherwise.
1666 */
1667static int i3c_master_bus_init(struct i3c_master_controller *master)
1668{
1669 enum i3c_addr_slot_status status;
1670 struct i2c_dev_boardinfo *i2cboardinfo;
1671 struct i3c_dev_boardinfo *i3cboardinfo;
3a379bbc
BB
1672 struct i2c_dev_desc *i2cdev;
1673 int ret;
1674
1675 /*
1676 * First attach all devices with static definitions provided by the
1677 * FW.
1678 */
1679 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1680 status = i3c_bus_get_addr_slot_status(&master->bus,
1681 i2cboardinfo->base.addr);
1682 if (status != I3C_ADDR_SLOT_FREE) {
1683 ret = -EBUSY;
1684 goto err_detach_devs;
1685 }
1686
1687 i3c_bus_set_addr_slot_status(&master->bus,
1688 i2cboardinfo->base.addr,
1689 I3C_ADDR_SLOT_I2C_DEV);
1690
31b9887c
JI
1691 i2cdev = i3c_master_alloc_i2c_dev(master,
1692 i2cboardinfo->base.addr,
1693 i2cboardinfo->lvr);
3a379bbc
BB
1694 if (IS_ERR(i2cdev)) {
1695 ret = PTR_ERR(i2cdev);
1696 goto err_detach_devs;
1697 }
1698
1699 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1700 if (ret) {
1701 i3c_master_free_i2c_dev(i2cdev);
1702 goto err_detach_devs;
1703 }
1704 }
3a379bbc
BB
1705
1706 /*
1707 * Now execute the controller specific ->bus_init() routine, which
1708 * might configure its internal logic to match the bus limitations.
1709 */
1710 ret = master->ops->bus_init(master);
1711 if (ret)
1712 goto err_detach_devs;
1713
1714 /*
1715 * The master device should have been instantiated in ->bus_init(),
1716 * complain if this was not the case.
1717 */
1718 if (!master->this) {
1719 dev_err(&master->dev,
1720 "master_set_info() was not called in ->bus_init()\n");
1721 ret = -EINVAL;
1722 goto err_bus_cleanup;
1723 }
1724
1725 /*
1726 * Reset all dynamic address that may have been assigned before
1727 * (assigned by the bootloader for example).
1728 */
1729 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1730 if (ret && ret != I3C_ERROR_M2)
1731 goto err_bus_cleanup;
1732
1733 /* Disable all slave events before starting DAA. */
1734 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1735 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1736 I3C_CCC_EVENT_HJ);
1737 if (ret && ret != I3C_ERROR_M2)
1738 goto err_bus_cleanup;
1739
1740 /*
cc3a392d
PT
1741 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1742 * address and retrieve device information if needed.
1743 * In case pre-assign dynamic address fails, setting dynamic address to
1744 * the requested init_dyn_addr is retried after DAA is done in
1745 * i3c_master_add_i3c_dev_locked().
3a379bbc 1746 */
cc3a392d
PT
1747 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1748
1749 /*
1750 * We don't reserve a dynamic address for devices that
1751 * don't explicitly request one.
1752 */
1753 if (!i3cboardinfo->init_dyn_addr)
1754 continue;
1755
1756 ret = i3c_bus_get_addr_slot_status(&master->bus,
1757 i3cboardinfo->init_dyn_addr);
1758 if (ret != I3C_ADDR_SLOT_FREE) {
1759 ret = -EBUSY;
1760 goto err_rstdaa;
1761 }
1762
1763 i3c_bus_set_addr_slot_status(&master->bus,
1764 i3cboardinfo->init_dyn_addr,
1765 I3C_ADDR_SLOT_I3C_DEV);
1766
1767 /*
1768 * Only try to create/attach devices that have a static
1769 * address. Other devices will be created/attached when
1770 * DAA happens, and the requested dynamic address will
1771 * be set using SETNEWDA once those devices become
1772 * addressable.
1773 */
1774
1775 if (i3cboardinfo->static_addr)
1776 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1777 }
3a379bbc
BB
1778
1779 ret = i3c_master_do_daa(master);
1780 if (ret)
1781 goto err_rstdaa;
1782
1783 return 0;
1784
1785err_rstdaa:
1786 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1787
1788err_bus_cleanup:
1789 if (master->ops->bus_cleanup)
1790 master->ops->bus_cleanup(master);
1791
1792err_detach_devs:
1793 i3c_master_detach_free_devs(master);
1794
1795 return ret;
1796}
1797
1798static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1799{
1800 if (master->ops->bus_cleanup)
1801 master->ops->bus_cleanup(master);
1802
1803 i3c_master_detach_free_devs(master);
1804}
1805
9da36a7e
PT
1806static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1807{
1808 struct i3c_master_controller *master = i3cdev->common.master;
1809 struct i3c_dev_boardinfo *i3cboardinfo;
1810
1811 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1812 if (i3cdev->info.pid != i3cboardinfo->pid)
1813 continue;
1814
1815 i3cdev->boardinfo = i3cboardinfo;
1816 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1817 return;
1818 }
1819}
1820
3a379bbc
BB
1821static struct i3c_dev_desc *
1822i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1823{
f12b524e 1824 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
3a379bbc
BB
1825 struct i3c_dev_desc *i3cdev;
1826
1827 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1828 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1829 return i3cdev;
1830 }
1831
1832 return NULL;
1833}
1834
1835/**
1836 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1837 * @master: master used to send frames on the bus
1838 * @addr: I3C slave dynamic address assigned to the device
1839 *
1840 * This function is instantiating an I3C device object and adding it to the
1841 * I3C device list. All device information are automatically retrieved using
1842 * standard CCC commands.
1843 *
1844 * The I3C device object is returned in case the master wants to attach
1845 * private data to it using i3c_dev_set_master_data().
1846 *
1847 * This function must be called with the bus lock held in write mode.
1848 *
1849 * Return: a 0 in case of success, an negative error code otherwise.
1850 */
1851int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1852 u8 addr)
1853{
1854 struct i3c_device_info info = { .dyn_addr = addr };
1855 struct i3c_dev_desc *newdev, *olddev;
1856 u8 old_dyn_addr = addr, expected_dyn_addr;
1857 struct i3c_ibi_setup ibireq = { };
1858 bool enable_ibi = false;
1859 int ret;
1860
1861 if (!master)
1862 return -EINVAL;
1863
1864 newdev = i3c_master_alloc_i3c_dev(master, &info);
1865 if (IS_ERR(newdev))
1866 return PTR_ERR(newdev);
1867
1868 ret = i3c_master_attach_i3c_dev(master, newdev);
840414ae 1869 if (ret)
3a379bbc 1870 goto err_free_dev;
3a379bbc
BB
1871
1872 ret = i3c_master_retrieve_dev_info(newdev);
1873 if (ret)
093c61b6 1874 goto err_detach_dev;
3a379bbc 1875
9da36a7e
PT
1876 i3c_master_attach_boardinfo(newdev);
1877
3a379bbc
BB
1878 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1879 if (olddev) {
3a379bbc
BB
1880 newdev->dev = olddev->dev;
1881 if (newdev->dev)
1882 newdev->dev->desc = newdev;
1883
1884 /*
1885 * We need to restore the IBI state too, so let's save the
1886 * IBI information and try to restore them after olddev has
1887 * been detached+released and its IBI has been stopped and
1888 * the associated resources have been freed.
1889 */
1890 mutex_lock(&olddev->ibi_lock);
1891 if (olddev->ibi) {
1892 ibireq.handler = olddev->ibi->handler;
1893 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1894 ibireq.num_slots = olddev->ibi->num_slots;
1895
1896 if (olddev->ibi->enabled) {
1897 enable_ibi = true;
1898 i3c_dev_disable_ibi_locked(olddev);
1899 }
1900
1901 i3c_dev_free_ibi_locked(olddev);
1902 }
1903 mutex_unlock(&olddev->ibi_lock);
1904
1905 old_dyn_addr = olddev->info.dyn_addr;
1906
1907 i3c_master_detach_i3c_dev(olddev);
1908 i3c_master_free_i3c_dev(olddev);
1909 }
1910
1911 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1912 if (ret)
1913 goto err_detach_dev;
1914
1915 /*
1916 * Depending on our previous state, the expected dynamic address might
1917 * differ:
1918 * - if the device already had a dynamic address assigned, let's try to
1919 * re-apply this one
1920 * - if the device did not have a dynamic address and the firmware
1921 * requested a specific address, pick this one
1922 * - in any other case, keep the address automatically assigned by the
1923 * master
1924 */
1925 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1926 expected_dyn_addr = old_dyn_addr;
1927 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1928 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1929 else
1930 expected_dyn_addr = newdev->info.dyn_addr;
1931
1932 if (newdev->info.dyn_addr != expected_dyn_addr) {
1933 /*
1934 * Try to apply the expected dynamic address. If it fails, keep
1935 * the address assigned by the master.
1936 */
1937 ret = i3c_master_setnewda_locked(master,
1938 newdev->info.dyn_addr,
1939 expected_dyn_addr);
1940 if (!ret) {
1941 old_dyn_addr = newdev->info.dyn_addr;
1942 newdev->info.dyn_addr = expected_dyn_addr;
1943 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1944 } else {
1945 dev_err(&master->dev,
1946 "Failed to assign reserved/old address to device %d%llx",
1947 master->bus.id, newdev->info.pid);
1948 }
1949 }
1950
1951 /*
1952 * Now is time to try to restore the IBI setup. If we're lucky,
1953 * everything works as before, otherwise, all we can do is complain.
1954 * FIXME: maybe we should add callback to inform the driver that it
1955 * should request the IBI again instead of trying to hide that from
1956 * him.
1957 */
1958 if (ibireq.handler) {
1959 mutex_lock(&newdev->ibi_lock);
1960 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1961 if (ret) {
1962 dev_err(&master->dev,
1963 "Failed to request IBI on device %d-%llx",
1964 master->bus.id, newdev->info.pid);
1965 } else if (enable_ibi) {
1966 ret = i3c_dev_enable_ibi_locked(newdev);
1967 if (ret)
1968 dev_err(&master->dev,
1969 "Failed to re-enable IBI on device %d-%llx",
1970 master->bus.id, newdev->info.pid);
1971 }
1972 mutex_unlock(&newdev->ibi_lock);
1973 }
1974
1975 return 0;
1976
1977err_detach_dev:
1978 if (newdev->dev && newdev->dev->desc)
1979 newdev->dev->desc = NULL;
1980
1981 i3c_master_detach_i3c_dev(newdev);
1982
1983err_free_dev:
1984 i3c_master_free_i3c_dev(newdev);
1985
1986 return ret;
1987}
1988EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1989
1990#define OF_I3C_REG1_IS_I2C_DEV BIT(31)
1991
1992static int
1993of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1994 struct device_node *node, u32 *reg)
1995{
1996 struct i2c_dev_boardinfo *boardinfo;
1997 struct device *dev = &master->dev;
1998 int ret;
1999
2000 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2001 if (!boardinfo)
2002 return -ENOMEM;
2003
2004 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2005 if (ret)
2006 return ret;
2007
88c50322
PG
2008 /*
2009 * The I3C Specification does not clearly say I2C devices with 10-bit
2010 * address are supported. These devices can't be passed properly through
2011 * DEFSLVS command.
2012 */
2013 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
de896499 2014 dev_err(dev, "I2C device with 10 bit address not supported.");
88c50322
PG
2015 return -ENOTSUPP;
2016 }
2017
3a379bbc
BB
2018 /* LVR is encoded in reg[2]. */
2019 boardinfo->lvr = reg[2];
2020
3a379bbc
BB
2021 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2022 of_node_get(node);
2023
2024 return 0;
2025}
2026
2027static int
2028of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2029 struct device_node *node, u32 *reg)
2030{
2031 struct i3c_dev_boardinfo *boardinfo;
2032 struct device *dev = &master->dev;
3a379bbc
BB
2033 enum i3c_addr_slot_status addrstatus;
2034 u32 init_dyn_addr = 0;
2035
2036 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2037 if (!boardinfo)
2038 return -ENOMEM;
2039
2040 if (reg[0]) {
2041 if (reg[0] > I3C_MAX_ADDR)
2042 return -EINVAL;
2043
2044 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2045 reg[0]);
2046 if (addrstatus != I3C_ADDR_SLOT_FREE)
2047 return -EINVAL;
2048 }
2049
2050 boardinfo->static_addr = reg[0];
2051
2052 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2053 if (init_dyn_addr > I3C_MAX_ADDR)
2054 return -EINVAL;
2055
2056 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2057 init_dyn_addr);
2058 if (addrstatus != I3C_ADDR_SLOT_FREE)
2059 return -EINVAL;
2060 }
2061
2062 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2063
9752c37c
VS
2064 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2065 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
3a379bbc
BB
2066 return -EINVAL;
2067
2068 boardinfo->init_dyn_addr = init_dyn_addr;
2069 boardinfo->of_node = of_node_get(node);
2070 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2071
2072 return 0;
2073}
2074
2075static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2076 struct device_node *node)
2077{
2078 u32 reg[3];
2079 int ret;
2080
2081 if (!master || !node)
2082 return -EINVAL;
2083
2084 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2085 if (ret)
2086 return ret;
2087
2088 /*
2089 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2090 * dealing with an I2C device.
2091 */
2092 if (!reg[1])
2093 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2094 else
2095 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2096
2097 return ret;
2098}
2099
2100static int of_populate_i3c_bus(struct i3c_master_controller *master)
2101{
2102 struct device *dev = &master->dev;
2103 struct device_node *i3cbus_np = dev->of_node;
2104 struct device_node *node;
2105 int ret;
2106 u32 val;
2107
2108 if (!i3cbus_np)
2109 return 0;
2110
2111 for_each_available_child_of_node(i3cbus_np, node) {
2112 ret = of_i3c_master_add_dev(master, node);
91227632
ND
2113 if (ret) {
2114 of_node_put(node);
3a379bbc 2115 return ret;
91227632 2116 }
3a379bbc
BB
2117 }
2118
2119 /*
2120 * The user might want to limit I2C and I3C speed in case some devices
2121 * on the bus are not supporting typical rates, or if the bus topology
2122 * prevents it from using max possible rate.
2123 */
2124 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2125 master->bus.scl_rate.i2c = val;
2126
2127 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2128 master->bus.scl_rate.i3c = val;
2129
2130 return 0;
2131}
2132
2133static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2134 struct i2c_msg *xfers, int nxfers)
2135{
2136 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2137 struct i2c_dev_desc *dev;
2138 int i, ret;
2139 u16 addr;
2140
2141 if (!xfers || !master || nxfers <= 0)
2142 return -EINVAL;
2143
2144 if (!master->ops->i2c_xfers)
2145 return -ENOTSUPP;
2146
2147 /* Doing transfers to different devices is not supported. */
2148 addr = xfers[0].addr;
2149 for (i = 1; i < nxfers; i++) {
2150 if (addr != xfers[i].addr)
2151 return -ENOTSUPP;
2152 }
2153
2154 i3c_bus_normaluse_lock(&master->bus);
2155 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2156 if (!dev)
2157 ret = -ENOENT;
2158 else
2159 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2160 i3c_bus_normaluse_unlock(&master->bus);
2161
2162 return ret ? ret : nxfers;
2163}
2164
88c50322 2165static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
3a379bbc 2166{
88c50322 2167 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
3a379bbc
BB
2168}
2169
72a4501b
JI
2170static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2171{
2172 /* Fall back to no spike filters and FM bus mode. */
2173 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2174
2175 if (client->dev.of_node) {
2176 u32 reg[3];
2177
2178 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2179 reg, ARRAY_SIZE(reg)))
2180 lvr = reg[2];
2181 }
2182
2183 return lvr;
2184}
2185
2186static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2187{
2188 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2189 enum i3c_addr_slot_status status;
2190 struct i2c_dev_desc *i2cdev;
2191 int ret;
2192
2193 /* Already added by board info? */
2194 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2195 return 0;
2196
2197 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2198 if (status != I3C_ADDR_SLOT_FREE)
2199 return -EBUSY;
2200
2201 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2202 I3C_ADDR_SLOT_I2C_DEV);
2203
2204 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2205 i3c_master_i2c_get_lvr(client));
2206 if (IS_ERR(i2cdev)) {
2207 ret = PTR_ERR(i2cdev);
2208 goto out_clear_status;
2209 }
2210
2211 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2212 if (ret)
2213 goto out_free_dev;
2214
2215 return 0;
2216
2217out_free_dev:
2218 i3c_master_free_i2c_dev(i2cdev);
2219out_clear_status:
2220 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2221 I3C_ADDR_SLOT_FREE);
2222
2223 return ret;
2224}
2225
2226static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2227{
2228 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2229 struct i2c_dev_desc *dev;
2230
2231 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2232 if (!dev)
2233 return -ENODEV;
2234
2235 i3c_master_detach_i2c_dev(dev);
2236 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2237 I3C_ADDR_SLOT_FREE);
2238 i3c_master_free_i2c_dev(dev);
2239
2240 return 0;
2241}
2242
3a379bbc
BB
2243static const struct i2c_algorithm i3c_master_i2c_algo = {
2244 .master_xfer = i3c_master_i2c_adapter_xfer,
88c50322 2245 .functionality = i3c_master_i2c_funcs,
3a379bbc
BB
2246};
2247
72a4501b
JI
2248static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2249 void *data)
2250{
2251 struct i2c_adapter *adap;
2252 struct i2c_client *client;
2253 struct device *dev = data;
2254 struct i3c_master_controller *master;
2255 int ret;
2256
2257 if (dev->type != &i2c_client_type)
2258 return 0;
2259
2260 client = to_i2c_client(dev);
2261 adap = client->adapter;
2262
2263 if (adap->algo != &i3c_master_i2c_algo)
2264 return 0;
2265
2266 master = i2c_adapter_to_i3c_master(adap);
2267
2268 i3c_bus_maintenance_lock(&master->bus);
2269 switch (action) {
2270 case BUS_NOTIFY_ADD_DEVICE:
2271 ret = i3c_master_i2c_attach(adap, client);
2272 break;
2273 case BUS_NOTIFY_DEL_DEVICE:
2274 ret = i3c_master_i2c_detach(adap, client);
2275 break;
2276 }
2277 i3c_bus_maintenance_unlock(&master->bus);
2278
2279 return ret;
2280}
2281
2282static struct notifier_block i2cdev_notifier = {
2283 .notifier_call = i3c_i2c_notifier_call,
2284};
2285
3a379bbc
BB
2286static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2287{
2288 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2289 struct i2c_dev_desc *i2cdev;
31b9887c 2290 struct i2c_dev_boardinfo *i2cboardinfo;
3a379bbc
BB
2291 int ret;
2292
2293 adap->dev.parent = master->dev.parent;
2294 adap->owner = master->dev.parent->driver->owner;
2295 adap->algo = &i3c_master_i2c_algo;
2296 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2297
2298 /* FIXME: Should we allow i3c masters to override these values? */
2299 adap->timeout = 1000;
2300 adap->retries = 3;
2301
2302 ret = i2c_add_adapter(adap);
2303 if (ret)
2304 return ret;
2305
2306 /*
2307 * We silently ignore failures here. The bus should keep working
2308 * correctly even if one or more i2c devices are not registered.
2309 */
6cbf8b38
JI
2310 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2311 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2312 i2cboardinfo->base.addr);
2313 if (WARN_ON(!i2cdev))
2314 continue;
31b9887c 2315 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
6cbf8b38 2316 }
3a379bbc
BB
2317
2318 return 0;
2319}
2320
2321static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2322{
2323 struct i2c_dev_desc *i2cdev;
2324
2325 i2c_del_adapter(&master->i2c);
2326
2327 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2328 i2cdev->dev = NULL;
2329}
2330
2331static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2332{
2333 struct i3c_dev_desc *i3cdev;
2334
2335 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2336 if (!i3cdev->dev)
2337 continue;
2338
2339 i3cdev->dev->desc = NULL;
2340 if (device_is_registered(&i3cdev->dev->dev))
2341 device_unregister(&i3cdev->dev->dev);
2342 else
2343 put_device(&i3cdev->dev->dev);
2344 i3cdev->dev = NULL;
2345 }
2346}
2347
2348/**
2349 * i3c_master_queue_ibi() - Queue an IBI
2350 * @dev: the device this IBI is coming from
2351 * @slot: the IBI slot used to store the payload
2352 *
2353 * Queue an IBI to the controller workqueue. The IBI handler attached to
2354 * the dev will be called from a workqueue context.
2355 */
2356void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2357{
2358 atomic_inc(&dev->ibi->pending_ibis);
2359 queue_work(dev->common.master->wq, &slot->work);
2360}
2361EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2362
2363static void i3c_master_handle_ibi(struct work_struct *work)
2364{
2365 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2366 work);
2367 struct i3c_dev_desc *dev = slot->dev;
2368 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2369 struct i3c_ibi_payload payload;
2370
2371 payload.data = slot->data;
2372 payload.len = slot->len;
2373
2374 if (dev->dev)
2375 dev->ibi->handler(dev->dev, &payload);
2376
2377 master->ops->recycle_ibi_slot(dev, slot);
2378 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2379 complete(&dev->ibi->all_ibis_handled);
2380}
2381
2382static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2383 struct i3c_ibi_slot *slot)
2384{
2385 slot->dev = dev;
2386 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2387}
2388
2389struct i3c_generic_ibi_slot {
2390 struct list_head node;
2391 struct i3c_ibi_slot base;
2392};
2393
2394struct i3c_generic_ibi_pool {
2395 spinlock_t lock;
2396 unsigned int num_slots;
2397 struct i3c_generic_ibi_slot *slots;
2398 void *payload_buf;
2399 struct list_head free_slots;
2400 struct list_head pending;
2401};
2402
2403/**
2404 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2405 * @pool: the IBI pool to free
2406 *
2407 * Free all IBI slots allated by a generic IBI pool.
2408 */
2409void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2410{
2411 struct i3c_generic_ibi_slot *slot;
2412 unsigned int nslots = 0;
2413
2414 while (!list_empty(&pool->free_slots)) {
2415 slot = list_first_entry(&pool->free_slots,
2416 struct i3c_generic_ibi_slot, node);
2417 list_del(&slot->node);
2418 nslots++;
2419 }
2420
2421 /*
2422 * If the number of freed slots is not equal to the number of allocated
2423 * slots we have a leak somewhere.
2424 */
2425 WARN_ON(nslots != pool->num_slots);
2426
2427 kfree(pool->payload_buf);
2428 kfree(pool->slots);
2429 kfree(pool);
2430}
2431EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2432
2433/**
2434 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2435 * @dev: the device this pool will be used for
2436 * @req: IBI setup request describing what the device driver expects
2437 *
2438 * Create a generic IBI pool based on the information provided in @req.
2439 *
2440 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2441 */
2442struct i3c_generic_ibi_pool *
2443i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2444 const struct i3c_ibi_setup *req)
2445{
2446 struct i3c_generic_ibi_pool *pool;
2447 struct i3c_generic_ibi_slot *slot;
2448 unsigned int i;
2449 int ret;
2450
2451 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2452 if (!pool)
2453 return ERR_PTR(-ENOMEM);
2454
2455 spin_lock_init(&pool->lock);
2456 INIT_LIST_HEAD(&pool->free_slots);
2457 INIT_LIST_HEAD(&pool->pending);
2458
2459 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2460 if (!pool->slots) {
2461 ret = -ENOMEM;
2462 goto err_free_pool;
2463 }
2464
2465 if (req->max_payload_len) {
2466 pool->payload_buf = kcalloc(req->num_slots,
2467 req->max_payload_len, GFP_KERNEL);
2468 if (!pool->payload_buf) {
2469 ret = -ENOMEM;
2470 goto err_free_pool;
2471 }
2472 }
2473
2474 for (i = 0; i < req->num_slots; i++) {
2475 slot = &pool->slots[i];
2476 i3c_master_init_ibi_slot(dev, &slot->base);
2477
2478 if (req->max_payload_len)
2479 slot->base.data = pool->payload_buf +
2480 (i * req->max_payload_len);
2481
2482 list_add_tail(&slot->node, &pool->free_slots);
2483 pool->num_slots++;
2484 }
2485
2486 return pool;
2487
2488err_free_pool:
2489 i3c_generic_ibi_free_pool(pool);
2490 return ERR_PTR(ret);
2491}
2492EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2493
2494/**
2495 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2496 * @pool: the pool to query an IBI slot on
2497 *
2498 * Search for a free slot in a generic IBI pool.
2499 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2500 * when it's no longer needed.
2501 *
2502 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2503 */
2504struct i3c_ibi_slot *
2505i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2506{
2507 struct i3c_generic_ibi_slot *slot;
2508 unsigned long flags;
2509
2510 spin_lock_irqsave(&pool->lock, flags);
2511 slot = list_first_entry_or_null(&pool->free_slots,
2512 struct i3c_generic_ibi_slot, node);
2513 if (slot)
2514 list_del(&slot->node);
2515 spin_unlock_irqrestore(&pool->lock, flags);
2516
2517 return slot ? &slot->base : NULL;
2518}
2519EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2520
2521/**
2522 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2523 * @pool: the pool to return the IBI slot to
2524 * @s: IBI slot to recycle
2525 *
2526 * Add an IBI slot back to its generic IBI pool. Should be called from the
2527 * master driver struct_master_controller_ops->recycle_ibi() method.
2528 */
2529void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2530 struct i3c_ibi_slot *s)
2531{
2532 struct i3c_generic_ibi_slot *slot;
2533 unsigned long flags;
2534
2535 if (!s)
2536 return;
2537
2538 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2539 spin_lock_irqsave(&pool->lock, flags);
2540 list_add_tail(&slot->node, &pool->free_slots);
2541 spin_unlock_irqrestore(&pool->lock, flags);
2542}
2543EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2544
2545static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2546{
2547 if (!ops || !ops->bus_init || !ops->priv_xfers ||
88c50322 2548 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
3a379bbc
BB
2549 return -EINVAL;
2550
2551 if (ops->request_ibi &&
2552 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2553 !ops->recycle_ibi_slot))
2554 return -EINVAL;
2555
2556 return 0;
2557}
2558
2559/**
2560 * i3c_master_register() - register an I3C master
2561 * @master: master used to send frames on the bus
2562 * @parent: the parent device (the one that provides this I3C master
2563 * controller)
2564 * @ops: the master controller operations
2565 * @secondary: true if you are registering a secondary master. Will return
2566 * -ENOTSUPP if set to true since secondary masters are not yet
2567 * supported
2568 *
2569 * This function takes care of everything for you:
2570 *
2571 * - creates and initializes the I3C bus
2572 * - populates the bus with static I2C devs if @parent->of_node is not
2573 * NULL
2574 * - registers all I3C devices added by the controller during bus
2575 * initialization
2576 * - registers the I2C adapter and all I2C devices
2577 *
2578 * Return: 0 in case of success, a negative error code otherwise.
2579 */
2580int i3c_master_register(struct i3c_master_controller *master,
2581 struct device *parent,
2582 const struct i3c_master_controller_ops *ops,
2583 bool secondary)
2584{
ecc8fb54 2585 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
3a379bbc
BB
2586 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2587 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2588 struct i2c_dev_boardinfo *i2cbi;
2589 int ret;
2590
2591 /* We do not support secondary masters yet. */
2592 if (secondary)
2593 return -ENOTSUPP;
2594
2595 ret = i3c_master_check_ops(ops);
2596 if (ret)
2597 return ret;
2598
2599 master->dev.parent = parent;
2600 master->dev.of_node = of_node_get(parent->of_node);
2601 master->dev.bus = &i3c_bus_type;
2602 master->dev.type = &i3c_masterdev_type;
2603 master->dev.release = i3c_masterdev_release;
2604 master->ops = ops;
2605 master->secondary = secondary;
2606 INIT_LIST_HEAD(&master->boardinfo.i2c);
2607 INIT_LIST_HEAD(&master->boardinfo.i3c);
2608
2609 ret = i3c_bus_init(i3cbus);
2610 if (ret)
2611 return ret;
2612
2613 device_initialize(&master->dev);
2614 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2615
2616 ret = of_populate_i3c_bus(master);
2617 if (ret)
2618 goto err_put_dev;
2619
2620 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2621 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2622 case I3C_LVR_I2C_INDEX(0):
2623 if (mode < I3C_BUS_MODE_MIXED_FAST)
2624 mode = I3C_BUS_MODE_MIXED_FAST;
2625 break;
2626 case I3C_LVR_I2C_INDEX(1):
cbf4f732
VS
2627 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2628 mode = I3C_BUS_MODE_MIXED_LIMITED;
2629 break;
3a379bbc
BB
2630 case I3C_LVR_I2C_INDEX(2):
2631 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2632 mode = I3C_BUS_MODE_MIXED_SLOW;
2633 break;
2634 default:
2635 ret = -EINVAL;
2636 goto err_put_dev;
2637 }
ecc8fb54
VS
2638
2639 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2640 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
3a379bbc
BB
2641 }
2642
ecc8fb54 2643 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
3a379bbc
BB
2644 if (ret)
2645 goto err_put_dev;
2646
2647 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2648 if (!master->wq) {
2649 ret = -ENOMEM;
2650 goto err_put_dev;
2651 }
2652
2653 ret = i3c_master_bus_init(master);
2654 if (ret)
0d95f41e 2655 goto err_put_dev;
3a379bbc
BB
2656
2657 ret = device_add(&master->dev);
2658 if (ret)
2659 goto err_cleanup_bus;
2660
2661 /*
2662 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2663 * through the I2C subsystem.
2664 */
2665 ret = i3c_master_i2c_adapter_init(master);
2666 if (ret)
2667 goto err_del_dev;
2668
2669 /*
2670 * We're done initializing the bus and the controller, we can now
708bc6ec 2671 * register I3C devices discovered during the initial DAA.
3a379bbc
BB
2672 */
2673 master->init_done = true;
2674 i3c_bus_normaluse_lock(&master->bus);
2675 i3c_master_register_new_i3c_devs(master);
2676 i3c_bus_normaluse_unlock(&master->bus);
2677
2678 return 0;
2679
2680err_del_dev:
2681 device_del(&master->dev);
2682
2683err_cleanup_bus:
2684 i3c_master_bus_cleanup(master);
2685
2686err_put_dev:
2687 put_device(&master->dev);
2688
2689 return ret;
2690}
2691EXPORT_SYMBOL_GPL(i3c_master_register);
2692
2693/**
2694 * i3c_master_unregister() - unregister an I3C master
2695 * @master: master used to send frames on the bus
2696 *
2697 * Basically undo everything done in i3c_master_register().
2698 *
2699 * Return: 0 in case of success, a negative error code otherwise.
2700 */
2701int i3c_master_unregister(struct i3c_master_controller *master)
2702{
2703 i3c_master_i2c_adapter_cleanup(master);
2704 i3c_master_unregister_i3c_devs(master);
2705 i3c_master_bus_cleanup(master);
2706 device_unregister(&master->dev);
2707
2708 return 0;
2709}
2710EXPORT_SYMBOL_GPL(i3c_master_unregister);
2711
2712int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2713 struct i3c_priv_xfer *xfers,
2714 int nxfers)
2715{
2716 struct i3c_master_controller *master;
2717
2718 if (!dev)
2719 return -ENOENT;
2720
2721 master = i3c_dev_get_master(dev);
2722 if (!master || !xfers)
2723 return -EINVAL;
2724
2725 if (!master->ops->priv_xfers)
2726 return -ENOTSUPP;
2727
2728 return master->ops->priv_xfers(dev, xfers, nxfers);
2729}
2730
2731int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2732{
2733 struct i3c_master_controller *master;
2734 int ret;
2735
2736 if (!dev->ibi)
2737 return -EINVAL;
2738
2739 master = i3c_dev_get_master(dev);
2740 ret = master->ops->disable_ibi(dev);
2741 if (ret)
2742 return ret;
2743
2744 reinit_completion(&dev->ibi->all_ibis_handled);
2745 if (atomic_read(&dev->ibi->pending_ibis))
2746 wait_for_completion(&dev->ibi->all_ibis_handled);
2747
2748 dev->ibi->enabled = false;
2749
2750 return 0;
2751}
2752
2753int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2754{
2755 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2756 int ret;
2757
2758 if (!dev->ibi)
2759 return -EINVAL;
2760
2761 ret = master->ops->enable_ibi(dev);
2762 if (!ret)
2763 dev->ibi->enabled = true;
2764
2765 return ret;
2766}
2767
2768int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2769 const struct i3c_ibi_setup *req)
2770{
2771 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2772 struct i3c_device_ibi_info *ibi;
2773 int ret;
2774
2775 if (!master->ops->request_ibi)
2776 return -ENOTSUPP;
2777
2778 if (dev->ibi)
2779 return -EBUSY;
2780
2781 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2782 if (!ibi)
2783 return -ENOMEM;
2784
2785 atomic_set(&ibi->pending_ibis, 0);
2786 init_completion(&ibi->all_ibis_handled);
2787 ibi->handler = req->handler;
2788 ibi->max_payload_len = req->max_payload_len;
2789 ibi->num_slots = req->num_slots;
2790
2791 dev->ibi = ibi;
2792 ret = master->ops->request_ibi(dev, req);
2793 if (ret) {
2794 kfree(ibi);
2795 dev->ibi = NULL;
2796 }
2797
2798 return ret;
2799}
2800
2801void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2802{
2803 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2804
2805 if (!dev->ibi)
2806 return;
2807
2808 if (WARN_ON(dev->ibi->enabled))
2809 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2810
2811 master->ops->free_ibi(dev);
2812 kfree(dev->ibi);
2813 dev->ibi = NULL;
2814}
2815
2816static int __init i3c_init(void)
2817{
72a4501b
JI
2818 int res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
2819
2820 if (res)
2821 return res;
2822
2823 res = bus_register(&i3c_bus_type);
2824 if (res)
2825 goto out_unreg_notifier;
2826
2827 return 0;
2828
2829out_unreg_notifier:
2830 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2831
2832 return res;
3a379bbc
BB
2833}
2834subsys_initcall(i3c_init);
2835
2836static void __exit i3c_exit(void)
2837{
72a4501b 2838 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3a379bbc
BB
2839 idr_destroy(&i3c_bus_idr);
2840 bus_unregister(&i3c_bus_type);
2841}
2842module_exit(i3c_exit);
2843
2844MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2845MODULE_DESCRIPTION("I3C core");
2846MODULE_LICENSE("GPL v2");