[linux-block.git] / drivers / i2c / muxes / i2c-mux-pca954x.c

// SPDX-License-Identifier: GPL-2.0
/*
 * I2C multiplexer
 *
 * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
 * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
 *
 * This module supports the PCA954x and PCA984x series of I2C multiplexer/switch
 * chips made by NXP Semiconductors.
 * This includes the:
 *	 PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547,
 *	 PCA9548, PCA9846, PCA9847, PCA9848 and PCA9849.
 *
 * These chips are all controlled via the I2C bus itself, and all have a
 * single 8-bit register. The upstream "parent" bus fans out to two,
 * four, or eight downstream busses or channels; which of these
 * are selected is determined by the chip type and register contents. A
 * mux can select only one sub-bus at a time; a switch can select any
 * combination simultaneously.
 *
 * Based on:
 *	pca954x.c from Kumar Gala <galak@kernel.crashing.org>
 * Copyright (C) 2006
 *
 * Based on:
 *	pca954x.c from Ken Harrenstien
 * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
 *
 * Based on:
 *	i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
 * and
 *	pca9540.c from Jean Delvare <jdelvare@suse.de>.
 */

#include <linux/device.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/i2c-mux.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <dt-bindings/mux/mux.h>

#define PCA954X_MAX_NCHANS 8

#define PCA954X_IRQ_OFFSET 4

enum pca_type {
	pca_9540,
	pca_9542,
	pca_9543,
	pca_9544,
	pca_9545,
	pca_9546,
	pca_9547,
	pca_9548,
	pca_9846,
	pca_9847,
	pca_9848,
	pca_9849,
};

struct chip_desc {
	u8 nchans;
	u8 enable;	/* used for muxes only */
	u8 has_irq;
	enum muxtype {
		pca954x_ismux = 0,
		pca954x_isswi
	} muxtype;
	struct i2c_device_identity id;
};

struct pca954x {
	const struct chip_desc *chip;

	u8 last_chan;		/* last register value */
	/* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
	s32 idle_state;

	struct i2c_client *client;

	struct irq_domain *irq;
	unsigned int irq_mask;
	raw_spinlock_t lock;
};

/* Provide specs for the PCA954x types we know about */
static const struct chip_desc chips[] = {
	[pca_9540] = {
		.nchans = 2,
		.enable = 0x4,
		.muxtype = pca954x_ismux,
		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
	},
	[pca_9542] = {
		.nchans = 2,
		.enable = 0x4,
		.has_irq = 1,
		.muxtype = pca954x_ismux,
		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
	},
	[pca_9543] = {
		.nchans = 2,
		.has_irq = 1,
		.muxtype = pca954x_isswi,
		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
	},
	[pca_9544] = {
		.nchans = 4,
		.enable = 0x4,
		.has_irq = 1,
		.muxtype = pca954x_ismux,
		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
	},
	[pca_9545] = {
		.nchans = 4,
		.has_irq = 1,
		.muxtype = pca954x_isswi,
		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
	},
	[pca_9546] = {
		.nchans = 4,
		.muxtype = pca954x_isswi,
		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
	},
	[pca_9547] = {
		.nchans = 8,
		.enable = 0x8,
		.muxtype = pca954x_ismux,
		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
	},
	[pca_9548] = {
		.nchans = 8,
		.muxtype = pca954x_isswi,
		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
	},
	[pca_9846] = {
		.nchans = 4,
		.muxtype = pca954x_isswi,
		.id = {
			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
			.part_id = 0x10b,
		},
	},
	[pca_9847] = {
		.nchans = 8,
		.enable = 0x8,
		.muxtype = pca954x_ismux,
		.id = {
			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
			.part_id = 0x108,
		},
	},
	[pca_9848] = {
		.nchans = 8,
		.muxtype = pca954x_isswi,
		.id = {
			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
			.part_id = 0x10a,
		},
	},
	[pca_9849] = {
		.nchans = 4,
		.enable = 0x4,
		.muxtype = pca954x_ismux,
		.id = {
			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
			.part_id = 0x109,
		},
	},
};

static const struct i2c_device_id pca954x_id[] = {
	{ "pca9540", pca_9540 },
	{ "pca9542", pca_9542 },
	{ "pca9543", pca_9543 },
	{ "pca9544", pca_9544 },
	{ "pca9545", pca_9545 },
	{ "pca9546", pca_9546 },
	{ "pca9547", pca_9547 },
	{ "pca9548", pca_9548 },
	{ "pca9846", pca_9846 },
	{ "pca9847", pca_9847 },
	{ "pca9848", pca_9848 },
	{ "pca9849", pca_9849 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, pca954x_id);

static const struct of_device_id pca954x_of_match[] = {
	{ .compatible = "nxp,pca9540", .data = &chips[pca_9540] },
	{ .compatible = "nxp,pca9542", .data = &chips[pca_9542] },
	{ .compatible = "nxp,pca9543", .data = &chips[pca_9543] },
	{ .compatible = "nxp,pca9544", .data = &chips[pca_9544] },
	{ .compatible = "nxp,pca9545", .data = &chips[pca_9545] },
	{ .compatible = "nxp,pca9546", .data = &chips[pca_9546] },
	{ .compatible = "nxp,pca9547", .data = &chips[pca_9547] },
	{ .compatible = "nxp,pca9548", .data = &chips[pca_9548] },
	{ .compatible = "nxp,pca9846", .data = &chips[pca_9846] },
	{ .compatible = "nxp,pca9847", .data = &chips[pca_9847] },
	{ .compatible = "nxp,pca9848", .data = &chips[pca_9848] },
	{ .compatible = "nxp,pca9849", .data = &chips[pca_9849] },
	{}
};
MODULE_DEVICE_TABLE(of, pca954x_of_match);

/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
   for this as they will try to lock adapter a second time */
static int pca954x_reg_write(struct i2c_adapter *adap,
			     struct i2c_client *client, u8 val)
{
	union i2c_smbus_data dummy;

	return __i2c_smbus_xfer(adap, client->addr, client->flags,
				I2C_SMBUS_WRITE, val,
				I2C_SMBUS_BYTE, &dummy);
}

static u8 pca954x_regval(struct pca954x *data, u8 chan)
{
	/* We make switches look like muxes, not sure how to be smarter. */
	if (data->chip->muxtype == pca954x_ismux)
		return chan | data->chip->enable;
	else
		return 1 << chan;
}

static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
{
	struct pca954x *data = i2c_mux_priv(muxc);
	struct i2c_client *client = data->client;
	u8 regval;
	int ret = 0;

	regval = pca954x_regval(data, chan);
	/* Only select the channel if its different from the last channel */
	if (data->last_chan != regval) {
		ret = pca954x_reg_write(muxc->parent, client, regval);
		data->last_chan = ret < 0 ? 0 : regval;
	}

	return ret;
}

static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
{
	struct pca954x *data = i2c_mux_priv(muxc);
	struct i2c_client *client = data->client;
	s32 idle_state;

	idle_state = READ_ONCE(data->idle_state);
	if (idle_state >= 0)
		/* Set the mux back to a predetermined channel */
		return pca954x_select_chan(muxc, idle_state);

	if (idle_state == MUX_IDLE_DISCONNECT) {
		/* Deselect active channel */
		data->last_chan = 0;
		return pca954x_reg_write(muxc->parent, client,
					 data->last_chan);
	}

	/* otherwise leave as-is */

	return 0;
}

static ssize_t idle_state_show(struct device *dev,
				    struct device_attribute *attr,
				    char *buf)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
	struct pca954x *data = i2c_mux_priv(muxc);

	return sprintf(buf, "%d\n", READ_ONCE(data->idle_state));
}

static ssize_t idle_state_store(struct device *dev,
				struct device_attribute *attr,
				const char *buf, size_t count)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
	struct pca954x *data = i2c_mux_priv(muxc);
	int val;
	int ret;

	ret = kstrtoint(buf, 0, &val);
	if (ret < 0)
		return ret;

	if (val != MUX_IDLE_AS_IS && val != MUX_IDLE_DISCONNECT &&
	    (val < 0 || val >= data->chip->nchans))
		return -EINVAL;

	i2c_lock_bus(muxc->parent, I2C_LOCK_SEGMENT);

	WRITE_ONCE(data->idle_state, val);
	/*
	 * Set the mux into a state consistent with the new
	 * idle_state.
	 */
	if (data->last_chan || val != MUX_IDLE_DISCONNECT)
		ret = pca954x_deselect_mux(muxc, 0);

	i2c_unlock_bus(muxc->parent, I2C_LOCK_SEGMENT);

	return ret < 0 ? ret : count;
}

static DEVICE_ATTR_RW(idle_state);

static irqreturn_t pca954x_irq_handler(int irq, void *dev_id)
{
	struct pca954x *data = dev_id;
	unsigned long pending;
	int ret, i;

	ret = i2c_smbus_read_byte(data->client);
	if (ret < 0)
		return IRQ_NONE;

	pending = (ret >> PCA954X_IRQ_OFFSET) & (BIT(data->chip->nchans) - 1);
	for_each_set_bit(i, &pending, data->chip->nchans)
		handle_nested_irq(irq_linear_revmap(data->irq, i));

	return IRQ_RETVAL(pending);
}

static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type)
{
	if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW)
		return -EINVAL;
	return 0;
}

static struct irq_chip pca954x_irq_chip = {
	.name = "i2c-mux-pca954x",
	.irq_set_type = pca954x_irq_set_type,
};

static int pca954x_irq_setup(struct i2c_mux_core *muxc)
{
	struct pca954x *data = i2c_mux_priv(muxc);
	struct i2c_client *client = data->client;
	int c, irq;

	if (!data->chip->has_irq || client->irq <= 0)
		return 0;

	raw_spin_lock_init(&data->lock);

	data->irq = irq_domain_add_linear(client->dev.of_node,
					  data->chip->nchans,
					  &irq_domain_simple_ops, data);
	if (!data->irq)
		return -ENODEV;

	for (c = 0; c < data->chip->nchans; c++) {
		irq = irq_create_mapping(data->irq, c);
		if (!irq) {
			dev_err(&client->dev, "failed irq create map\n");
			return -EINVAL;
		}
		irq_set_chip_data(irq, data);
		irq_set_chip_and_handler(irq, &pca954x_irq_chip,
			handle_simple_irq);
	}

	return 0;
}

static void pca954x_cleanup(struct i2c_mux_core *muxc)
{
	struct pca954x *data = i2c_mux_priv(muxc);
	int c, irq;

	if (data->irq) {
		for (c = 0; c < data->chip->nchans; c++) {
			irq = irq_find_mapping(data->irq, c);
			irq_dispose_mapping(irq);
		}
		irq_domain_remove(data->irq);
	}
	i2c_mux_del_adapters(muxc);
}

static int pca954x_init(struct i2c_client *client, struct pca954x *data)
{
	int ret;

	if (data->idle_state >= 0)
		data->last_chan = pca954x_regval(data, data->idle_state);
	else
		data->last_chan = 0; /* Disconnect multiplexer */

	ret = i2c_smbus_write_byte(client, data->last_chan);
	if (ret < 0)
		data->last_chan = 0;

	return ret;
}

/*
 * I2C init/probing/exit functions
 */
static int pca954x_probe(struct i2c_client *client)
{
	const struct i2c_device_id *id = i2c_client_get_device_id(client);
	struct i2c_adapter *adap = client->adapter;
	struct device *dev = &client->dev;
	struct gpio_desc *gpio;
	struct i2c_mux_core *muxc;
	struct pca954x *data;
	int num;
	int ret;

	if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
		return -ENODEV;

	muxc = i2c_mux_alloc(adap, dev, PCA954X_MAX_NCHANS, sizeof(*data), 0,
			     pca954x_select_chan, pca954x_deselect_mux);
	if (!muxc)
		return -ENOMEM;
	data = i2c_mux_priv(muxc);

	i2c_set_clientdata(client, muxc);
	data->client = client;

	/* Reset the mux if a reset GPIO is specified. */
	gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
	if (IS_ERR(gpio))
		return PTR_ERR(gpio);
	if (gpio) {
		udelay(1);
		gpiod_set_value_cansleep(gpio, 0);
		/* Give the chip some time to recover. */
		udelay(1);
	}

	data->chip = device_get_match_data(dev);
	if (!data->chip)
		data->chip = &chips[id->driver_data];

	if (data->chip->id.manufacturer_id != I2C_DEVICE_ID_NONE) {
		struct i2c_device_identity id;

		ret = i2c_get_device_id(client, &id);
		if (ret && ret != -EOPNOTSUPP)
			return ret;

		if (!ret &&
		    (id.manufacturer_id != data->chip->id.manufacturer_id ||
		     id.part_id != data->chip->id.part_id)) {
			dev_warn(dev, "unexpected device id %03x-%03x-%x\n",
				 id.manufacturer_id, id.part_id,
				 id.die_revision);
			return -ENODEV;
		}
	}

	data->idle_state = MUX_IDLE_AS_IS;
	if (device_property_read_u32(dev, "idle-state", &data->idle_state)) {
		if (device_property_read_bool(dev, "i2c-mux-idle-disconnect"))
			data->idle_state = MUX_IDLE_DISCONNECT;
	}

	/*
	 * Write the mux register at addr to verify
	 * that the mux is in fact present. This also
	 * initializes the mux to a channel
	 * or disconnected state.
	 */
	ret = pca954x_init(client, data);
	if (ret < 0) {
		dev_warn(dev, "probe failed\n");
		return -ENODEV;
	}

	ret = pca954x_irq_setup(muxc);
	if (ret)
		goto fail_cleanup;

	/* Now create an adapter for each channel */
	for (num = 0; num < data->chip->nchans; num++) {
		ret = i2c_mux_add_adapter(muxc, 0, num, 0);
		if (ret)
			goto fail_cleanup;
	}

	if (data->irq) {
		ret = devm_request_threaded_irq(dev, data->client->irq,
						NULL, pca954x_irq_handler,
						IRQF_ONESHOT | IRQF_SHARED,
						"pca954x", data);
		if (ret)
			goto fail_cleanup;
	}

	/*
	 * The attr probably isn't going to be needed in most cases,
	 * so don't fail completely on error.
	 */
	device_create_file(dev, &dev_attr_idle_state);

	dev_info(dev, "registered %d multiplexed busses for I2C %s %s\n",
		 num, data->chip->muxtype == pca954x_ismux
				? "mux" : "switch", client->name);

	return 0;

fail_cleanup:
	pca954x_cleanup(muxc);
	return ret;
}

static void pca954x_remove(struct i2c_client *client)
{
	struct i2c_mux_core *muxc = i2c_get_clientdata(client);

	device_remove_file(&client->dev, &dev_attr_idle_state);

	pca954x_cleanup(muxc);
}

#ifdef CONFIG_PM_SLEEP
static int pca954x_resume(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
	struct pca954x *data = i2c_mux_priv(muxc);
	int ret;

	ret = pca954x_init(client, data);
	if (ret < 0)
		dev_err(&client->dev, "failed to verify mux presence\n");

	return ret;
}
#endif

static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume);

static struct i2c_driver pca954x_driver = {
	.driver		= {
		.name	= "pca954x",
		.pm	= &pca954x_pm,
		.of_match_table = pca954x_of_match,
	},
	.probe		= pca954x_probe,
	.remove		= pca954x_remove,
	.id_table	= pca954x_id,
};

module_i2c_driver(pca954x_driver);

MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
MODULE_DESCRIPTION("PCA954x I2C mux/switch driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
40e31f0e	1	// SPDX-License-Identifier: GPL-2.0
7f528135 ML	2	/*
	3	* I2C multiplexer
	4	*
	5	* Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
	6	* Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
	7	*
40e31f0e	8	* This module supports the PCA954x and PCA984x series of I2C multiplexer/switch
8f6d6016	9	* chips made by NXP Semiconductors.
7f528135	10	* This includes the:
8f6d6016 AF	11	* PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547,
8f6d6016 AF	12	* PCA9548, PCA9846, PCA9847, PCA9848 and PCA9849.
7f528135 ML	13	*
	14	* These chips are all controlled via the I2C bus itself, and all have a
	15	* single 8-bit register. The upstream "parent" bus fans out to two,
	16	* four, or eight downstream busses or channels; which of these
	17	* are selected is determined by the chip type and register contents. A
	18	* mux can select only one sub-bus at a time; a switch can select any
	19	* combination simultaneously.
	20	*
	21	* Based on:
	22	* pca954x.c from Kumar Gala <galak@kernel.crashing.org>
	23	* Copyright (C) 2006
	24	*
	25	* Based on:
	26	* pca954x.c from Ken Harrenstien
	27	* Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
	28	*
	29	* Based on:
	30	* i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
	31	* and
7c81c60f	32	* pca9540.c from Jean Delvare <jdelvare@suse.de>.
7f528135 ML	33	*/
7f528135 ML	34
7f528135	35	#include <linux/device.h>
a2f8445d	36	#include <linux/delay.h>
642653d1	37	#include <linux/gpio/consumer.h>
7f528135 ML	38	#include <linux/i2c.h>
7f528135 ML	39	#include <linux/i2c-mux.h>
f2114795 PR	40	#include <linux/interrupt.h>
f2114795 PR	41	#include <linux/irq.h>
4b9b0073	42	#include <linux/module.h>
f5e596cd	43	#include <linux/pm.h>
753aa369	44	#include <linux/property.h>
4b9b0073	45	#include <linux/slab.h>
f2114795	46	#include <linux/spinlock.h>
f1fb64b0	47	#include <dt-bindings/mux/mux.h>
7f528135 ML	48
	49	#define PCA954X_MAX_NCHANS 8
	50
f2114795 PR	51	#define PCA954X_IRQ_OFFSET 4
f2114795 PR	52
7f528135 ML	53	enum pca_type {
	54	pca_9540,
	55	pca_9542,
	56	pca_9543,
	57	pca_9544,
	58	pca_9545,
	59	pca_9546,
	60	pca_9547,
	61	pca_9548,
8f6d6016 AF	62	pca_9846,
	63	pca_9847,
	64	pca_9848,
	65	pca_9849,
7f528135 ML	66	};
7f528135 ML	67
7f528135 ML	68	struct chip_desc {
	69	u8 nchans;
	70	u8 enable; /* used for muxes only */
f2114795	71	u8 has_irq;
7f528135 ML	72	enum muxtype {
	73	pca954x_ismux = 0,
	74	pca954x_isswi
	75	} muxtype;
2d74187d	76	struct i2c_device_identity id;
7f528135 ML	77	};
7f528135 ML	78
8a191a7a PR	79	struct pca954x {
	80	const struct chip_desc *chip;
	81
	82	u8 last_chan; /* last register value */
f1fb64b0	83	/* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
e65e228e	84	s32 idle_state;
f1fb64b0	85
8a191a7a	86	struct i2c_client *client;
f2114795 PR	87
	88	struct irq_domain *irq;
	89	unsigned int irq_mask;
743cc375	90	raw_spinlock_t lock;
8a191a7a PR	91	};
8a191a7a PR	92
7f528135 ML	93	/* Provide specs for the PCA954x types we know about */
	94	static const struct chip_desc chips[] = {
	95	[pca_9540] = {
	96	.nchans = 2,
	97	.enable = 0x4,
	98	.muxtype = pca954x_ismux,
2d74187d	99	.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
7f528135	100	},
f8251f1d PR	101	[pca_9542] = {
	102	.nchans = 2,
	103	.enable = 0x4,
f2114795	104	.has_irq = 1,
f8251f1d	105	.muxtype = pca954x_ismux,
2d74187d	106	.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
f8251f1d	107	},
7f528135 ML	108	[pca_9543] = {
7f528135 ML	109	.nchans = 2,
f2114795	110	.has_irq = 1,
7f528135	111	.muxtype = pca954x_isswi,
2d74187d	112	.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
7f528135 ML	113	},
	114	[pca_9544] = {
	115	.nchans = 4,
	116	.enable = 0x4,
f2114795	117	.has_irq = 1,
7f528135	118	.muxtype = pca954x_ismux,
2d74187d	119	.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
7f528135 ML	120	},
	121	[pca_9545] = {
	122	.nchans = 4,
f2114795	123	.has_irq = 1,
7f528135	124	.muxtype = pca954x_isswi,
2d74187d	125	.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
7f528135	126	},
dbe4d69d ML	127	[pca_9546] = {
	128	.nchans = 4,
	129	.muxtype = pca954x_isswi,
2d74187d	130	.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
dbe4d69d	131	},
7f528135 ML	132	[pca_9547] = {
	133	.nchans = 8,
	134	.enable = 0x8,
	135	.muxtype = pca954x_ismux,
2d74187d	136	.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
7f528135 ML	137	},
	138	[pca_9548] = {
	139	.nchans = 8,
	140	.muxtype = pca954x_isswi,
2d74187d	141	.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
7f528135	142	},
8f6d6016 AF	143	[pca_9846] = {
	144	.nchans = 4,
	145	.muxtype = pca954x_isswi,
2d74187d PR	146	.id = {
	147	.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
	148	.part_id = 0x10b,
	149	},
8f6d6016 AF	150	},
	151	[pca_9847] = {
	152	.nchans = 8,
	153	.enable = 0x8,
	154	.muxtype = pca954x_ismux,
2d74187d PR	155	.id = {
	156	.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
	157	.part_id = 0x108,
	158	},
8f6d6016 AF	159	},
	160	[pca_9848] = {
	161	.nchans = 8,
	162	.muxtype = pca954x_isswi,
2d74187d PR	163	.id = {
	164	.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
	165	.part_id = 0x10a,
	166	},
8f6d6016 AF	167	},
	168	[pca_9849] = {
	169	.nchans = 4,
	170	.enable = 0x4,
	171	.muxtype = pca954x_ismux,
2d74187d PR	172	.id = {
	173	.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
	174	.part_id = 0x109,
	175	},
8f6d6016	176	},
7f528135 ML	177	};
	178
	179	static const struct i2c_device_id pca954x_id[] = {
	180	{ "pca9540", pca_9540 },
f8251f1d	181	{ "pca9542", pca_9542 },
7f528135 ML	182	{ "pca9543", pca_9543 },
	183	{ "pca9544", pca_9544 },
	184	{ "pca9545", pca_9545 },
dbe4d69d	185	{ "pca9546", pca_9546 },
7f528135 ML	186	{ "pca9547", pca_9547 },
7f528135 ML	187	{ "pca9548", pca_9548 },
8f6d6016 AF	188	{ "pca9846", pca_9846 },
	189	{ "pca9847", pca_9847 },
	190	{ "pca9848", pca_9848 },
	191	{ "pca9849", pca_9849 },
7f528135 ML	192	{ }
	193	};
	194	MODULE_DEVICE_TABLE(i2c, pca954x_id);
	195
8a191a7a PR	196	static const struct of_device_id pca954x_of_match[] = {
	197	{ .compatible = "nxp,pca9540", .data = &chips[pca_9540] },
	198	{ .compatible = "nxp,pca9542", .data = &chips[pca_9542] },
	199	{ .compatible = "nxp,pca9543", .data = &chips[pca_9543] },
	200	{ .compatible = "nxp,pca9544", .data = &chips[pca_9544] },
	201	{ .compatible = "nxp,pca9545", .data = &chips[pca_9545] },
	202	{ .compatible = "nxp,pca9546", .data = &chips[pca_9546] },
	203	{ .compatible = "nxp,pca9547", .data = &chips[pca_9547] },
	204	{ .compatible = "nxp,pca9548", .data = &chips[pca_9548] },
8f6d6016 AF	205	{ .compatible = "nxp,pca9846", .data = &chips[pca_9846] },
	206	{ .compatible = "nxp,pca9847", .data = &chips[pca_9847] },
	207	{ .compatible = "nxp,pca9848", .data = &chips[pca_9848] },
	208	{ .compatible = "nxp,pca9849", .data = &chips[pca_9849] },
8a191a7a PR	209	{}
8a191a7a PR	210	};
acf6ef1d	211	MODULE_DEVICE_TABLE(of, pca954x_of_match);
8a191a7a	212
7f528135 ML	213	/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
	214	for this as they will try to lock adapter a second time */
	215	static int pca954x_reg_write(struct i2c_adapter *adap,
	216	struct i2c_client *client, u8 val)
	217	{
1bcb852f	218	union i2c_smbus_data dummy;
7f528135	219
1bcb852f PR	220	return __i2c_smbus_xfer(adap, client->addr, client->flags,
	221	I2C_SMBUS_WRITE, val,
	222	I2C_SMBUS_BYTE, &dummy);
7f528135 ML	223	}
7f528135 ML	224
e65e228e BL	225	static u8 pca954x_regval(struct pca954x *data, u8 chan)
	226	{
	227	/* We make switches look like muxes, not sure how to be smarter. */
	228	if (data->chip->muxtype == pca954x_ismux)
	229	return chan \| data->chip->enable;
	230	else
	231	return 1 << chan;
	232	}
	233
7fcac980	234	static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
7f528135	235	{
7fcac980 PR	236	struct pca954x *data = i2c_mux_priv(muxc);
7fcac980 PR	237	struct i2c_client *client = data->client;
7f528135 ML	238	u8 regval;
	239	int ret = 0;
	240
e65e228e	241	regval = pca954x_regval(data, chan);
7f528135 ML	242	/* Only select the channel if its different from the last channel */
7f528135 ML	243	if (data->last_chan != regval) {
7fcac980	244	ret = pca954x_reg_write(muxc->parent, client, regval);
7f638c1c	245	data->last_chan = ret < 0 ? 0 : regval;
7f528135 ML	246	}
	247
	248	return ret;
	249	}
	250
7fcac980	251	static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
7f528135	252	{
7fcac980 PR	253	struct pca954x *data = i2c_mux_priv(muxc);
7fcac980 PR	254	struct i2c_client *client = data->client;
e65e228e	255	s32 idle_state;
f1fb64b0 RS	256
	257	idle_state = READ_ONCE(data->idle_state);
	258	if (idle_state >= 0)
	259	/* Set the mux back to a predetermined channel */
	260	return pca954x_select_chan(muxc, idle_state);
	261
	262	if (idle_state == MUX_IDLE_DISCONNECT) {
	263	/* Deselect active channel */
	264	data->last_chan = 0;
	265	return pca954x_reg_write(muxc->parent, client,
	266	data->last_chan);
	267	}
7fcac980	268
f1fb64b0	269	/* otherwise leave as-is */
7f528135	270
f1fb64b0	271	return 0;
7f528135 ML	272	}
7f528135 ML	273
f1fb64b0 RS	274	static ssize_t idle_state_show(struct device *dev,
	275	struct device_attribute *attr,
	276	char *buf)
	277	{
	278	struct i2c_client *client = to_i2c_client(dev);
	279	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
	280	struct pca954x *data = i2c_mux_priv(muxc);
	281
	282	return sprintf(buf, "%d\n", READ_ONCE(data->idle_state));
	283	}
	284
	285	static ssize_t idle_state_store(struct device *dev,
	286	struct device_attribute *attr,
	287	const char *buf, size_t count)
	288	{
	289	struct i2c_client *client = to_i2c_client(dev);
	290	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
	291	struct pca954x *data = i2c_mux_priv(muxc);
	292	int val;
	293	int ret;
	294
	295	ret = kstrtoint(buf, 0, &val);
	296	if (ret < 0)
	297	return ret;
	298
	299	if (val != MUX_IDLE_AS_IS && val != MUX_IDLE_DISCONNECT &&
	300	(val < 0 \|\| val >= data->chip->nchans))
	301	return -EINVAL;
	302
	303	i2c_lock_bus(muxc->parent, I2C_LOCK_SEGMENT);
	304
	305	WRITE_ONCE(data->idle_state, val);
	306	/*
	307	* Set the mux into a state consistent with the new
	308	* idle_state.
	309	*/
	310	if (data->last_chan \|\| val != MUX_IDLE_DISCONNECT)
	311	ret = pca954x_deselect_mux(muxc, 0);
	312
	313	i2c_unlock_bus(muxc->parent, I2C_LOCK_SEGMENT);
	314
	315	return ret < 0 ? ret : count;
	316	}
	317
	318	static DEVICE_ATTR_RW(idle_state);
	319
f2114795 PR	320	static irqreturn_t pca954x_irq_handler(int irq, void *dev_id)
	321	{
	322	struct pca954x *data = dev_id;
19bb2227 AS	323	unsigned long pending;
19bb2227 AS	324	int ret, i;
f2114795 PR	325
	326	ret = i2c_smbus_read_byte(data->client);
	327	if (ret < 0)
	328	return IRQ_NONE;
	329
19bb2227 AS	330	pending = (ret >> PCA954X_IRQ_OFFSET) & (BIT(data->chip->nchans) - 1);
	331	for_each_set_bit(i, &pending, data->chip->nchans)
	332	handle_nested_irq(irq_linear_revmap(data->irq, i));
	333
	334	return IRQ_RETVAL(pending);
f2114795 PR	335	}
f2114795 PR	336
f2114795 PR	337	static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type)
	338	{
	339	if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW)
	340	return -EINVAL;
	341	return 0;
	342	}
	343
	344	static struct irq_chip pca954x_irq_chip = {
	345	.name = "i2c-mux-pca954x",
f2114795 PR	346	.irq_set_type = pca954x_irq_set_type,
	347	};
	348
	349	static int pca954x_irq_setup(struct i2c_mux_core *muxc)
	350	{
	351	struct pca954x *data = i2c_mux_priv(muxc);
	352	struct i2c_client *client = data->client;
148baf1d	353	int c, irq;
f2114795 PR	354
	355	if (!data->chip->has_irq \|\| client->irq <= 0)
	356	return 0;
	357
743cc375	358	raw_spin_lock_init(&data->lock);
f2114795 PR	359
	360	data->irq = irq_domain_add_linear(client->dev.of_node,
	361	data->chip->nchans,
	362	&irq_domain_simple_ops, data);
	363	if (!data->irq)
	364	return -ENODEV;
	365
	366	for (c = 0; c < data->chip->nchans; c++) {
	367	irq = irq_create_mapping(data->irq, c);
e460617e PR	368	if (!irq) {
	369	dev_err(&client->dev, "failed irq create map\n");
	370	return -EINVAL;
	371	}
f2114795 PR	372	irq_set_chip_data(irq, data);
	373	irq_set_chip_and_handler(irq, &pca954x_irq_chip,
	374	handle_simple_irq);
	375	}
	376
148baf1d PR	377	return 0;
148baf1d PR	378	}
f2114795	379
148baf1d PR	380	static void pca954x_cleanup(struct i2c_mux_core *muxc)
	381	{
	382	struct pca954x *data = i2c_mux_priv(muxc);
	383	int c, irq;
f2114795	384
148baf1d PR	385	if (data->irq) {
	386	for (c = 0; c < data->chip->nchans; c++) {
	387	irq = irq_find_mapping(data->irq, c);
	388	irq_dispose_mapping(irq);
	389	}
	390	irq_domain_remove(data->irq);
f2114795	391	}
148baf1d	392	i2c_mux_del_adapters(muxc);
f2114795 PR	393	}
f2114795 PR	394
e65e228e BL	395	static int pca954x_init(struct i2c_client client, struct pca954x data)
	396	{
	397	int ret;
	398
	399	if (data->idle_state >= 0)
	400	data->last_chan = pca954x_regval(data, data->idle_state);
	401	else
	402	data->last_chan = 0; /* Disconnect multiplexer */
	403
	404	ret = i2c_smbus_write_byte(client, data->last_chan);
	405	if (ret < 0)
	406	data->last_chan = 0;
	407
	408	return ret;
	409	}
	410
7f528135 ML	411	/*
	412	* I2C init/probing/exit functions
	413	*/
a5eacd2e	414	static int pca954x_probe(struct i2c_client *client)
7f528135	415	{
a5eacd2e	416	const struct i2c_device_id *id = i2c_client_get_device_id(client);
f2e08213	417	struct i2c_adapter *adap = client->adapter;
6856909c	418	struct device *dev = &client->dev;
4807e845	419	struct gpio_desc *gpio;
7fcac980	420	struct i2c_mux_core *muxc;
7f528135	421	struct pca954x *data;
ddd7c492	422	int num;
bc12cfc8	423	int ret;
7f528135 ML	424
7f528135 ML	425	if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
bc12cfc8	426	return -ENODEV;
7f528135	427
6856909c	428	muxc = i2c_mux_alloc(adap, dev, PCA954X_MAX_NCHANS, sizeof(*data), 0,
7fcac980 PR	429	pca954x_select_chan, pca954x_deselect_mux);
7fcac980 PR	430	if (!muxc)
bc12cfc8	431	return -ENOMEM;
7fcac980	432	data = i2c_mux_priv(muxc);
7f528135	433
7fcac980 PR	434	i2c_set_clientdata(client, muxc);
7fcac980 PR	435	data->client = client;
7f528135	436
a2f8445d	437	/* Reset the mux if a reset GPIO is specified. */
6856909c	438	gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
58b59e0f UKK	439	if (IS_ERR(gpio))
58b59e0f UKK	440	return PTR_ERR(gpio);
a2f8445d ML	441	if (gpio) {
	442	udelay(1);
	443	gpiod_set_value_cansleep(gpio, 0);
	444	/* Give the chip some time to recover. */
	445	udelay(1);
	446	}
12097957	447
753aa369	448	data->chip = device_get_match_data(dev);
b10d7a1f	449	if (!data->chip)
2d74187d PR	450	data->chip = &chips[id->driver_data];
	451
	452	if (data->chip->id.manufacturer_id != I2C_DEVICE_ID_NONE) {
	453	struct i2c_device_identity id;
	454
	455	ret = i2c_get_device_id(client, &id);
	456	if (ret && ret != -EOPNOTSUPP)
	457	return ret;
	458
	459	if (!ret &&
	460	(id.manufacturer_id != data->chip->id.manufacturer_id \|\|
	461	id.part_id != data->chip->id.part_id)) {
6856909c	462	dev_warn(dev, "unexpected device id %03x-%03x-%x\n",
2d74187d PR	463	id.manufacturer_id, id.part_id,
	464	id.die_revision);
	465	return -ENODEV;
	466	}
	467	}
	468
e65e228e	469	data->idle_state = MUX_IDLE_AS_IS;
753aa369 AS	470	if (device_property_read_u32(dev, "idle-state", &data->idle_state)) {
753aa369 AS	471	if (device_property_read_bool(dev, "i2c-mux-idle-disconnect"))
e65e228e BL	472	data->idle_state = MUX_IDLE_DISCONNECT;
	473	}
	474
	475	/*
	476	* Write the mux register at addr to verify
cd823db8	477	* that the mux is in fact present. This also
e65e228e BL	478	* initializes the mux to a channel
e65e228e BL	479	* or disconnected state.
7f528135	480	*/
e65e228e BL	481	ret = pca954x_init(client, data);
e65e228e BL	482	if (ret < 0) {
6856909c	483	dev_warn(dev, "probe failed\n");
bc12cfc8	484	return -ENODEV;
7f528135 ML	485	}
7f528135 ML	486
f2114795 PR	487	ret = pca954x_irq_setup(muxc);
f2114795 PR	488	if (ret)
148baf1d	489	goto fail_cleanup;
f2114795	490
7f528135	491	/* Now create an adapter for each channel */
8a191a7a	492	for (num = 0; num < data->chip->nchans; num++) {
ddd7c492	493	ret = i2c_mux_add_adapter(muxc, 0, num, 0);
0756ac32	494	if (ret)
148baf1d PR	495	goto fail_cleanup;
	496	}
	497
	498	if (data->irq) {
6856909c	499	ret = devm_request_threaded_irq(dev, data->client->irq,
148baf1d PR	500	NULL, pca954x_irq_handler,
	501	IRQF_ONESHOT \| IRQF_SHARED,
	502	"pca954x", data);
	503	if (ret)
	504	goto fail_cleanup;
7f528135 ML	505	}
7f528135 ML	506
f1fb64b0 RS	507	/*
	508	* The attr probably isn't going to be needed in most cases,
	509	* so don't fail completely on error.
	510	*/
	511	device_create_file(dev, &dev_attr_idle_state);
	512
6856909c	513	dev_info(dev, "registered %d multiplexed busses for I2C %s %s\n",
8a191a7a	514	num, data->chip->muxtype == pca954x_ismux
7f528135 ML	515	? "mux" : "switch", client->name);
	516
	517	return 0;
	518
148baf1d PR	519	fail_cleanup:
148baf1d PR	520	pca954x_cleanup(muxc);
7f528135 ML	521	return ret;
	522	}
	523
ed5c2f5f	524	static void pca954x_remove(struct i2c_client *client)
7f528135	525	{
7fcac980	526	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
f2114795	527
3093c641 AS	528	device_remove_file(&client->dev, &dev_attr_idle_state);
3093c641 AS	529
148baf1d	530	pca954x_cleanup(muxc);
7f528135 ML	531	}
7f528135 ML	532
f5e596cd JZ	533	#ifdef CONFIG_PM_SLEEP
	534	static int pca954x_resume(struct device *dev)
	535	{
	536	struct i2c_client *client = to_i2c_client(dev);
7fcac980 PR	537	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
7fcac980 PR	538	struct pca954x *data = i2c_mux_priv(muxc);
e65e228e	539	int ret;
f5e596cd	540
e65e228e BL	541	ret = pca954x_init(client, data);
	542	if (ret < 0)
	543	dev_err(&client->dev, "failed to verify mux presence\n");
	544
	545	return ret;
f5e596cd JZ	546	}
	547	#endif
	548
	549	static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume);
	550
7f528135 ML	551	static struct i2c_driver pca954x_driver = {
	552	.driver = {
	553	.name = "pca954x",
f5e596cd	554	.pm = &pca954x_pm,
753aa369	555	.of_match_table = pca954x_of_match,
7f528135	556	},
2f2afad9	557	.probe = pca954x_probe,
db79f2a1	558	.remove = pca954x_remove,
7f528135 ML	559	.id_table = pca954x_id,
	560	};
	561
de05497a	562	module_i2c_driver(pca954x_driver);
7f528135 ML	563
	564	MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
	565	MODULE_DESCRIPTION("PCA954x I2C mux/switch driver");
	566	MODULE_LICENSE("GPL v2");