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40e31f0e | 1 | // SPDX-License-Identifier: GPL-2.0 |
7f528135 ML |
2 | /* |
3 | * I2C multiplexer | |
4 | * | |
5 | * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it> | |
6 | * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it> | |
7 | * | |
40e31f0e | 8 | * This module supports the PCA954x and PCA984x series of I2C multiplexer/switch |
8f6d6016 | 9 | * chips made by NXP Semiconductors. |
7f528135 | 10 | * This includes the: |
8f6d6016 AF |
11 | * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547, |
12 | * PCA9548, PCA9846, PCA9847, PCA9848 and PCA9849. | |
7f528135 | 13 | * |
81694437 PR |
14 | * It's also compatible to Maxims MAX735x I2C switch chips, which are controlled |
15 | * as the NXP PCA9548 and the MAX736x chips that act like the PCA9544. | |
16 | * | |
17 | * This includes the: | |
18 | * MAX7356, MAX7357, MAX7358, MAX7367, MAX7368 and MAX7369 | |
19 | * | |
7f528135 ML |
20 | * These chips are all controlled via the I2C bus itself, and all have a |
21 | * single 8-bit register. The upstream "parent" bus fans out to two, | |
22 | * four, or eight downstream busses or channels; which of these | |
23 | * are selected is determined by the chip type and register contents. A | |
24 | * mux can select only one sub-bus at a time; a switch can select any | |
25 | * combination simultaneously. | |
26 | * | |
27 | * Based on: | |
28 | * pca954x.c from Kumar Gala <galak@kernel.crashing.org> | |
29 | * Copyright (C) 2006 | |
30 | * | |
31 | * Based on: | |
32 | * pca954x.c from Ken Harrenstien | |
33 | * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) | |
34 | * | |
35 | * Based on: | |
36 | * i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com> | |
37 | * and | |
7c81c60f | 38 | * pca9540.c from Jean Delvare <jdelvare@suse.de>. |
7f528135 ML |
39 | */ |
40 | ||
7f528135 | 41 | #include <linux/device.h> |
a2f8445d | 42 | #include <linux/delay.h> |
642653d1 | 43 | #include <linux/gpio/consumer.h> |
7f528135 ML |
44 | #include <linux/i2c.h> |
45 | #include <linux/i2c-mux.h> | |
f2114795 PR |
46 | #include <linux/interrupt.h> |
47 | #include <linux/irq.h> | |
4b9b0073 | 48 | #include <linux/module.h> |
f5e596cd | 49 | #include <linux/pm.h> |
753aa369 | 50 | #include <linux/property.h> |
6c30ac91 | 51 | #include <linux/regulator/consumer.h> |
b7b73f6d | 52 | #include <linux/reset.h> |
4b9b0073 | 53 | #include <linux/slab.h> |
f2114795 | 54 | #include <linux/spinlock.h> |
f1fb64b0 | 55 | #include <dt-bindings/mux/mux.h> |
7f528135 ML |
56 | |
57 | #define PCA954X_MAX_NCHANS 8 | |
58 | ||
f2114795 PR |
59 | #define PCA954X_IRQ_OFFSET 4 |
60 | ||
df7cbce4 PR |
61 | /* |
62 | * MAX7357's configuration register is writeable after POR, but | |
63 | * can be locked by setting the basic mode bit. MAX7358 configuration | |
64 | * register is locked by default and needs to be unlocked first. | |
65 | * The configuration register holds the following settings: | |
66 | */ | |
67 | #define MAX7357_CONF_INT_ENABLE BIT(0) | |
68 | #define MAX7357_CONF_FLUSH_OUT BIT(1) | |
69 | #define MAX7357_CONF_RELEASE_INT BIT(2) | |
70 | #define MAX7357_CONF_DISCON_SINGLE_CHAN BIT(4) | |
71 | #define MAX7357_CONF_PRECONNECT_TEST BIT(7) | |
72 | ||
73 | #define MAX7357_POR_DEFAULT_CONF MAX7357_CONF_INT_ENABLE | |
74 | ||
7f528135 | 75 | enum pca_type { |
81694437 PR |
76 | max_7356, |
77 | max_7357, | |
78 | max_7358, | |
79 | max_7367, | |
80 | max_7368, | |
81 | max_7369, | |
7f528135 ML |
82 | pca_9540, |
83 | pca_9542, | |
84 | pca_9543, | |
85 | pca_9544, | |
86 | pca_9545, | |
87 | pca_9546, | |
88 | pca_9547, | |
89 | pca_9548, | |
8f6d6016 AF |
90 | pca_9846, |
91 | pca_9847, | |
92 | pca_9848, | |
93 | pca_9849, | |
7f528135 ML |
94 | }; |
95 | ||
7f528135 ML |
96 | struct chip_desc { |
97 | u8 nchans; | |
98 | u8 enable; /* used for muxes only */ | |
f2114795 | 99 | u8 has_irq; |
7f528135 ML |
100 | enum muxtype { |
101 | pca954x_ismux = 0, | |
102 | pca954x_isswi | |
103 | } muxtype; | |
2d74187d | 104 | struct i2c_device_identity id; |
7f528135 ML |
105 | }; |
106 | ||
8a191a7a PR |
107 | struct pca954x { |
108 | const struct chip_desc *chip; | |
109 | ||
110 | u8 last_chan; /* last register value */ | |
f1fb64b0 | 111 | /* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */ |
e65e228e | 112 | s32 idle_state; |
f1fb64b0 | 113 | |
8a191a7a | 114 | struct i2c_client *client; |
f2114795 PR |
115 | |
116 | struct irq_domain *irq; | |
117 | unsigned int irq_mask; | |
743cc375 | 118 | raw_spinlock_t lock; |
6c30ac91 | 119 | struct regulator *supply; |
b7b73f6d CP |
120 | |
121 | struct gpio_desc *reset_gpio; | |
122 | struct reset_control *reset_cont; | |
8a191a7a PR |
123 | }; |
124 | ||
81694437 | 125 | /* Provide specs for the MAX735x, PCA954x and PCA984x types we know about */ |
7f528135 | 126 | static const struct chip_desc chips[] = { |
81694437 PR |
127 | [max_7356] = { |
128 | .nchans = 8, | |
129 | .muxtype = pca954x_isswi, | |
130 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, | |
131 | }, | |
132 | [max_7357] = { | |
133 | .nchans = 8, | |
134 | .muxtype = pca954x_isswi, | |
135 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, | |
136 | /* | |
137 | * No interrupt controller support. The interrupt | |
138 | * provides information about stuck channels. | |
139 | */ | |
140 | }, | |
141 | [max_7358] = { | |
142 | .nchans = 8, | |
143 | .muxtype = pca954x_isswi, | |
144 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, | |
145 | /* | |
146 | * No interrupt controller support. The interrupt | |
147 | * provides information about stuck channels. | |
148 | */ | |
149 | }, | |
150 | [max_7367] = { | |
151 | .nchans = 4, | |
152 | .muxtype = pca954x_isswi, | |
153 | .has_irq = 1, | |
154 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, | |
155 | }, | |
156 | [max_7368] = { | |
157 | .nchans = 4, | |
158 | .muxtype = pca954x_isswi, | |
159 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, | |
160 | }, | |
161 | [max_7369] = { | |
162 | .nchans = 4, | |
163 | .enable = 0x4, | |
164 | .muxtype = pca954x_ismux, | |
165 | .has_irq = 1, | |
166 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, | |
167 | }, | |
7f528135 ML |
168 | [pca_9540] = { |
169 | .nchans = 2, | |
170 | .enable = 0x4, | |
171 | .muxtype = pca954x_ismux, | |
2d74187d | 172 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, |
7f528135 | 173 | }, |
f8251f1d PR |
174 | [pca_9542] = { |
175 | .nchans = 2, | |
176 | .enable = 0x4, | |
f2114795 | 177 | .has_irq = 1, |
f8251f1d | 178 | .muxtype = pca954x_ismux, |
2d74187d | 179 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, |
f8251f1d | 180 | }, |
7f528135 ML |
181 | [pca_9543] = { |
182 | .nchans = 2, | |
f2114795 | 183 | .has_irq = 1, |
7f528135 | 184 | .muxtype = pca954x_isswi, |
2d74187d | 185 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, |
7f528135 ML |
186 | }, |
187 | [pca_9544] = { | |
188 | .nchans = 4, | |
189 | .enable = 0x4, | |
f2114795 | 190 | .has_irq = 1, |
7f528135 | 191 | .muxtype = pca954x_ismux, |
2d74187d | 192 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, |
7f528135 ML |
193 | }, |
194 | [pca_9545] = { | |
195 | .nchans = 4, | |
f2114795 | 196 | .has_irq = 1, |
7f528135 | 197 | .muxtype = pca954x_isswi, |
2d74187d | 198 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, |
7f528135 | 199 | }, |
dbe4d69d ML |
200 | [pca_9546] = { |
201 | .nchans = 4, | |
202 | .muxtype = pca954x_isswi, | |
2d74187d | 203 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, |
dbe4d69d | 204 | }, |
7f528135 ML |
205 | [pca_9547] = { |
206 | .nchans = 8, | |
207 | .enable = 0x8, | |
208 | .muxtype = pca954x_ismux, | |
2d74187d | 209 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, |
7f528135 ML |
210 | }, |
211 | [pca_9548] = { | |
212 | .nchans = 8, | |
213 | .muxtype = pca954x_isswi, | |
2d74187d | 214 | .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, |
7f528135 | 215 | }, |
8f6d6016 AF |
216 | [pca_9846] = { |
217 | .nchans = 4, | |
218 | .muxtype = pca954x_isswi, | |
2d74187d PR |
219 | .id = { |
220 | .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, | |
221 | .part_id = 0x10b, | |
222 | }, | |
8f6d6016 AF |
223 | }, |
224 | [pca_9847] = { | |
225 | .nchans = 8, | |
226 | .enable = 0x8, | |
227 | .muxtype = pca954x_ismux, | |
2d74187d PR |
228 | .id = { |
229 | .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, | |
230 | .part_id = 0x108, | |
231 | }, | |
8f6d6016 AF |
232 | }, |
233 | [pca_9848] = { | |
234 | .nchans = 8, | |
235 | .muxtype = pca954x_isswi, | |
2d74187d PR |
236 | .id = { |
237 | .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, | |
238 | .part_id = 0x10a, | |
239 | }, | |
8f6d6016 AF |
240 | }, |
241 | [pca_9849] = { | |
242 | .nchans = 4, | |
243 | .enable = 0x4, | |
244 | .muxtype = pca954x_ismux, | |
2d74187d PR |
245 | .id = { |
246 | .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, | |
247 | .part_id = 0x109, | |
248 | }, | |
8f6d6016 | 249 | }, |
7f528135 ML |
250 | }; |
251 | ||
252 | static const struct i2c_device_id pca954x_id[] = { | |
81694437 PR |
253 | { "max7356", max_7356 }, |
254 | { "max7357", max_7357 }, | |
255 | { "max7358", max_7358 }, | |
256 | { "max7367", max_7367 }, | |
257 | { "max7368", max_7368 }, | |
258 | { "max7369", max_7369 }, | |
7f528135 | 259 | { "pca9540", pca_9540 }, |
f8251f1d | 260 | { "pca9542", pca_9542 }, |
7f528135 ML |
261 | { "pca9543", pca_9543 }, |
262 | { "pca9544", pca_9544 }, | |
263 | { "pca9545", pca_9545 }, | |
dbe4d69d | 264 | { "pca9546", pca_9546 }, |
7f528135 ML |
265 | { "pca9547", pca_9547 }, |
266 | { "pca9548", pca_9548 }, | |
8f6d6016 AF |
267 | { "pca9846", pca_9846 }, |
268 | { "pca9847", pca_9847 }, | |
269 | { "pca9848", pca_9848 }, | |
270 | { "pca9849", pca_9849 }, | |
7f528135 ML |
271 | { } |
272 | }; | |
273 | MODULE_DEVICE_TABLE(i2c, pca954x_id); | |
274 | ||
8a191a7a | 275 | static const struct of_device_id pca954x_of_match[] = { |
81694437 PR |
276 | { .compatible = "maxim,max7356", .data = &chips[max_7356] }, |
277 | { .compatible = "maxim,max7357", .data = &chips[max_7357] }, | |
278 | { .compatible = "maxim,max7358", .data = &chips[max_7358] }, | |
279 | { .compatible = "maxim,max7367", .data = &chips[max_7367] }, | |
280 | { .compatible = "maxim,max7368", .data = &chips[max_7368] }, | |
281 | { .compatible = "maxim,max7369", .data = &chips[max_7369] }, | |
8a191a7a PR |
282 | { .compatible = "nxp,pca9540", .data = &chips[pca_9540] }, |
283 | { .compatible = "nxp,pca9542", .data = &chips[pca_9542] }, | |
284 | { .compatible = "nxp,pca9543", .data = &chips[pca_9543] }, | |
285 | { .compatible = "nxp,pca9544", .data = &chips[pca_9544] }, | |
286 | { .compatible = "nxp,pca9545", .data = &chips[pca_9545] }, | |
287 | { .compatible = "nxp,pca9546", .data = &chips[pca_9546] }, | |
288 | { .compatible = "nxp,pca9547", .data = &chips[pca_9547] }, | |
289 | { .compatible = "nxp,pca9548", .data = &chips[pca_9548] }, | |
8f6d6016 AF |
290 | { .compatible = "nxp,pca9846", .data = &chips[pca_9846] }, |
291 | { .compatible = "nxp,pca9847", .data = &chips[pca_9847] }, | |
292 | { .compatible = "nxp,pca9848", .data = &chips[pca_9848] }, | |
293 | { .compatible = "nxp,pca9849", .data = &chips[pca_9849] }, | |
8a191a7a PR |
294 | {} |
295 | }; | |
acf6ef1d | 296 | MODULE_DEVICE_TABLE(of, pca954x_of_match); |
8a191a7a | 297 | |
7f528135 ML |
298 | /* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() |
299 | for this as they will try to lock adapter a second time */ | |
300 | static int pca954x_reg_write(struct i2c_adapter *adap, | |
301 | struct i2c_client *client, u8 val) | |
302 | { | |
1bcb852f | 303 | union i2c_smbus_data dummy; |
7f528135 | 304 | |
1bcb852f PR |
305 | return __i2c_smbus_xfer(adap, client->addr, client->flags, |
306 | I2C_SMBUS_WRITE, val, | |
307 | I2C_SMBUS_BYTE, &dummy); | |
7f528135 ML |
308 | } |
309 | ||
e65e228e BL |
310 | static u8 pca954x_regval(struct pca954x *data, u8 chan) |
311 | { | |
312 | /* We make switches look like muxes, not sure how to be smarter. */ | |
313 | if (data->chip->muxtype == pca954x_ismux) | |
314 | return chan | data->chip->enable; | |
315 | else | |
316 | return 1 << chan; | |
317 | } | |
318 | ||
7fcac980 | 319 | static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan) |
7f528135 | 320 | { |
7fcac980 PR |
321 | struct pca954x *data = i2c_mux_priv(muxc); |
322 | struct i2c_client *client = data->client; | |
7f528135 ML |
323 | u8 regval; |
324 | int ret = 0; | |
325 | ||
e65e228e | 326 | regval = pca954x_regval(data, chan); |
7f528135 ML |
327 | /* Only select the channel if its different from the last channel */ |
328 | if (data->last_chan != regval) { | |
7fcac980 | 329 | ret = pca954x_reg_write(muxc->parent, client, regval); |
7f638c1c | 330 | data->last_chan = ret < 0 ? 0 : regval; |
7f528135 ML |
331 | } |
332 | ||
333 | return ret; | |
334 | } | |
335 | ||
7fcac980 | 336 | static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan) |
7f528135 | 337 | { |
7fcac980 PR |
338 | struct pca954x *data = i2c_mux_priv(muxc); |
339 | struct i2c_client *client = data->client; | |
e65e228e | 340 | s32 idle_state; |
f1fb64b0 RS |
341 | |
342 | idle_state = READ_ONCE(data->idle_state); | |
343 | if (idle_state >= 0) | |
344 | /* Set the mux back to a predetermined channel */ | |
345 | return pca954x_select_chan(muxc, idle_state); | |
346 | ||
347 | if (idle_state == MUX_IDLE_DISCONNECT) { | |
348 | /* Deselect active channel */ | |
349 | data->last_chan = 0; | |
350 | return pca954x_reg_write(muxc->parent, client, | |
351 | data->last_chan); | |
352 | } | |
7fcac980 | 353 | |
f1fb64b0 | 354 | /* otherwise leave as-is */ |
7f528135 | 355 | |
f1fb64b0 | 356 | return 0; |
7f528135 ML |
357 | } |
358 | ||
f1fb64b0 RS |
359 | static ssize_t idle_state_show(struct device *dev, |
360 | struct device_attribute *attr, | |
361 | char *buf) | |
362 | { | |
363 | struct i2c_client *client = to_i2c_client(dev); | |
364 | struct i2c_mux_core *muxc = i2c_get_clientdata(client); | |
365 | struct pca954x *data = i2c_mux_priv(muxc); | |
366 | ||
367 | return sprintf(buf, "%d\n", READ_ONCE(data->idle_state)); | |
368 | } | |
369 | ||
370 | static ssize_t idle_state_store(struct device *dev, | |
371 | struct device_attribute *attr, | |
372 | const char *buf, size_t count) | |
373 | { | |
374 | struct i2c_client *client = to_i2c_client(dev); | |
375 | struct i2c_mux_core *muxc = i2c_get_clientdata(client); | |
376 | struct pca954x *data = i2c_mux_priv(muxc); | |
377 | int val; | |
378 | int ret; | |
379 | ||
380 | ret = kstrtoint(buf, 0, &val); | |
381 | if (ret < 0) | |
382 | return ret; | |
383 | ||
384 | if (val != MUX_IDLE_AS_IS && val != MUX_IDLE_DISCONNECT && | |
385 | (val < 0 || val >= data->chip->nchans)) | |
386 | return -EINVAL; | |
387 | ||
388 | i2c_lock_bus(muxc->parent, I2C_LOCK_SEGMENT); | |
389 | ||
390 | WRITE_ONCE(data->idle_state, val); | |
391 | /* | |
392 | * Set the mux into a state consistent with the new | |
393 | * idle_state. | |
394 | */ | |
395 | if (data->last_chan || val != MUX_IDLE_DISCONNECT) | |
396 | ret = pca954x_deselect_mux(muxc, 0); | |
397 | ||
398 | i2c_unlock_bus(muxc->parent, I2C_LOCK_SEGMENT); | |
399 | ||
400 | return ret < 0 ? ret : count; | |
401 | } | |
402 | ||
403 | static DEVICE_ATTR_RW(idle_state); | |
404 | ||
f2114795 PR |
405 | static irqreturn_t pca954x_irq_handler(int irq, void *dev_id) |
406 | { | |
407 | struct pca954x *data = dev_id; | |
19bb2227 AS |
408 | unsigned long pending; |
409 | int ret, i; | |
f2114795 PR |
410 | |
411 | ret = i2c_smbus_read_byte(data->client); | |
412 | if (ret < 0) | |
413 | return IRQ_NONE; | |
414 | ||
19bb2227 AS |
415 | pending = (ret >> PCA954X_IRQ_OFFSET) & (BIT(data->chip->nchans) - 1); |
416 | for_each_set_bit(i, &pending, data->chip->nchans) | |
417 | handle_nested_irq(irq_linear_revmap(data->irq, i)); | |
418 | ||
419 | return IRQ_RETVAL(pending); | |
f2114795 PR |
420 | } |
421 | ||
f2114795 PR |
422 | static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type) |
423 | { | |
424 | if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW) | |
425 | return -EINVAL; | |
426 | return 0; | |
427 | } | |
428 | ||
429 | static struct irq_chip pca954x_irq_chip = { | |
430 | .name = "i2c-mux-pca954x", | |
f2114795 PR |
431 | .irq_set_type = pca954x_irq_set_type, |
432 | }; | |
433 | ||
434 | static int pca954x_irq_setup(struct i2c_mux_core *muxc) | |
435 | { | |
436 | struct pca954x *data = i2c_mux_priv(muxc); | |
437 | struct i2c_client *client = data->client; | |
148baf1d | 438 | int c, irq; |
f2114795 PR |
439 | |
440 | if (!data->chip->has_irq || client->irq <= 0) | |
441 | return 0; | |
442 | ||
743cc375 | 443 | raw_spin_lock_init(&data->lock); |
f2114795 PR |
444 | |
445 | data->irq = irq_domain_add_linear(client->dev.of_node, | |
446 | data->chip->nchans, | |
447 | &irq_domain_simple_ops, data); | |
448 | if (!data->irq) | |
449 | return -ENODEV; | |
450 | ||
451 | for (c = 0; c < data->chip->nchans; c++) { | |
452 | irq = irq_create_mapping(data->irq, c); | |
e460617e PR |
453 | if (!irq) { |
454 | dev_err(&client->dev, "failed irq create map\n"); | |
455 | return -EINVAL; | |
456 | } | |
f2114795 PR |
457 | irq_set_chip_data(irq, data); |
458 | irq_set_chip_and_handler(irq, &pca954x_irq_chip, | |
459 | handle_simple_irq); | |
460 | } | |
461 | ||
148baf1d PR |
462 | return 0; |
463 | } | |
f2114795 | 464 | |
148baf1d PR |
465 | static void pca954x_cleanup(struct i2c_mux_core *muxc) |
466 | { | |
467 | struct pca954x *data = i2c_mux_priv(muxc); | |
468 | int c, irq; | |
f2114795 | 469 | |
6c30ac91 PR |
470 | regulator_disable(data->supply); |
471 | ||
148baf1d PR |
472 | if (data->irq) { |
473 | for (c = 0; c < data->chip->nchans; c++) { | |
474 | irq = irq_find_mapping(data->irq, c); | |
475 | irq_dispose_mapping(irq); | |
476 | } | |
477 | irq_domain_remove(data->irq); | |
f2114795 | 478 | } |
148baf1d | 479 | i2c_mux_del_adapters(muxc); |
f2114795 PR |
480 | } |
481 | ||
e65e228e BL |
482 | static int pca954x_init(struct i2c_client *client, struct pca954x *data) |
483 | { | |
484 | int ret; | |
485 | ||
486 | if (data->idle_state >= 0) | |
487 | data->last_chan = pca954x_regval(data, data->idle_state); | |
488 | else | |
489 | data->last_chan = 0; /* Disconnect multiplexer */ | |
490 | ||
df7cbce4 PR |
491 | if (device_is_compatible(&client->dev, "maxim,max7357")) { |
492 | if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { | |
493 | u8 conf = MAX7357_POR_DEFAULT_CONF; | |
494 | /* | |
495 | * The interrupt signal is shared with the reset pin. Release the | |
496 | * interrupt after 1.6 seconds to allow using the pin as reset. | |
497 | */ | |
498 | conf |= MAX7357_CONF_RELEASE_INT; | |
499 | ||
500 | if (device_property_read_bool(&client->dev, "maxim,isolate-stuck-channel")) | |
501 | conf |= MAX7357_CONF_DISCON_SINGLE_CHAN; | |
502 | if (device_property_read_bool(&client->dev, | |
503 | "maxim,send-flush-out-sequence")) | |
504 | conf |= MAX7357_CONF_FLUSH_OUT; | |
505 | if (device_property_read_bool(&client->dev, | |
506 | "maxim,preconnection-wiggle-test-enable")) | |
507 | conf |= MAX7357_CONF_PRECONNECT_TEST; | |
508 | ||
509 | ret = i2c_smbus_write_byte_data(client, data->last_chan, conf); | |
510 | } else { | |
511 | dev_warn(&client->dev, "Write byte data not supported." | |
512 | "Cannot enable enhanced mode features\n"); | |
513 | ret = i2c_smbus_write_byte(client, data->last_chan); | |
514 | } | |
515 | } else { | |
516 | ret = i2c_smbus_write_byte(client, data->last_chan); | |
517 | } | |
518 | ||
e65e228e BL |
519 | if (ret < 0) |
520 | data->last_chan = 0; | |
521 | ||
522 | return ret; | |
523 | } | |
524 | ||
b7b73f6d CP |
525 | static int pca954x_get_reset(struct device *dev, struct pca954x *data) |
526 | { | |
527 | data->reset_cont = devm_reset_control_get_optional_shared(dev, NULL); | |
528 | if (IS_ERR(data->reset_cont)) | |
529 | return dev_err_probe(dev, PTR_ERR(data->reset_cont), | |
530 | "Failed to get reset\n"); | |
531 | else if (data->reset_cont) | |
532 | return 0; | |
533 | ||
534 | /* | |
535 | * fallback to legacy reset-gpios | |
536 | */ | |
537 | data->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); | |
538 | if (IS_ERR(data->reset_gpio)) { | |
539 | return dev_err_probe(dev, PTR_ERR(data->reset_gpio), | |
540 | "Failed to get reset gpio"); | |
541 | } | |
542 | ||
543 | return 0; | |
544 | } | |
545 | ||
546 | static void pca954x_reset_deassert(struct pca954x *data) | |
547 | { | |
548 | if (data->reset_cont) | |
549 | reset_control_deassert(data->reset_cont); | |
550 | else | |
551 | gpiod_set_value_cansleep(data->reset_gpio, 0); | |
552 | } | |
553 | ||
7f528135 ML |
554 | /* |
555 | * I2C init/probing/exit functions | |
556 | */ | |
a5eacd2e | 557 | static int pca954x_probe(struct i2c_client *client) |
7f528135 | 558 | { |
a5eacd2e | 559 | const struct i2c_device_id *id = i2c_client_get_device_id(client); |
f2e08213 | 560 | struct i2c_adapter *adap = client->adapter; |
6856909c | 561 | struct device *dev = &client->dev; |
7fcac980 | 562 | struct i2c_mux_core *muxc; |
7f528135 | 563 | struct pca954x *data; |
ddd7c492 | 564 | int num; |
bc12cfc8 | 565 | int ret; |
7f528135 ML |
566 | |
567 | if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) | |
bc12cfc8 | 568 | return -ENODEV; |
7f528135 | 569 | |
6856909c | 570 | muxc = i2c_mux_alloc(adap, dev, PCA954X_MAX_NCHANS, sizeof(*data), 0, |
7fcac980 PR |
571 | pca954x_select_chan, pca954x_deselect_mux); |
572 | if (!muxc) | |
bc12cfc8 | 573 | return -ENOMEM; |
7fcac980 | 574 | data = i2c_mux_priv(muxc); |
7f528135 | 575 | |
7fcac980 PR |
576 | i2c_set_clientdata(client, muxc); |
577 | data->client = client; | |
7f528135 | 578 | |
6c30ac91 PR |
579 | data->supply = devm_regulator_get(dev, "vdd"); |
580 | if (IS_ERR(data->supply)) | |
581 | return dev_err_probe(dev, PTR_ERR(data->supply), | |
582 | "Failed to request regulator\n"); | |
583 | ||
584 | ret = regulator_enable(data->supply); | |
585 | if (ret) | |
586 | return dev_err_probe(dev, ret, | |
587 | "Failed to enable vdd supply\n"); | |
588 | ||
b7b73f6d CP |
589 | ret = pca954x_get_reset(dev, data); |
590 | if (ret) | |
6c30ac91 | 591 | goto fail_cleanup; |
b7b73f6d CP |
592 | |
593 | if (data->reset_cont || data->reset_gpio) { | |
a2f8445d | 594 | udelay(1); |
b7b73f6d | 595 | pca954x_reset_deassert(data); |
a2f8445d ML |
596 | /* Give the chip some time to recover. */ |
597 | udelay(1); | |
598 | } | |
12097957 | 599 | |
753aa369 | 600 | data->chip = device_get_match_data(dev); |
b10d7a1f | 601 | if (!data->chip) |
2d74187d PR |
602 | data->chip = &chips[id->driver_data]; |
603 | ||
604 | if (data->chip->id.manufacturer_id != I2C_DEVICE_ID_NONE) { | |
605 | struct i2c_device_identity id; | |
606 | ||
607 | ret = i2c_get_device_id(client, &id); | |
608 | if (ret && ret != -EOPNOTSUPP) | |
6c30ac91 | 609 | goto fail_cleanup; |
2d74187d PR |
610 | |
611 | if (!ret && | |
612 | (id.manufacturer_id != data->chip->id.manufacturer_id || | |
613 | id.part_id != data->chip->id.part_id)) { | |
6856909c | 614 | dev_warn(dev, "unexpected device id %03x-%03x-%x\n", |
2d74187d PR |
615 | id.manufacturer_id, id.part_id, |
616 | id.die_revision); | |
6c30ac91 PR |
617 | ret = -ENODEV; |
618 | goto fail_cleanup; | |
2d74187d PR |
619 | } |
620 | } | |
621 | ||
e65e228e | 622 | data->idle_state = MUX_IDLE_AS_IS; |
753aa369 AS |
623 | if (device_property_read_u32(dev, "idle-state", &data->idle_state)) { |
624 | if (device_property_read_bool(dev, "i2c-mux-idle-disconnect")) | |
e65e228e BL |
625 | data->idle_state = MUX_IDLE_DISCONNECT; |
626 | } | |
627 | ||
628 | /* | |
629 | * Write the mux register at addr to verify | |
cd823db8 | 630 | * that the mux is in fact present. This also |
e65e228e BL |
631 | * initializes the mux to a channel |
632 | * or disconnected state. | |
7f528135 | 633 | */ |
e65e228e BL |
634 | ret = pca954x_init(client, data); |
635 | if (ret < 0) { | |
6856909c | 636 | dev_warn(dev, "probe failed\n"); |
6c30ac91 PR |
637 | ret = -ENODEV; |
638 | goto fail_cleanup; | |
7f528135 ML |
639 | } |
640 | ||
f2114795 PR |
641 | ret = pca954x_irq_setup(muxc); |
642 | if (ret) | |
148baf1d | 643 | goto fail_cleanup; |
f2114795 | 644 | |
7f528135 | 645 | /* Now create an adapter for each channel */ |
8a191a7a | 646 | for (num = 0; num < data->chip->nchans; num++) { |
fec1982d | 647 | ret = i2c_mux_add_adapter(muxc, 0, num); |
0756ac32 | 648 | if (ret) |
148baf1d PR |
649 | goto fail_cleanup; |
650 | } | |
651 | ||
652 | if (data->irq) { | |
6856909c | 653 | ret = devm_request_threaded_irq(dev, data->client->irq, |
148baf1d PR |
654 | NULL, pca954x_irq_handler, |
655 | IRQF_ONESHOT | IRQF_SHARED, | |
656 | "pca954x", data); | |
657 | if (ret) | |
658 | goto fail_cleanup; | |
7f528135 ML |
659 | } |
660 | ||
f1fb64b0 RS |
661 | /* |
662 | * The attr probably isn't going to be needed in most cases, | |
663 | * so don't fail completely on error. | |
664 | */ | |
665 | device_create_file(dev, &dev_attr_idle_state); | |
666 | ||
6856909c | 667 | dev_info(dev, "registered %d multiplexed busses for I2C %s %s\n", |
8a191a7a | 668 | num, data->chip->muxtype == pca954x_ismux |
7f528135 ML |
669 | ? "mux" : "switch", client->name); |
670 | ||
671 | return 0; | |
672 | ||
148baf1d PR |
673 | fail_cleanup: |
674 | pca954x_cleanup(muxc); | |
7f528135 ML |
675 | return ret; |
676 | } | |
677 | ||
ed5c2f5f | 678 | static void pca954x_remove(struct i2c_client *client) |
7f528135 | 679 | { |
7fcac980 | 680 | struct i2c_mux_core *muxc = i2c_get_clientdata(client); |
f2114795 | 681 | |
3093c641 AS |
682 | device_remove_file(&client->dev, &dev_attr_idle_state); |
683 | ||
148baf1d | 684 | pca954x_cleanup(muxc); |
7f528135 ML |
685 | } |
686 | ||
f5e596cd JZ |
687 | static int pca954x_resume(struct device *dev) |
688 | { | |
689 | struct i2c_client *client = to_i2c_client(dev); | |
7fcac980 PR |
690 | struct i2c_mux_core *muxc = i2c_get_clientdata(client); |
691 | struct pca954x *data = i2c_mux_priv(muxc); | |
e65e228e | 692 | int ret; |
f5e596cd | 693 | |
e65e228e BL |
694 | ret = pca954x_init(client, data); |
695 | if (ret < 0) | |
696 | dev_err(&client->dev, "failed to verify mux presence\n"); | |
697 | ||
698 | return ret; | |
f5e596cd | 699 | } |
f5e596cd | 700 | |
ea738c06 | 701 | static DEFINE_SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume); |
f5e596cd | 702 | |
7f528135 ML |
703 | static struct i2c_driver pca954x_driver = { |
704 | .driver = { | |
705 | .name = "pca954x", | |
ea738c06 | 706 | .pm = pm_sleep_ptr(&pca954x_pm), |
753aa369 | 707 | .of_match_table = pca954x_of_match, |
7f528135 | 708 | }, |
2f2afad9 | 709 | .probe = pca954x_probe, |
db79f2a1 | 710 | .remove = pca954x_remove, |
7f528135 ML |
711 | .id_table = pca954x_id, |
712 | }; | |
713 | ||
de05497a | 714 | module_i2c_driver(pca954x_driver); |
7f528135 ML |
715 | |
716 | MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>"); | |
717 | MODULE_DESCRIPTION("PCA954x I2C mux/switch driver"); | |
718 | MODULE_LICENSE("GPL v2"); |