[linux-block.git] / drivers / i2c / busses / scx200_acb.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
    Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>

    National Semiconductor SCx200 ACCESS.bus support
    Also supports the AMD CS5535 and AMD CS5536

    Based on i2c-keywest.c which is:
        Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
        Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>

*/

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/io.h>

#include <linux/scx200.h>

MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
MODULE_ALIAS("platform:cs5535-smb");
MODULE_LICENSE("GPL");

#define MAX_DEVICES 4
static int base[MAX_DEVICES] = { 0x820, 0x840 };
module_param_hw_array(base, int, ioport, NULL, 0);
MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");

#define POLL_TIMEOUT	(HZ/5)

enum scx200_acb_state {
	state_idle,
	state_address,
	state_command,
	state_repeat_start,
	state_quick,
	state_read,
	state_write,
};

static const char *scx200_acb_state_name[] = {
	"idle",
	"address",
	"command",
	"repeat_start",
	"quick",
	"read",
	"write",
};

/* Physical interface */
struct scx200_acb_iface {
	struct scx200_acb_iface *next;
	struct i2c_adapter adapter;
	unsigned base;
	struct mutex mutex;

	/* State machine data */
	enum scx200_acb_state state;
	int result;
	u8 address_byte;
	u8 command;
	u8 *ptr;
	char needs_reset;
	unsigned len;
};

/* Register Definitions */
#define ACBSDA		(iface->base + 0)
#define ACBST		(iface->base + 1)
#define    ACBST_SDAST		0x40 /* SDA Status */
#define    ACBST_BER		0x20
#define    ACBST_NEGACK		0x10 /* Negative Acknowledge */
#define    ACBST_STASTR		0x08 /* Stall After Start */
#define    ACBST_MASTER		0x02
#define ACBCST		(iface->base + 2)
#define    ACBCST_BB		0x02
#define ACBCTL1		(iface->base + 3)
#define    ACBCTL1_STASTRE	0x80
#define    ACBCTL1_NMINTE	0x40
#define    ACBCTL1_ACK		0x10
#define    ACBCTL1_STOP		0x02
#define    ACBCTL1_START	0x01
#define ACBADDR		(iface->base + 4)
#define ACBCTL2		(iface->base + 5)
#define    ACBCTL2_ENABLE	0x01

/************************************************************************/

static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
{
	const char *errmsg;

	dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
		scx200_acb_state_name[iface->state], status);

	if (status & ACBST_BER) {
		errmsg = "bus error";
		goto error;
	}
	if (!(status & ACBST_MASTER)) {
		errmsg = "not master";
		goto error;
	}
	if (status & ACBST_NEGACK) {
		dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
			scx200_acb_state_name[iface->state]);

		iface->state = state_idle;
		iface->result = -ENXIO;

		outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
		outb(ACBST_STASTR | ACBST_NEGACK, ACBST);

		/* Reset the status register */
		outb(0, ACBST);
		return;
	}

	switch (iface->state) {
	case state_idle:
		dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
		break;

	case state_address:
		/* Do a pointer write first */
		outb(iface->address_byte & ~1, ACBSDA);

		iface->state = state_command;
		break;

	case state_command:
		outb(iface->command, ACBSDA);

		if (iface->address_byte & 1)
			iface->state = state_repeat_start;
		else
			iface->state = state_write;
		break;

	case state_repeat_start:
		outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
		fallthrough;

	case state_quick:
		if (iface->address_byte & 1) {
			if (iface->len == 1)
				outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
			else
				outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
			outb(iface->address_byte, ACBSDA);

			iface->state = state_read;
		} else {
			outb(iface->address_byte, ACBSDA);

			iface->state = state_write;
		}
		break;

	case state_read:
		/* Set ACK if _next_ byte will be the last one */
		if (iface->len == 2)
			outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
		else
			outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);

		if (iface->len == 1) {
			iface->result = 0;
			iface->state = state_idle;
			outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
		}

		*iface->ptr++ = inb(ACBSDA);
		--iface->len;

		break;

	case state_write:
		if (iface->len == 0) {
			iface->result = 0;
			iface->state = state_idle;
			outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
			break;
		}

		outb(*iface->ptr++, ACBSDA);
		--iface->len;

		break;
	}

	return;

 error:
	dev_err(&iface->adapter.dev,
		"%s in state %s (addr=0x%02x, len=%d, status=0x%02x)\n", errmsg,
		scx200_acb_state_name[iface->state], iface->address_byte,
		iface->len, status);

	iface->state = state_idle;
	iface->result = -EIO;
	iface->needs_reset = 1;
}

static void scx200_acb_poll(struct scx200_acb_iface *iface)
{
	u8 status;
	unsigned long timeout;

	timeout = jiffies + POLL_TIMEOUT;
	while (1) {
		status = inb(ACBST);

		/* Reset the status register to avoid the hang */
		outb(0, ACBST);

		if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
			scx200_acb_machine(iface, status);
			return;
		}
		if (time_after(jiffies, timeout))
			break;
		cpu_relax();
		cond_resched();
	}

	dev_err(&iface->adapter.dev, "timeout in state %s\n",
		scx200_acb_state_name[iface->state]);

	iface->state = state_idle;
	iface->result = -EIO;
	iface->needs_reset = 1;
}

static void scx200_acb_reset(struct scx200_acb_iface *iface)
{
	/* Disable the ACCESS.bus device and Configure the SCL
	   frequency: 16 clock cycles */
	outb(0x70, ACBCTL2);
	/* Polling mode */
	outb(0, ACBCTL1);
	/* Disable slave address */
	outb(0, ACBADDR);
	/* Enable the ACCESS.bus device */
	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
	/* Free STALL after START */
	outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
	/* Send a STOP */
	outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
	/* Clear BER, NEGACK and STASTR bits */
	outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
	/* Clear BB bit */
	outb(inb(ACBCST) | ACBCST_BB, ACBCST);
}

static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
				 u16 address, unsigned short flags,
				 char rw, u8 command, int size,
				 union i2c_smbus_data *data)
{
	struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
	int len;
	u8 *buffer;
	u16 cur_word;
	int rc;

	switch (size) {
	case I2C_SMBUS_QUICK:
		len = 0;
		buffer = NULL;
		break;

	case I2C_SMBUS_BYTE:
		len = 1;
		buffer = rw ? &data->byte : &command;
		break;

	case I2C_SMBUS_BYTE_DATA:
		len = 1;
		buffer = &data->byte;
		break;

	case I2C_SMBUS_WORD_DATA:
		len = 2;
		cur_word = cpu_to_le16(data->word);
		buffer = (u8 *)&cur_word;
		break;

	case I2C_SMBUS_I2C_BLOCK_DATA:
		len = data->block[0];
		if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
			return -EINVAL;
		buffer = &data->block[1];
		break;

	default:
		return -EINVAL;
	}

	dev_dbg(&adapter->dev,
		"size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
		size, address, command, len, rw);

	if (!len && rw == I2C_SMBUS_READ) {
		dev_dbg(&adapter->dev, "zero length read\n");
		return -EINVAL;
	}

	mutex_lock(&iface->mutex);

	iface->address_byte = (address << 1) | rw;
	iface->command = command;
	iface->ptr = buffer;
	iface->len = len;
	iface->result = -EINVAL;
	iface->needs_reset = 0;

	outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);

	if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
		iface->state = state_quick;
	else
		iface->state = state_address;

	while (iface->state != state_idle)
		scx200_acb_poll(iface);

	if (iface->needs_reset)
		scx200_acb_reset(iface);

	rc = iface->result;

	mutex_unlock(&iface->mutex);

	if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
		data->word = le16_to_cpu(cur_word);

#ifdef DEBUG
	dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
	if (buffer) {
		int i;
		printk(" data:");
		for (i = 0; i < len; ++i)
			printk(" %02x", buffer[i]);
	}
	printk("\n");
#endif

	return rc;
}

static u32 scx200_acb_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	       I2C_FUNC_SMBUS_I2C_BLOCK;
}

/* For now, we only handle combined mode (smbus) */
static const struct i2c_algorithm scx200_acb_algorithm = {
	.smbus_xfer	= scx200_acb_smbus_xfer,
	.functionality	= scx200_acb_func,
};

static struct scx200_acb_iface *scx200_acb_list;
static DEFINE_MUTEX(scx200_acb_list_mutex);

static int scx200_acb_probe(struct scx200_acb_iface *iface)
{
	u8 val;

	/* Disable the ACCESS.bus device and Configure the SCL
	   frequency: 16 clock cycles */
	outb(0x70, ACBCTL2);

	if (inb(ACBCTL2) != 0x70) {
		pr_debug("ACBCTL2 readback failed\n");
		return -ENXIO;
	}

	outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);

	val = inb(ACBCTL1);
	if (val) {
		pr_debug("disabled, but ACBCTL1=0x%02x\n", val);
		return -ENXIO;
	}

	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);

	outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);

	val = inb(ACBCTL1);
	if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
		pr_debug("enabled, but NMINTE won't be set, ACBCTL1=0x%02x\n",
			 val);
		return -ENXIO;
	}

	return 0;
}

static struct scx200_acb_iface *scx200_create_iface(const char *text,
		struct device *dev, int index)
{
	struct scx200_acb_iface *iface;
	struct i2c_adapter *adapter;

	iface = kzalloc(sizeof(*iface), GFP_KERNEL);
	if (!iface)
		return NULL;

	adapter = &iface->adapter;
	i2c_set_adapdata(adapter, iface);
	snprintf(adapter->name, sizeof(adapter->name), "%s ACB%d", text, index);
	adapter->owner = THIS_MODULE;
	adapter->algo = &scx200_acb_algorithm;
	adapter->class = I2C_CLASS_HWMON;
	adapter->dev.parent = dev;

	mutex_init(&iface->mutex);

	return iface;
}

static int scx200_acb_create(struct scx200_acb_iface *iface)
{
	struct i2c_adapter *adapter;
	int rc;

	adapter = &iface->adapter;

	rc = scx200_acb_probe(iface);
	if (rc) {
		pr_warn("probe failed\n");
		return rc;
	}

	scx200_acb_reset(iface);

	if (i2c_add_adapter(adapter) < 0) {
		pr_err("failed to register\n");
		return -ENODEV;
	}

	if (!adapter->dev.parent) {
		/* If there's no dev, we're tracking (ISA) ifaces manually */
		mutex_lock(&scx200_acb_list_mutex);
		iface->next = scx200_acb_list;
		scx200_acb_list = iface;
		mutex_unlock(&scx200_acb_list_mutex);
	}

	return 0;
}

static struct scx200_acb_iface *scx200_create_dev(const char *text,
		unsigned long base, int index, struct device *dev)
{
	struct scx200_acb_iface *iface;
	int rc;

	iface = scx200_create_iface(text, dev, index);

	if (iface == NULL)
		return NULL;

	if (!request_region(base, 8, iface->adapter.name)) {
		pr_err("can't allocate io 0x%lx-0x%lx\n", base, base + 8 - 1);
		goto errout_free;
	}

	iface->base = base;
	rc = scx200_acb_create(iface);

	if (rc == 0)
		return iface;

	release_region(base, 8);
 errout_free:
	kfree(iface);
	return NULL;
}

static int scx200_probe(struct platform_device *pdev)
{
	struct scx200_acb_iface *iface;
	struct resource *res;

	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
	if (!res) {
		dev_err(&pdev->dev, "can't fetch device resource info\n");
		return -ENODEV;
	}

	iface = scx200_create_dev("CS5535", res->start, 0, &pdev->dev);
	if (!iface)
		return -EIO;

	dev_info(&pdev->dev, "SCx200 device '%s' registered\n",
			iface->adapter.name);
	platform_set_drvdata(pdev, iface);

	return 0;
}

static void scx200_cleanup_iface(struct scx200_acb_iface *iface)
{
	i2c_del_adapter(&iface->adapter);
	release_region(iface->base, 8);
	kfree(iface);
}

static void scx200_remove(struct platform_device *pdev)
{
	struct scx200_acb_iface *iface;

	iface = platform_get_drvdata(pdev);
	scx200_cleanup_iface(iface);
}

static struct platform_driver scx200_pci_driver = {
	.driver = {
		.name = "cs5535-smb",
	},
	.probe = scx200_probe,
	.remove_new = scx200_remove,
};

static const struct pci_device_id scx200_isa[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
	{ 0, }
};

static __init void scx200_scan_isa(void)
{
	int i;

	if (!pci_dev_present(scx200_isa))
		return;

	for (i = 0; i < MAX_DEVICES; ++i) {
		if (base[i] == 0)
			continue;

		/* XXX: should we care about failures? */
		scx200_create_dev("SCx200", base[i], i, NULL);
	}
}

static int __init scx200_acb_init(void)
{
	pr_debug("NatSemi SCx200 ACCESS.bus Driver\n");

	/* First scan for ISA-based devices */
	scx200_scan_isa();	/* XXX: should we care about errors? */

	/* If at least one bus was created, init must succeed */
	if (scx200_acb_list)
		return 0;

	/* No ISA devices; register the platform driver for PCI-based devices */
	return platform_driver_register(&scx200_pci_driver);
}

static void __exit scx200_acb_cleanup(void)
{
	struct scx200_acb_iface *iface;

	platform_driver_unregister(&scx200_pci_driver);

	mutex_lock(&scx200_acb_list_mutex);
	while ((iface = scx200_acb_list) != NULL) {
		scx200_acb_list = iface->next;
		mutex_unlock(&scx200_acb_list_mutex);

		scx200_cleanup_iface(iface);

		mutex_lock(&scx200_acb_list_mutex);
	}
	mutex_unlock(&scx200_acb_list_mutex);
}

module_init(scx200_acb_init);
module_exit(scx200_acb_cleanup);
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
99c3adb4	2	/*
1da177e4 LT	3	Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
	4
	5	National Semiconductor SCx200 ACCESS.bus support
16ffc5c9	6	Also supports the AMD CS5535 and AMD CS5536
99c3adb4	7
1da177e4 LT	8	Based on i2c-keywest.c which is:
	9	Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
	10	Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
99c3adb4	11
1da177e4 LT	12	*/
1da177e4 LT	13
401e72b5 JC	14	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
401e72b5 JC	15
1da177e4 LT	16	#include <linux/module.h>
	17	#include <linux/errno.h>
	18	#include <linux/kernel.h>
	19	#include <linux/init.h>
	20	#include <linux/i2c.h>
1da177e4	21	#include <linux/pci.h>
de8255cc	22	#include <linux/platform_device.h>
1da177e4	23	#include <linux/delay.h>
3fb9a655	24	#include <linux/mutex.h>
5a0e3ad6	25	#include <linux/slab.h>
21782180	26	#include <linux/io.h>
1da177e4 LT	27
	28	#include <linux/scx200.h>
	29
1da177e4 LT	30	MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
1da177e4 LT	31	MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
de8255cc	32	MODULE_ALIAS("platform:cs5535-smb");
1da177e4 LT	33	MODULE_LICENSE("GPL");
	34
	35	#define MAX_DEVICES 4
	36	static int base[MAX_DEVICES] = { 0x820, 0x840 };
c78babcc	37	module_param_hw_array(base, int, ioport, NULL, 0);
1da177e4 LT	38	MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
1da177e4 LT	39
f933ff50	40	#define POLL_TIMEOUT (HZ/5)
1da177e4 LT	41
	42	enum scx200_acb_state {
	43	state_idle,
	44	state_address,
	45	state_command,
	46	state_repeat_start,
	47	state_quick,
	48	state_read,
	49	state_write,
	50	};
	51
	52	static const char *scx200_acb_state_name[] = {
	53	"idle",
	54	"address",
	55	"command",
	56	"repeat_start",
	57	"quick",
	58	"read",
	59	"write",
	60	};
	61
	62	/* Physical interface */
99c3adb4	63	struct scx200_acb_iface {
1da177e4 LT	64	struct scx200_acb_iface *next;
	65	struct i2c_adapter adapter;
	66	unsigned base;
3fb9a655	67	struct mutex mutex;
1da177e4 LT	68
	69	/* State machine data */
	70	enum scx200_acb_state state;
	71	int result;
	72	u8 address_byte;
	73	u8 command;
	74	u8 *ptr;
	75	char needs_reset;
	76	unsigned len;
	77	};
	78
	79	/* Register Definitions */
	80	#define ACBSDA (iface->base + 0)
	81	#define ACBST (iface->base + 1)
	82	#define ACBST_SDAST 0x40 /* SDA Status */
99c3adb4	83	#define ACBST_BER 0x20
1da177e4 LT	84	#define ACBST_NEGACK 0x10 /* Negative Acknowledge */
	85	#define ACBST_STASTR 0x08 /* Stall After Start */
	86	#define ACBST_MASTER 0x02
	87	#define ACBCST (iface->base + 2)
	88	#define ACBCST_BB 0x02
	89	#define ACBCTL1 (iface->base + 3)
	90	#define ACBCTL1_STASTRE 0x80
	91	#define ACBCTL1_NMINTE 0x40
99c3adb4 BG	92	#define ACBCTL1_ACK 0x10
	93	#define ACBCTL1_STOP 0x02
	94	#define ACBCTL1_START 0x01
1da177e4 LT	95	#define ACBADDR (iface->base + 4)
	96	#define ACBCTL2 (iface->base + 5)
	97	#define ACBCTL2_ENABLE 0x01
	98
	99	/************************************************************************/
	100
	101	static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
	102	{
	103	const char *errmsg;
	104
ef4d9275 BG	105	dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
ef4d9275 BG	106	scx200_acb_state_name[iface->state], status);
1da177e4 LT	107
	108	if (status & ACBST_BER) {
	109	errmsg = "bus error";
	110	goto error;
	111	}
	112	if (!(status & ACBST_MASTER)) {
	113	errmsg = "not master";
	114	goto error;
	115	}
9b7b6d3b BG	116	if (status & ACBST_NEGACK) {
	117	dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
	118	scx200_acb_state_name[iface->state]);
	119
	120	iface->state = state_idle;
	121	iface->result = -ENXIO;
	122
	123	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	124	outb(ACBST_STASTR \| ACBST_NEGACK, ACBST);
95563d34 JC	125
	126	/* Reset the status register */
	127	outb(0, ACBST);
9b7b6d3b BG	128	return;
9b7b6d3b BG	129	}
1da177e4 LT	130
	131	switch (iface->state) {
	132	case state_idle:
	133	dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
	134	break;
	135
	136	case state_address:
	137	/* Do a pointer write first */
	138	outb(iface->address_byte & ~1, ACBSDA);
	139
	140	iface->state = state_command;
	141	break;
	142
	143	case state_command:
	144	outb(iface->command, ACBSDA);
	145
	146	if (iface->address_byte & 1)
	147	iface->state = state_repeat_start;
	148	else
	149	iface->state = state_write;
	150	break;
	151
	152	case state_repeat_start:
	153	outb(inb(ACBCTL1) \| ACBCTL1_START, ACBCTL1);
4db7e178	154	fallthrough;
99c3adb4	155
1da177e4 LT	156	case state_quick:
1da177e4 LT	157	if (iface->address_byte & 1) {
99c3adb4	158	if (iface->len == 1)
1da177e4 LT	159	outb(inb(ACBCTL1) \| ACBCTL1_ACK, ACBCTL1);
	160	else
	161	outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
	162	outb(iface->address_byte, ACBSDA);
	163
	164	iface->state = state_read;
	165	} else {
	166	outb(iface->address_byte, ACBSDA);
	167
	168	iface->state = state_write;
	169	}
	170	break;
	171
	172	case state_read:
fd627a01 TA	173	/* Set ACK if _next_ byte will be the last one */
fd627a01 TA	174	if (iface->len == 2)
1da177e4 LT	175	outb(inb(ACBCTL1) \| ACBCTL1_ACK, ACBCTL1);
	176	else
	177	outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
	178
fd627a01	179	if (iface->len == 1) {
1da177e4 LT	180	iface->result = 0;
	181	iface->state = state_idle;
	182	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	183	}
	184
fd627a01 TA	185	*iface->ptr++ = inb(ACBSDA);
	186	--iface->len;
	187
1da177e4 LT	188	break;
	189
	190	case state_write:
	191	if (iface->len == 0) {
	192	iface->result = 0;
	193	iface->state = state_idle;
	194	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	195	break;
	196	}
99c3adb4	197
1da177e4 LT	198	outb(*iface->ptr++, ACBSDA);
1da177e4 LT	199	--iface->len;
99c3adb4	200
1da177e4 LT	201	break;
	202	}
	203
	204	return;
	205
1da177e4	206	error:
fce96f3e WT	207	dev_err(&iface->adapter.dev,
	208	"%s in state %s (addr=0x%02x, len=%d, status=0x%02x)\n", errmsg,
	209	scx200_acb_state_name[iface->state], iface->address_byte,
	210	iface->len, status);
1da177e4 LT	211
	212	iface->state = state_idle;
	213	iface->result = -EIO;
	214	iface->needs_reset = 1;
	215	}
	216
1da177e4 LT	217	static void scx200_acb_poll(struct scx200_acb_iface *iface)
1da177e4 LT	218	{
9b7b6d3b	219	u8 status;
1da177e4 LT	220	unsigned long timeout;
	221
	222	timeout = jiffies + POLL_TIMEOUT;
3e3183ba	223	while (1) {
1da177e4	224	status = inb(ACBST);
95563d34 JC	225
	226	/* Reset the status register to avoid the hang */
	227	outb(0, ACBST);
	228
1da177e4 LT	229	if ((status & (ACBST_SDAST\|ACBST_BER\|ACBST_NEGACK)) != 0) {
	230	scx200_acb_machine(iface, status);
	231	return;
	232	}
3e3183ba DW	233	if (time_after(jiffies, timeout))
	234	break;
	235	cpu_relax();
	236	cond_resched();
1da177e4 LT	237	}
1da177e4 LT	238
9b7b6d3b BG	239	dev_err(&iface->adapter.dev, "timeout in state %s\n",
	240	scx200_acb_state_name[iface->state]);
	241
	242	iface->state = state_idle;
	243	iface->result = -EIO;
	244	iface->needs_reset = 1;
1da177e4	245	}
1da177e4 LT	246
	247	static void scx200_acb_reset(struct scx200_acb_iface *iface)
	248	{
	249	/* Disable the ACCESS.bus device and Configure the SCL
99c3adb4	250	frequency: 16 clock cycles */
1da177e4 LT	251	outb(0x70, ACBCTL2);
	252	/* Polling mode */
	253	outb(0, ACBCTL1);
	254	/* Disable slave address */
	255	outb(0, ACBADDR);
	256	/* Enable the ACCESS.bus device */
	257	outb(inb(ACBCTL2) \| ACBCTL2_ENABLE, ACBCTL2);
	258	/* Free STALL after START */
	259	outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE \| ACBCTL1_NMINTE), ACBCTL1);
	260	/* Send a STOP */
	261	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	262	/* Clear BER, NEGACK and STASTR bits */
	263	outb(ACBST_BER \| ACBST_NEGACK \| ACBST_STASTR, ACBST);
	264	/* Clear BB bit */
	265	outb(inb(ACBCST) \| ACBCST_BB, ACBCST);
	266	}
	267
	268	static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
99c3adb4 BG	269	u16 address, unsigned short flags,
	270	char rw, u8 command, int size,
	271	union i2c_smbus_data *data)
1da177e4 LT	272	{
	273	struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
	274	int len;
	275	u8 *buffer;
	276	u16 cur_word;
	277	int rc;
	278
	279	switch (size) {
	280	case I2C_SMBUS_QUICK:
99c3adb4 BG	281	len = 0;
	282	buffer = NULL;
	283	break;
	284
1da177e4	285	case I2C_SMBUS_BYTE:
9b7b6d3b BG	286	len = 1;
9b7b6d3b BG	287	buffer = rw ? &data->byte : &command;
99c3adb4 BG	288	break;
99c3adb4 BG	289
1da177e4	290	case I2C_SMBUS_BYTE_DATA:
99c3adb4 BG	291	len = 1;
	292	buffer = &data->byte;
	293	break;
	294
1da177e4 LT	295	case I2C_SMBUS_WORD_DATA:
1da177e4 LT	296	len = 2;
99c3adb4 BG	297	cur_word = cpu_to_le16(data->word);
99c3adb4 BG	298	buffer = (u8 *)&cur_word;
1da177e4	299	break;
99c3adb4	300
c3efacaa	301	case I2C_SMBUS_I2C_BLOCK_DATA:
99c3adb4	302	len = data->block[0];
c3efacaa JD	303	if (len == 0 \|\| len > I2C_SMBUS_BLOCK_MAX)
c3efacaa JD	304	return -EINVAL;
99c3adb4	305	buffer = &data->block[1];
1da177e4	306	break;
99c3adb4	307
1da177e4	308	default:
99c3adb4	309	return -EINVAL;
1da177e4 LT	310	}
1da177e4 LT	311
ef4d9275 BG	312	dev_dbg(&adapter->dev,
	313	"size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
	314	size, address, command, len, rw);
1da177e4 LT	315
1da177e4 LT	316	if (!len && rw == I2C_SMBUS_READ) {
ef4d9275	317	dev_dbg(&adapter->dev, "zero length read\n");
1da177e4 LT	318	return -EINVAL;
	319	}
	320
3fb9a655	321	mutex_lock(&iface->mutex);
1da177e4	322
9b7b6d3b	323	iface->address_byte = (address << 1) \| rw;
1da177e4 LT	324	iface->command = command;
	325	iface->ptr = buffer;
	326	iface->len = len;
	327	iface->result = -EINVAL;
	328	iface->needs_reset = 0;
	329
	330	outb(inb(ACBCTL1) \| ACBCTL1_START, ACBCTL1);
	331
	332	if (size == I2C_SMBUS_QUICK \|\| size == I2C_SMBUS_BYTE)
	333	iface->state = state_quick;
	334	else
	335	iface->state = state_address;
	336
1da177e4 LT	337	while (iface->state != state_idle)
1da177e4 LT	338	scx200_acb_poll(iface);
1da177e4 LT	339
	340	if (iface->needs_reset)
	341	scx200_acb_reset(iface);
	342
	343	rc = iface->result;
	344
3fb9a655	345	mutex_unlock(&iface->mutex);
1da177e4 LT	346
1da177e4 LT	347	if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
99c3adb4	348	data->word = le16_to_cpu(cur_word);
1da177e4 LT	349
1da177e4 LT	350	#ifdef DEBUG
ef4d9275	351	dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
1da177e4 LT	352	if (buffer) {
	353	int i;
	354	printk(" data:");
	355	for (i = 0; i < len; ++i)
	356	printk(" %02x", buffer[i]);
	357	}
	358	printk("\n");
	359	#endif
	360
	361	return rc;
	362	}
	363
	364	static u32 scx200_acb_func(struct i2c_adapter *adapter)
	365	{
	366	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
	367	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
c3efacaa	368	I2C_FUNC_SMBUS_I2C_BLOCK;
1da177e4 LT	369	}
	370
	371	/* For now, we only handle combined mode (smbus) */
8f9082c5	372	static const struct i2c_algorithm scx200_acb_algorithm = {
1da177e4 LT	373	.smbus_xfer = scx200_acb_smbus_xfer,
	374	.functionality = scx200_acb_func,
	375	};
	376
	377	static struct scx200_acb_iface *scx200_acb_list;
9d9c01ce	378	static DEFINE_MUTEX(scx200_acb_list_mutex);
1da177e4	379
0b255e92	380	static int scx200_acb_probe(struct scx200_acb_iface *iface)
1da177e4 LT	381	{
	382	u8 val;
	383
	384	/* Disable the ACCESS.bus device and Configure the SCL
99c3adb4	385	frequency: 16 clock cycles */
1da177e4 LT	386	outb(0x70, ACBCTL2);
	387
	388	if (inb(ACBCTL2) != 0x70) {
401e72b5	389	pr_debug("ACBCTL2 readback failed\n");
1da177e4 LT	390	return -ENXIO;
	391	}
	392
	393	outb(inb(ACBCTL1) \| ACBCTL1_NMINTE, ACBCTL1);
	394
	395	val = inb(ACBCTL1);
	396	if (val) {
401e72b5	397	pr_debug("disabled, but ACBCTL1=0x%02x\n", val);
1da177e4 LT	398	return -ENXIO;
	399	}
	400
	401	outb(inb(ACBCTL2) \| ACBCTL2_ENABLE, ACBCTL2);
	402
	403	outb(inb(ACBCTL1) \| ACBCTL1_NMINTE, ACBCTL1);
	404
	405	val = inb(ACBCTL1);
	406	if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
401e72b5 JC	407	pr_debug("enabled, but NMINTE won't be set, ACBCTL1=0x%02x\n",
401e72b5 JC	408	val);
1da177e4 LT	409	return -ENXIO;
	410	}
	411
	412	return 0;
	413	}
	414
0b255e92	415	static struct scx200_acb_iface scx200_create_iface(const char text,
12a917f6	416	struct device *dev, int index)
1da177e4 LT	417	{
	418	struct scx200_acb_iface *iface;
	419	struct i2c_adapter *adapter;
1da177e4	420
5263ebb5	421	iface = kzalloc(sizeof(*iface), GFP_KERNEL);
46797a2a	422	if (!iface)
80cd3a87	423	return NULL;
1da177e4	424
1da177e4 LT	425	adapter = &iface->adapter;
1da177e4 LT	426	i2c_set_adapdata(adapter, iface);
2096b956	427	snprintf(adapter->name, sizeof(adapter->name), "%s ACB%d", text, index);
1da177e4	428	adapter->owner = THIS_MODULE;
1da177e4	429	adapter->algo = &scx200_acb_algorithm;
9fd12f38	430	adapter->class = I2C_CLASS_HWMON;
12a917f6	431	adapter->dev.parent = dev;
1da177e4	432
3fb9a655	433	mutex_init(&iface->mutex);
1da177e4	434
80cd3a87 JC	435	return iface;
	436	}
	437
0b255e92	438	static int scx200_acb_create(struct scx200_acb_iface *iface)
80cd3a87 JC	439	{
	440	struct i2c_adapter *adapter;
	441	int rc;
	442
	443	adapter = &iface->adapter;
1da177e4 LT	444
	445	rc = scx200_acb_probe(iface);
	446	if (rc) {
401e72b5	447	pr_warn("probe failed\n");
80cd3a87	448	return rc;
1da177e4 LT	449	}
	450
	451	scx200_acb_reset(iface);
	452
	453	if (i2c_add_adapter(adapter) < 0) {
401e72b5	454	pr_err("failed to register\n");
80cd3a87	455	return -ENODEV;
1da177e4 LT	456	}
1da177e4 LT	457
de8255cc AS	458	if (!adapter->dev.parent) {
	459	/* If there's no dev, we're tracking (ISA) ifaces manually */
	460	mutex_lock(&scx200_acb_list_mutex);
	461	iface->next = scx200_acb_list;
	462	scx200_acb_list = iface;
	463	mutex_unlock(&scx200_acb_list_mutex);
	464	}
1da177e4 LT	465
1da177e4 LT	466	return 0;
80cd3a87	467	}
1da177e4	468
0b255e92	469	static struct scx200_acb_iface scx200_create_dev(const char text,
de8255cc	470	unsigned long base, int index, struct device *dev)
80cd3a87 JC	471	{
	472	struct scx200_acb_iface *iface;
	473	int rc;
	474
de8255cc	475	iface = scx200_create_iface(text, dev, index);
80cd3a87 JC	476
80cd3a87 JC	477	if (iface == NULL)
de8255cc	478	return NULL;
80cd3a87	479
de8255cc	480	if (!request_region(base, 8, iface->adapter.name)) {
401e72b5	481	pr_err("can't allocate io 0x%lx-0x%lx\n", base, base + 8 - 1);
80cd3a87 JC	482	goto errout_free;
	483	}
	484
de8255cc	485	iface->base = base;
80cd3a87 JC	486	rc = scx200_acb_create(iface);
	487
	488	if (rc == 0)
de8255cc	489	return iface;
80cd3a87	490
de8255cc	491	release_region(base, 8);
9b7b6d3b BG	492	errout_free:
9b7b6d3b BG	493	kfree(iface);
de8255cc	494	return NULL;
1da177e4 LT	495	}
1da177e4 LT	496
0b255e92	497	static int scx200_probe(struct platform_device *pdev)
80cd3a87 JC	498	{
80cd3a87 JC	499	struct scx200_acb_iface *iface;
de8255cc	500	struct resource *res;
80cd3a87	501
de8255cc AS	502	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
	503	if (!res) {
	504	dev_err(&pdev->dev, "can't fetch device resource info\n");
	505	return -ENODEV;
80cd3a87 JC	506	}
80cd3a87 JC	507
de8255cc AS	508	iface = scx200_create_dev("CS5535", res->start, 0, &pdev->dev);
	509	if (!iface)
	510	return -EIO;
80cd3a87	511
de8255cc AS	512	dev_info(&pdev->dev, "SCx200 device '%s' registered\n",
	513	iface->adapter.name);
	514	platform_set_drvdata(pdev, iface);
1da177e4	515
de8255cc	516	return 0;
80cd3a87 JC	517	}
80cd3a87 JC	518
0b255e92	519	static void scx200_cleanup_iface(struct scx200_acb_iface *iface)
de8255cc AS	520	{
	521	i2c_del_adapter(&iface->adapter);
	522	release_region(iface->base, 8);
	523	kfree(iface);
	524	}
16ffc5c9	525
e190a0c3	526	static void scx200_remove(struct platform_device *pdev)
16ffc5c9	527	{
de8255cc	528	struct scx200_acb_iface *iface;
80cd3a87	529
de8255cc	530	iface = platform_get_drvdata(pdev);
de8255cc	531	scx200_cleanup_iface(iface);
de8255cc	532	}
80cd3a87	533
6fcf84a2	534	static struct platform_driver scx200_pci_driver = {
de8255cc AS	535	.driver = {
de8255cc AS	536	.name = "cs5535-smb",
de8255cc AS	537	},
de8255cc AS	538	.probe = scx200_probe,
e190a0c3	539	.remove_new = scx200_remove,
de8255cc	540	};
80cd3a87	541
392debf1	542	static const struct pci_device_id scx200_isa[] = {
de8255cc AS	543	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
	544	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
	545	{ 0, }
	546	};
80cd3a87	547
de8255cc AS	548	static __init void scx200_scan_isa(void)
	549	{
	550	int i;
80cd3a87	551
de8255cc AS	552	if (!pci_dev_present(scx200_isa))
de8255cc AS	553	return;
80cd3a87	554
de8255cc AS	555	for (i = 0; i < MAX_DEVICES; ++i) {
	556	if (base[i] == 0)
	557	continue;
16ffc5c9	558
de8255cc AS	559	/* XXX: should we care about failures? */
de8255cc AS	560	scx200_create_dev("SCx200", base[i], i, NULL);
16ffc5c9	561	}
16ffc5c9 BG	562	}
16ffc5c9 BG	563
1da177e4 LT	564	static int __init scx200_acb_init(void)
1da177e4 LT	565	{
401e72b5	566	pr_debug("NatSemi SCx200 ACCESS.bus Driver\n");
1da177e4	567
de8255cc AS	568	/* First scan for ISA-based devices */
de8255cc AS	569	scx200_scan_isa(); /* XXX: should we care about errors? */
1da177e4	570
6f9c2963 JD	571	/* If at least one bus was created, init must succeed */
	572	if (scx200_acb_list)
	573	return 0;
de8255cc AS	574
de8255cc AS	575	/* No ISA devices; register the platform driver for PCI-based devices */
6fcf84a2	576	return platform_driver_register(&scx200_pci_driver);
1da177e4 LT	577	}
	578
	579	static void __exit scx200_acb_cleanup(void)
	580	{
	581	struct scx200_acb_iface *iface;
99c3adb4	582
6fcf84a2	583	platform_driver_unregister(&scx200_pci_driver);
de8255cc	584
9d9c01ce	585	mutex_lock(&scx200_acb_list_mutex);
1da177e4 LT	586	while ((iface = scx200_acb_list) != NULL) {
1da177e4 LT	587	scx200_acb_list = iface->next;
9d9c01ce	588	mutex_unlock(&scx200_acb_list_mutex);
1da177e4	589
de8255cc	590	scx200_cleanup_iface(iface);
80cd3a87	591
9d9c01ce	592	mutex_lock(&scx200_acb_list_mutex);
1da177e4	593	}
9d9c01ce	594	mutex_unlock(&scx200_acb_list_mutex);
1da177e4 LT	595	}
	596
	597	module_init(scx200_acb_init);
	598	module_exit(scx200_acb_cleanup);