[linux-2.6-block.git] / drivers / i2c / busses / i2c-xgene-slimpro.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * X-Gene SLIMpro I2C Driver
 *
 * Copyright (c) 2014, Applied Micro Circuits Corporation
 * Author: Feng Kan <fkan@apm.com>
 * Author: Hieu Le <hnle@apm.com>
 *
 * This driver provides support for X-Gene SLIMpro I2C device access
 * using the APM X-Gene SLIMpro mailbox driver.
 */
#include <acpi/pcc.h>
#include <linux/acpi.h>
#include <linux/dma-mapping.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/mailbox_client.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/version.h>

#define MAILBOX_OP_TIMEOUT		1000	/* Operation time out in ms */
#define MAILBOX_I2C_INDEX		0
#define SLIMPRO_IIC_BUS			1	/* Use I2C bus 1 only */

#define SMBUS_CMD_LEN			1
#define BYTE_DATA			1
#define WORD_DATA			2
#define BLOCK_DATA			3

#define SLIMPRO_IIC_I2C_PROTOCOL	0
#define SLIMPRO_IIC_SMB_PROTOCOL	1

#define SLIMPRO_IIC_READ		0
#define SLIMPRO_IIC_WRITE		1

#define IIC_SMB_WITHOUT_DATA_LEN	0
#define IIC_SMB_WITH_DATA_LEN		1

#define SLIMPRO_DEBUG_MSG		0
#define SLIMPRO_MSG_TYPE_SHIFT		28
#define SLIMPRO_DBG_SUBTYPE_I2C1READ	4
#define SLIMPRO_DBGMSG_TYPE_SHIFT	24
#define SLIMPRO_DBGMSG_TYPE_MASK	0x0F000000U
#define SLIMPRO_IIC_DEV_SHIFT		23
#define SLIMPRO_IIC_DEV_MASK		0x00800000U
#define SLIMPRO_IIC_DEVID_SHIFT		13
#define SLIMPRO_IIC_DEVID_MASK		0x007FE000U
#define SLIMPRO_IIC_RW_SHIFT		12
#define SLIMPRO_IIC_RW_MASK		0x00001000U
#define SLIMPRO_IIC_PROTO_SHIFT		11
#define SLIMPRO_IIC_PROTO_MASK		0x00000800U
#define SLIMPRO_IIC_ADDRLEN_SHIFT	8
#define SLIMPRO_IIC_ADDRLEN_MASK	0x00000700U
#define SLIMPRO_IIC_DATALEN_SHIFT	0
#define SLIMPRO_IIC_DATALEN_MASK	0x000000FFU

/*
 * SLIMpro I2C message encode
 *
 * dev		- Controller number (0-based)
 * chip		- I2C chip address
 * op		- SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE
 * proto	- SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL
 * addrlen	- Length of the address field
 * datalen	- Length of the data field
 */
#define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \
	((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \
	((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \
	SLIMPRO_DBGMSG_TYPE_MASK) | \
	((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \
	((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \
	((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \
	((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \
	((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \
	((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK))

#define SLIMPRO_MSG_TYPE(v)             (((v) & 0xF0000000) >> 28)

/*
 * Encode for upper address for block data
 */
#define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR			0x80000000
#define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a)	((u32) (((a) << 30) \
								& 0x40000000))
#define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a)		((u32) (((a) >> 12) \
								& 0x3FF00000))
#define SLIMPRO_IIC_ENCODE_ADDR(a)			((a) & 0x000FFFFF)

#define SLIMPRO_IIC_MSG_DWORD_COUNT			3

/* PCC related defines */
#define PCC_SIGNATURE			0x50424300
#define PCC_STS_CMD_COMPLETE		BIT(0)
#define PCC_STS_SCI_DOORBELL		BIT(1)
#define PCC_STS_ERR			BIT(2)
#define PCC_STS_PLAT_NOTIFY		BIT(3)
#define PCC_CMD_GENERATE_DB_INT		BIT(15)

struct slimpro_i2c_dev {
	struct i2c_adapter adapter;
	struct device *dev;
	struct mbox_chan *mbox_chan;
	struct mbox_client mbox_client;
	int mbox_idx;
	struct completion rd_complete;
	u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */
	u32 *resp_msg;
	phys_addr_t comm_base_addr;
	void *pcc_comm_addr;
};

#define to_slimpro_i2c_dev(cl)	\
		container_of(cl, struct slimpro_i2c_dev, mbox_client)

enum slimpro_i2c_version {
	XGENE_SLIMPRO_I2C_V1 = 0,
	XGENE_SLIMPRO_I2C_V2 = 1,
};

/*
 * This function tests and clears a bitmask then returns its old value
 */
static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask)
{
	u16 ret, val;

	val = le16_to_cpu(READ_ONCE(*addr));
	ret = val & mask;
	val &= ~mask;
	WRITE_ONCE(*addr, cpu_to_le16(val));

	return ret;
}

static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg)
{
	struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);

	/*
	 * Response message format:
	 * mssg[0] is the return code of the operation
	 * mssg[1] is the first data word
	 * mssg[2] is NOT used
	 */
	if (ctx->resp_msg)
		*ctx->resp_msg = ((u32 *)mssg)[1];

	if (ctx->mbox_client.tx_block)
		complete(&ctx->rd_complete);
}

static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg)
{
	struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
	struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;

	/* Check if platform sends interrupt */
	if (!xgene_word_tst_and_clr(&generic_comm_base->status,
				    PCC_STS_SCI_DOORBELL))
		return;

	if (xgene_word_tst_and_clr(&generic_comm_base->status,
				   PCC_STS_CMD_COMPLETE)) {
		msg = generic_comm_base + 1;

		/* Response message msg[1] contains the return value. */
		if (ctx->resp_msg)
			*ctx->resp_msg = ((u32 *)msg)[1];

		complete(&ctx->rd_complete);
	}
}

static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg)
{
	struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
	u32 *ptr = (void *)(generic_comm_base + 1);
	u16 status;
	int i;

	WRITE_ONCE(generic_comm_base->signature,
		   cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx));

	WRITE_ONCE(generic_comm_base->command,
		   cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT));

	status = le16_to_cpu(READ_ONCE(generic_comm_base->status));
	status &= ~PCC_STS_CMD_COMPLETE;
	WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status));

	/* Copy the message to the PCC comm space */
	for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++)
		WRITE_ONCE(ptr[i], cpu_to_le32(msg[i]));
}

static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx)
{
	if (ctx->mbox_client.tx_block || !acpi_disabled) {
		if (!wait_for_completion_timeout(&ctx->rd_complete,
						 msecs_to_jiffies(MAILBOX_OP_TIMEOUT)))
			return -ETIMEDOUT;
	}

	/* Check of invalid data or no device */
	if (*ctx->resp_msg == 0xffffffff)
		return -ENODEV;

	return 0;
}

static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx,
				u32 *msg,
				u32 *data)
{
	int rc;

	ctx->resp_msg = data;

	if (!acpi_disabled) {
		reinit_completion(&ctx->rd_complete);
		slimpro_i2c_pcc_tx_prepare(ctx, msg);
	}

	rc = mbox_send_message(ctx->mbox_chan, msg);
	if (rc < 0)
		goto err;

	rc = start_i2c_msg_xfer(ctx);

err:
	if (!acpi_disabled)
		mbox_chan_txdone(ctx->mbox_chan, 0);

	ctx->resp_msg = NULL;

	return rc;
}

static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip,
			  u32 addr, u32 addrlen, u32 protocol,
			  u32 readlen, u32 *data)
{
	u32 msg[3];

	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
					SLIMPRO_IIC_READ, protocol, addrlen, readlen);
	msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
	msg[2] = 0;

	return slimpro_i2c_send_msg(ctx, msg, data);
}

static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip,
			  u32 addr, u32 addrlen, u32 protocol, u32 writelen,
			  u32 data)
{
	u32 msg[3];

	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
					SLIMPRO_IIC_WRITE, protocol, addrlen, writelen);
	msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
	msg[2] = data;

	return slimpro_i2c_send_msg(ctx, msg, msg);
}

static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr,
			     u32 addrlen, u32 protocol, u32 readlen,
			     u32 with_data_len, void *data)
{
	dma_addr_t paddr;
	u32 msg[3];
	int rc;

	paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE);
	if (dma_mapping_error(ctx->dev, paddr)) {
		dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
			ctx->dma_buffer);
		return -ENOMEM;
	}

	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ,
					protocol, addrlen, readlen);
	msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
		 SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) |
		 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
		 SLIMPRO_IIC_ENCODE_ADDR(addr);
	msg[2] = (u32)paddr;

	rc = slimpro_i2c_send_msg(ctx, msg, msg);

	/* Copy to destination */
	memcpy(data, ctx->dma_buffer, readlen);

	dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE);
	return rc;
}

static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip,
			     u32 addr, u32 addrlen, u32 protocol, u32 writelen,
			     void *data)
{
	dma_addr_t paddr;
	u32 msg[3];
	int rc;

	memcpy(ctx->dma_buffer, data, writelen);
	paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen,
			       DMA_TO_DEVICE);
	if (dma_mapping_error(ctx->dev, paddr)) {
		dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
			ctx->dma_buffer);
		return -ENOMEM;
	}

	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE,
					protocol, addrlen, writelen);
	msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
		 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
		 SLIMPRO_IIC_ENCODE_ADDR(addr);
	msg[2] = (u32)paddr;

	if (ctx->mbox_client.tx_block)
		reinit_completion(&ctx->rd_complete);

	rc = slimpro_i2c_send_msg(ctx, msg, msg);

	dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE);
	return rc;
}

static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr,
				  unsigned short flags, char read_write,
				  u8 command, int size,
				  union i2c_smbus_data *data)
{
	struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap);
	int ret = -EOPNOTSUPP;
	u32 val;

	switch (size) {
	case I2C_SMBUS_BYTE:
		if (read_write == I2C_SMBUS_READ) {
			ret = slimpro_i2c_rd(ctx, addr, 0, 0,
					     SLIMPRO_IIC_SMB_PROTOCOL,
					     BYTE_DATA, &val);
			data->byte = val;
		} else {
			ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
					     SLIMPRO_IIC_SMB_PROTOCOL,
					     0, 0);
		}
		break;
	case I2C_SMBUS_BYTE_DATA:
		if (read_write == I2C_SMBUS_READ) {
			ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
					     SLIMPRO_IIC_SMB_PROTOCOL,
					     BYTE_DATA, &val);
			data->byte = val;
		} else {
			val = data->byte;
			ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
					     SLIMPRO_IIC_SMB_PROTOCOL,
					     BYTE_DATA, val);
		}
		break;
	case I2C_SMBUS_WORD_DATA:
		if (read_write == I2C_SMBUS_READ) {
			ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
					     SLIMPRO_IIC_SMB_PROTOCOL,
					     WORD_DATA, &val);
			data->word = val;
		} else {
			val = data->word;
			ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
					     SLIMPRO_IIC_SMB_PROTOCOL,
					     WORD_DATA, val);
		}
		break;
	case I2C_SMBUS_BLOCK_DATA:
		if (read_write == I2C_SMBUS_READ) {
			ret = slimpro_i2c_blkrd(ctx, addr, command,
						SMBUS_CMD_LEN,
						SLIMPRO_IIC_SMB_PROTOCOL,
						I2C_SMBUS_BLOCK_MAX + 1,
						IIC_SMB_WITH_DATA_LEN,
						&data->block[0]);

		} else {
			ret = slimpro_i2c_blkwr(ctx, addr, command,
						SMBUS_CMD_LEN,
						SLIMPRO_IIC_SMB_PROTOCOL,
						data->block[0] + 1,
						&data->block[0]);
		}
		break;
	case I2C_SMBUS_I2C_BLOCK_DATA:
		if (read_write == I2C_SMBUS_READ) {
			ret = slimpro_i2c_blkrd(ctx, addr,
						command,
						SMBUS_CMD_LEN,
						SLIMPRO_IIC_I2C_PROTOCOL,
						I2C_SMBUS_BLOCK_MAX,
						IIC_SMB_WITHOUT_DATA_LEN,
						&data->block[1]);
		} else {
			ret = slimpro_i2c_blkwr(ctx, addr, command,
						SMBUS_CMD_LEN,
						SLIMPRO_IIC_I2C_PROTOCOL,
						data->block[0],
						&data->block[1]);
		}
		break;
	default:
		break;
	}
	return ret;
}

/*
* Return list of supported functionality.
*/
static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_BYTE |
		I2C_FUNC_SMBUS_BYTE_DATA |
		I2C_FUNC_SMBUS_WORD_DATA |
		I2C_FUNC_SMBUS_BLOCK_DATA |
		I2C_FUNC_SMBUS_I2C_BLOCK;
}

static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = {
	.smbus_xfer = xgene_slimpro_i2c_xfer,
	.functionality = xgene_slimpro_i2c_func,
};

static int xgene_slimpro_i2c_probe(struct platform_device *pdev)
{
	struct slimpro_i2c_dev *ctx;
	struct i2c_adapter *adapter;
	struct mbox_client *cl;
	int rc;

	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
	if (!ctx)
		return -ENOMEM;

	ctx->dev = &pdev->dev;
	platform_set_drvdata(pdev, ctx);
	cl = &ctx->mbox_client;

	/* Request mailbox channel */
	cl->dev = &pdev->dev;
	init_completion(&ctx->rd_complete);
	cl->tx_tout = MAILBOX_OP_TIMEOUT;
	cl->knows_txdone = false;
	if (acpi_disabled) {
		cl->tx_block = true;
		cl->rx_callback = slimpro_i2c_rx_cb;
		ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX);
		if (IS_ERR(ctx->mbox_chan)) {
			dev_err(&pdev->dev, "i2c mailbox channel request failed\n");
			return PTR_ERR(ctx->mbox_chan);
		}
	} else {
		struct acpi_pcct_hw_reduced *cppc_ss;
		const struct acpi_device_id *acpi_id;
		int version = XGENE_SLIMPRO_I2C_V1;

		acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table,
					    &pdev->dev);
		if (!acpi_id)
			return -EINVAL;

		version = (int)acpi_id->driver_data;

		if (device_property_read_u32(&pdev->dev, "pcc-channel",
					     &ctx->mbox_idx))
			ctx->mbox_idx = MAILBOX_I2C_INDEX;

		cl->tx_block = false;
		cl->rx_callback = slimpro_i2c_pcc_rx_cb;
		ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx);
		if (IS_ERR(ctx->mbox_chan)) {
			dev_err(&pdev->dev, "PCC mailbox channel request failed\n");
			return PTR_ERR(ctx->mbox_chan);
		}

		/*
		 * The PCC mailbox controller driver should
		 * have parsed the PCCT (global table of all
		 * PCC channels) and stored pointers to the
		 * subspace communication region in con_priv.
		 */
		cppc_ss = ctx->mbox_chan->con_priv;
		if (!cppc_ss) {
			dev_err(&pdev->dev, "PPC subspace not found\n");
			rc = -ENOENT;
			goto mbox_err;
		}

		if (!ctx->mbox_chan->mbox->txdone_irq) {
			dev_err(&pdev->dev, "PCC IRQ not supported\n");
			rc = -ENOENT;
			goto mbox_err;
		}

		/*
		 * This is the shared communication region
		 * for the OS and Platform to communicate over.
		 */
		ctx->comm_base_addr = cppc_ss->base_address;
		if (ctx->comm_base_addr) {
			if (version == XGENE_SLIMPRO_I2C_V2)
				ctx->pcc_comm_addr = memremap(
							ctx->comm_base_addr,
							cppc_ss->length,
							MEMREMAP_WT);
			else
				ctx->pcc_comm_addr = memremap(
							ctx->comm_base_addr,
							cppc_ss->length,
							MEMREMAP_WB);
		} else {
			dev_err(&pdev->dev, "Failed to get PCC comm region\n");
			rc = -ENOENT;
			goto mbox_err;
		}

		if (!ctx->pcc_comm_addr) {
			dev_err(&pdev->dev,
				"Failed to ioremap PCC comm region\n");
			rc = -ENOMEM;
			goto mbox_err;
		}
	}
	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
	if (rc)
		dev_warn(&pdev->dev, "Unable to set dma mask\n");

	/* Setup I2C adapter */
	adapter = &ctx->adapter;
	snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C");
	adapter->algo = &xgene_slimpro_i2c_algorithm;
	adapter->class = I2C_CLASS_HWMON;
	adapter->dev.parent = &pdev->dev;
	adapter->dev.of_node = pdev->dev.of_node;
	ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev));
	i2c_set_adapdata(adapter, ctx);
	rc = i2c_add_adapter(adapter);
	if (rc)
		goto mbox_err;

	dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n");
	return 0;

mbox_err:
	if (acpi_disabled)
		mbox_free_channel(ctx->mbox_chan);
	else
		pcc_mbox_free_channel(ctx->mbox_chan);

	return rc;
}

static int xgene_slimpro_i2c_remove(struct platform_device *pdev)
{
	struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev);

	i2c_del_adapter(&ctx->adapter);

	if (acpi_disabled)
		mbox_free_channel(ctx->mbox_chan);
	else
		pcc_mbox_free_channel(ctx->mbox_chan);

	return 0;
}

static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = {
	{.compatible = "apm,xgene-slimpro-i2c" },
	{},
};
MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids);

#ifdef CONFIG_ACPI
static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = {
	{"APMC0D40", XGENE_SLIMPRO_I2C_V1},
	{"APMC0D8B", XGENE_SLIMPRO_I2C_V2},
	{}
};
MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids);
#endif

static struct platform_driver xgene_slimpro_i2c_driver = {
	.probe	= xgene_slimpro_i2c_probe,
	.remove	= xgene_slimpro_i2c_remove,
	.driver	= {
		.name	= "xgene-slimpro-i2c",
		.of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids),
		.acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids)
	},
};

module_platform_driver(xgene_slimpro_i2c_driver);

MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver");
MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
MODULE_AUTHOR("Hieu Le <hnle@apm.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
1ccea77e	1	// SPDX-License-Identifier: GPL-2.0-or-later
f6505fba FK	2	/*
	3	* X-Gene SLIMpro I2C Driver
	4	*
	5	* Copyright (c) 2014, Applied Micro Circuits Corporation
	6	* Author: Feng Kan <fkan@apm.com>
	7	* Author: Hieu Le <hnle@apm.com>
	8	*
f6505fba FK	9	* This driver provides support for X-Gene SLIMpro I2C device access
f6505fba FK	10	* using the APM X-Gene SLIMpro mailbox driver.
f6505fba	11	*/
df5da47f	12	#include <acpi/pcc.h>
f6505fba FK	13	#include <linux/acpi.h>
	14	#include <linux/dma-mapping.h>
	15	#include <linux/i2c.h>
	16	#include <linux/interrupt.h>
063345ae	17	#include <linux/io.h>
f6505fba FK	18	#include <linux/mailbox_client.h>
	19	#include <linux/module.h>
	20	#include <linux/of.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/version.h>
	23
	24	#define MAILBOX_OP_TIMEOUT 1000 /* Operation time out in ms */
	25	#define MAILBOX_I2C_INDEX 0
	26	#define SLIMPRO_IIC_BUS 1 /* Use I2C bus 1 only */
	27
	28	#define SMBUS_CMD_LEN 1
	29	#define BYTE_DATA 1
	30	#define WORD_DATA 2
	31	#define BLOCK_DATA 3
	32
	33	#define SLIMPRO_IIC_I2C_PROTOCOL 0
	34	#define SLIMPRO_IIC_SMB_PROTOCOL 1
	35
	36	#define SLIMPRO_IIC_READ 0
	37	#define SLIMPRO_IIC_WRITE 1
	38
	39	#define IIC_SMB_WITHOUT_DATA_LEN 0
	40	#define IIC_SMB_WITH_DATA_LEN 1
	41
	42	#define SLIMPRO_DEBUG_MSG 0
	43	#define SLIMPRO_MSG_TYPE_SHIFT 28
	44	#define SLIMPRO_DBG_SUBTYPE_I2C1READ 4
	45	#define SLIMPRO_DBGMSG_TYPE_SHIFT 24
	46	#define SLIMPRO_DBGMSG_TYPE_MASK 0x0F000000U
	47	#define SLIMPRO_IIC_DEV_SHIFT 23
	48	#define SLIMPRO_IIC_DEV_MASK 0x00800000U
	49	#define SLIMPRO_IIC_DEVID_SHIFT 13
	50	#define SLIMPRO_IIC_DEVID_MASK 0x007FE000U
	51	#define SLIMPRO_IIC_RW_SHIFT 12
	52	#define SLIMPRO_IIC_RW_MASK 0x00001000U
	53	#define SLIMPRO_IIC_PROTO_SHIFT 11
	54	#define SLIMPRO_IIC_PROTO_MASK 0x00000800U
	55	#define SLIMPRO_IIC_ADDRLEN_SHIFT 8
	56	#define SLIMPRO_IIC_ADDRLEN_MASK 0x00000700U
	57	#define SLIMPRO_IIC_DATALEN_SHIFT 0
	58	#define SLIMPRO_IIC_DATALEN_MASK 0x000000FFU
	59
	60	/*
	61	* SLIMpro I2C message encode
	62	*
	63	* dev - Controller number (0-based)
	64	* chip - I2C chip address
	65	* op - SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE
	66	* proto - SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL
	67	* addrlen - Length of the address field
	68	* datalen - Length of the data field
	69	*/
	70	#define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \
	71	((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) \| \
	72	((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \
	73	SLIMPRO_DBGMSG_TYPE_MASK) \| \
	74	((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) \| \
	75	((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) \| \
	76	((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) \| \
	77	((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) \| \
	78	((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) \| \
	79	((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK))
	80
df5da47f HT	81	#define SLIMPRO_MSG_TYPE(v) (((v) & 0xF0000000) >> 28)
df5da47f HT	82
f6505fba FK	83	/*
	84	* Encode for upper address for block data
	85	*/
	86	#define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR 0x80000000
	87	#define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a) ((u32) (((a) << 30) \
	88	& 0x40000000))
	89	#define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a) ((u32) (((a) >> 12) \
	90	& 0x3FF00000))
	91	#define SLIMPRO_IIC_ENCODE_ADDR(a) ((a) & 0x000FFFFF)
	92
df5da47f HT	93	#define SLIMPRO_IIC_MSG_DWORD_COUNT 3
	94
	95	/* PCC related defines */
	96	#define PCC_SIGNATURE 0x50424300
	97	#define PCC_STS_CMD_COMPLETE BIT(0)
	98	#define PCC_STS_SCI_DOORBELL BIT(1)
	99	#define PCC_STS_ERR BIT(2)
	100	#define PCC_STS_PLAT_NOTIFY BIT(3)
	101	#define PCC_CMD_GENERATE_DB_INT BIT(15)
	102
f6505fba FK	103	struct slimpro_i2c_dev {
	104	struct i2c_adapter adapter;
	105	struct device *dev;
	106	struct mbox_chan *mbox_chan;
	107	struct mbox_client mbox_client;
df5da47f	108	int mbox_idx;
f6505fba	109	struct completion rd_complete;
60361601	110	u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */
f6505fba	111	u32 *resp_msg;
df5da47f HT	112	phys_addr_t comm_base_addr;
df5da47f HT	113	void *pcc_comm_addr;
f6505fba FK	114	};
	115
	116	#define to_slimpro_i2c_dev(cl) \
	117	container_of(cl, struct slimpro_i2c_dev, mbox_client)
	118
da24b824 HT	119	enum slimpro_i2c_version {
	120	XGENE_SLIMPRO_I2C_V1 = 0,
	121	XGENE_SLIMPRO_I2C_V2 = 1,
	122	};
	123
df5da47f HT	124	/*
	125	* This function tests and clears a bitmask then returns its old value
	126	*/
	127	static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask)
	128	{
	129	u16 ret, val;
	130
	131	val = le16_to_cpu(READ_ONCE(*addr));
	132	ret = val & mask;
	133	val &= ~mask;
	134	WRITE_ONCE(*addr, cpu_to_le16(val));
	135
	136	return ret;
	137	}
	138
f6505fba FK	139	static void slimpro_i2c_rx_cb(struct mbox_client cl, void mssg)
	140	{
	141	struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
	142
	143	/*
	144	* Response message format:
	145	* mssg[0] is the return code of the operation
	146	* mssg[1] is the first data word
	147	* mssg[2] is NOT used
	148	*/
	149	if (ctx->resp_msg)
	150	ctx->resp_msg = ((u32 )mssg)[1];
	151
	152	if (ctx->mbox_client.tx_block)
	153	complete(&ctx->rd_complete);
	154	}
	155
df5da47f HT	156	static void slimpro_i2c_pcc_rx_cb(struct mbox_client cl, void msg)
	157	{
	158	struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
	159	struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
	160
	161	/* Check if platform sends interrupt */
	162	if (!xgene_word_tst_and_clr(&generic_comm_base->status,
	163	PCC_STS_SCI_DOORBELL))
	164	return;
	165
	166	if (xgene_word_tst_and_clr(&generic_comm_base->status,
	167	PCC_STS_CMD_COMPLETE)) {
	168	msg = generic_comm_base + 1;
	169
	170	/* Response message msg[1] contains the return value. */
	171	if (ctx->resp_msg)
	172	ctx->resp_msg = ((u32 )msg)[1];
	173
	174	complete(&ctx->rd_complete);
	175	}
	176	}
	177
	178	static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev ctx, u32 msg)
	179	{
	180	struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
	181	u32 ptr = (void )(generic_comm_base + 1);
	182	u16 status;
	183	int i;
	184
	185	WRITE_ONCE(generic_comm_base->signature,
	186	cpu_to_le32(PCC_SIGNATURE \| ctx->mbox_idx));
	187
	188	WRITE_ONCE(generic_comm_base->command,
	189	cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) \| PCC_CMD_GENERATE_DB_INT));
	190
	191	status = le16_to_cpu(READ_ONCE(generic_comm_base->status));
	192	status &= ~PCC_STS_CMD_COMPLETE;
	193	WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status));
	194
	195	/* Copy the message to the PCC comm space */
	196	for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++)
	197	WRITE_ONCE(ptr[i], cpu_to_le32(msg[i]));
	198	}
	199
f6505fba FK	200	static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx)
f6505fba FK	201	{
df5da47f	202	if (ctx->mbox_client.tx_block \|\| !acpi_disabled) {
f6505fba FK	203	if (!wait_for_completion_timeout(&ctx->rd_complete,
	204	msecs_to_jiffies(MAILBOX_OP_TIMEOUT)))
	205	return -ETIMEDOUT;
	206	}
	207
	208	/* Check of invalid data or no device */
	209	if (*ctx->resp_msg == 0xffffffff)
	210	return -ENODEV;
	211
	212	return 0;
	213	}
	214
d140bd42 HT	215	static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx,
	216	u32 *msg,
	217	u32 *data)
f6505fba	218	{
f6505fba FK	219	int rc;
f6505fba FK	220
f6505fba	221	ctx->resp_msg = data;
d140bd42	222
df5da47f HT	223	if (!acpi_disabled) {
	224	reinit_completion(&ctx->rd_complete);
	225	slimpro_i2c_pcc_tx_prepare(ctx, msg);
	226	}
	227
d140bd42	228	rc = mbox_send_message(ctx->mbox_chan, msg);
f6505fba FK	229	if (rc < 0)
	230	goto err;
	231
	232	rc = start_i2c_msg_xfer(ctx);
d140bd42	233
f6505fba	234	err:
df5da47f HT	235	if (!acpi_disabled)
	236	mbox_chan_txdone(ctx->mbox_chan, 0);
	237
f6505fba	238	ctx->resp_msg = NULL;
d140bd42	239
f6505fba FK	240	return rc;
	241	}
	242
d140bd42 HT	243	static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip,
	244	u32 addr, u32 addrlen, u32 protocol,
	245	u32 readlen, u32 *data)
	246	{
	247	u32 msg[3];
	248
	249	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
	250	SLIMPRO_IIC_READ, protocol, addrlen, readlen);
	251	msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
	252	msg[2] = 0;
	253
	254	return slimpro_i2c_send_msg(ctx, msg, data);
	255	}
	256
f6505fba FK	257	static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip,
	258	u32 addr, u32 addrlen, u32 protocol, u32 writelen,
	259	u32 data)
	260	{
	261	u32 msg[3];
f6505fba FK	262
	263	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
	264	SLIMPRO_IIC_WRITE, protocol, addrlen, writelen);
	265	msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
	266	msg[2] = data;
f6505fba	267
d140bd42	268	return slimpro_i2c_send_msg(ctx, msg, msg);
f6505fba FK	269	}
	270
	271	static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr,
	272	u32 addrlen, u32 protocol, u32 readlen,
	273	u32 with_data_len, void *data)
	274	{
	275	dma_addr_t paddr;
	276	u32 msg[3];
	277	int rc;
	278
	279	paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE);
a4a9a8cb	280	if (dma_mapping_error(ctx->dev, paddr)) {
f6505fba FK	281	dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
f6505fba FK	282	ctx->dma_buffer);
d140bd42	283	return -ENOMEM;
f6505fba FK	284	}
	285
	286	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ,
	287	protocol, addrlen, readlen);
	288	msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR \|
	289	SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) \|
	290	SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) \|
	291	SLIMPRO_IIC_ENCODE_ADDR(addr);
	292	msg[2] = (u32)paddr;
f6505fba	293
d140bd42	294	rc = slimpro_i2c_send_msg(ctx, msg, msg);
f6505fba FK	295
	296	/* Copy to destination */
	297	memcpy(data, ctx->dma_buffer, readlen);
	298
f6505fba	299	dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE);
f6505fba FK	300	return rc;
	301	}
	302
	303	static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip,
	304	u32 addr, u32 addrlen, u32 protocol, u32 writelen,
	305	void *data)
	306	{
	307	dma_addr_t paddr;
	308	u32 msg[3];
	309	int rc;
	310
	311	memcpy(ctx->dma_buffer, data, writelen);
	312	paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen,
	313	DMA_TO_DEVICE);
a4a9a8cb	314	if (dma_mapping_error(ctx->dev, paddr)) {
f6505fba FK	315	dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
f6505fba FK	316	ctx->dma_buffer);
d140bd42	317	return -ENOMEM;
f6505fba FK	318	}
	319
	320	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE,
	321	protocol, addrlen, writelen);
	322	msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR \|
	323	SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) \|
	324	SLIMPRO_IIC_ENCODE_ADDR(addr);
	325	msg[2] = (u32)paddr;
f6505fba FK	326
	327	if (ctx->mbox_client.tx_block)
	328	reinit_completion(&ctx->rd_complete);
	329
d140bd42	330	rc = slimpro_i2c_send_msg(ctx, msg, msg);
f6505fba	331
f6505fba	332	dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE);
f6505fba FK	333	return rc;
	334	}
	335
	336	static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr,
	337	unsigned short flags, char read_write,
	338	u8 command, int size,
	339	union i2c_smbus_data *data)
	340	{
	341	struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap);
	342	int ret = -EOPNOTSUPP;
	343	u32 val;
	344
	345	switch (size) {
	346	case I2C_SMBUS_BYTE:
	347	if (read_write == I2C_SMBUS_READ) {
	348	ret = slimpro_i2c_rd(ctx, addr, 0, 0,
	349	SLIMPRO_IIC_SMB_PROTOCOL,
	350	BYTE_DATA, &val);
	351	data->byte = val;
	352	} else {
	353	ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
	354	SLIMPRO_IIC_SMB_PROTOCOL,
	355	0, 0);
	356	}
	357	break;
	358	case I2C_SMBUS_BYTE_DATA:
	359	if (read_write == I2C_SMBUS_READ) {
	360	ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
	361	SLIMPRO_IIC_SMB_PROTOCOL,
	362	BYTE_DATA, &val);
	363	data->byte = val;
	364	} else {
	365	val = data->byte;
	366	ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
	367	SLIMPRO_IIC_SMB_PROTOCOL,
	368	BYTE_DATA, val);
	369	}
	370	break;
	371	case I2C_SMBUS_WORD_DATA:
	372	if (read_write == I2C_SMBUS_READ) {
	373	ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
	374	SLIMPRO_IIC_SMB_PROTOCOL,
	375	WORD_DATA, &val);
	376	data->word = val;
	377	} else {
	378	val = data->word;
	379	ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
	380	SLIMPRO_IIC_SMB_PROTOCOL,
	381	WORD_DATA, val);
	382	}
	383	break;
	384	case I2C_SMBUS_BLOCK_DATA:
	385	if (read_write == I2C_SMBUS_READ) {
	386	ret = slimpro_i2c_blkrd(ctx, addr, command,
	387	SMBUS_CMD_LEN,
	388	SLIMPRO_IIC_SMB_PROTOCOL,
	389	I2C_SMBUS_BLOCK_MAX + 1,
	390	IIC_SMB_WITH_DATA_LEN,
	391	&data->block[0]);
	392
	393	} else {
	394	ret = slimpro_i2c_blkwr(ctx, addr, command,
	395	SMBUS_CMD_LEN,
	396	SLIMPRO_IIC_SMB_PROTOCOL,
397	data->block[0] + 1,
398	&data->block[0]);
399	}
400	break;
401	case I2C_SMBUS_I2C_BLOCK_DATA:
402	if (read_write == I2C_SMBUS_READ) {
403	ret = slimpro_i2c_blkrd(ctx, addr,
404	command,
405	SMBUS_CMD_LEN,
406	SLIMPRO_IIC_I2C_PROTOCOL,
407	I2C_SMBUS_BLOCK_MAX,
408	IIC_SMB_WITHOUT_DATA_LEN,
409	&data->block[1]);
410	} else {
411	ret = slimpro_i2c_blkwr(ctx, addr, command,
412	SMBUS_CMD_LEN,
413	SLIMPRO_IIC_I2C_PROTOCOL,
414	data->block[0],
415	&data->block[1]);
416	}
417	break;
418	default:
419	break;
420	}
421	return ret;
422	}
423
424	/*
425	* Return list of supported functionality.
426	*/
427	static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter)
428	{
429	return I2C_FUNC_SMBUS_BYTE \|
430	I2C_FUNC_SMBUS_BYTE_DATA \|
431	I2C_FUNC_SMBUS_WORD_DATA \|
432	I2C_FUNC_SMBUS_BLOCK_DATA \|
433	I2C_FUNC_SMBUS_I2C_BLOCK;
434	}
435
92d9d0df	436	static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = {
f6505fba FK	437	.smbus_xfer = xgene_slimpro_i2c_xfer,
	438	.functionality = xgene_slimpro_i2c_func,
	439	};
	440
d8453403	441	static int xgene_slimpro_i2c_probe(struct platform_device *pdev)
f6505fba FK	442	{
	443	struct slimpro_i2c_dev *ctx;
	444	struct i2c_adapter *adapter;
	445	struct mbox_client *cl;
	446	int rc;
	447
	448	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
	449	if (!ctx)
	450	return -ENOMEM;
	451
	452	ctx->dev = &pdev->dev;
	453	platform_set_drvdata(pdev, ctx);
	454	cl = &ctx->mbox_client;
	455
	456	/* Request mailbox channel */
	457	cl->dev = &pdev->dev;
f6505fba FK	458	init_completion(&ctx->rd_complete);
	459	cl->tx_tout = MAILBOX_OP_TIMEOUT;
	460	cl->knows_txdone = false;
df5da47f HT	461	if (acpi_disabled) {
	462	cl->tx_block = true;
	463	cl->rx_callback = slimpro_i2c_rx_cb;
	464	ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX);
	465	if (IS_ERR(ctx->mbox_chan)) {
	466	dev_err(&pdev->dev, "i2c mailbox channel request failed\n");
	467	return PTR_ERR(ctx->mbox_chan);
	468	}
	469	} else {
	470	struct acpi_pcct_hw_reduced *cppc_ss;
da24b824 HT	471	const struct acpi_device_id *acpi_id;
	472	int version = XGENE_SLIMPRO_I2C_V1;
	473
	474	acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table,
	475	&pdev->dev);
	476	if (!acpi_id)
	477	return -EINVAL;
	478
	479	version = (int)acpi_id->driver_data;
df5da47f HT	480
	481	if (device_property_read_u32(&pdev->dev, "pcc-channel",
	482	&ctx->mbox_idx))
	483	ctx->mbox_idx = MAILBOX_I2C_INDEX;
	484
	485	cl->tx_block = false;
	486	cl->rx_callback = slimpro_i2c_pcc_rx_cb;
	487	ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx);
	488	if (IS_ERR(ctx->mbox_chan)) {
	489	dev_err(&pdev->dev, "PCC mailbox channel request failed\n");
	490	return PTR_ERR(ctx->mbox_chan);
	491	}
	492
	493	/*
	494	* The PCC mailbox controller driver should
	495	* have parsed the PCCT (global table of all
	496	* PCC channels) and stored pointers to the
	497	* subspace communication region in con_priv.
	498	*/
	499	cppc_ss = ctx->mbox_chan->con_priv;
	500	if (!cppc_ss) {
	501	dev_err(&pdev->dev, "PPC subspace not found\n");
	502	rc = -ENOENT;
	503	goto mbox_err;
	504	}
	505
	506	if (!ctx->mbox_chan->mbox->txdone_irq) {
	507	dev_err(&pdev->dev, "PCC IRQ not supported\n");
	508	rc = -ENOENT;
	509	goto mbox_err;
	510	}
f6505fba	511
df5da47f HT	512	/*
	513	* This is the shared communication region
	514	* for the OS and Platform to communicate over.
	515	*/
	516	ctx->comm_base_addr = cppc_ss->base_address;
	517	if (ctx->comm_base_addr) {
da24b824 HT	518	if (version == XGENE_SLIMPRO_I2C_V2)
	519	ctx->pcc_comm_addr = memremap(
	520	ctx->comm_base_addr,
	521	cppc_ss->length,
	522	MEMREMAP_WT);
	523	else
	524	ctx->pcc_comm_addr = memremap(
	525	ctx->comm_base_addr,
	526	cppc_ss->length,
	527	MEMREMAP_WB);
df5da47f HT	528	} else {
	529	dev_err(&pdev->dev, "Failed to get PCC comm region\n");
	530	rc = -ENOENT;
	531	goto mbox_err;
	532	}
	533
	534	if (!ctx->pcc_comm_addr) {
	535	dev_err(&pdev->dev,
	536	"Failed to ioremap PCC comm region\n");
	537	rc = -ENOMEM;
	538	goto mbox_err;
	539	}
	540	}
f6505fba FK	541	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
	542	if (rc)
	543	dev_warn(&pdev->dev, "Unable to set dma mask\n");
	544
	545	/* Setup I2C adapter */
	546	adapter = &ctx->adapter;
	547	snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C");
	548	adapter->algo = &xgene_slimpro_i2c_algorithm;
	549	adapter->class = I2C_CLASS_HWMON;
	550	adapter->dev.parent = &pdev->dev;
1635c5d0	551	adapter->dev.of_node = pdev->dev.of_node;
83345d51	552	ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev));
f6505fba FK	553	i2c_set_adapdata(adapter, ctx);
f6505fba FK	554	rc = i2c_add_adapter(adapter);
df5da47f HT	555	if (rc)
df5da47f HT	556	goto mbox_err;
f6505fba FK	557
	558	dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n");
	559	return 0;
df5da47f HT	560
	561	mbox_err:
	562	if (acpi_disabled)
	563	mbox_free_channel(ctx->mbox_chan);
	564	else
	565	pcc_mbox_free_channel(ctx->mbox_chan);
	566
	567	return rc;
f6505fba FK	568	}
	569
	570	static int xgene_slimpro_i2c_remove(struct platform_device *pdev)
	571	{
	572	struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev);
	573
	574	i2c_del_adapter(&ctx->adapter);
	575
df5da47f HT	576	if (acpi_disabled)
	577	mbox_free_channel(ctx->mbox_chan);
	578	else
	579	pcc_mbox_free_channel(ctx->mbox_chan);
f6505fba FK	580
	581	return 0;
	582	}
	583
	584	static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = {
	585	{.compatible = "apm,xgene-slimpro-i2c" },
	586	{},
	587	};
	588	MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids);
	589
	590	#ifdef CONFIG_ACPI
	591	static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = {
da24b824 HT	592	{"APMC0D40", XGENE_SLIMPRO_I2C_V1},
da24b824 HT	593	{"APMC0D8B", XGENE_SLIMPRO_I2C_V2},
f6505fba FK	594	{}
	595	};
	596	MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids);
	597	#endif
	598
	599	static struct platform_driver xgene_slimpro_i2c_driver = {
	600	.probe = xgene_slimpro_i2c_probe,
	601	.remove = xgene_slimpro_i2c_remove,
	602	.driver = {
	603	.name = "xgene-slimpro-i2c",
	604	.of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids),
	605	.acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids)
	606	},
	607	};
	608
	609	module_platform_driver(xgene_slimpro_i2c_driver);
	610
	611	MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver");
	612	MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
	613	MODULE_AUTHOR("Hieu Le <hnle@apm.com>");
	614	MODULE_LICENSE("GPL");