[linux-block.git] / drivers / i2c / busses / i2c-sis630.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
    Copyright (c) 2002,2003 Alexander Malysh <amalysh@web.de>

*/

/*
   Status: beta

   Supports:
	SIS 630
	SIS 730
	SIS 964

   Notable differences between chips:
	+------------------------+--------------------+-------------------+
	|                        |     SIS630/730     |      SIS964       |
	+------------------------+--------------------+-------------------+
	| Clock                  | 14kHz/56kHz        | 55.56kHz/27.78kHz |
	| SMBus registers offset | 0x80               | 0xE0              |
	| SMB_CNT                | Bit 1 = Slave Busy | Bit 1 = Bus probe |
	|         (not used yet) | Bit 3 is reserved  | Bit 3 = Last byte |
	| SMB_PCOUNT		 | Offset + 0x06      | Offset + 0x14     |
	| SMB_COUNT              | 4:0 bits           | 5:0 bits          |
	+------------------------+--------------------+-------------------+
	(Other differences don't affect the functions provided by the driver)

   Note: we assume there can only be one device, with one SMBus interface.
*/

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/ioport.h>
#include <linux/i2c.h>
#include <linux/acpi.h>
#include <linux/io.h>

/* SIS964 id is defined here as we are the only file using it */
#define PCI_DEVICE_ID_SI_964	0x0964

/* SIS630/730/964 SMBus registers */
#define SMB_STS			0x00	/* status */
#define SMB_CNT			0x02	/* control */
#define SMBHOST_CNT		0x03	/* host control */
#define SMB_ADDR		0x04	/* address */
#define SMB_CMD			0x05	/* command */
#define SMB_COUNT		0x07	/* byte count */
#define SMB_BYTE		0x08	/* ~0x8F data byte field */

/* SMB_STS register */
#define BYTE_DONE_STS		0x10	/* Byte Done Status / Block Array */
#define SMBCOL_STS		0x04	/* Collision */
#define SMBERR_STS		0x02	/* Device error */

/* SMB_CNT register */
#define MSTO_EN			0x40	/* Host Master Timeout Enable */
#define SMBCLK_SEL		0x20	/* Host master clock selection */
#define SMB_PROBE		0x02	/* Bus Probe/Slave busy */
#define SMB_HOSTBUSY		0x01	/* Host Busy */

/* SMBHOST_CNT register */
#define SMB_KILL		0x20	/* Kill */
#define SMB_START		0x10	/* Start */

/* register count for request_region
 * As we don't use SMB_PCOUNT, 20 is ok for SiS630 and SiS964
 */
#define SIS630_SMB_IOREGION	20

/* PCI address constants */
/* acpi base address register  */
#define SIS630_ACPI_BASE_REG	0x74
/* bios control register */
#define SIS630_BIOS_CTL_REG	0x40

/* Other settings */
#define MAX_TIMEOUT		500

/* SIS630 constants */
#define SIS630_QUICK		0x00
#define SIS630_BYTE		0x01
#define SIS630_BYTE_DATA	0x02
#define SIS630_WORD_DATA	0x03
#define SIS630_PCALL		0x04
#define SIS630_BLOCK_DATA	0x05

static struct pci_driver sis630_driver;

/* insmod parameters */
static bool high_clock;
static bool force;
module_param(high_clock, bool, 0);
MODULE_PARM_DESC(high_clock,
	"Set Host Master Clock to 56KHz (default 14KHz) (SIS630/730 only).");
module_param(force, bool, 0);
MODULE_PARM_DESC(force, "Forcibly enable the SIS630. DANGEROUS!");

/* SMBus base address */
static unsigned short smbus_base;

/* supported chips */
static int supported[] = {
	PCI_DEVICE_ID_SI_630,
	PCI_DEVICE_ID_SI_730,
	PCI_DEVICE_ID_SI_760,
	0 /* terminates the list */
};

static inline u8 sis630_read(u8 reg)
{
	return inb(smbus_base + reg);
}

static inline void sis630_write(u8 reg, u8 data)
{
	outb(data, smbus_base + reg);
}

static int sis630_transaction_start(struct i2c_adapter *adap, int size,
				    u8 *oldclock)
{
	int temp;

	/* Make sure the SMBus host is ready to start transmitting. */
	temp = sis630_read(SMB_CNT);
	if ((temp & (SMB_PROBE | SMB_HOSTBUSY)) != 0x00) {
		dev_dbg(&adap->dev, "SMBus busy (%02x). Resetting...\n", temp);
		/* kill smbus transaction */
		sis630_write(SMBHOST_CNT, SMB_KILL);

		temp = sis630_read(SMB_CNT);
		if (temp & (SMB_PROBE | SMB_HOSTBUSY)) {
			dev_dbg(&adap->dev, "Failed! (%02x)\n", temp);
			return -EBUSY;
		} else {
			dev_dbg(&adap->dev, "Successful!\n");
		}
	}

	/* save old clock, so we can prevent machine for hung */
	*oldclock = sis630_read(SMB_CNT);

	dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock);

	/* disable timeout interrupt,
	 * set Host Master Clock to 56KHz if requested */
	if (high_clock)
		sis630_write(SMB_CNT, SMBCLK_SEL);
	else
		sis630_write(SMB_CNT, (*oldclock & ~MSTO_EN));

	/* clear all sticky bits */
	temp = sis630_read(SMB_STS);
	sis630_write(SMB_STS, temp & 0x1e);

	/* start the transaction by setting bit 4 and size */
	sis630_write(SMBHOST_CNT, SMB_START | (size & 0x07));

	return 0;
}

static int sis630_transaction_wait(struct i2c_adapter *adap, int size)
{
	int temp, result = 0, timeout = 0;

	/* We will always wait for a fraction of a second! */
	do {
		msleep(1);
		temp = sis630_read(SMB_STS);
		/* check if block transmitted */
		if (size == SIS630_BLOCK_DATA && (temp & BYTE_DONE_STS))
			break;
	} while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));

	/* If the SMBus is still busy, we give up */
	if (timeout > MAX_TIMEOUT) {
		dev_dbg(&adap->dev, "SMBus Timeout!\n");
		result = -ETIMEDOUT;
	}

	if (temp & SMBERR_STS) {
		dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
		result = -ENXIO;
	}

	if (temp & SMBCOL_STS) {
		dev_err(&adap->dev, "Bus collision!\n");
		result = -EAGAIN;
	}

	return result;
}

static void sis630_transaction_end(struct i2c_adapter *adap, u8 oldclock)
{
	/* clear all status "sticky" bits */
	sis630_write(SMB_STS, 0xFF);

	dev_dbg(&adap->dev,
		"SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT));

	/*
	 * restore old Host Master Clock if high_clock is set
	 * and oldclock was not 56KHz
	 */
	if (high_clock && !(oldclock & SMBCLK_SEL))
		sis630_write(SMB_CNT, sis630_read(SMB_CNT) & ~SMBCLK_SEL);

	dev_dbg(&adap->dev,
		"SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT));
}

static int sis630_transaction(struct i2c_adapter *adap, int size)
{
	int result = 0;
	u8 oldclock = 0;

	result = sis630_transaction_start(adap, size, &oldclock);
	if (!result) {
		result = sis630_transaction_wait(adap, size);
		sis630_transaction_end(adap, oldclock);
	}

	return result;
}

static int sis630_block_data(struct i2c_adapter *adap,
			     union i2c_smbus_data *data, int read_write)
{
	int i, len = 0, rc = 0;
	u8 oldclock = 0;

	if (read_write == I2C_SMBUS_WRITE) {
		len = data->block[0];
		if (len < 0)
			len = 0;
		else if (len > 32)
			len = 32;
		sis630_write(SMB_COUNT, len);
		for (i = 1; i <= len; i++) {
			dev_dbg(&adap->dev,
				"set data 0x%02x\n", data->block[i]);
			/* set data */
			sis630_write(SMB_BYTE + (i - 1) % 8, data->block[i]);
			if (i == 8 || (len < 8 && i == len)) {
				dev_dbg(&adap->dev,
					"start trans len=%d i=%d\n", len, i);
				/* first transaction */
				rc = sis630_transaction_start(adap,
						SIS630_BLOCK_DATA, &oldclock);
				if (rc)
					return rc;
			} else if ((i - 1) % 8 == 7 || i == len) {
				dev_dbg(&adap->dev,
					"trans_wait len=%d i=%d\n", len, i);
				if (i > 8) {
					dev_dbg(&adap->dev,
						"clear smbary_sts"
						" len=%d i=%d\n", len, i);
					/*
					   If this is not first transaction,
					   we must clear sticky bit.
					   clear SMBARY_STS
					*/
					sis630_write(SMB_STS, BYTE_DONE_STS);
				}
				rc = sis630_transaction_wait(adap,
						SIS630_BLOCK_DATA);
				if (rc) {
					dev_dbg(&adap->dev,
						"trans_wait failed\n");
					break;
				}
			}
		}
	} else {
		/* read request */
		data->block[0] = len = 0;
		rc = sis630_transaction_start(adap,
				SIS630_BLOCK_DATA, &oldclock);
		if (rc)
			return rc;
		do {
			rc = sis630_transaction_wait(adap, SIS630_BLOCK_DATA);
			if (rc) {
				dev_dbg(&adap->dev, "trans_wait failed\n");
				break;
			}
			/* if this first transaction then read byte count */
			if (len == 0)
				data->block[0] = sis630_read(SMB_COUNT);

			/* just to be sure */
			if (data->block[0] > 32)
				data->block[0] = 32;

			dev_dbg(&adap->dev,
				"block data read len=0x%x\n", data->block[0]);

			for (i = 0; i < 8 && len < data->block[0]; i++, len++) {
				dev_dbg(&adap->dev,
					"read i=%d len=%d\n", i, len);
				data->block[len + 1] = sis630_read(SMB_BYTE +
								   i);
			}

			dev_dbg(&adap->dev,
				"clear smbary_sts len=%d i=%d\n", len, i);

			/* clear SMBARY_STS */
			sis630_write(SMB_STS, BYTE_DONE_STS);
		} while (len < data->block[0]);
	}

	sis630_transaction_end(adap, oldclock);

	return rc;
}

/* Return negative errno on error. */
static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
			 unsigned short flags, char read_write,
			 u8 command, int size, union i2c_smbus_data *data)
{
	int status;

	switch (size) {
	case I2C_SMBUS_QUICK:
		sis630_write(SMB_ADDR,
			     ((addr & 0x7f) << 1) | (read_write & 0x01));
		size = SIS630_QUICK;
		break;
	case I2C_SMBUS_BYTE:
		sis630_write(SMB_ADDR,
			     ((addr & 0x7f) << 1) | (read_write & 0x01));
		if (read_write == I2C_SMBUS_WRITE)
			sis630_write(SMB_CMD, command);
		size = SIS630_BYTE;
		break;
	case I2C_SMBUS_BYTE_DATA:
		sis630_write(SMB_ADDR,
			     ((addr & 0x7f) << 1) | (read_write & 0x01));
		sis630_write(SMB_CMD, command);
		if (read_write == I2C_SMBUS_WRITE)
			sis630_write(SMB_BYTE, data->byte);
		size = SIS630_BYTE_DATA;
		break;
	case I2C_SMBUS_PROC_CALL:
	case I2C_SMBUS_WORD_DATA:
		sis630_write(SMB_ADDR,
			     ((addr & 0x7f) << 1) | (read_write & 0x01));
		sis630_write(SMB_CMD, command);
		if (read_write == I2C_SMBUS_WRITE) {
			sis630_write(SMB_BYTE, data->word & 0xff);
			sis630_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
		}
		size = (size == I2C_SMBUS_PROC_CALL ?
			SIS630_PCALL : SIS630_WORD_DATA);
		break;
	case I2C_SMBUS_BLOCK_DATA:
		sis630_write(SMB_ADDR,
			     ((addr & 0x7f) << 1) | (read_write & 0x01));
		sis630_write(SMB_CMD, command);
		size = SIS630_BLOCK_DATA;
		return sis630_block_data(adap, data, read_write);
	default:
		dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
		return -EOPNOTSUPP;
	}

	status = sis630_transaction(adap, size);
	if (status)
		return status;

	if ((size != SIS630_PCALL) &&
		((read_write == I2C_SMBUS_WRITE) || (size == SIS630_QUICK))) {
		return 0;
	}

	switch (size) {
	case SIS630_BYTE:
	case SIS630_BYTE_DATA:
		data->byte = sis630_read(SMB_BYTE);
		break;
	case SIS630_PCALL:
	case SIS630_WORD_DATA:
		data->word = sis630_read(SMB_BYTE) +
			     (sis630_read(SMB_BYTE + 1) << 8);
		break;
	}

	return 0;
}

static u32 sis630_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
		I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
		I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_DATA;
}

static int sis630_setup(struct pci_dev *sis630_dev)
{
	unsigned char b;
	struct pci_dev *dummy = NULL;
	int retval, i;
	/* acpi base address */
	unsigned short acpi_base;

	/* check for supported SiS devices */
	for (i = 0; supported[i] > 0; i++) {
		dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy);
		if (dummy)
			break; /* found */
	}

	if (dummy) {
		pci_dev_put(dummy);
	} else if (force) {
		dev_err(&sis630_dev->dev,
			"WARNING: Can't detect SIS630 compatible device, but "
			"loading because of force option enabled\n");
	} else {
		return -ENODEV;
	}

	/*
	   Enable ACPI first , so we can accsess reg 74-75
	   in acpi io space and read acpi base addr
	*/
	if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, &b)) {
		dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n");
		retval = -ENODEV;
		goto exit;
	}
	/* if ACPI already enabled , do nothing */
	if (!(b & 0x80) &&
	    pci_write_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, b | 0x80)) {
		dev_err(&sis630_dev->dev, "Error: Can't enable ACPI\n");
		retval = -ENODEV;
		goto exit;
	}

	/* Determine the ACPI base address */
	if (pci_read_config_word(sis630_dev,
				 SIS630_ACPI_BASE_REG, &acpi_base)) {
		dev_err(&sis630_dev->dev,
			"Error: Can't determine ACPI base address\n");
		retval = -ENODEV;
		goto exit;
	}

	dev_dbg(&sis630_dev->dev, "ACPI base at 0x%04hx\n", acpi_base);

	if (supported[i] == PCI_DEVICE_ID_SI_760)
		smbus_base = acpi_base + 0xE0;
	else
		smbus_base = acpi_base + 0x80;

	dev_dbg(&sis630_dev->dev, "SMBus base at 0x%04hx\n", smbus_base);

	retval = acpi_check_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
				   sis630_driver.name);
	if (retval)
		goto exit;

	/* Everything is happy, let's grab the memory and set things up. */
	if (!request_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
			    sis630_driver.name)) {
		dev_err(&sis630_dev->dev,
			"I/O Region 0x%04x-0x%04x for SMBus already in use.\n",
			smbus_base + SMB_STS,
			smbus_base + SMB_STS + SIS630_SMB_IOREGION - 1);
		retval = -EBUSY;
		goto exit;
	}

	retval = 0;

exit:
	if (retval)
		smbus_base = 0;
	return retval;
}


static const struct i2c_algorithm smbus_algorithm = {
	.smbus_xfer	= sis630_access,
	.functionality	= sis630_func,
};

static struct i2c_adapter sis630_adapter = {
	.owner		= THIS_MODULE,
	.class		= I2C_CLASS_HWMON,
	.algo		= &smbus_algorithm,
	.retries	= 3
};

static const struct pci_device_id sis630_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) },
	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_964) },
	{ 0, }
};

MODULE_DEVICE_TABLE(pci, sis630_ids);

static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	if (sis630_setup(dev)) {
		dev_err(&dev->dev,
			"SIS630 compatible bus not detected, "
			"module not inserted.\n");
		return -ENODEV;
	}

	/* set up the sysfs linkage to our parent device */
	sis630_adapter.dev.parent = &dev->dev;

	snprintf(sis630_adapter.name, sizeof(sis630_adapter.name),
		 "SMBus SIS630 adapter at %04x", smbus_base + SMB_STS);

	return i2c_add_adapter(&sis630_adapter);
}

static void sis630_remove(struct pci_dev *dev)
{
	if (smbus_base) {
		i2c_del_adapter(&sis630_adapter);
		release_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION);
		smbus_base = 0;
	}
}


static struct pci_driver sis630_driver = {
	.name		= "sis630_smbus",
	.id_table	= sis630_ids,
	.probe		= sis630_probe,
	.remove		= sis630_remove,
};

module_pci_driver(sis630_driver);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Alexander Malysh <amalysh@web.de>");
MODULE_DESCRIPTION("SIS630 SMBus driver");
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4	2	/*
1da177e4 LT	3	Copyright (c) 2002,2003 Alexander Malysh <amalysh@web.de>
1da177e4 LT	4
1da177e4 LT	5	*/
1da177e4 LT	6
1da177e4 LT	7	/*
	8	Status: beta
	9
	10	Supports:
	11	SIS 630
	12	SIS 730
974d6a37 AD	13	SIS 964
	14
	15	Notable differences between chips:
	16	+------------------------+--------------------+-------------------+
	17	\| \| SIS630/730 \| SIS964 \|
	18	+------------------------+--------------------+-------------------+
	19	\| Clock \| 14kHz/56kHz \| 55.56kHz/27.78kHz \|
	20	\| SMBus registers offset \| 0x80 \| 0xE0 \|
	21	\| SMB_CNT \| Bit 1 = Slave Busy \| Bit 1 = Bus probe \|
	22	\| (not used yet) \| Bit 3 is reserved \| Bit 3 = Last byte \|
	23	\| SMB_PCOUNT \| Offset + 0x06 \| Offset + 0x14 \|
	24	\| SMB_COUNT \| 4:0 bits \| 5:0 bits \|
	25	+------------------------+--------------------+-------------------+
	26	(Other differences don't affect the functions provided by the driver)
1da177e4 LT	27
	28	Note: we assume there can only be one device, with one SMBus interface.
	29	*/
	30
1da177e4 LT	31	#include <linux/kernel.h>
	32	#include <linux/module.h>
	33	#include <linux/delay.h>
	34	#include <linux/pci.h>
	35	#include <linux/ioport.h>
1da177e4	36	#include <linux/i2c.h>
54fb4a05	37	#include <linux/acpi.h>
21782180	38	#include <linux/io.h>
1da177e4	39
974d6a37 AD	40	/* SIS964 id is defined here as we are the only file using it */
	41	#define PCI_DEVICE_ID_SI_964 0x0964
	42
	43	/* SIS630/730/964 SMBus registers */
	44	#define SMB_STS 0x00 /* status */
	45	#define SMB_CNT 0x02 /* control */
	46	#define SMBHOST_CNT 0x03 /* host control */
	47	#define SMB_ADDR 0x04 /* address */
	48	#define SMB_CMD 0x05 /* command */
	49	#define SMB_COUNT 0x07 /* byte count */
	50	#define SMB_BYTE 0x08 /* ~0x8F data byte field */
	51
a6e7d0ef AD	52	/* SMB_STS register */
	53	#define BYTE_DONE_STS 0x10 /* Byte Done Status / Block Array */
	54	#define SMBCOL_STS 0x04 /* Collision */
	55	#define SMBERR_STS 0x02 /* Device error */
	56
	57	/* SMB_CNT register */
	58	#define MSTO_EN 0x40 /* Host Master Timeout Enable */
	59	#define SMBCLK_SEL 0x20 /* Host master clock selection */
	60	#define SMB_PROBE 0x02 /* Bus Probe/Slave busy */
	61	#define SMB_HOSTBUSY 0x01 /* Host Busy */
	62
	63	/* SMBHOST_CNT register */
	64	#define SMB_KILL 0x20 /* Kill */
	65	#define SMB_START 0x10 /* Start */
	66
974d6a37 AD	67	/* register count for request_region
	68	* As we don't use SMB_PCOUNT, 20 is ok for SiS630 and SiS964
	69	*/
1da177e4 LT	70	#define SIS630_SMB_IOREGION 20
	71
	72	/* PCI address constants */
	73	/* acpi base address register */
	74	#define SIS630_ACPI_BASE_REG 0x74
	75	/* bios control register */
	76	#define SIS630_BIOS_CTL_REG 0x40
	77
	78	/* Other settings */
	79	#define MAX_TIMEOUT 500
	80
	81	/* SIS630 constants */
	82	#define SIS630_QUICK 0x00
	83	#define SIS630_BYTE 0x01
	84	#define SIS630_BYTE_DATA 0x02
	85	#define SIS630_WORD_DATA 0x03
	86	#define SIS630_PCALL 0x04
	87	#define SIS630_BLOCK_DATA 0x05
	88
d6072f84 JD	89	static struct pci_driver sis630_driver;
d6072f84 JD	90
1da177e4	91	/* insmod parameters */
90ab5ee9 RR	92	static bool high_clock;
90ab5ee9 RR	93	static bool force;
1da177e4	94	module_param(high_clock, bool, 0);
974d6a37 AD	95	MODULE_PARM_DESC(high_clock,
974d6a37 AD	96	"Set Host Master Clock to 56KHz (default 14KHz) (SIS630/730 only).");
1da177e4 LT	97	module_param(force, bool, 0);
	98	MODULE_PARM_DESC(force, "Forcibly enable the SIS630. DANGEROUS!");
	99
fdf23c62	100	/* SMBus base address */
974d6a37	101	static unsigned short smbus_base;
1da177e4 LT	102
	103	/* supported chips */
	104	static int supported[] = {
	105	PCI_DEVICE_ID_SI_630,
	106	PCI_DEVICE_ID_SI_730,
974d6a37	107	PCI_DEVICE_ID_SI_760,
1da177e4 LT	108	0 /* terminates the list */
	109	};
	110
	111	static inline u8 sis630_read(u8 reg)
	112	{
974d6a37	113	return inb(smbus_base + reg);
1da177e4 LT	114	}
	115
	116	static inline void sis630_write(u8 reg, u8 data)
	117	{
974d6a37	118	outb(data, smbus_base + reg);
1da177e4 LT	119	}
1da177e4 LT	120
91991f34 AD	121	static int sis630_transaction_start(struct i2c_adapter *adap, int size,
91991f34 AD	122	u8 *oldclock)
1da177e4	123	{
91991f34	124	int temp;
1da177e4 LT	125
1da177e4 LT	126	/* Make sure the SMBus host is ready to start transmitting. */
a6e7d0ef AD	127	temp = sis630_read(SMB_CNT);
	128	if ((temp & (SMB_PROBE \| SMB_HOSTBUSY)) != 0x00) {
	129	dev_dbg(&adap->dev, "SMBus busy (%02x). Resetting...\n", temp);
1da177e4	130	/* kill smbus transaction */
a6e7d0ef	131	sis630_write(SMBHOST_CNT, SMB_KILL);
1da177e4	132
a6e7d0ef AD	133	temp = sis630_read(SMB_CNT);
a6e7d0ef AD	134	if (temp & (SMB_PROBE \| SMB_HOSTBUSY)) {
1da177e4	135	dev_dbg(&adap->dev, "Failed! (%02x)\n", temp);
97140342	136	return -EBUSY;
91991f34	137	} else {
c5d21b7f	138	dev_dbg(&adap->dev, "Successful!\n");
1da177e4	139	}
91991f34	140	}
1da177e4 LT	141
	142	/* save old clock, so we can prevent machine for hung */
	143	*oldclock = sis630_read(SMB_CNT);
	144
	145	dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock);
	146
91991f34 AD	147	/* disable timeout interrupt,
91991f34 AD	148	* set Host Master Clock to 56KHz if requested */
1da177e4	149	if (high_clock)
a6e7d0ef	150	sis630_write(SMB_CNT, SMBCLK_SEL);
1da177e4	151	else
a6e7d0ef	152	sis630_write(SMB_CNT, (*oldclock & ~MSTO_EN));
1da177e4 LT	153
	154	/* clear all sticky bits */
	155	temp = sis630_read(SMB_STS);
	156	sis630_write(SMB_STS, temp & 0x1e);
	157
	158	/* start the transaction by setting bit 4 and size */
a6e7d0ef	159	sis630_write(SMBHOST_CNT, SMB_START \| (size & 0x07));
1da177e4 LT	160
	161	return 0;
	162	}
	163
	164	static int sis630_transaction_wait(struct i2c_adapter *adap, int size)
	165	{
	166	int temp, result = 0, timeout = 0;
	167
	168	/* We will always wait for a fraction of a second! */
	169	do {
	170	msleep(1);
	171	temp = sis630_read(SMB_STS);
	172	/* check if block transmitted */
a6e7d0ef	173	if (size == SIS630_BLOCK_DATA && (temp & BYTE_DONE_STS))
1da177e4 LT	174	break;
	175	} while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
	176
	177	/* If the SMBus is still busy, we give up */
4ccc28f7	178	if (timeout > MAX_TIMEOUT) {
1da177e4	179	dev_dbg(&adap->dev, "SMBus Timeout!\n");
97140342	180	result = -ETIMEDOUT;
1da177e4 LT	181	}
1da177e4 LT	182
a6e7d0ef	183	if (temp & SMBERR_STS) {
1da177e4	184	dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
97140342	185	result = -ENXIO;
1da177e4 LT	186	}
1da177e4 LT	187
a6e7d0ef	188	if (temp & SMBCOL_STS) {
1da177e4	189	dev_err(&adap->dev, "Bus collision!\n");
499b9194	190	result = -EAGAIN;
1da177e4 LT	191	}
	192
	193	return result;
	194	}
	195
	196	static void sis630_transaction_end(struct i2c_adapter *adap, u8 oldclock)
	197	{
1da177e4	198	/* clear all status "sticky" bits */
aa9e7a39	199	sis630_write(SMB_STS, 0xFF);
1da177e4	200
91991f34 AD	201	dev_dbg(&adap->dev,
91991f34 AD	202	"SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT));
1da177e4 LT	203
	204	/*
	205	* restore old Host Master Clock if high_clock is set
	206	* and oldclock was not 56KHz
	207	*/
a6e7d0ef AD	208	if (high_clock && !(oldclock & SMBCLK_SEL))
a6e7d0ef AD	209	sis630_write(SMB_CNT, sis630_read(SMB_CNT) & ~SMBCLK_SEL);
1da177e4	210
91991f34 AD	211	dev_dbg(&adap->dev,
91991f34 AD	212	"SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT));
1da177e4 LT	213	}
	214
	215	static int sis630_transaction(struct i2c_adapter *adap, int size)
	216	{
	217	int result = 0;
	218	u8 oldclock = 0;
	219
	220	result = sis630_transaction_start(adap, size, &oldclock);
	221	if (!result) {
	222	result = sis630_transaction_wait(adap, size);
	223	sis630_transaction_end(adap, oldclock);
	224	}
	225
	226	return result;
	227	}
	228
91991f34 AD	229	static int sis630_block_data(struct i2c_adapter *adap,
91991f34 AD	230	union i2c_smbus_data *data, int read_write)
1da177e4 LT	231	{
	232	int i, len = 0, rc = 0;
	233	u8 oldclock = 0;
	234
	235	if (read_write == I2C_SMBUS_WRITE) {
	236	len = data->block[0];
	237	if (len < 0)
	238	len = 0;
	239	else if (len > 32)
	240	len = 32;
	241	sis630_write(SMB_COUNT, len);
91991f34 AD	242	for (i = 1; i <= len; i++) {
	243	dev_dbg(&adap->dev,
	244	"set data 0x%02x\n", data->block[i]);
1da177e4	245	/* set data */
91991f34 AD	246	sis630_write(SMB_BYTE + (i - 1) % 8, data->block[i]);
	247	if (i == 8 \|\| (len < 8 && i == len)) {
	248	dev_dbg(&adap->dev,
	249	"start trans len=%d i=%d\n", len, i);
1da177e4	250	/* first transaction */
97140342 DB	251	rc = sis630_transaction_start(adap,
	252	SIS630_BLOCK_DATA, &oldclock);
	253	if (rc)
	254	return rc;
91991f34 AD	255	} else if ((i - 1) % 8 == 7 \|\| i == len) {
	256	dev_dbg(&adap->dev,
	257	"trans_wait len=%d i=%d\n", len, i);
	258	if (i > 8) {
	259	dev_dbg(&adap->dev,
	260	"clear smbary_sts"
	261	" len=%d i=%d\n", len, i);
1da177e4 LT	262	/*
	263	If this is not first transaction,
	264	we must clear sticky bit.
	265	clear SMBARY_STS
	266	*/
a6e7d0ef	267	sis630_write(SMB_STS, BYTE_DONE_STS);
1da177e4	268	}
97140342 DB	269	rc = sis630_transaction_wait(adap,
	270	SIS630_BLOCK_DATA);
	271	if (rc) {
91991f34 AD	272	dev_dbg(&adap->dev,
91991f34 AD	273	"trans_wait failed\n");
1da177e4 LT	274	break;
	275	}
	276	}
	277	}
91991f34	278	} else {
1da177e4 LT	279	/* read request */
1da177e4 LT	280	data->block[0] = len = 0;
97140342 DB	281	rc = sis630_transaction_start(adap,
	282	SIS630_BLOCK_DATA, &oldclock);
	283	if (rc)
	284	return rc;
1da177e4	285	do {
97140342 DB	286	rc = sis630_transaction_wait(adap, SIS630_BLOCK_DATA);
97140342 DB	287	if (rc) {
1da177e4	288	dev_dbg(&adap->dev, "trans_wait failed\n");
1da177e4 LT	289	break;
	290	}
	291	/* if this first transaction then read byte count */
	292	if (len == 0)
	293	data->block[0] = sis630_read(SMB_COUNT);
	294
	295	/* just to be sure */
	296	if (data->block[0] > 32)
	297	data->block[0] = 32;
	298
91991f34 AD	299	dev_dbg(&adap->dev,
91991f34 AD	300	"block data read len=0x%x\n", data->block[0]);
1da177e4	301
91991f34 AD	302	for (i = 0; i < 8 && len < data->block[0]; i++, len++) {
	303	dev_dbg(&adap->dev,
	304	"read i=%d len=%d\n", i, len);
	305	data->block[len + 1] = sis630_read(SMB_BYTE +
	306	i);
1da177e4 LT	307	}
1da177e4 LT	308
91991f34 AD	309	dev_dbg(&adap->dev,
91991f34 AD	310	"clear smbary_sts len=%d i=%d\n", len, i);
1da177e4 LT	311
1da177e4 LT	312	/* clear SMBARY_STS */
a6e7d0ef	313	sis630_write(SMB_STS, BYTE_DONE_STS);
91991f34	314	} while (len < data->block[0]);
1da177e4 LT	315	}
	316
	317	sis630_transaction_end(adap, oldclock);
	318
	319	return rc;
	320	}
	321
97140342	322	/* Return negative errno on error. */
1da177e4 LT	323	static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
	324	unsigned short flags, char read_write,
	325	u8 command, int size, union i2c_smbus_data *data)
	326	{
97140342 DB	327	int status;
97140342 DB	328
1da177e4	329	switch (size) {
91991f34 AD	330	case I2C_SMBUS_QUICK:
	331	sis630_write(SMB_ADDR,
	332	((addr & 0x7f) << 1) \| (read_write & 0x01));
	333	size = SIS630_QUICK;
	334	break;
	335	case I2C_SMBUS_BYTE:
	336	sis630_write(SMB_ADDR,
	337	((addr & 0x7f) << 1) \| (read_write & 0x01));
	338	if (read_write == I2C_SMBUS_WRITE)
1da177e4	339	sis630_write(SMB_CMD, command);
91991f34 AD	340	size = SIS630_BYTE;
	341	break;
	342	case I2C_SMBUS_BYTE_DATA:
	343	sis630_write(SMB_ADDR,
	344	((addr & 0x7f) << 1) \| (read_write & 0x01));
	345	sis630_write(SMB_CMD, command);
	346	if (read_write == I2C_SMBUS_WRITE)
	347	sis630_write(SMB_BYTE, data->byte);
	348	size = SIS630_BYTE_DATA;
	349	break;
	350	case I2C_SMBUS_PROC_CALL:
	351	case I2C_SMBUS_WORD_DATA:
	352	sis630_write(SMB_ADDR,
	353	((addr & 0x7f) << 1) \| (read_write & 0x01));
	354	sis630_write(SMB_CMD, command);
	355	if (read_write == I2C_SMBUS_WRITE) {
	356	sis630_write(SMB_BYTE, data->word & 0xff);
	357	sis630_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
	358	}
	359	size = (size == I2C_SMBUS_PROC_CALL ?
	360	SIS630_PCALL : SIS630_WORD_DATA);
	361	break;
	362	case I2C_SMBUS_BLOCK_DATA:
	363	sis630_write(SMB_ADDR,
	364	((addr & 0x7f) << 1) \| (read_write & 0x01));
	365	sis630_write(SMB_CMD, command);
	366	size = SIS630_BLOCK_DATA;
	367	return sis630_block_data(adap, data, read_write);
	368	default:
	369	dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
	370	return -EOPNOTSUPP;
1da177e4 LT	371	}
1da177e4 LT	372
97140342 DB	373	status = sis630_transaction(adap, size);
	374	if (status)
	375	return status;
1da177e4 LT	376
	377	if ((size != SIS630_PCALL) &&
	378	((read_write == I2C_SMBUS_WRITE) \|\| (size == SIS630_QUICK))) {
	379	return 0;
	380	}
	381
91991f34 AD	382	switch (size) {
	383	case SIS630_BYTE:
	384	case SIS630_BYTE_DATA:
	385	data->byte = sis630_read(SMB_BYTE);
	386	break;
	387	case SIS630_PCALL:
	388	case SIS630_WORD_DATA:
	389	data->word = sis630_read(SMB_BYTE) +
	390	(sis630_read(SMB_BYTE + 1) << 8);
	391	break;
1da177e4 LT	392	}
	393
	394	return 0;
	395	}
	396
	397	static u32 sis630_func(struct i2c_adapter *adapter)
	398	{
91991f34 AD	399	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
	400	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
	401	I2C_FUNC_SMBUS_PROC_CALL \| I2C_FUNC_SMBUS_BLOCK_DATA;
1da177e4 LT	402	}
1da177e4 LT	403
0b255e92	404	static int sis630_setup(struct pci_dev *sis630_dev)
1da177e4 LT	405	{
	406	unsigned char b;
	407	struct pci_dev *dummy = NULL;
7c1f59c9	408	int retval, i;
974d6a37 AD	409	/* acpi base address */
974d6a37 AD	410	unsigned short acpi_base;
1da177e4 LT	411
1da177e4 LT	412	/* check for supported SiS devices */
91991f34 AD	413	for (i = 0; supported[i] > 0; i++) {
	414	dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy);
	415	if (dummy)
1da177e4 LT	416	break; /* found */
	417	}
	418
	419	if (dummy) {
	420	pci_dev_put(dummy);
91991f34 AD	421	} else if (force) {
	422	dev_err(&sis630_dev->dev,
	423	"WARNING: Can't detect SIS630 compatible device, but "
1da177e4	424	"loading because of force option enabled\n");
91991f34	425	} else {
1da177e4 LT	426	return -ENODEV;
	427	}
	428
	429	/*
	430	Enable ACPI first , so we can accsess reg 74-75
	431	in acpi io space and read acpi base addr
	432	*/
91991f34	433	if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, &b)) {
1da177e4	434	dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n");
7c1f59c9	435	retval = -ENODEV;
1da177e4 LT	436	goto exit;
	437	}
	438	/* if ACPI already enabled , do nothing */
	439	if (!(b & 0x80) &&
	440	pci_write_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, b \| 0x80)) {
	441	dev_err(&sis630_dev->dev, "Error: Can't enable ACPI\n");
7c1f59c9	442	retval = -ENODEV;
1da177e4 LT	443	goto exit;
	444	}
	445
	446	/* Determine the ACPI base address */
91991f34 AD	447	if (pci_read_config_word(sis630_dev,
	448	SIS630_ACPI_BASE_REG, &acpi_base)) {
	449	dev_err(&sis630_dev->dev,
	450	"Error: Can't determine ACPI base address\n");
7c1f59c9	451	retval = -ENODEV;
1da177e4 LT	452	goto exit;
	453	}
	454
97da42dc	455	dev_dbg(&sis630_dev->dev, "ACPI base at 0x%04hx\n", acpi_base);
1da177e4	456
974d6a37 AD	457	if (supported[i] == PCI_DEVICE_ID_SI_760)
	458	smbus_base = acpi_base + 0xE0;
	459	else
	460	smbus_base = acpi_base + 0x80;
	461
	462	dev_dbg(&sis630_dev->dev, "SMBus base at 0x%04hx\n", smbus_base);
	463
	464	retval = acpi_check_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
54fb4a05 JD	465	sis630_driver.name);
	466	if (retval)
	467	goto exit;
	468
1da177e4	469	/* Everything is happy, let's grab the memory and set things up. */
974d6a37	470	if (!request_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
d6072f84	471	sis630_driver.name)) {
974d6a37	472	dev_err(&sis630_dev->dev,
60f7691c	473	"I/O Region 0x%04x-0x%04x for SMBus already in use.\n",
974d6a37 AD	474	smbus_base + SMB_STS,
974d6a37 AD	475	smbus_base + SMB_STS + SIS630_SMB_IOREGION - 1);
7c1f59c9	476	retval = -EBUSY;
1da177e4 LT	477	goto exit;
	478	}
	479
	480	retval = 0;
	481
	482	exit:
	483	if (retval)
974d6a37	484	smbus_base = 0;
1da177e4 LT	485	return retval;
	486	}
	487
	488
8f9082c5	489	static const struct i2c_algorithm smbus_algorithm = {
1da177e4 LT	490	.smbus_xfer = sis630_access,
	491	.functionality = sis630_func,
	492	};
	493
	494	static struct i2c_adapter sis630_adapter = {
	495	.owner = THIS_MODULE,
9fd12f38	496	.class = I2C_CLASS_HWMON,
1da177e4	497	.algo = &smbus_algorithm,
974d6a37	498	.retries = 3
1da177e4 LT	499	};
1da177e4 LT	500
392debf1	501	static const struct pci_device_id sis630_ids[] = {
1da177e4 LT	502	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
1da177e4 LT	503	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) },
974d6a37	504	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_964) },
1da177e4 LT	505	{ 0, }
	506	};
	507
91991f34	508	MODULE_DEVICE_TABLE(pci, sis630_ids);
1da177e4	509
0b255e92	510	static int sis630_probe(struct pci_dev dev, const struct pci_device_id id)
1da177e4 LT	511	{
1da177e4 LT	512	if (sis630_setup(dev)) {
91991f34 AD	513	dev_err(&dev->dev,
	514	"SIS630 compatible bus not detected, "
	515	"module not inserted.\n");
1da177e4 LT	516	return -ENODEV;
	517	}
	518
405ae7d3	519	/* set up the sysfs linkage to our parent device */
1da177e4 LT	520	sis630_adapter.dev.parent = &dev->dev;
1da177e4 LT	521
66c7acf6	522	snprintf(sis630_adapter.name, sizeof(sis630_adapter.name),
60f7691c	523	"SMBus SIS630 adapter at %04x", smbus_base + SMB_STS);
1da177e4 LT	524
	525	return i2c_add_adapter(&sis630_adapter);
	526	}
	527
0b255e92	528	static void sis630_remove(struct pci_dev *dev)
1da177e4	529	{
974d6a37	530	if (smbus_base) {
1da177e4	531	i2c_del_adapter(&sis630_adapter);
974d6a37 AD	532	release_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION);
974d6a37 AD	533	smbus_base = 0;
1da177e4 LT	534	}
	535	}
	536
	537
	538	static struct pci_driver sis630_driver = {
	539	.name = "sis630_smbus",
	540	.id_table = sis630_ids,
	541	.probe = sis630_probe,
0b255e92	542	.remove = sis630_remove,
1da177e4 LT	543	};
1da177e4 LT	544
56f21788	545	module_pci_driver(sis630_driver);
1da177e4 LT	546
	547	MODULE_LICENSE("GPL");
	548	MODULE_AUTHOR("Alexander Malysh <amalysh@web.de>");
	549	MODULE_DESCRIPTION("SIS630 SMBus driver");