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a28d3af2 BH |
1 | /* |
2 | i2c Support for Apple SMU Controller | |
3 | ||
4 | Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp. | |
5 | <benh@kernel.crashing.org> | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | ||
21 | */ | |
22 | ||
a28d3af2 BH |
23 | #include <linux/module.h> |
24 | #include <linux/kernel.h> | |
25 | #include <linux/types.h> | |
26 | #include <linux/i2c.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/completion.h> | |
29 | #include <linux/device.h> | |
30 | #include <linux/platform_device.h> | |
31 | #include <asm/prom.h> | |
32 | #include <asm/pmac_low_i2c.h> | |
33 | ||
34 | MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>"); | |
35 | MODULE_DESCRIPTION("I2C driver for Apple PowerMac"); | |
36 | MODULE_LICENSE("GPL"); | |
37 | ||
38 | /* | |
39 | * SMBUS-type transfer entrypoint | |
40 | */ | |
41 | static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap, | |
42 | u16 addr, | |
43 | unsigned short flags, | |
44 | char read_write, | |
45 | u8 command, | |
46 | int size, | |
47 | union i2c_smbus_data* data) | |
48 | { | |
49 | struct pmac_i2c_bus *bus = i2c_get_adapdata(adap); | |
50 | int rc = 0; | |
51 | int read = (read_write == I2C_SMBUS_READ); | |
52 | int addrdir = (addr << 1) | read; | |
53 | u8 local[2]; | |
54 | ||
55 | rc = pmac_i2c_open(bus, 0); | |
56 | if (rc) | |
57 | return rc; | |
58 | ||
59 | switch (size) { | |
60 | case I2C_SMBUS_QUICK: | |
61 | rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std); | |
62 | if (rc) | |
63 | goto bail; | |
64 | rc = pmac_i2c_xfer(bus, addrdir, 0, 0, NULL, 0); | |
65 | break; | |
66 | case I2C_SMBUS_BYTE: | |
67 | rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std); | |
68 | if (rc) | |
69 | goto bail; | |
70 | rc = pmac_i2c_xfer(bus, addrdir, 0, 0, &data->byte, 1); | |
71 | break; | |
72 | case I2C_SMBUS_BYTE_DATA: | |
73 | rc = pmac_i2c_setmode(bus, read ? | |
74 | pmac_i2c_mode_combined : | |
75 | pmac_i2c_mode_stdsub); | |
76 | if (rc) | |
77 | goto bail; | |
78 | rc = pmac_i2c_xfer(bus, addrdir, 1, command, &data->byte, 1); | |
79 | break; | |
80 | case I2C_SMBUS_WORD_DATA: | |
81 | rc = pmac_i2c_setmode(bus, read ? | |
82 | pmac_i2c_mode_combined : | |
83 | pmac_i2c_mode_stdsub); | |
84 | if (rc) | |
85 | goto bail; | |
86 | if (!read) { | |
87 | local[0] = data->word & 0xff; | |
88 | local[1] = (data->word >> 8) & 0xff; | |
89 | } | |
90 | rc = pmac_i2c_xfer(bus, addrdir, 1, command, local, 2); | |
91 | if (rc == 0 && read) { | |
92 | data->word = ((u16)local[1]) << 8; | |
93 | data->word |= local[0]; | |
94 | } | |
95 | break; | |
96 | ||
97 | /* Note that these are broken vs. the expected smbus API where | |
98 | * on reads, the lenght is actually returned from the function, | |
99 | * but I think the current API makes no sense and I don't want | |
100 | * any driver that I haven't verified for correctness to go | |
101 | * anywhere near a pmac i2c bus anyway ... | |
102 | * | |
103 | * I'm also not completely sure what kind of phases to do between | |
104 | * the actual command and the data (what I am _supposed_ to do that | |
105 | * is). For now, I assume writes are a single stream and reads have | |
106 | * a repeat start/addr phase (but not stop in between) | |
107 | */ | |
108 | case I2C_SMBUS_BLOCK_DATA: | |
109 | rc = pmac_i2c_setmode(bus, read ? | |
110 | pmac_i2c_mode_combined : | |
111 | pmac_i2c_mode_stdsub); | |
112 | if (rc) | |
113 | goto bail; | |
114 | rc = pmac_i2c_xfer(bus, addrdir, 1, command, data->block, | |
115 | data->block[0] + 1); | |
116 | ||
117 | break; | |
118 | case I2C_SMBUS_I2C_BLOCK_DATA: | |
119 | rc = pmac_i2c_setmode(bus, read ? | |
120 | pmac_i2c_mode_combined : | |
121 | pmac_i2c_mode_stdsub); | |
122 | if (rc) | |
123 | goto bail; | |
124 | rc = pmac_i2c_xfer(bus, addrdir, 1, command, | |
125 | read ? data->block : &data->block[1], | |
126 | data->block[0]); | |
127 | break; | |
128 | ||
129 | default: | |
130 | rc = -EINVAL; | |
131 | } | |
132 | bail: | |
133 | pmac_i2c_close(bus); | |
134 | return rc; | |
135 | } | |
136 | ||
137 | /* | |
138 | * Generic i2c master transfer entrypoint. This driver only support single | |
139 | * messages (for "lame i2c" transfers). Anything else should use the smbus | |
140 | * entry point | |
141 | */ | |
142 | static int i2c_powermac_master_xfer( struct i2c_adapter *adap, | |
143 | struct i2c_msg *msgs, | |
144 | int num) | |
145 | { | |
146 | struct pmac_i2c_bus *bus = i2c_get_adapdata(adap); | |
147 | int rc = 0; | |
148 | int read; | |
149 | int addrdir; | |
150 | ||
151 | if (num != 1) | |
152 | return -EINVAL; | |
153 | if (msgs->flags & I2C_M_TEN) | |
154 | return -EINVAL; | |
155 | read = (msgs->flags & I2C_M_RD) != 0; | |
156 | addrdir = (msgs->addr << 1) | read; | |
157 | if (msgs->flags & I2C_M_REV_DIR_ADDR) | |
158 | addrdir ^= 1; | |
159 | ||
160 | rc = pmac_i2c_open(bus, 0); | |
161 | if (rc) | |
162 | return rc; | |
163 | rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std); | |
164 | if (rc) | |
165 | goto bail; | |
166 | rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len); | |
167 | bail: | |
168 | pmac_i2c_close(bus); | |
169 | return rc < 0 ? rc : msgs->len; | |
170 | } | |
171 | ||
172 | static u32 i2c_powermac_func(struct i2c_adapter * adapter) | |
173 | { | |
174 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | | |
175 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | | |
176 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_I2C; | |
177 | } | |
178 | ||
179 | /* For now, we only handle smbus */ | |
180 | static struct i2c_algorithm i2c_powermac_algorithm = { | |
181 | .smbus_xfer = i2c_powermac_smbus_xfer, | |
182 | .master_xfer = i2c_powermac_master_xfer, | |
183 | .functionality = i2c_powermac_func, | |
184 | }; | |
185 | ||
186 | ||
187 | static int i2c_powermac_remove(struct device *dev) | |
188 | { | |
189 | struct i2c_adapter *adapter = dev_get_drvdata(dev); | |
190 | struct pmac_i2c_bus *bus = i2c_get_adapdata(adapter); | |
191 | int rc; | |
192 | ||
193 | rc = i2c_del_adapter(adapter); | |
194 | pmac_i2c_detach_adapter(bus, adapter); | |
195 | i2c_set_adapdata(adapter, NULL); | |
196 | /* We aren't that prepared to deal with this... */ | |
197 | if (rc) | |
198 | printk("i2c-powermac.c: Failed to remove bus %s !\n", | |
199 | adapter->name); | |
200 | dev_set_drvdata(dev, NULL); | |
201 | kfree(adapter); | |
202 | ||
203 | return 0; | |
204 | } | |
205 | ||
206 | ||
207 | static int i2c_powermac_probe(struct device *dev) | |
208 | { | |
209 | struct pmac_i2c_bus *bus = dev->platform_data; | |
210 | struct device_node *parent = NULL; | |
211 | struct i2c_adapter *adapter; | |
212 | char name[32], *basename; | |
213 | int rc; | |
214 | ||
215 | if (bus == NULL) | |
216 | return -EINVAL; | |
217 | ||
218 | /* Ok, now we need to make up a name for the interface that will | |
219 | * match what we used to do in the past, that is basically the | |
220 | * controller's parent device node for keywest. PMU didn't have a | |
221 | * naming convention and SMU has a different one | |
222 | */ | |
223 | switch(pmac_i2c_get_type(bus)) { | |
224 | case pmac_i2c_bus_keywest: | |
225 | parent = of_get_parent(pmac_i2c_get_controller(bus)); | |
226 | if (parent == NULL) | |
227 | return -EINVAL; | |
228 | basename = parent->name; | |
229 | break; | |
230 | case pmac_i2c_bus_pmu: | |
231 | basename = "pmu"; | |
232 | break; | |
233 | case pmac_i2c_bus_smu: | |
234 | /* This is not what we used to do but I'm fixing drivers at | |
235 | * the same time as this change | |
236 | */ | |
237 | basename = "smu"; | |
238 | break; | |
239 | default: | |
240 | return -EINVAL; | |
241 | } | |
242 | snprintf(name, 32, "%s %d", basename, pmac_i2c_get_channel(bus)); | |
243 | of_node_put(parent); | |
244 | ||
245 | adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL); | |
246 | if (adapter == NULL) { | |
247 | printk(KERN_ERR "i2c-powermac: can't allocate inteface !\n"); | |
248 | return -ENOMEM; | |
249 | } | |
250 | dev_set_drvdata(dev, adapter); | |
251 | strcpy(adapter->name, name); | |
252 | adapter->algo = &i2c_powermac_algorithm; | |
253 | i2c_set_adapdata(adapter, bus); | |
254 | adapter->dev.parent = dev; | |
255 | pmac_i2c_attach_adapter(bus, adapter); | |
256 | rc = i2c_add_adapter(adapter); | |
257 | if (rc) { | |
258 | printk(KERN_ERR "i2c-powermac: Adapter %s registration " | |
259 | "failed\n", name); | |
260 | i2c_set_adapdata(adapter, NULL); | |
261 | pmac_i2c_detach_adapter(bus, adapter); | |
262 | } | |
263 | ||
264 | printk(KERN_INFO "PowerMac i2c bus %s registered\n", name); | |
265 | return rc; | |
266 | } | |
267 | ||
268 | ||
269 | static struct device_driver i2c_powermac_driver = { | |
270 | .name = "i2c-powermac", | |
271 | .bus = &platform_bus_type, | |
272 | .probe = i2c_powermac_probe, | |
273 | .remove = i2c_powermac_remove, | |
274 | }; | |
275 | ||
276 | static int __init i2c_powermac_init(void) | |
277 | { | |
278 | driver_register(&i2c_powermac_driver); | |
279 | return 0; | |
280 | } | |
281 | ||
282 | ||
283 | static void __exit i2c_powermac_cleanup(void) | |
284 | { | |
285 | driver_unregister(&i2c_powermac_driver); | |
286 | } | |
287 | ||
288 | module_init(i2c_powermac_init); | |
289 | module_exit(i2c_powermac_cleanup); |