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1da177e4 LT |
1 | /* |
2 | SMBus driver for nVidia nForce2 MCP | |
3 | ||
4 | Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>, | |
5 | Ported to 2.5 Patrick Dreker <patrick@dreker.de>, | |
6 | Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>, | |
7 | Based on | |
8 | SMBus 2.0 driver for AMD-8111 IO-Hub | |
9 | Copyright (c) 2002 Vojtech Pavlik | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 2 of the License, or | |
14 | (at your option) any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with this program; if not, write to the Free Software | |
23 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
26 | /* | |
27 | SUPPORTED DEVICES PCI ID | |
28 | nForce2 MCP 0064 | |
29 | nForce2 Ultra 400 MCP 0084 | |
30 | nForce3 Pro150 MCP 00D4 | |
31 | nForce3 250Gb MCP 00E4 | |
32 | nForce4 MCP 0052 | |
33 | ||
34 | This driver supports the 2 SMBuses that are included in the MCP of the | |
35 | nForce2/3/4 chipsets. | |
36 | */ | |
37 | ||
38 | /* Note: we assume there can only be one nForce2, with two SMBus interfaces */ | |
39 | ||
1da177e4 LT |
40 | #include <linux/module.h> |
41 | #include <linux/pci.h> | |
42 | #include <linux/kernel.h> | |
43 | #include <linux/stddef.h> | |
44 | #include <linux/sched.h> | |
45 | #include <linux/ioport.h> | |
46 | #include <linux/init.h> | |
47 | #include <linux/i2c.h> | |
48 | #include <linux/delay.h> | |
49 | #include <asm/io.h> | |
50 | ||
51 | MODULE_LICENSE("GPL"); | |
52 | MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@arcor.de>"); | |
53 | MODULE_DESCRIPTION("nForce2 SMBus driver"); | |
54 | ||
55 | ||
56 | struct nforce2_smbus { | |
57 | struct pci_dev *dev; | |
58 | struct i2c_adapter adapter; | |
59 | int base; | |
60 | int size; | |
61 | }; | |
62 | ||
63 | ||
64 | /* | |
65 | * nVidia nForce2 SMBus control register definitions | |
66 | */ | |
67 | #define NFORCE_PCI_SMB1 0x50 | |
68 | #define NFORCE_PCI_SMB2 0x54 | |
69 | ||
70 | ||
71 | /* | |
72 | * ACPI 2.0 chapter 13 SMBus 2.0 EC register model | |
73 | */ | |
74 | #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */ | |
75 | #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */ | |
76 | #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */ | |
77 | #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */ | |
78 | #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */ | |
79 | #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data bytes */ | |
80 | #define NVIDIA_SMB_ALRM_A (smbus->base + 0x25) /* alarm address */ | |
81 | #define NVIDIA_SMB_ALRM_D (smbus->base + 0x26) /* 2 bytes alarm data */ | |
82 | ||
83 | #define NVIDIA_SMB_STS_DONE 0x80 | |
84 | #define NVIDIA_SMB_STS_ALRM 0x40 | |
85 | #define NVIDIA_SMB_STS_RES 0x20 | |
86 | #define NVIDIA_SMB_STS_STATUS 0x1f | |
87 | ||
88 | #define NVIDIA_SMB_PRTCL_WRITE 0x00 | |
89 | #define NVIDIA_SMB_PRTCL_READ 0x01 | |
90 | #define NVIDIA_SMB_PRTCL_QUICK 0x02 | |
91 | #define NVIDIA_SMB_PRTCL_BYTE 0x04 | |
92 | #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06 | |
93 | #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08 | |
94 | #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a | |
95 | #define NVIDIA_SMB_PRTCL_PROC_CALL 0x0c | |
96 | #define NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL 0x0d | |
97 | #define NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA 0x4a | |
98 | #define NVIDIA_SMB_PRTCL_PEC 0x80 | |
99 | ||
d6072f84 | 100 | static struct pci_driver nforce2_driver; |
1da177e4 | 101 | |
1da177e4 LT |
102 | static s32 nforce2_access(struct i2c_adapter *adap, u16 addr, |
103 | unsigned short flags, char read_write, | |
104 | u8 command, int size, union i2c_smbus_data *data); | |
105 | static u32 nforce2_func(struct i2c_adapter *adapter); | |
106 | ||
107 | ||
108 | static struct i2c_algorithm smbus_algorithm = { | |
1da177e4 LT |
109 | .smbus_xfer = nforce2_access, |
110 | .functionality = nforce2_func, | |
111 | }; | |
112 | ||
113 | static struct i2c_adapter nforce2_adapter = { | |
114 | .owner = THIS_MODULE, | |
115 | .class = I2C_CLASS_HWMON, | |
116 | .algo = &smbus_algorithm, | |
1da177e4 LT |
117 | }; |
118 | ||
119 | /* Return -1 on error. See smbus.h for more information */ | |
120 | static s32 nforce2_access(struct i2c_adapter * adap, u16 addr, | |
121 | unsigned short flags, char read_write, | |
122 | u8 command, int size, union i2c_smbus_data * data) | |
123 | { | |
124 | struct nforce2_smbus *smbus = adap->algo_data; | |
125 | unsigned char protocol, pec, temp; | |
126 | unsigned char len = 0; /* to keep the compiler quiet */ | |
1da177e4 LT |
127 | int i; |
128 | ||
129 | protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : | |
130 | NVIDIA_SMB_PRTCL_WRITE; | |
131 | pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0; | |
132 | ||
133 | switch (size) { | |
134 | ||
135 | case I2C_SMBUS_QUICK: | |
136 | protocol |= NVIDIA_SMB_PRTCL_QUICK; | |
137 | read_write = I2C_SMBUS_WRITE; | |
138 | break; | |
139 | ||
140 | case I2C_SMBUS_BYTE: | |
141 | if (read_write == I2C_SMBUS_WRITE) | |
142 | outb_p(command, NVIDIA_SMB_CMD); | |
143 | protocol |= NVIDIA_SMB_PRTCL_BYTE; | |
144 | break; | |
145 | ||
146 | case I2C_SMBUS_BYTE_DATA: | |
147 | outb_p(command, NVIDIA_SMB_CMD); | |
148 | if (read_write == I2C_SMBUS_WRITE) | |
149 | outb_p(data->byte, NVIDIA_SMB_DATA); | |
150 | protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA; | |
151 | break; | |
152 | ||
153 | case I2C_SMBUS_WORD_DATA: | |
154 | outb_p(command, NVIDIA_SMB_CMD); | |
155 | if (read_write == I2C_SMBUS_WRITE) { | |
156 | outb_p(data->word, NVIDIA_SMB_DATA); | |
157 | outb_p(data->word >> 8, NVIDIA_SMB_DATA+1); | |
158 | } | |
159 | protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; | |
160 | break; | |
161 | ||
162 | case I2C_SMBUS_BLOCK_DATA: | |
163 | outb_p(command, NVIDIA_SMB_CMD); | |
164 | if (read_write == I2C_SMBUS_WRITE) { | |
165 | len = min_t(u8, data->block[0], 32); | |
166 | outb_p(len, NVIDIA_SMB_BCNT); | |
167 | for (i = 0; i < len; i++) | |
168 | outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i); | |
169 | } | |
170 | protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec; | |
171 | break; | |
172 | ||
173 | case I2C_SMBUS_I2C_BLOCK_DATA: | |
174 | len = min_t(u8, data->block[0], 32); | |
175 | outb_p(command, NVIDIA_SMB_CMD); | |
176 | outb_p(len, NVIDIA_SMB_BCNT); | |
177 | if (read_write == I2C_SMBUS_WRITE) | |
178 | for (i = 0; i < len; i++) | |
179 | outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i); | |
180 | protocol |= NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA; | |
181 | break; | |
182 | ||
183 | case I2C_SMBUS_PROC_CALL: | |
184 | dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n"); | |
185 | return -1; | |
1da177e4 LT |
186 | |
187 | case I2C_SMBUS_BLOCK_PROC_CALL: | |
188 | dev_err(&adap->dev, "I2C_SMBUS_BLOCK_PROC_CALL not supported!\n"); | |
189 | return -1; | |
1da177e4 | 190 | |
1da177e4 LT |
191 | default: |
192 | dev_err(&adap->dev, "Unsupported transaction %d\n", size); | |
193 | return -1; | |
194 | } | |
195 | ||
196 | outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR); | |
197 | outb_p(protocol, NVIDIA_SMB_PRTCL); | |
198 | ||
199 | temp = inb_p(NVIDIA_SMB_STS); | |
200 | ||
1da177e4 LT |
201 | if (~temp & NVIDIA_SMB_STS_DONE) { |
202 | udelay(500); | |
203 | temp = inb_p(NVIDIA_SMB_STS); | |
204 | } | |
205 | if (~temp & NVIDIA_SMB_STS_DONE) { | |
206 | msleep(10); | |
207 | temp = inb_p(NVIDIA_SMB_STS); | |
208 | } | |
209 | ||
5033017c HFV |
210 | if ((~temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) { |
211 | dev_dbg(&adap->dev, "SMBus Timeout! (0x%02x)\n", temp); | |
1da177e4 | 212 | return -1; |
5033017c | 213 | } |
1da177e4 LT |
214 | |
215 | if (read_write == I2C_SMBUS_WRITE) | |
216 | return 0; | |
217 | ||
218 | switch (size) { | |
219 | ||
220 | case I2C_SMBUS_BYTE: | |
221 | case I2C_SMBUS_BYTE_DATA: | |
222 | data->byte = inb_p(NVIDIA_SMB_DATA); | |
223 | break; | |
224 | ||
225 | case I2C_SMBUS_WORD_DATA: | |
226 | /* case I2C_SMBUS_PROC_CALL: not supported */ | |
227 | data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8); | |
228 | break; | |
229 | ||
230 | case I2C_SMBUS_BLOCK_DATA: | |
231 | /* case I2C_SMBUS_BLOCK_PROC_CALL: not supported */ | |
232 | len = inb_p(NVIDIA_SMB_BCNT); | |
233 | len = min_t(u8, len, 32); | |
234 | case I2C_SMBUS_I2C_BLOCK_DATA: | |
235 | for (i = 0; i < len; i++) | |
236 | data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i); | |
237 | data->block[0] = len; | |
238 | break; | |
239 | } | |
240 | ||
241 | return 0; | |
242 | } | |
243 | ||
244 | ||
245 | static u32 nforce2_func(struct i2c_adapter *adapter) | |
246 | { | |
247 | /* other functionality might be possible, but is not tested */ | |
248 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | | |
249 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA /* | | |
250 | I2C_FUNC_SMBUS_BLOCK_DATA */; | |
251 | } | |
252 | ||
253 | ||
254 | static struct pci_device_id nforce2_ids[] = { | |
255 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, | |
256 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) }, | |
257 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) }, | |
258 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, | |
259 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) }, | |
260 | { 0 } | |
261 | }; | |
262 | ||
263 | ||
264 | MODULE_DEVICE_TABLE (pci, nforce2_ids); | |
265 | ||
266 | ||
267 | static int __devinit nforce2_probe_smb (struct pci_dev *dev, int reg, | |
268 | struct nforce2_smbus *smbus, char *name) | |
269 | { | |
270 | u16 iobase; | |
271 | int error; | |
272 | ||
273 | if (pci_read_config_word(dev, reg, &iobase) != PCIBIOS_SUCCESSFUL) { | |
274 | dev_err(&smbus->adapter.dev, "Error reading PCI config for %s\n", name); | |
275 | return -1; | |
276 | } | |
277 | smbus->dev = dev; | |
278 | smbus->base = iobase & 0xfffc; | |
279 | smbus->size = 8; | |
280 | ||
d6072f84 | 281 | if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { |
1da177e4 LT |
282 | dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", |
283 | smbus->base, smbus->base+smbus->size-1, name); | |
284 | return -1; | |
285 | } | |
286 | smbus->adapter = nforce2_adapter; | |
287 | smbus->adapter.algo_data = smbus; | |
288 | smbus->adapter.dev.parent = &dev->dev; | |
289 | snprintf(smbus->adapter.name, I2C_NAME_SIZE, | |
290 | "SMBus nForce2 adapter at %04x", smbus->base); | |
291 | ||
292 | error = i2c_add_adapter(&smbus->adapter); | |
293 | if (error) { | |
294 | dev_err(&smbus->adapter.dev, "Failed to register adapter.\n"); | |
295 | release_region(smbus->base, smbus->size); | |
296 | return -1; | |
297 | } | |
298 | dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base); | |
299 | return 0; | |
300 | } | |
301 | ||
302 | ||
303 | static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id) | |
304 | { | |
305 | struct nforce2_smbus *smbuses; | |
306 | int res1, res2; | |
307 | ||
308 | /* we support 2 SMBus adapters */ | |
078d9fe4 | 309 | if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL))) |
1da177e4 | 310 | return -ENOMEM; |
1da177e4 LT |
311 | pci_set_drvdata(dev, smbuses); |
312 | ||
313 | /* SMBus adapter 1 */ | |
314 | res1 = nforce2_probe_smb (dev, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); | |
315 | if (res1 < 0) { | |
316 | dev_err(&dev->dev, "Error probing SMB1.\n"); | |
317 | smbuses[0].base = 0; /* to have a check value */ | |
318 | } | |
319 | res2 = nforce2_probe_smb (dev, NFORCE_PCI_SMB2, &smbuses[1], "SMB2"); | |
320 | if (res2 < 0) { | |
321 | dev_err(&dev->dev, "Error probing SMB2.\n"); | |
322 | smbuses[1].base = 0; /* to have a check value */ | |
323 | } | |
324 | if ((res1 < 0) && (res2 < 0)) { | |
325 | /* we did not find even one of the SMBuses, so we give up */ | |
326 | kfree(smbuses); | |
327 | return -ENODEV; | |
328 | } | |
329 | ||
330 | return 0; | |
331 | } | |
332 | ||
333 | ||
334 | static void __devexit nforce2_remove(struct pci_dev *dev) | |
335 | { | |
336 | struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev); | |
337 | ||
338 | if (smbuses[0].base) { | |
339 | i2c_del_adapter(&smbuses[0].adapter); | |
340 | release_region(smbuses[0].base, smbuses[0].size); | |
341 | } | |
342 | if (smbuses[1].base) { | |
343 | i2c_del_adapter(&smbuses[1].adapter); | |
344 | release_region(smbuses[1].base, smbuses[1].size); | |
345 | } | |
346 | kfree(smbuses); | |
347 | } | |
348 | ||
349 | static struct pci_driver nforce2_driver = { | |
350 | .name = "nForce2_smbus", | |
351 | .id_table = nforce2_ids, | |
352 | .probe = nforce2_probe, | |
353 | .remove = __devexit_p(nforce2_remove), | |
354 | }; | |
355 | ||
356 | static int __init nforce2_init(void) | |
357 | { | |
358 | return pci_register_driver(&nforce2_driver); | |
359 | } | |
360 | ||
361 | static void __exit nforce2_exit(void) | |
362 | { | |
363 | pci_unregister_driver(&nforce2_driver); | |
364 | } | |
365 | ||
366 | module_init(nforce2_init); | |
367 | module_exit(nforce2_exit); | |
368 |