[linux-2.6-block.git] / drivers / i2c / busses / i2c-nforce2.c

/*
    SMBus driver for nVidia nForce2 MCP

    Added nForce3 Pro 150  Thomas Leibold <thomas@plx.com>,
	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
    Copyright (c) 2003  Hans-Frieder Vogt <hfvogt@arcor.de>,
    Based on
    SMBus 2.0 driver for AMD-8111 IO-Hub
    Copyright (c) 2002 Vojtech Pavlik

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

/*
    SUPPORTED DEVICES		PCI ID
    nForce2 MCP			0064
    nForce2 Ultra 400 MCP	0084
    nForce3 Pro150 MCP		00D4
    nForce3 250Gb MCP		00E4
    nForce4 MCP			0052
    nForce4 MCP-04		0034
    nForce4 MCP51		0264
    nForce4 MCP55		0368
    nForce MCP61		03EB
    nForce MCP65		0446

    This driver supports the 2 SMBuses that are included in the MCP of the
    nForce2/3/4/5xx chipsets.
*/

/* Note: we assume there can only be one nForce2, with two SMBus interfaces */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <asm/io.h>

MODULE_LICENSE("GPL");
MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");


struct nforce2_smbus {
	struct i2c_adapter adapter;
	int base;
	int size;
};


/*
 * nVidia nForce2 SMBus control register definitions
 * (Newer incarnations use standard BARs 4 and 5 instead)
 */
#define NFORCE_PCI_SMB1	0x50
#define NFORCE_PCI_SMB2	0x54


/*
 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
 */
#define NVIDIA_SMB_PRTCL	(smbus->base + 0x00)	/* protocol, PEC */
#define NVIDIA_SMB_STS		(smbus->base + 0x01)	/* status */
#define NVIDIA_SMB_ADDR		(smbus->base + 0x02)	/* address */
#define NVIDIA_SMB_CMD		(smbus->base + 0x03)	/* command */
#define NVIDIA_SMB_DATA		(smbus->base + 0x04)	/* 32 data registers */

#define NVIDIA_SMB_STS_DONE	0x80
#define NVIDIA_SMB_STS_ALRM	0x40
#define NVIDIA_SMB_STS_RES	0x20
#define NVIDIA_SMB_STS_STATUS	0x1f

#define NVIDIA_SMB_PRTCL_WRITE			0x00
#define NVIDIA_SMB_PRTCL_READ			0x01
#define NVIDIA_SMB_PRTCL_QUICK			0x02
#define NVIDIA_SMB_PRTCL_BYTE			0x04
#define NVIDIA_SMB_PRTCL_BYTE_DATA		0x06
#define NVIDIA_SMB_PRTCL_WORD_DATA		0x08
#define NVIDIA_SMB_PRTCL_PEC			0x80

static struct pci_driver nforce2_driver;

/* Return -1 on error */
static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
		unsigned short flags, char read_write,
		u8 command, int size, union i2c_smbus_data * data)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	unsigned char protocol, pec, temp;

	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
		NVIDIA_SMB_PRTCL_WRITE;
	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;

	switch (size) {

		case I2C_SMBUS_QUICK:
			protocol |= NVIDIA_SMB_PRTCL_QUICK;
			read_write = I2C_SMBUS_WRITE;
			break;

		case I2C_SMBUS_BYTE:
			if (read_write == I2C_SMBUS_WRITE)
				outb_p(command, NVIDIA_SMB_CMD);
			protocol |= NVIDIA_SMB_PRTCL_BYTE;
			break;

		case I2C_SMBUS_BYTE_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE)
				outb_p(data->byte, NVIDIA_SMB_DATA);
			protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
			break;

		case I2C_SMBUS_WORD_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE) {
				 outb_p(data->word, NVIDIA_SMB_DATA);
				 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
			}
			protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
			break;

		default:
			dev_err(&adap->dev, "Unsupported transaction %d\n", size);
			return -1;
	}

	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	outb_p(protocol, NVIDIA_SMB_PRTCL);

	temp = inb_p(NVIDIA_SMB_STS);

	if (~temp & NVIDIA_SMB_STS_DONE) {
		udelay(500);
		temp = inb_p(NVIDIA_SMB_STS);
	}
	if (~temp & NVIDIA_SMB_STS_DONE) {
		msleep(10);
		temp = inb_p(NVIDIA_SMB_STS);
	}

	if ((~temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
		dev_dbg(&adap->dev, "SMBus Timeout! (0x%02x)\n", temp);
		return -1;
	}

	if (read_write == I2C_SMBUS_WRITE)
		return 0;

	switch (size) {

		case I2C_SMBUS_BYTE:
		case I2C_SMBUS_BYTE_DATA:
			data->byte = inb_p(NVIDIA_SMB_DATA);
			break;

		case I2C_SMBUS_WORD_DATA:
			data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
			break;
	}

	return 0;
}


static u32 nforce2_func(struct i2c_adapter *adapter)
{
	/* other functionality might be possible, but is not tested */
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA;
}

static struct i2c_algorithm smbus_algorithm = {
	.smbus_xfer	= nforce2_access,
	.functionality	= nforce2_func,
};


static struct pci_device_id nforce2_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
	{ 0 }
};

MODULE_DEVICE_TABLE (pci, nforce2_ids);


static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
	int alt_reg, struct nforce2_smbus *smbus, const char *name)
{
	int error;

	smbus->base = pci_resource_start(dev, bar);
	if (smbus->base) {
		smbus->size = pci_resource_len(dev, bar);
	} else {
		/* Older incarnations of the device used non-standard BARs */
		u16 iobase;

		if (pci_read_config_word(dev, alt_reg, &iobase)
		    != PCIBIOS_SUCCESSFUL) {
			dev_err(&dev->dev, "Error reading PCI config for %s\n",
				name);
			return -1;
		}

		smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
		smbus->size = 64;
	}

	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
		dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
			smbus->base, smbus->base+smbus->size-1, name);
		return -1;
	}
	smbus->adapter.owner = THIS_MODULE;
	smbus->adapter.id = I2C_HW_SMBUS_NFORCE2;
	smbus->adapter.class = I2C_CLASS_HWMON;
	smbus->adapter.algo = &smbus_algorithm;
	smbus->adapter.algo_data = smbus;
	smbus->adapter.dev.parent = &dev->dev;
	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
		"SMBus nForce2 adapter at %04x", smbus->base);

	error = i2c_add_adapter(&smbus->adapter);
	if (error) {
		dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
		release_region(smbus->base, smbus->size);
		return -1;
	}
	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
	return 0;
}


static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct nforce2_smbus *smbuses;
	int res1, res2;

	/* we support 2 SMBus adapters */
	if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
		return -ENOMEM;
	pci_set_drvdata(dev, smbuses);

	/* SMBus adapter 1 */
	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
	if (res1 < 0) {
		dev_err(&dev->dev, "Error probing SMB1.\n");
		smbuses[0].base = 0;	/* to have a check value */
	}
	/* SMBus adapter 2 */
	res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
	if (res2 < 0) {
		dev_err(&dev->dev, "Error probing SMB2.\n");
		smbuses[1].base = 0;	/* to have a check value */
	}
	if ((res1 < 0) && (res2 < 0)) {
		/* we did not find even one of the SMBuses, so we give up */
		kfree(smbuses);
		return -ENODEV;
	}

	return 0;
}


static void __devexit nforce2_remove(struct pci_dev *dev)
{
	struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);

	if (smbuses[0].base) {
		i2c_del_adapter(&smbuses[0].adapter);
		release_region(smbuses[0].base, smbuses[0].size);
	}
	if (smbuses[1].base) {
		i2c_del_adapter(&smbuses[1].adapter);
		release_region(smbuses[1].base, smbuses[1].size);
	}
	kfree(smbuses);
}

static struct pci_driver nforce2_driver = {
	.name		= "nForce2_smbus",
	.id_table	= nforce2_ids,
	.probe		= nforce2_probe,
	.remove		= __devexit_p(nforce2_remove),
};

static int __init nforce2_init(void)
{
	return pci_register_driver(&nforce2_driver);
}

static void __exit nforce2_exit(void)
{
	pci_unregister_driver(&nforce2_driver);
}

module_init(nforce2_init);
module_exit(nforce2_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	SMBus driver for nVidia nForce2 MCP
	3
	4	Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
	5	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
	6	Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
	7	Based on
	8	SMBus 2.0 driver for AMD-8111 IO-Hub
	9	Copyright (c) 2002 Vojtech Pavlik
	10
	11	This program is free software; you can redistribute it and/or modify
	12	it under the terms of the GNU General Public License as published by
	13	the Free Software Foundation; either version 2 of the License, or
	14	(at your option) any later version.
	15
	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	GNU General Public License for more details.
	20
	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software
	23	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25
	26	/*
	27	SUPPORTED DEVICES PCI ID
	28	nForce2 MCP 0064
	29	nForce2 Ultra 400 MCP 0084
	30	nForce3 Pro150 MCP 00D4
	31	nForce3 250Gb MCP 00E4
	32	nForce4 MCP 0052
7c72ccf0	33	nForce4 MCP-04 0034
5c7ae658 JD	34	nForce4 MCP51 0264
5c7ae658 JD	35	nForce4 MCP55 0368
f75803de JD	36	nForce MCP61 03EB
f75803de JD	37	nForce MCP65 0446
1da177e4 LT	38
1da177e4 LT	39	This driver supports the 2 SMBuses that are included in the MCP of the
ad04d5c3	40	nForce2/3/4/5xx chipsets.
1da177e4 LT	41	*/
	42
	43	/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
	44
1da177e4 LT	45	#include <linux/module.h>
	46	#include <linux/pci.h>
	47	#include <linux/kernel.h>
	48	#include <linux/stddef.h>
1da177e4 LT	49	#include <linux/ioport.h>
	50	#include <linux/init.h>
	51	#include <linux/i2c.h>
	52	#include <linux/delay.h>
	53	#include <asm/io.h>
	54
	55	MODULE_LICENSE("GPL");
ad04d5c3 HFV	56	MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
ad04d5c3 HFV	57	MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
1da177e4 LT	58
	59
	60	struct nforce2_smbus {
1da177e4 LT	61	struct i2c_adapter adapter;
	62	int base;
	63	int size;
	64	};
	65
	66
	67	/*
	68	* nVidia nForce2 SMBus control register definitions
5c7ae658	69	* (Newer incarnations use standard BARs 4 and 5 instead)
1da177e4 LT	70	*/
	71	#define NFORCE_PCI_SMB1 0x50
	72	#define NFORCE_PCI_SMB2 0x54
	73
	74
	75	/*
	76	* ACPI 2.0 chapter 13 SMBus 2.0 EC register model
	77	*/
	78	#define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
	79	#define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
	80	#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
	81	#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
	82	#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
1da177e4 LT	83
	84	#define NVIDIA_SMB_STS_DONE 0x80
	85	#define NVIDIA_SMB_STS_ALRM 0x40
	86	#define NVIDIA_SMB_STS_RES 0x20
	87	#define NVIDIA_SMB_STS_STATUS 0x1f
	88
	89	#define NVIDIA_SMB_PRTCL_WRITE 0x00
	90	#define NVIDIA_SMB_PRTCL_READ 0x01
	91	#define NVIDIA_SMB_PRTCL_QUICK 0x02
	92	#define NVIDIA_SMB_PRTCL_BYTE 0x04
	93	#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
	94	#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
1da177e4 LT	95	#define NVIDIA_SMB_PRTCL_PEC 0x80
1da177e4 LT	96
d6072f84	97	static struct pci_driver nforce2_driver;
1da177e4	98
ad04d5c3	99	/* Return -1 on error */
1da177e4 LT	100	static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
	101	unsigned short flags, char read_write,
	102	u8 command, int size, union i2c_smbus_data * data)
	103	{
	104	struct nforce2_smbus *smbus = adap->algo_data;
	105	unsigned char protocol, pec, temp;
1da177e4 LT	106
	107	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
	108	NVIDIA_SMB_PRTCL_WRITE;
	109	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
	110
	111	switch (size) {
	112
	113	case I2C_SMBUS_QUICK:
	114	protocol \|= NVIDIA_SMB_PRTCL_QUICK;
	115	read_write = I2C_SMBUS_WRITE;
	116	break;
	117
	118	case I2C_SMBUS_BYTE:
	119	if (read_write == I2C_SMBUS_WRITE)
	120	outb_p(command, NVIDIA_SMB_CMD);
	121	protocol \|= NVIDIA_SMB_PRTCL_BYTE;
	122	break;
	123
	124	case I2C_SMBUS_BYTE_DATA:
	125	outb_p(command, NVIDIA_SMB_CMD);
	126	if (read_write == I2C_SMBUS_WRITE)
	127	outb_p(data->byte, NVIDIA_SMB_DATA);
	128	protocol \|= NVIDIA_SMB_PRTCL_BYTE_DATA;
	129	break;
	130
	131	case I2C_SMBUS_WORD_DATA:
	132	outb_p(command, NVIDIA_SMB_CMD);
	133	if (read_write == I2C_SMBUS_WRITE) {
	134	outb_p(data->word, NVIDIA_SMB_DATA);
	135	outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
	136	}
	137	protocol \|= NVIDIA_SMB_PRTCL_WORD_DATA \| pec;
	138	break;
	139
1da177e4 LT	140	default:
	141	dev_err(&adap->dev, "Unsupported transaction %d\n", size);
	142	return -1;
	143	}
	144
	145	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	146	outb_p(protocol, NVIDIA_SMB_PRTCL);
	147
	148	temp = inb_p(NVIDIA_SMB_STS);
	149
1da177e4 LT	150	if (~temp & NVIDIA_SMB_STS_DONE) {
	151	udelay(500);
	152	temp = inb_p(NVIDIA_SMB_STS);
	153	}
	154	if (~temp & NVIDIA_SMB_STS_DONE) {
	155	msleep(10);
	156	temp = inb_p(NVIDIA_SMB_STS);
	157	}
	158
5033017c HFV	159	if ((~temp & NVIDIA_SMB_STS_DONE) \|\| (temp & NVIDIA_SMB_STS_STATUS)) {
5033017c HFV	160	dev_dbg(&adap->dev, "SMBus Timeout! (0x%02x)\n", temp);
1da177e4	161	return -1;
5033017c	162	}
1da177e4 LT	163
	164	if (read_write == I2C_SMBUS_WRITE)
	165	return 0;
	166
	167	switch (size) {
	168
	169	case I2C_SMBUS_BYTE:
	170	case I2C_SMBUS_BYTE_DATA:
	171	data->byte = inb_p(NVIDIA_SMB_DATA);
	172	break;
	173
	174	case I2C_SMBUS_WORD_DATA:
1da177e4 LT	175	data->word = inb_p(NVIDIA_SMB_DATA) \| (inb_p(NVIDIA_SMB_DATA+1) << 8);
1da177e4 LT	176	break;
1da177e4 LT	177	}
	178
	179	return 0;
	180	}
	181
	182
	183	static u32 nforce2_func(struct i2c_adapter *adapter)
	184	{
	185	/* other functionality might be possible, but is not tested */
	186	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
ad04d5c3	187	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA;
1da177e4 LT	188	}
1da177e4 LT	189
ad04d5c3 HFV	190	static struct i2c_algorithm smbus_algorithm = {
	191	.smbus_xfer = nforce2_access,
	192	.functionality = nforce2_func,
	193	};
	194
1da177e4 LT	195
	196	static struct pci_device_id nforce2_ids[] = {
	197	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	198	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	199	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	200	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	201	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
7c72ccf0	202	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
5c7ae658 JD	203	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
5c7ae658 JD	204	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
f75803de JD	205	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
f75803de JD	206	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
1da177e4 LT	207	{ 0 }
	208	};
	209
1da177e4 LT	210	MODULE_DEVICE_TABLE (pci, nforce2_ids);
	211
	212
5c7ae658 JD	213	static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
5c7ae658 JD	214	int alt_reg, struct nforce2_smbus smbus, const char name)
1da177e4	215	{
1da177e4 LT	216	int error;
1da177e4 LT	217
5c7ae658 JD	218	smbus->base = pci_resource_start(dev, bar);
	219	if (smbus->base) {
	220	smbus->size = pci_resource_len(dev, bar);
	221	} else {
	222	/* Older incarnations of the device used non-standard BARs */
	223	u16 iobase;
	224
	225	if (pci_read_config_word(dev, alt_reg, &iobase)
	226	!= PCIBIOS_SUCCESSFUL) {
	227	dev_err(&dev->dev, "Error reading PCI config for %s\n",
	228	name);
	229	return -1;
	230	}
	231
	232	smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
ad04d5c3	233	smbus->size = 64;
1da177e4	234	}
1da177e4	235
d6072f84	236	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
1da177e4 LT	237	dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
	238	smbus->base, smbus->base+smbus->size-1, name);
	239	return -1;
	240	}
ad04d5c3	241	smbus->adapter.owner = THIS_MODULE;
9ace555d	242	smbus->adapter.id = I2C_HW_SMBUS_NFORCE2;
ad04d5c3 HFV	243	smbus->adapter.class = I2C_CLASS_HWMON;
ad04d5c3 HFV	244	smbus->adapter.algo = &smbus_algorithm;
1da177e4 LT	245	smbus->adapter.algo_data = smbus;
1da177e4 LT	246	smbus->adapter.dev.parent = &dev->dev;
2096b956	247	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
1da177e4 LT	248	"SMBus nForce2 adapter at %04x", smbus->base);
	249
	250	error = i2c_add_adapter(&smbus->adapter);
	251	if (error) {
	252	dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
	253	release_region(smbus->base, smbus->size);
	254	return -1;
	255	}
	256	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
	257	return 0;
	258	}
	259
	260
	261	static int __devinit nforce2_probe(struct pci_dev dev, const struct pci_device_id id)
	262	{
	263	struct nforce2_smbus *smbuses;
	264	int res1, res2;
	265
	266	/* we support 2 SMBus adapters */
078d9fe4	267	if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
1da177e4	268	return -ENOMEM;
1da177e4 LT	269	pci_set_drvdata(dev, smbuses);
	270
	271	/* SMBus adapter 1 */
5c7ae658	272	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
1da177e4 LT	273	if (res1 < 0) {
	274	dev_err(&dev->dev, "Error probing SMB1.\n");
	275	smbuses[0].base = 0; /* to have a check value */
	276	}
5c7ae658 JD	277	/* SMBus adapter 2 */
5c7ae658 JD	278	res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
1da177e4 LT	279	if (res2 < 0) {
	280	dev_err(&dev->dev, "Error probing SMB2.\n");
	281	smbuses[1].base = 0; /* to have a check value */
	282	}
	283	if ((res1 < 0) && (res2 < 0)) {
	284	/* we did not find even one of the SMBuses, so we give up */
	285	kfree(smbuses);
	286	return -ENODEV;
	287	}
	288
	289	return 0;
	290	}
	291
	292
	293	static void __devexit nforce2_remove(struct pci_dev *dev)
	294	{
	295	struct nforce2_smbus smbuses = (void) pci_get_drvdata(dev);
	296
	297	if (smbuses[0].base) {
	298	i2c_del_adapter(&smbuses[0].adapter);
	299	release_region(smbuses[0].base, smbuses[0].size);
	300	}
	301	if (smbuses[1].base) {
	302	i2c_del_adapter(&smbuses[1].adapter);
	303	release_region(smbuses[1].base, smbuses[1].size);
	304	}
	305	kfree(smbuses);
	306	}
	307
	308	static struct pci_driver nforce2_driver = {
	309	.name = "nForce2_smbus",
	310	.id_table = nforce2_ids,
	311	.probe = nforce2_probe,
	312	.remove = __devexit_p(nforce2_remove),
	313	};
	314
	315	static int __init nforce2_init(void)
	316	{
	317	return pci_register_driver(&nforce2_driver);
	318	}
	319
	320	static void __exit nforce2_exit(void)
	321	{
	322	pci_unregister_driver(&nforce2_driver);
	323	}
	324
	325	module_init(nforce2_init);
	326	module_exit(nforce2_exit);
	327