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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
4a7a0822 BS |
2 | /* |
3 | * I2C bus driver for Conexant Digicolor SoCs | |
4 | * | |
5 | * Author: Baruch Siach <baruch@tkos.co.il> | |
6 | * | |
7 | * Copyright (C) 2015 Paradox Innovation Ltd. | |
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8 | */ |
9 | ||
10 | #include <linux/clk.h> | |
11 | #include <linux/completion.h> | |
4c8979b2 | 12 | #include <linux/delay.h> |
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13 | #include <linux/i2c.h> |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/io.h> | |
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16 | #include <linux/kernel.h> |
17 | #include <linux/module.h> | |
18 | #include <linux/of.h> | |
19 | #include <linux/platform_device.h> | |
20 | ||
21 | #define DEFAULT_FREQ 100000 | |
22 | #define TIMEOUT_MS 100 | |
23 | ||
24 | #define II_CONTROL 0x0 | |
25 | #define II_CONTROL_LOCAL_RESET BIT(0) | |
26 | ||
27 | #define II_CLOCKTIME 0x1 | |
28 | ||
29 | #define II_COMMAND 0x2 | |
30 | #define II_CMD_START 1 | |
31 | #define II_CMD_RESTART 2 | |
32 | #define II_CMD_SEND_ACK 3 | |
33 | #define II_CMD_GET_ACK 6 | |
34 | #define II_CMD_GET_NOACK 7 | |
35 | #define II_CMD_STOP 10 | |
36 | #define II_COMMAND_GO BIT(7) | |
37 | #define II_COMMAND_COMPLETION_STATUS(r) (((r) >> 5) & 3) | |
38 | #define II_CMD_STATUS_NORMAL 0 | |
39 | #define II_CMD_STATUS_ACK_GOOD 1 | |
40 | #define II_CMD_STATUS_ACK_BAD 2 | |
41 | #define II_CMD_STATUS_ABORT 3 | |
42 | ||
43 | #define II_DATA 0x3 | |
44 | #define II_INTFLAG_CLEAR 0x8 | |
45 | #define II_INTENABLE 0xa | |
46 | ||
47 | struct dc_i2c { | |
48 | struct i2c_adapter adap; | |
49 | struct device *dev; | |
50 | void __iomem *regs; | |
51 | struct clk *clk; | |
52 | unsigned int frequency; | |
53 | ||
54 | struct i2c_msg *msg; | |
55 | unsigned int msgbuf_ptr; | |
56 | int last; | |
57 | spinlock_t lock; | |
58 | struct completion done; | |
59 | int state; | |
60 | int error; | |
61 | }; | |
62 | ||
63 | enum { | |
64 | STATE_IDLE, | |
65 | STATE_START, | |
66 | STATE_ADDR, | |
67 | STATE_WRITE, | |
68 | STATE_READ, | |
69 | STATE_STOP, | |
70 | }; | |
71 | ||
72 | static void dc_i2c_cmd(struct dc_i2c *i2c, u8 cmd) | |
73 | { | |
74 | writeb_relaxed(cmd | II_COMMAND_GO, i2c->regs + II_COMMAND); | |
75 | } | |
76 | ||
77 | static u8 dc_i2c_addr_cmd(struct i2c_msg *msg) | |
78 | { | |
79 | u8 addr = (msg->addr & 0x7f) << 1; | |
80 | ||
81 | if (msg->flags & I2C_M_RD) | |
82 | addr |= 1; | |
83 | ||
84 | return addr; | |
85 | } | |
86 | ||
87 | static void dc_i2c_data(struct dc_i2c *i2c, u8 data) | |
88 | { | |
89 | writeb_relaxed(data, i2c->regs + II_DATA); | |
90 | } | |
91 | ||
92 | static void dc_i2c_write_byte(struct dc_i2c *i2c, u8 byte) | |
93 | { | |
94 | dc_i2c_data(i2c, byte); | |
95 | dc_i2c_cmd(i2c, II_CMD_SEND_ACK); | |
96 | } | |
97 | ||
98 | static void dc_i2c_write_buf(struct dc_i2c *i2c) | |
99 | { | |
100 | dc_i2c_write_byte(i2c, i2c->msg->buf[i2c->msgbuf_ptr++]); | |
101 | } | |
102 | ||
103 | static void dc_i2c_next_read(struct dc_i2c *i2c) | |
104 | { | |
105 | bool last = (i2c->msgbuf_ptr + 1 == i2c->msg->len); | |
106 | ||
107 | dc_i2c_cmd(i2c, last ? II_CMD_GET_NOACK : II_CMD_GET_ACK); | |
108 | } | |
109 | ||
110 | static void dc_i2c_stop(struct dc_i2c *i2c) | |
111 | { | |
112 | i2c->state = STATE_STOP; | |
113 | if (i2c->last) | |
114 | dc_i2c_cmd(i2c, II_CMD_STOP); | |
115 | else | |
116 | complete(&i2c->done); | |
117 | } | |
118 | ||
119 | static u8 dc_i2c_read_byte(struct dc_i2c *i2c) | |
120 | { | |
121 | return readb_relaxed(i2c->regs + II_DATA); | |
122 | } | |
123 | ||
124 | static void dc_i2c_read_buf(struct dc_i2c *i2c) | |
125 | { | |
126 | i2c->msg->buf[i2c->msgbuf_ptr++] = dc_i2c_read_byte(i2c); | |
127 | dc_i2c_next_read(i2c); | |
128 | } | |
129 | ||
130 | static void dc_i2c_set_irq(struct dc_i2c *i2c, int enable) | |
131 | { | |
132 | if (enable) | |
133 | writeb_relaxed(1, i2c->regs + II_INTFLAG_CLEAR); | |
134 | writeb_relaxed(!!enable, i2c->regs + II_INTENABLE); | |
135 | } | |
136 | ||
137 | static int dc_i2c_cmd_status(struct dc_i2c *i2c) | |
138 | { | |
139 | u8 cmd = readb_relaxed(i2c->regs + II_COMMAND); | |
140 | ||
141 | return II_COMMAND_COMPLETION_STATUS(cmd); | |
142 | } | |
143 | ||
144 | static void dc_i2c_start_msg(struct dc_i2c *i2c, int first) | |
145 | { | |
146 | struct i2c_msg *msg = i2c->msg; | |
147 | ||
148 | if (!(msg->flags & I2C_M_NOSTART)) { | |
149 | i2c->state = STATE_START; | |
150 | dc_i2c_cmd(i2c, first ? II_CMD_START : II_CMD_RESTART); | |
151 | } else if (msg->flags & I2C_M_RD) { | |
152 | i2c->state = STATE_READ; | |
153 | dc_i2c_next_read(i2c); | |
154 | } else { | |
155 | i2c->state = STATE_WRITE; | |
156 | dc_i2c_write_buf(i2c); | |
157 | } | |
158 | } | |
159 | ||
160 | static irqreturn_t dc_i2c_irq(int irq, void *dev_id) | |
161 | { | |
162 | struct dc_i2c *i2c = dev_id; | |
163 | int cmd_status = dc_i2c_cmd_status(i2c); | |
164 | unsigned long flags; | |
165 | u8 addr_cmd; | |
166 | ||
167 | writeb_relaxed(1, i2c->regs + II_INTFLAG_CLEAR); | |
168 | ||
169 | spin_lock_irqsave(&i2c->lock, flags); | |
170 | ||
171 | if (cmd_status == II_CMD_STATUS_ACK_BAD | |
172 | || cmd_status == II_CMD_STATUS_ABORT) { | |
173 | i2c->error = -EIO; | |
174 | complete(&i2c->done); | |
175 | goto out; | |
176 | } | |
177 | ||
178 | switch (i2c->state) { | |
179 | case STATE_START: | |
180 | addr_cmd = dc_i2c_addr_cmd(i2c->msg); | |
181 | dc_i2c_write_byte(i2c, addr_cmd); | |
182 | i2c->state = STATE_ADDR; | |
183 | break; | |
184 | case STATE_ADDR: | |
185 | if (i2c->msg->flags & I2C_M_RD) { | |
186 | dc_i2c_next_read(i2c); | |
187 | i2c->state = STATE_READ; | |
188 | break; | |
189 | } | |
190 | i2c->state = STATE_WRITE; | |
191 | /* fall through */ | |
192 | case STATE_WRITE: | |
193 | if (i2c->msgbuf_ptr < i2c->msg->len) | |
194 | dc_i2c_write_buf(i2c); | |
195 | else | |
196 | dc_i2c_stop(i2c); | |
197 | break; | |
198 | case STATE_READ: | |
199 | if (i2c->msgbuf_ptr < i2c->msg->len) | |
200 | dc_i2c_read_buf(i2c); | |
201 | else | |
202 | dc_i2c_stop(i2c); | |
203 | break; | |
204 | case STATE_STOP: | |
205 | i2c->state = STATE_IDLE; | |
206 | complete(&i2c->done); | |
207 | break; | |
208 | } | |
209 | ||
210 | out: | |
211 | spin_unlock_irqrestore(&i2c->lock, flags); | |
212 | return IRQ_HANDLED; | |
213 | } | |
214 | ||
215 | static int dc_i2c_xfer_msg(struct dc_i2c *i2c, struct i2c_msg *msg, int first, | |
216 | int last) | |
217 | { | |
218 | unsigned long timeout = msecs_to_jiffies(TIMEOUT_MS); | |
219 | unsigned long flags; | |
220 | ||
221 | spin_lock_irqsave(&i2c->lock, flags); | |
222 | i2c->msg = msg; | |
223 | i2c->msgbuf_ptr = 0; | |
224 | i2c->last = last; | |
225 | i2c->error = 0; | |
226 | ||
227 | reinit_completion(&i2c->done); | |
228 | dc_i2c_set_irq(i2c, 1); | |
229 | dc_i2c_start_msg(i2c, first); | |
230 | spin_unlock_irqrestore(&i2c->lock, flags); | |
231 | ||
232 | timeout = wait_for_completion_timeout(&i2c->done, timeout); | |
233 | dc_i2c_set_irq(i2c, 0); | |
234 | if (timeout == 0) { | |
235 | i2c->state = STATE_IDLE; | |
236 | return -ETIMEDOUT; | |
237 | } | |
238 | ||
239 | if (i2c->error) | |
240 | return i2c->error; | |
241 | ||
242 | return 0; | |
243 | } | |
244 | ||
245 | static int dc_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) | |
246 | { | |
247 | struct dc_i2c *i2c = adap->algo_data; | |
248 | int i, ret; | |
249 | ||
250 | for (i = 0; i < num; i++) { | |
251 | ret = dc_i2c_xfer_msg(i2c, &msgs[i], i == 0, i == num - 1); | |
252 | if (ret) | |
253 | return ret; | |
254 | } | |
255 | ||
256 | return num; | |
257 | } | |
258 | ||
259 | static int dc_i2c_init_hw(struct dc_i2c *i2c) | |
260 | { | |
261 | unsigned long clk_rate = clk_get_rate(i2c->clk); | |
262 | unsigned int clocktime; | |
263 | ||
264 | writeb_relaxed(II_CONTROL_LOCAL_RESET, i2c->regs + II_CONTROL); | |
265 | udelay(100); | |
266 | writeb_relaxed(0, i2c->regs + II_CONTROL); | |
267 | udelay(100); | |
268 | ||
269 | clocktime = DIV_ROUND_UP(clk_rate, 64 * i2c->frequency); | |
270 | if (clocktime < 1 || clocktime > 0xff) { | |
271 | dev_err(i2c->dev, "can't set bus speed of %u Hz\n", | |
272 | i2c->frequency); | |
273 | return -EINVAL; | |
274 | } | |
275 | writeb_relaxed(clocktime - 1, i2c->regs + II_CLOCKTIME); | |
276 | ||
277 | return 0; | |
278 | } | |
279 | ||
280 | static u32 dc_i2c_func(struct i2c_adapter *adap) | |
281 | { | |
282 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART; | |
283 | } | |
284 | ||
285 | static const struct i2c_algorithm dc_i2c_algorithm = { | |
286 | .master_xfer = dc_i2c_xfer, | |
287 | .functionality = dc_i2c_func, | |
288 | }; | |
289 | ||
290 | static int dc_i2c_probe(struct platform_device *pdev) | |
291 | { | |
292 | struct device_node *np = pdev->dev.of_node; | |
293 | struct dc_i2c *i2c; | |
294 | struct resource *r; | |
295 | int ret = 0, irq; | |
296 | ||
297 | i2c = devm_kzalloc(&pdev->dev, sizeof(struct dc_i2c), GFP_KERNEL); | |
298 | if (!i2c) | |
299 | return -ENOMEM; | |
300 | ||
301 | if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", | |
302 | &i2c->frequency)) | |
303 | i2c->frequency = DEFAULT_FREQ; | |
304 | ||
305 | i2c->dev = &pdev->dev; | |
306 | platform_set_drvdata(pdev, i2c); | |
307 | ||
308 | spin_lock_init(&i2c->lock); | |
309 | init_completion(&i2c->done); | |
310 | ||
311 | i2c->clk = devm_clk_get(&pdev->dev, NULL); | |
312 | if (IS_ERR(i2c->clk)) | |
313 | return PTR_ERR(i2c->clk); | |
314 | ||
315 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
316 | i2c->regs = devm_ioremap_resource(&pdev->dev, r); | |
317 | if (IS_ERR(i2c->regs)) | |
318 | return PTR_ERR(i2c->regs); | |
319 | ||
320 | irq = platform_get_irq(pdev, 0); | |
321 | if (irq < 0) | |
322 | return irq; | |
323 | ||
324 | ret = devm_request_irq(&pdev->dev, irq, dc_i2c_irq, 0, | |
325 | dev_name(&pdev->dev), i2c); | |
326 | if (ret < 0) | |
327 | return ret; | |
328 | ||
329 | strlcpy(i2c->adap.name, "Conexant Digicolor I2C adapter", | |
330 | sizeof(i2c->adap.name)); | |
331 | i2c->adap.owner = THIS_MODULE; | |
332 | i2c->adap.algo = &dc_i2c_algorithm; | |
333 | i2c->adap.dev.parent = &pdev->dev; | |
334 | i2c->adap.dev.of_node = np; | |
335 | i2c->adap.algo_data = i2c; | |
336 | ||
337 | ret = dc_i2c_init_hw(i2c); | |
338 | if (ret) | |
339 | return ret; | |
340 | ||
341 | ret = clk_prepare_enable(i2c->clk); | |
342 | if (ret < 0) | |
343 | return ret; | |
344 | ||
345 | ret = i2c_add_adapter(&i2c->adap); | |
346 | if (ret < 0) { | |
68d85d0e | 347 | clk_disable_unprepare(i2c->clk); |
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348 | return ret; |
349 | } | |
350 | ||
351 | return 0; | |
352 | } | |
353 | ||
354 | static int dc_i2c_remove(struct platform_device *pdev) | |
355 | { | |
356 | struct dc_i2c *i2c = platform_get_drvdata(pdev); | |
357 | ||
358 | i2c_del_adapter(&i2c->adap); | |
359 | clk_disable_unprepare(i2c->clk); | |
360 | ||
361 | return 0; | |
362 | } | |
363 | ||
364 | static const struct of_device_id dc_i2c_match[] = { | |
365 | { .compatible = "cnxt,cx92755-i2c" }, | |
366 | { }, | |
367 | }; | |
60a951af | 368 | MODULE_DEVICE_TABLE(of, dc_i2c_match); |
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369 | |
370 | static struct platform_driver dc_i2c_driver = { | |
371 | .probe = dc_i2c_probe, | |
372 | .remove = dc_i2c_remove, | |
373 | .driver = { | |
374 | .name = "digicolor-i2c", | |
375 | .of_match_table = dc_i2c_match, | |
376 | }, | |
377 | }; | |
378 | module_platform_driver(dc_i2c_driver); | |
379 | ||
380 | MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); | |
381 | MODULE_DESCRIPTION("Conexant Digicolor I2C master driver"); | |
382 | MODULE_LICENSE("GPL v2"); |