[linux-block.git] / drivers / i2c / busses / i2c-designware-platdrv.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Synopsys DesignWare I2C adapter driver.
 *
 * Based on the TI DAVINCI I2C adapter driver.
 *
 * Copyright (C) 2006 Texas Instruments.
 * Copyright (C) 2007 MontaVista Software Inc.
 * Copyright (C) 2009 Provigent Ltd.
 */
#include <linux/acpi.h>
#include <linux/clk-provider.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_data/i2c-designware.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/reset.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/suspend.h>

#include "i2c-designware-core.h"

static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
{
	return clk_get_rate(dev->clk)/1000;
}

#ifdef CONFIG_ACPI
/*
 * The HCNT/LCNT information coming from ACPI should be the most accurate
 * for given platform. However, some systems get it wrong. On such systems
 * we get better results by calculating those based on the input clock.
 */
static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
	{
		.ident = "Dell Inspiron 7348",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
		},
	},
	{ }
};

static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
			       u16 *hcnt, u16 *lcnt, u32 *sda_hold)
{
	struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
	union acpi_object *obj;

	if (dmi_check_system(dw_i2c_no_acpi_params))
		return;

	if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
		return;

	obj = (union acpi_object *)buf.pointer;
	if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
		const union acpi_object *objs = obj->package.elements;

		*hcnt = (u16)objs[0].integer.value;
		*lcnt = (u16)objs[1].integer.value;
		*sda_hold = (u32)objs[2].integer.value;
	}

	kfree(buf.pointer);
}

static int dw_i2c_acpi_configure(struct platform_device *pdev)
{
	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
	struct i2c_timings *t = &dev->timings;
	u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
	const struct acpi_device_id *id;
	struct acpi_device *adev;
	const char *uid;

	dev->adapter.nr = -1;
	dev->tx_fifo_depth = 32;
	dev->rx_fifo_depth = 32;

	/*
	 * Try to get SDA hold time and *CNT values from an ACPI method for
	 * selected speed modes.
	 */
	dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
	dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
	dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
	dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);

	switch (t->bus_freq_hz) {
	case 100000:
		dev->sda_hold_time = ss_ht;
		break;
	case 1000000:
		dev->sda_hold_time = fp_ht;
		break;
	case 3400000:
		dev->sda_hold_time = hs_ht;
		break;
	case 400000:
	default:
		dev->sda_hold_time = fs_ht;
		break;
	}

	id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
	if (id && id->driver_data)
		dev->flags |= (u32)id->driver_data;

	if (acpi_bus_get_device(handle, &adev))
		return -ENODEV;

	/*
	 * Cherrytrail I2C7 gets used for the PMIC which gets accessed
	 * through ACPI opregions during late suspend / early resume
	 * disable pm for it.
	 */
	uid = adev->pnp.unique_id;
	if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
		dev->pm_disabled = true;

	return 0;
}

static const struct acpi_device_id dw_i2c_acpi_match[] = {
	{ "INT33C2", 0 },
	{ "INT33C3", 0 },
	{ "INT3432", 0 },
	{ "INT3433", 0 },
	{ "80860F41", 0 },
	{ "808622C1", MODEL_CHERRYTRAIL },
	{ "AMD0010", ACCESS_INTR_MASK },
	{ "AMDI0010", ACCESS_INTR_MASK },
	{ "AMDI0510", 0 },
	{ "APMC0D0F", 0 },
	{ "HISI02A1", 0 },
	{ "HISI02A2", 0 },
	{ }
};
MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
#else
static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
{
	return -ENODEV;
}
#endif

static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
{
	struct i2c_timings *t = &dev->timings;

	dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;

	dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
			  DW_IC_CON_RESTART_EN;

	dev->mode = DW_IC_MASTER;

	switch (t->bus_freq_hz) {
	case 100000:
		dev->master_cfg |= DW_IC_CON_SPEED_STD;
		break;
	case 3400000:
		dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
		break;
	default:
		dev->master_cfg |= DW_IC_CON_SPEED_FAST;
	}
}

static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
{
	dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;

	dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
			 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;

	dev->mode = DW_IC_SLAVE;
}

static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
{
	u32 param, tx_fifo_depth, rx_fifo_depth;

	/*
	 * Try to detect the FIFO depth if not set by interface driver,
	 * the depth could be from 2 to 256 from HW spec.
	 */
	param = i2c_dw_read_comp_param(dev);
	tx_fifo_depth = ((param >> 16) & 0xff) + 1;
	rx_fifo_depth = ((param >> 8)  & 0xff) + 1;
	if (!dev->tx_fifo_depth) {
		dev->tx_fifo_depth = tx_fifo_depth;
		dev->rx_fifo_depth = rx_fifo_depth;
		dev->adapter.nr = id;
	} else if (tx_fifo_depth >= 2) {
		dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
				tx_fifo_depth);
		dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
				rx_fifo_depth);
	}
}

static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
{
	pm_runtime_disable(dev->dev);

	if (dev->pm_disabled)
		pm_runtime_put_noidle(dev->dev);
}

static int dw_i2c_plat_probe(struct platform_device *pdev)
{
	struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
	struct i2c_adapter *adap;
	struct dw_i2c_dev *dev;
	struct i2c_timings *t;
	u32 acpi_speed;
	struct resource *mem;
	int i, irq, ret;
	static const int supported_speeds[] = {
		0, 100000, 400000, 1000000, 3400000
	};

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return irq;

	dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
	if (!dev)
		return -ENOMEM;

	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	dev->base = devm_ioremap_resource(&pdev->dev, mem);
	if (IS_ERR(dev->base))
		return PTR_ERR(dev->base);

	dev->dev = &pdev->dev;
	dev->irq = irq;
	platform_set_drvdata(pdev, dev);

	dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
	if (IS_ERR(dev->rst)) {
		if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
			return -EPROBE_DEFER;
	} else {
		reset_control_deassert(dev->rst);
	}

	t = &dev->timings;
	if (pdata)
		t->bus_freq_hz = pdata->i2c_scl_freq;
	else
		i2c_parse_fw_timings(&pdev->dev, t, false);

	acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
	/*
	 * Some DSTDs use a non standard speed, round down to the lowest
	 * standard speed.
	 */
	for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
		if (acpi_speed < supported_speeds[i])
			break;
	}
	acpi_speed = supported_speeds[i - 1];

	/*
	 * Find bus speed from the "clock-frequency" device property, ACPI
	 * or by using fast mode if neither is set.
	 */
	if (acpi_speed && t->bus_freq_hz)
		t->bus_freq_hz = min(t->bus_freq_hz, acpi_speed);
	else if (acpi_speed || t->bus_freq_hz)
		t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed);
	else
		t->bus_freq_hz = 400000;

	if (has_acpi_companion(&pdev->dev))
		dw_i2c_acpi_configure(pdev);

	/*
	 * Only standard mode at 100kHz, fast mode at 400kHz,
	 * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
	 */
	if (t->bus_freq_hz != 100000 && t->bus_freq_hz != 400000 &&
	    t->bus_freq_hz != 1000000 && t->bus_freq_hz != 3400000) {
		dev_err(&pdev->dev,
			"%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
			t->bus_freq_hz);
		ret = -EINVAL;
		goto exit_reset;
	}

	ret = i2c_dw_probe_lock_support(dev);
	if (ret)
		goto exit_reset;

	if (i2c_detect_slave_mode(&pdev->dev))
		i2c_dw_configure_slave(dev);
	else
		i2c_dw_configure_master(dev);

	dev->clk = devm_clk_get(&pdev->dev, NULL);
	if (!i2c_dw_prepare_clk(dev, true)) {
		u64 clk_khz;

		dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
		clk_khz = dev->get_clk_rate_khz(dev);

		if (!dev->sda_hold_time && t->sda_hold_ns)
			dev->sda_hold_time =
				div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000);
	}

	dw_i2c_set_fifo_size(dev, pdev->id);

	adap = &dev->adapter;
	adap->owner = THIS_MODULE;
	adap->class = I2C_CLASS_DEPRECATED;
	ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
	adap->dev.of_node = pdev->dev.of_node;

	dev_pm_set_driver_flags(&pdev->dev,
				DPM_FLAG_SMART_PREPARE |
				DPM_FLAG_SMART_SUSPEND |
				DPM_FLAG_LEAVE_SUSPENDED);

	/* The code below assumes runtime PM to be disabled. */
	WARN_ON(pm_runtime_enabled(&pdev->dev));

	pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
	pm_runtime_use_autosuspend(&pdev->dev);
	pm_runtime_set_active(&pdev->dev);

	if (dev->pm_disabled)
		pm_runtime_get_noresume(&pdev->dev);

	pm_runtime_enable(&pdev->dev);

	if (dev->mode == DW_IC_SLAVE)
		ret = i2c_dw_probe_slave(dev);
	else
		ret = i2c_dw_probe(dev);

	if (ret)
		goto exit_probe;

	return ret;

exit_probe:
	dw_i2c_plat_pm_cleanup(dev);
exit_reset:
	if (!IS_ERR_OR_NULL(dev->rst))
		reset_control_assert(dev->rst);
	return ret;
}

static int dw_i2c_plat_remove(struct platform_device *pdev)
{
	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);

	pm_runtime_get_sync(&pdev->dev);

	i2c_del_adapter(&dev->adapter);

	dev->disable(dev);

	pm_runtime_dont_use_autosuspend(&pdev->dev);
	pm_runtime_put_sync(&pdev->dev);
	dw_i2c_plat_pm_cleanup(dev);

	if (!IS_ERR_OR_NULL(dev->rst))
		reset_control_assert(dev->rst);

	i2c_dw_remove_lock_support(dev);

	return 0;
}

#ifdef CONFIG_OF
static const struct of_device_id dw_i2c_of_match[] = {
	{ .compatible = "snps,designware-i2c", },
	{},
};
MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
#endif

#ifdef CONFIG_PM_SLEEP
static int dw_i2c_plat_prepare(struct device *dev)
{
	/*
	 * If the ACPI companion device object is present for this device, it
	 * may be accessed during suspend and resume of other devices via I2C
	 * operation regions, so tell the PM core and middle layers to avoid
	 * skipping system suspend/resume callbacks for it in that case.
	 */
	return !has_acpi_companion(dev);
}

static void dw_i2c_plat_complete(struct device *dev)
{
	/*
	 * The device can only be in runtime suspend at this point if it has not
	 * been resumed throughout the ending system suspend/resume cycle, so if
	 * the platform firmware might mess up with it, request the runtime PM
	 * framework to resume it.
	 */
	if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
		pm_request_resume(dev);
}
#else
#define dw_i2c_plat_prepare	NULL
#define dw_i2c_plat_complete	NULL
#endif

#ifdef CONFIG_PM
static int dw_i2c_plat_suspend(struct device *dev)
{
	struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);

	if (i_dev->pm_disabled)
		return 0;

	i_dev->disable(i_dev);
	i2c_dw_prepare_clk(i_dev, false);

	return 0;
}

static int dw_i2c_plat_resume(struct device *dev)
{
	struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);

	if (!i_dev->pm_disabled)
		i2c_dw_prepare_clk(i_dev, true);

	i_dev->init(i_dev);

	return 0;
}

static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
	.prepare = dw_i2c_plat_prepare,
	.complete = dw_i2c_plat_complete,
	SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
	SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
};

#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
#else
#define DW_I2C_DEV_PMOPS NULL
#endif

/* Work with hotplug and coldplug */
MODULE_ALIAS("platform:i2c_designware");

static struct platform_driver dw_i2c_driver = {
	.probe = dw_i2c_plat_probe,
	.remove = dw_i2c_plat_remove,
	.driver		= {
		.name	= "i2c_designware",
		.of_match_table = of_match_ptr(dw_i2c_of_match),
		.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
		.pm	= DW_I2C_DEV_PMOPS,
	},
};

static int __init dw_i2c_init_driver(void)
{
	return platform_driver_register(&dw_i2c_driver);
}
subsys_initcall(dw_i2c_init_driver);

static void __exit dw_i2c_exit_driver(void)
{
	platform_driver_unregister(&dw_i2c_driver);
}
module_exit(dw_i2c_exit_driver);

MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
MODULE_LICENSE("GPL");
Commit	Line	Data
15c566fc	1	// SPDX-License-Identifier: GPL-2.0-or-later
2373f6b9	2	/*
5b6d721b	3	* Synopsys DesignWare I2C adapter driver.
2373f6b9 DB	4	*
	5	* Based on the TI DAVINCI I2C adapter driver.
	6	*
	7	* Copyright (C) 2006 Texas Instruments.
	8	* Copyright (C) 2007 MontaVista Software Inc.
	9	* Copyright (C) 2009 Provigent Ltd.
2373f6b9	10	*/
e393f674 LO	11	#include <linux/acpi.h>
	12	#include <linux/clk-provider.h>
	13	#include <linux/clk.h>
2373f6b9	14	#include <linux/delay.h>
56d4b8a2	15	#include <linux/dmi.h>
2373f6b9	16	#include <linux/err.h>
e393f674 LO	17	#include <linux/errno.h>
e393f674 LO	18	#include <linux/i2c.h>
2373f6b9	19	#include <linux/interrupt.h>
e393f674 LO	20	#include <linux/io.h>
	21	#include <linux/kernel.h>
	22	#include <linux/module.h>
9803f868	23	#include <linux/of.h>
e393f674	24	#include <linux/platform_data/i2c-designware.h>
2373f6b9	25	#include <linux/platform_device.h>
3bf3b289	26	#include <linux/pm.h>
7272194e	27	#include <linux/pm_runtime.h>
4c5301ab	28	#include <linux/property.h>
ab809fd8	29	#include <linux/reset.h>
e393f674	30	#include <linux/sched.h>
2373f6b9	31	#include <linux/slab.h>
02e45646	32	#include <linux/suspend.h>
e393f674	33
2373f6b9 DB	34	#include "i2c-designware-core.h"
2373f6b9 DB	35
1d31b58f DB	36	static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
	37	{
	38	return clk_get_rate(dev->clk)/1000;
	39	}
2373f6b9	40
b61b1415	41	#ifdef CONFIG_ACPI
56d4b8a2 MW	42	/*
	43	* The HCNT/LCNT information coming from ACPI should be the most accurate
	44	* for given platform. However, some systems get it wrong. On such systems
	45	* we get better results by calculating those based on the input clock.
	46	*/
	47	static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
	48	{
	49	.ident = "Dell Inspiron 7348",
	50	.matches = {
	51	DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
	52	DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
	53	},
	54	},
	55	{ }
	56	};
	57
57cd1e30 MW	58	static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
	59	u16 hcnt, u16 lcnt, u32 *sda_hold)
	60	{
	61	struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
	62	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
	63	union acpi_object *obj;
	64
56d4b8a2 MW	65	if (dmi_check_system(dw_i2c_no_acpi_params))
	66	return;
	67
57cd1e30 MW	68	if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
	69	return;
	70
	71	obj = (union acpi_object *)buf.pointer;
	72	if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
	73	const union acpi_object *objs = obj->package.elements;
	74
	75	*hcnt = (u16)objs[0].integer.value;
	76	*lcnt = (u16)objs[1].integer.value;
bd698d24	77	*sda_hold = (u32)objs[2].integer.value;
57cd1e30 MW	78	}
	79
	80	kfree(buf.pointer);
	81	}
	82
b61b1415 MW	83	static int dw_i2c_acpi_configure(struct platform_device *pdev)
	84	{
	85	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
e3ea52b5	86	struct i2c_timings *t = &dev->timings;
ad258fb9	87	u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
a3d411fb	88	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
2d244c81	89	const struct acpi_device_id *id;
a3d411fb HG	90	struct acpi_device *adev;
a3d411fb HG	91	const char *uid;
b61b1415	92
b61b1415	93	dev->adapter.nr = -1;
b61b1415 MW	94	dev->tx_fifo_depth = 32;
b61b1415 MW	95	dev->rx_fifo_depth = 32;
57cd1e30 MW	96
57cd1e30 MW	97	/*
bd698d24	98	* Try to get SDA hold time and *CNT values from an ACPI method for
bd698d24	99	* selected speed modes.
57cd1e30	100	*/
9d640843 AB	101	dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
	102	dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
	103	dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
	104	dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
	105
e3ea52b5	106	switch (t->bus_freq_hz) {
bd698d24	107	case 100000:
9d640843	108	dev->sda_hold_time = ss_ht;
bd698d24	109	break;
bd698d24	110	case 1000000:
9d640843	111	dev->sda_hold_time = fp_ht;
bd698d24	112	break;
bd698d24	113	case 3400000:
9d640843	114	dev->sda_hold_time = hs_ht;
bd698d24	115	break;
	116	case 400000:
	117	default:
9d640843	118	dev->sda_hold_time = fs_ht;
bd698d24	119	break;
bd698d24	120	}
57cd1e30	121
2d244c81 XY	122	id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
2d244c81 XY	123	if (id && id->driver_data)
86524e54	124	dev->flags \|= (u32)id->driver_data;
2d244c81	125
a3d411fb HG	126	if (acpi_bus_get_device(handle, &adev))
	127	return -ENODEV;
	128
	129	/*
	130	* Cherrytrail I2C7 gets used for the PMIC which gets accessed
	131	* through ACPI opregions during late suspend / early resume
	132	* disable pm for it.
	133	*/
	134	uid = adev->pnp.unique_id;
	135	if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
	136	dev->pm_disabled = true;
	137
b61b1415 MW	138	return 0;
	139	}
	140
	141	static const struct acpi_device_id dw_i2c_acpi_match[] = {
	142	{ "INT33C2", 0 },
	143	{ "INT33C3", 0 },
25b3dfc8 MW	144	{ "INT3432", 0 },
25b3dfc8 MW	145	{ "INT3433", 0 },
5a7e6bd8	146	{ "80860F41", 0 },
fd476fa2	147	{ "808622C1", MODEL_CHERRYTRAIL },
2d244c81	148	{ "AMD0010", ACCESS_INTR_MASK },
e4e666ba	149	{ "AMDI0010", ACCESS_INTR_MASK },
90708ce2	150	{ "AMDI0510", 0 },
04a407f6	151	{ "APMC0D0F", 0 },
58dd8abf HG	152	{ "HISI02A1", 0 },
58dd8abf HG	153	{ "HISI02A2", 0 },
b61b1415 MW	154	{ }
	155	};
	156	MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
	157	#else
	158	static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
	159	{
	160	return -ENODEV;
	161	}
	162	#endif
	163
89a1e1bd LO	164	static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
89a1e1bd LO	165	{
e3ea52b5 AS	166	struct i2c_timings *t = &dev->timings;
e3ea52b5 AS	167
5b6d721b LO	168	dev->functionality = I2C_FUNC_10BIT_ADDR \| DW_IC_DEFAULT_FUNCTIONALITY;
5b6d721b LO	169
89a1e1bd LO	170	dev->master_cfg = DW_IC_CON_MASTER \| DW_IC_CON_SLAVE_DISABLE \|
	171	DW_IC_CON_RESTART_EN;
	172
5b6d721b LO	173	dev->mode = DW_IC_MASTER;
5b6d721b LO	174
e3ea52b5	175	switch (t->bus_freq_hz) {
89a1e1bd LO	176	case 100000:
	177	dev->master_cfg \|= DW_IC_CON_SPEED_STD;
	178	break;
	179	case 3400000:
	180	dev->master_cfg \|= DW_IC_CON_SPEED_HIGH;
	181	break;
	182	default:
	183	dev->master_cfg \|= DW_IC_CON_SPEED_FAST;
	184	}
	185	}
	186
5b6d721b LO	187	static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
	188	{
	189	dev->functionality = I2C_FUNC_SLAVE \| DW_IC_DEFAULT_FUNCTIONALITY;
	190
	191	dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL \|
4e2d93de	192	DW_IC_CON_RESTART_EN \| DW_IC_CON_STOP_DET_IFADDRESSED;
5b6d721b LO	193
5b6d721b LO	194	dev->mode = DW_IC_SLAVE;
b33af11d SS	195	}
b33af11d SS	196
8e598769 TH	197	static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
	198	{
	199	u32 param, tx_fifo_depth, rx_fifo_depth;
	200
	201	/*
	202	* Try to detect the FIFO depth if not set by interface driver,
	203	* the depth could be from 2 to 256 from HW spec.
	204	*/
	205	param = i2c_dw_read_comp_param(dev);
	206	tx_fifo_depth = ((param >> 16) & 0xff) + 1;
	207	rx_fifo_depth = ((param >> 8) & 0xff) + 1;
	208	if (!dev->tx_fifo_depth) {
	209	dev->tx_fifo_depth = tx_fifo_depth;
	210	dev->rx_fifo_depth = rx_fifo_depth;
	211	dev->adapter.nr = id;
	212	} else if (tx_fifo_depth >= 2) {
	213	dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
	214	tx_fifo_depth);
	215	dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
	216	rx_fifo_depth);
	217	}
	218	}
	219
126dbc6b RW	220	static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
	221	{
	222	pm_runtime_disable(dev->dev);
	223
	224	if (dev->pm_disabled)
	225	pm_runtime_put_noidle(dev->dev);
	226	}
	227
6ad6fde3	228	static int dw_i2c_plat_probe(struct platform_device *pdev)
2373f6b9	229	{
4c5301ab	230	struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
2373f6b9	231	struct i2c_adapter *adap;
e393f674	232	struct dw_i2c_dev *dev;
e3ea52b5 AS	233	struct i2c_timings *t;
e3ea52b5 AS	234	u32 acpi_speed;
e393f674	235	struct resource *mem;
231d069f	236	int i, irq, ret;
4ce8e88f CIK	237	static const int supported_speeds[] = {
	238	0, 100000, 400000, 1000000, 3400000
	239	};
2373f6b9	240
2373f6b9	241	irq = platform_get_irq(pdev, 0);
b20d3864 AB	242	if (irq < 0)
b20d3864 AB	243	return irq;
2373f6b9	244
1cb715ca AS	245	dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
	246	if (!dev)
	247	return -ENOMEM;
2373f6b9	248
3cc2d009	249	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1cb715ca AS	250	dev->base = devm_ioremap_resource(&pdev->dev, mem);
	251	if (IS_ERR(dev->base))
	252	return PTR_ERR(dev->base);
2373f6b9	253
1cb715ca	254	dev->dev = &pdev->dev;
2373f6b9 DB	255	dev->irq = irq;
	256	platform_set_drvdata(pdev, dev);
	257
ab809fd8 ZG	258	dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
	259	if (IS_ERR(dev->rst)) {
	260	if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
	261	return -EPROBE_DEFER;
	262	} else {
	263	reset_control_deassert(dev->rst);
	264	}
	265
e3ea52b5 AS	266	t = &dev->timings;
	267	if (pdata)
	268	t->bus_freq_hz = pdata->i2c_scl_freq;
	269	else
	270	i2c_parse_fw_timings(&pdev->dev, t, false);
4c5301ab	271
10f8e7fb	272	acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
231d069f HG	273	/*
	274	* Some DSTDs use a non standard speed, round down to the lowest
	275	* standard speed.
	276	*/
	277	for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
	278	if (acpi_speed < supported_speeds[i])
	279	break;
	280	}
	281	acpi_speed = supported_speeds[i - 1];
	282
973652db JN	283	/*
	284	* Find bus speed from the "clock-frequency" device property, ACPI
	285	* or by using fast mode if neither is set.
	286	*/
e3ea52b5 AS	287	if (acpi_speed && t->bus_freq_hz)
	288	t->bus_freq_hz = min(t->bus_freq_hz, acpi_speed);
	289	else if (acpi_speed \|\| t->bus_freq_hz)
	290	t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed);
973652db	291	else
e3ea52b5	292	t->bus_freq_hz = 400000;
10f8e7fb	293
4c5301ab MW	294	if (has_acpi_companion(&pdev->dev))
	295	dw_i2c_acpi_configure(pdev);
	296
	297	/*
d608c3d9	298	* Only standard mode at 100kHz, fast mode at 400kHz,
b6e67145	299	* fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
4c5301ab	300	*/
e3ea52b5 AS	301	if (t->bus_freq_hz != 100000 && t->bus_freq_hz != 400000 &&
e3ea52b5 AS	302	t->bus_freq_hz != 1000000 && t->bus_freq_hz != 3400000) {
d608c3d9	303	dev_err(&pdev->dev,
22acc37b	304	"%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
e3ea52b5	305	t->bus_freq_hz);
e393f674	306	ret = -EINVAL;
ab809fd8	307	goto exit_reset;
9803f868 CR	308	}
9803f868 CR	309
e393f674 LO	310	ret = i2c_dw_probe_lock_support(dev);
e393f674 LO	311	if (ret)
ab809fd8	312	goto exit_reset;
894acb2f	313
5b6d721b LO	314	if (i2c_detect_slave_mode(&pdev->dev))
	315	i2c_dw_configure_slave(dev);
	316	else
	317	i2c_dw_configure_master(dev);
2fa8326b	318
925ddb24	319	dev->clk = devm_clk_get(&pdev->dev, NULL);
0326f9f8	320	if (!i2c_dw_prepare_clk(dev, true)) {
e3ea52b5 AS	321	u64 clk_khz;
e3ea52b5 AS	322
b33af11d	323	dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
e3ea52b5	324	clk_khz = dev->get_clk_rate_khz(dev);
925ddb24	325
e3ea52b5 AS	326	if (!dev->sda_hold_time && t->sda_hold_ns)
	327	dev->sda_hold_time =
	328	div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000);
925ddb24 MW	329	}
925ddb24 MW	330
8e598769	331	dw_i2c_set_fifo_size(dev, pdev->id);
2373f6b9 DB	332
2373f6b9 DB	333	adap = &dev->adapter;
2373f6b9	334	adap->owner = THIS_MODULE;
70fba830	335	adap->class = I2C_CLASS_DEPRECATED;
8eb5c87a	336	ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
af71100c	337	adap->dev.of_node = pdev->dev.of_node;
2373f6b9	338
02e45646 RW	339	dev_pm_set_driver_flags(&pdev->dev,
	340	DPM_FLAG_SMART_PREPARE \|
	341	DPM_FLAG_SMART_SUSPEND \|
	342	DPM_FLAG_LEAVE_SUSPENDED);
422cb781	343
126dbc6b RW	344	/* The code below assumes runtime PM to be disabled. */
	345	WARN_ON(pm_runtime_enabled(&pdev->dev));
	346
	347	pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
	348	pm_runtime_use_autosuspend(&pdev->dev);
	349	pm_runtime_set_active(&pdev->dev);
	350
	351	if (dev->pm_disabled)
	352	pm_runtime_get_noresume(&pdev->dev);
	353
	354	pm_runtime_enable(&pdev->dev);
7272194e	355
5b6d721b LO	356	if (dev->mode == DW_IC_SLAVE)
	357	ret = i2c_dw_probe_slave(dev);
	358	else
	359	ret = i2c_dw_probe(dev);
	360
e393f674	361	if (ret)
ab809fd8	362	goto exit_probe;
36d48fb5	363
e393f674	364	return ret;
ab809fd8 ZG	365
ab809fd8 ZG	366	exit_probe:
126dbc6b	367	dw_i2c_plat_pm_cleanup(dev);
ab809fd8 ZG	368	exit_reset:
	369	if (!IS_ERR_OR_NULL(dev->rst))
	370	reset_control_assert(dev->rst);
e393f674	371	return ret;
2373f6b9 DB	372	}
2373f6b9 DB	373
6ad6fde3	374	static int dw_i2c_plat_remove(struct platform_device *pdev)
2373f6b9 DB	375	{
2373f6b9 DB	376	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
2373f6b9	377
7272194e MW	378	pm_runtime_get_sync(&pdev->dev);
7272194e MW	379
2373f6b9	380	i2c_del_adapter(&dev->adapter);
2373f6b9	381
90312351	382	dev->disable(dev);
2373f6b9	383
edfc3901 MW	384	pm_runtime_dont_use_autosuspend(&pdev->dev);
edfc3901 MW	385	pm_runtime_put_sync(&pdev->dev);
126dbc6b RW	386	dw_i2c_plat_pm_cleanup(dev);
126dbc6b RW	387
ab809fd8 ZG	388	if (!IS_ERR_OR_NULL(dev->rst))
ab809fd8 ZG	389	reset_control_assert(dev->rst);
7272194e	390
086cb4af HG	391	i2c_dw_remove_lock_support(dev);
086cb4af HG	392
2373f6b9 DB	393	return 0;
	394	}
	395
af71100c RH	396	#ifdef CONFIG_OF
	397	static const struct of_device_id dw_i2c_of_match[] = {
	398	{ .compatible = "snps,designware-i2c", },
	399	{},
	400	};
	401	MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
	402	#endif
	403
8503ff16	404	#ifdef CONFIG_PM_SLEEP
6ad6fde3	405	static int dw_i2c_plat_prepare(struct device *dev)
8503ff16	406	{
422cb781 RW	407	/*
	408	* If the ACPI companion device object is present for this device, it
	409	* may be accessed during suspend and resume of other devices via I2C
	410	* operation regions, so tell the PM core and middle layers to avoid
	411	* skipping system suspend/resume callbacks for it in that case.
	412	*/
	413	return !has_acpi_companion(dev);
8503ff16 JZ	414	}
8503ff16 JZ	415
6ad6fde3	416	static void dw_i2c_plat_complete(struct device *dev)
8503ff16	417	{
02e45646 RW	418	/*
	419	* The device can only be in runtime suspend at this point if it has not
	420	* been resumed throughout the ending system suspend/resume cycle, so if
	421	* the platform firmware might mess up with it, request the runtime PM
	422	* framework to resume it.
	423	*/
	424	if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
8503ff16 JZ	425	pm_request_resume(dev);
	426	}
	427	#else
319d7f05 JN	428	#define dw_i2c_plat_prepare NULL
319d7f05 JN	429	#define dw_i2c_plat_complete NULL
8503ff16 JZ	430	#endif
8503ff16 JZ	431
1fc2fe20	432	#ifdef CONFIG_PM
54152772	433	static int dw_i2c_plat_suspend(struct device *dev)
3bf3b289	434	{
9242e72a	435	struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
3bf3b289	436
9d9a152e HG	437	if (i_dev->pm_disabled)
	438	return 0;
	439
90312351	440	i_dev->disable(i_dev);
0326f9f8	441	i2c_dw_prepare_clk(i_dev, false);
3bf3b289 DS	442
	443	return 0;
	444	}
	445
6ad6fde3	446	static int dw_i2c_plat_resume(struct device *dev)
3bf3b289	447	{
9242e72a	448	struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
3bf3b289	449
9d9a152e HG	450	if (!i_dev->pm_disabled)
	451	i2c_dw_prepare_clk(i_dev, true);
	452
90312351	453	i_dev->init(i_dev);
3bf3b289	454
54152772	455	return 0;
a23318fe	456	}
a23318fe	457
8503ff16	458	static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
6ad6fde3 JN	459	.prepare = dw_i2c_plat_prepare,
6ad6fde3 JN	460	.complete = dw_i2c_plat_complete,
54152772 RW	461	SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
54152772 RW	462	SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
8503ff16 JZ	463	};
	464
	465	#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
	466	#else
	467	#define DW_I2C_DEV_PMOPS NULL
	468	#endif
1fc2fe20	469
e393f674	470	/* Work with hotplug and coldplug */
2373f6b9 DB	471	MODULE_ALIAS("platform:i2c_designware");
	472
	473	static struct platform_driver dw_i2c_driver = {
6ad6fde3 JN	474	.probe = dw_i2c_plat_probe,
6ad6fde3 JN	475	.remove = dw_i2c_plat_remove,
2373f6b9 DB	476	.driver = {
2373f6b9 DB	477	.name = "i2c_designware",
af71100c	478	.of_match_table = of_match_ptr(dw_i2c_of_match),
b61b1415	479	.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
8503ff16	480	.pm = DW_I2C_DEV_PMOPS,
2373f6b9 DB	481	},
	482	};
	483
	484	static int __init dw_i2c_init_driver(void)
	485	{
cccdcea1	486	return platform_driver_register(&dw_i2c_driver);
2373f6b9	487	}
10452280	488	subsys_initcall(dw_i2c_init_driver);
2373f6b9 DB	489
	490	static void __exit dw_i2c_exit_driver(void)
	491	{
	492	platform_driver_unregister(&dw_i2c_driver);
	493	}
	494	module_exit(dw_i2c_exit_driver);
	495
	496	MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
	497	MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
	498	MODULE_LICENSE("GPL");