[linux-2.6-block.git] / drivers / i2c / algos / i2c-algo-pca.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *  i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
 *    Copyright (C) 2004 Arcom Control Systems
 *    Copyright (C) 2008 Pengutronix
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/errno.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-pca.h>

#define DEB1(fmt, args...) do { if (i2c_debug >= 1)			\
				 printk(KERN_DEBUG fmt, ## args); } while (0)
#define DEB2(fmt, args...) do { if (i2c_debug >= 2)			\
				 printk(KERN_DEBUG fmt, ## args); } while (0)
#define DEB3(fmt, args...) do { if (i2c_debug >= 3)			\
				 printk(KERN_DEBUG fmt, ## args); } while (0)

static int i2c_debug;

#define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
#define pca_inw(adap, reg) adap->read_byte(adap->data, reg)

#define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
#define pca_clock(adap) adap->i2c_clock
#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
#define pca_wait(adap) adap->wait_for_completion(adap->data)

static void pca_reset(struct i2c_algo_pca_data *adap)
{
	if (adap->chip == I2C_PCA_CHIP_9665) {
		/* Ignore the reset function from the module,
		 * we can use the parallel bus reset.
		 */
		pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
		pca_outw(adap, I2C_PCA_IND, 0xA5);
		pca_outw(adap, I2C_PCA_IND, 0x5A);

		/*
		 * After a reset we need to re-apply any configuration
		 * (calculated in pca_init) to get the bus in a working state.
		 */
		pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IMODE);
		pca_outw(adap, I2C_PCA_IND, adap->bus_settings.mode);
		pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
		pca_outw(adap, I2C_PCA_IND, adap->bus_settings.tlow);
		pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
		pca_outw(adap, I2C_PCA_IND, adap->bus_settings.thi);

		pca_set_con(adap, I2C_PCA_CON_ENSIO);
	} else {
		adap->reset_chip(adap->data);
		pca_set_con(adap, I2C_PCA_CON_ENSIO | adap->bus_settings.clock_freq);
	}
}

/*
 * Generate a start condition on the i2c bus.
 *
 * returns after the start condition has occurred
 */
static int pca_start(struct i2c_algo_pca_data *adap)
{
	int sta = pca_get_con(adap);
	DEB2("=== START\n");
	sta |= I2C_PCA_CON_STA;
	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);
	return pca_wait(adap);
}

/*
 * Generate a repeated start condition on the i2c bus
 *
 * return after the repeated start condition has occurred
 */
static int pca_repeated_start(struct i2c_algo_pca_data *adap)
{
	int sta = pca_get_con(adap);
	DEB2("=== REPEATED START\n");
	sta |= I2C_PCA_CON_STA;
	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);
	return pca_wait(adap);
}

/*
 * Generate a stop condition on the i2c bus
 *
 * returns after the stop condition has been generated
 *
 * STOPs do not generate an interrupt or set the SI flag, since the
 * part returns the idle state (0xf8). Hence we don't need to
 * pca_wait here.
 */
static void pca_stop(struct i2c_algo_pca_data *adap)
{
	int sta = pca_get_con(adap);
	DEB2("=== STOP\n");
	sta |= I2C_PCA_CON_STO;
	sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);
}

/*
 * Send the slave address and R/W bit
 *
 * returns after the address has been sent
 */
static int pca_address(struct i2c_algo_pca_data *adap,
		       struct i2c_msg *msg)
{
	int sta = pca_get_con(adap);
	int addr = i2c_8bit_addr_from_msg(msg);

	DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
	     msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);

	pca_outw(adap, I2C_PCA_DAT, addr);

	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);

	return pca_wait(adap);
}

/*
 * Transmit a byte.
 *
 * Returns after the byte has been transmitted
 */
static int pca_tx_byte(struct i2c_algo_pca_data *adap,
		       __u8 b)
{
	int sta = pca_get_con(adap);
	DEB2("=== WRITE %#04x\n", b);
	pca_outw(adap, I2C_PCA_DAT, b);

	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);

	return pca_wait(adap);
}

/*
 * Receive a byte
 *
 * returns immediately.
 */
static void pca_rx_byte(struct i2c_algo_pca_data *adap,
			__u8 *b, int ack)
{
	*b = pca_inw(adap, I2C_PCA_DAT);
	DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
}

/*
 * Setup ACK or NACK for next received byte and wait for it to arrive.
 *
 * Returns after next byte has arrived.
 */
static int pca_rx_ack(struct i2c_algo_pca_data *adap,
		      int ack)
{
	int sta = pca_get_con(adap);

	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);

	if (ack)
		sta |= I2C_PCA_CON_AA;

	pca_set_con(adap, sta);
	return pca_wait(adap);
}

static int pca_xfer(struct i2c_adapter *i2c_adap,
		    struct i2c_msg *msgs,
		    int num)
{
	struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
	struct i2c_msg *msg = NULL;
	int curmsg;
	int numbytes = 0;
	int state;
	int ret;
	int completed = 1;
	unsigned long timeout = jiffies + i2c_adap->timeout;

	while ((state = pca_status(adap)) != 0xf8) {
		if (time_before(jiffies, timeout)) {
			msleep(10);
		} else {
			dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
				"%#04x\n", state);
			return -EBUSY;
		}
	}

	DEB1("{{{ XFER %d messages\n", num);

	if (i2c_debug >= 2) {
		for (curmsg = 0; curmsg < num; curmsg++) {
			int addr, i;
			msg = &msgs[curmsg];

			addr = (0x7f & msg->addr) ;

			if (msg->flags & I2C_M_RD)
				printk(KERN_INFO "    [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
				       curmsg, msg->len, addr, (addr << 1) | 1);
			else {
				printk(KERN_INFO "    [%02d] WR %d bytes to %#02x [%#02x%s",
				       curmsg, msg->len, addr, addr << 1,
				       msg->len == 0 ? "" : ", ");
				for (i = 0; i < msg->len; i++)
					printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
				printk("]\n");
			}
		}
	}

	curmsg = 0;
	ret = -EIO;
	while (curmsg < num) {
		state = pca_status(adap);

		DEB3("STATE is 0x%02x\n", state);
		msg = &msgs[curmsg];

		switch (state) {
		case 0xf8: /* On reset or stop the bus is idle */
			completed = pca_start(adap);
			break;

		case 0x08: /* A START condition has been transmitted */
		case 0x10: /* A repeated start condition has been transmitted */
			completed = pca_address(adap, msg);
			break;

		case 0x18: /* SLA+W has been transmitted; ACK has been received */
		case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
			if (numbytes < msg->len) {
				completed = pca_tx_byte(adap,
							msg->buf[numbytes]);
				numbytes++;
				break;
			}
			curmsg++; numbytes = 0;
			if (curmsg == num)
				pca_stop(adap);
			else
				completed = pca_repeated_start(adap);
			break;

		case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
			DEB2("NOT ACK received after SLA+W\n");
			pca_stop(adap);
			ret = -ENXIO;
			goto out;

		case 0x40: /* SLA+R has been transmitted; ACK has been received */
			completed = pca_rx_ack(adap, msg->len > 1);
			break;

		case 0x50: /* Data bytes has been received; ACK has been returned */
			if (numbytes < msg->len) {
				pca_rx_byte(adap, &msg->buf[numbytes], 1);
				numbytes++;
				completed = pca_rx_ack(adap,
						       numbytes < msg->len - 1);
				break;
			}
			curmsg++; numbytes = 0;
			if (curmsg == num)
				pca_stop(adap);
			else
				completed = pca_repeated_start(adap);
			break;

		case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
			DEB2("NOT ACK received after SLA+R\n");
			pca_stop(adap);
			ret = -ENXIO;
			goto out;

		case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
			DEB2("NOT ACK received after data byte\n");
			pca_stop(adap);
			goto out;

		case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
			DEB2("Arbitration lost\n");
			/*
			 * The PCA9564 data sheet (2006-09-01) says "A
			 * START condition will be transmitted when the
			 * bus becomes free (STOP or SCL and SDA high)"
			 * when the STA bit is set (p. 11).
			 *
			 * In case this won't work, try pca_reset()
			 * instead.
			 */
			pca_start(adap);
			goto out;

		case 0x58: /* Data byte has been received; NOT ACK has been returned */
			if (numbytes == msg->len - 1) {
				pca_rx_byte(adap, &msg->buf[numbytes], 0);
				curmsg++; numbytes = 0;
				if (curmsg == num)
					pca_stop(adap);
				else
					completed = pca_repeated_start(adap);
			} else {
				DEB2("NOT ACK sent after data byte received. "
				     "Not final byte. numbytes %d. len %d\n",
				     numbytes, msg->len);
				pca_stop(adap);
				goto out;
			}
			break;
		case 0x70: /* Bus error - SDA stuck low */
			DEB2("BUS ERROR - SDA Stuck low\n");
			pca_reset(adap);
			goto out;
		case 0x78: /* Bus error - SCL stuck low (PCA9665) */
		case 0x90: /* Bus error - SCL stuck low (PCA9564) */
			DEB2("BUS ERROR - SCL Stuck low\n");
			pca_reset(adap);
			goto out;
		case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
			DEB2("BUS ERROR - Illegal START or STOP\n");
			pca_reset(adap);
			goto out;
		default:
			dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
			break;
		}

		if (!completed)
			goto out;
	}

	ret = curmsg;
 out:
	DEB1("}}} transferred %d/%d messages. "
	     "status is %#04x. control is %#04x\n",
	     curmsg, num, pca_status(adap),
	     pca_get_con(adap));
	return ret;
}

static u32 pca_func(struct i2c_adapter *adap)
{
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}

static const struct i2c_algorithm pca_algo = {
	.master_xfer	= pca_xfer,
	.functionality	= pca_func,
};

static unsigned int pca_probe_chip(struct i2c_adapter *adap)
{
	struct i2c_algo_pca_data *pca_data = adap->algo_data;
	/* The trick here is to check if there is an indirect register
	 * available. If there is one, we will read the value we first
	 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
	 * we wrote on I2C_PCA_ADR
	 */
	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	pca_outw(pca_data, I2C_PCA_IND, 0xAA);
	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
	pca_outw(pca_data, I2C_PCA_IND, 0x00);
	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
		printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
		pca_data->chip = I2C_PCA_CHIP_9665;
	} else {
		printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
		pca_data->chip = I2C_PCA_CHIP_9564;
	}
	return pca_data->chip;
}

static int pca_init(struct i2c_adapter *adap)
{
	struct i2c_algo_pca_data *pca_data = adap->algo_data;

	adap->algo = &pca_algo;

	if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
		static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
		int clock;

		if (pca_data->i2c_clock > 7) {
			switch (pca_data->i2c_clock) {
			case 330000:
				pca_data->i2c_clock = I2C_PCA_CON_330kHz;
				break;
			case 288000:
				pca_data->i2c_clock = I2C_PCA_CON_288kHz;
				break;
			case 217000:
				pca_data->i2c_clock = I2C_PCA_CON_217kHz;
				break;
			case 146000:
				pca_data->i2c_clock = I2C_PCA_CON_146kHz;
				break;
			case 88000:
				pca_data->i2c_clock = I2C_PCA_CON_88kHz;
				break;
			case 59000:
				pca_data->i2c_clock = I2C_PCA_CON_59kHz;
				break;
			case 44000:
				pca_data->i2c_clock = I2C_PCA_CON_44kHz;
				break;
			case 36000:
				pca_data->i2c_clock = I2C_PCA_CON_36kHz;
				break;
			default:
				printk(KERN_WARNING
					"%s: Invalid I2C clock speed selected."
					" Using default 59kHz.\n", adap->name);
			pca_data->i2c_clock = I2C_PCA_CON_59kHz;
			}
		} else {
			printk(KERN_WARNING "%s: "
				"Choosing the clock frequency based on "
				"index is deprecated."
				" Use the nominal frequency.\n", adap->name);
		}

		clock = pca_clock(pca_data);
		printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
		     adap->name, freqs[clock]);

		/* Store settings as these will be needed when the PCA chip is reset */
		pca_data->bus_settings.clock_freq = clock;

		pca_reset(pca_data);
	} else {
		int clock;
		int mode;
		int tlow, thi;
		/* Values can be found on PCA9665 datasheet section 7.3.2.6 */
		int min_tlow, min_thi;
		/* These values are the maximum raise and fall values allowed
		 * by the I2C operation mode (Standard, Fast or Fast+)
		 * They are used (added) below to calculate the clock dividers
		 * of PCA9665. Note that they are slightly different of the
		 * real maximum, to allow the change on mode exactly on the
		 * maximum clock rate for each mode
		 */
		int raise_fall_time;

		if (pca_data->i2c_clock > 1265800) {
			printk(KERN_WARNING "%s: I2C clock speed too high."
				" Using 1265.8kHz.\n", adap->name);
			pca_data->i2c_clock = 1265800;
		}

		if (pca_data->i2c_clock < 60300) {
			printk(KERN_WARNING "%s: I2C clock speed too low."
				" Using 60.3kHz.\n", adap->name);
			pca_data->i2c_clock = 60300;
		}

		/* To avoid integer overflow, use clock/100 for calculations */
		clock = pca_clock(pca_data) / 100;

		if (pca_data->i2c_clock > I2C_MAX_FAST_MODE_PLUS_FREQ) {
			mode = I2C_PCA_MODE_TURBO;
			min_tlow = 14;
			min_thi  = 5;
			raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
		} else if (pca_data->i2c_clock > I2C_MAX_FAST_MODE_FREQ) {
			mode = I2C_PCA_MODE_FASTP;
			min_tlow = 17;
			min_thi  = 9;
			raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
		} else if (pca_data->i2c_clock > I2C_MAX_STANDARD_MODE_FREQ) {
			mode = I2C_PCA_MODE_FAST;
			min_tlow = 44;
			min_thi  = 20;
			raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
		} else {
			mode = I2C_PCA_MODE_STD;
			min_tlow = 157;
			min_thi  = 134;
			raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
		}

		/* The minimum clock that respects the thi/tlow = 134/157 is
		 * 64800 Hz. Below that, we have to fix the tlow to 255 and
		 * calculate the thi factor.
		 */
		if (clock < 648) {
			tlow = 255;
			thi = 1000000 - clock * raise_fall_time;
			thi /= (I2C_PCA_OSC_PER * clock) - tlow;
		} else {
			tlow = (1000000 - clock * raise_fall_time) * min_tlow;
			tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
			thi = tlow * min_thi / min_tlow;
		}

		/* Store settings as these will be needed when the PCA chip is reset */
		pca_data->bus_settings.mode = mode;
		pca_data->bus_settings.tlow = tlow;
		pca_data->bus_settings.thi = thi;

		pca_reset(pca_data);

		printk(KERN_INFO
		     "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
	}
	udelay(500); /* 500 us for oscillator to stabilise */

	return 0;
}

/*
 * registering functions to load algorithms at runtime
 */
int i2c_pca_add_bus(struct i2c_adapter *adap)
{
	int rval;

	rval = pca_init(adap);
	if (rval)
		return rval;

	return i2c_add_adapter(adap);
}
EXPORT_SYMBOL(i2c_pca_add_bus);

int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
{
	int rval;

	rval = pca_init(adap);
	if (rval)
		return rval;

	return i2c_add_numbered_adapter(adap);
}
EXPORT_SYMBOL(i2c_pca_add_numbered_bus);

MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>");
MODULE_AUTHOR("Wolfram Sang <kernel@pengutronix.de>");
MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
MODULE_LICENSE("GPL");

module_param(i2c_debug, int, 0);
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4	2	/*
3d438291	3	* i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
1da177e4	4	* Copyright (C) 2004 Arcom Control Systems
c01b0831	5	* Copyright (C) 2008 Pengutronix
1da177e4 LT	6	*/
	7
	8	#include <linux/kernel.h>
	9	#include <linux/module.h>
	10	#include <linux/moduleparam.h>
	11	#include <linux/delay.h>
8e99ada8	12	#include <linux/jiffies.h>
1da177e4 LT	13	#include <linux/errno.h>
	14	#include <linux/i2c.h>
	15	#include <linux/i2c-algo-pca.h>
1da177e4	16
bac3e7c2 FS	17	#define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
	18	printk(KERN_DEBUG fmt, ## args); } while (0)
	19	#define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
	20	printk(KERN_DEBUG fmt, ## args); } while (0)
	21	#define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
	22	printk(KERN_DEBUG fmt, ## args); } while (0)
1da177e4	23
60507095	24	static int i2c_debug;
1da177e4	25
c01b0831 WS	26	#define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
c01b0831 WS	27	#define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
1da177e4 LT	28
1da177e4 LT	29	#define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
c01b0831	30	#define pca_clock(adap) adap->i2c_clock
1da177e4 LT	31	#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
1da177e4 LT	32	#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
c01b0831	33	#define pca_wait(adap) adap->wait_for_completion(adap->data)
1da177e4	34
a76e7c68	35	static void pca_reset(struct i2c_algo_pca_data *adap)
eff9ec95	36	{
a76e7c68 TK	37	if (adap->chip == I2C_PCA_CHIP_9665) {
	38	/* Ignore the reset function from the module,
	39	* we can use the parallel bus reset.
	40	*/
	41	pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
	42	pca_outw(adap, I2C_PCA_IND, 0xA5);
	43	pca_outw(adap, I2C_PCA_IND, 0x5A);
0a355aeb EN	44
	45	/*
	46	* After a reset we need to re-apply any configuration
	47	* (calculated in pca_init) to get the bus in a working state.
	48	*/
	49	pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IMODE);
	50	pca_outw(adap, I2C_PCA_IND, adap->bus_settings.mode);
	51	pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
	52	pca_outw(adap, I2C_PCA_IND, adap->bus_settings.tlow);
	53	pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
	54	pca_outw(adap, I2C_PCA_IND, adap->bus_settings.thi);
	55
	56	pca_set_con(adap, I2C_PCA_CON_ENSIO);
a76e7c68 TK	57	} else {
a76e7c68 TK	58	adap->reset_chip(adap->data);
0a355aeb	59	pca_set_con(adap, I2C_PCA_CON_ENSIO \| adap->bus_settings.clock_freq);
a76e7c68	60	}
eff9ec95 MAC	61	}
eff9ec95 MAC	62
1da177e4 LT	63	/*
	64	* Generate a start condition on the i2c bus.
	65	*
44bbe87e	66	* returns after the start condition has occurred
1da177e4	67	*/
2378bc09	68	static int pca_start(struct i2c_algo_pca_data *adap)
1da177e4 LT	69	{
	70	int sta = pca_get_con(adap);
	71	DEB2("=== START\n");
	72	sta \|= I2C_PCA_CON_STA;
	73	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_SI);
	74	pca_set_con(adap, sta);
2378bc09	75	return pca_wait(adap);
1da177e4 LT	76	}
	77
	78	/*
46b615f4	79	* Generate a repeated start condition on the i2c bus
1da177e4	80	*
44bbe87e	81	* return after the repeated start condition has occurred
1da177e4	82	*/
2378bc09	83	static int pca_repeated_start(struct i2c_algo_pca_data *adap)
1da177e4 LT	84	{
	85	int sta = pca_get_con(adap);
	86	DEB2("=== REPEATED START\n");
	87	sta \|= I2C_PCA_CON_STA;
	88	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_SI);
	89	pca_set_con(adap, sta);
2378bc09	90	return pca_wait(adap);
1da177e4 LT	91	}
	92
	93	/*
	94	* Generate a stop condition on the i2c bus
	95	*
	96	* returns after the stop condition has been generated
	97	*
	98	* STOPs do not generate an interrupt or set the SI flag, since the
46b615f4	99	* part returns the idle state (0xf8). Hence we don't need to
1da177e4 LT	100	* pca_wait here.
	101	*/
	102	static void pca_stop(struct i2c_algo_pca_data *adap)
	103	{
	104	int sta = pca_get_con(adap);
	105	DEB2("=== STOP\n");
	106	sta \|= I2C_PCA_CON_STO;
	107	sta &= ~(I2C_PCA_CON_STA\|I2C_PCA_CON_SI);
	108	pca_set_con(adap, sta);
	109	}
	110
	111	/*
	112	* Send the slave address and R/W bit
	113	*
	114	* returns after the address has been sent
	115	*/
2378bc09	116	static int pca_address(struct i2c_algo_pca_data *adap,
2086ca48	117	struct i2c_msg *msg)
1da177e4 LT	118	{
1da177e4 LT	119	int sta = pca_get_con(adap);
ac6d5298	120	int addr = i2c_8bit_addr_from_msg(msg);
1da177e4	121
3d438291	122	DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
1da177e4	123	msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
3d438291	124
1da177e4 LT	125	pca_outw(adap, I2C_PCA_DAT, addr);
	126
	127	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_STA\|I2C_PCA_CON_SI);
	128	pca_set_con(adap, sta);
	129
2378bc09	130	return pca_wait(adap);
1da177e4 LT	131	}
	132
	133	/*
	134	* Transmit a byte.
	135	*
	136	* Returns after the byte has been transmitted
	137	*/
2378bc09	138	static int pca_tx_byte(struct i2c_algo_pca_data *adap,
2086ca48	139	__u8 b)
1da177e4 LT	140	{
	141	int sta = pca_get_con(adap);
	142	DEB2("=== WRITE %#04x\n", b);
	143	pca_outw(adap, I2C_PCA_DAT, b);
	144
	145	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_STA\|I2C_PCA_CON_SI);
	146	pca_set_con(adap, sta);
	147
2378bc09	148	return pca_wait(adap);
1da177e4 LT	149	}
	150
	151	/*
	152	* Receive a byte
	153	*
	154	* returns immediately.
	155	*/
3d438291	156	static void pca_rx_byte(struct i2c_algo_pca_data *adap,
1da177e4 LT	157	__u8 *b, int ack)
	158	{
	159	*b = pca_inw(adap, I2C_PCA_DAT);
	160	DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
	161	}
	162
3d438291	163	/*
1da177e4 LT	164	* Setup ACK or NACK for next received byte and wait for it to arrive.
	165	*
	166	* Returns after next byte has arrived.
	167	*/
2378bc09	168	static int pca_rx_ack(struct i2c_algo_pca_data *adap,
2086ca48	169	int ack)
1da177e4 LT	170	{
	171	int sta = pca_get_con(adap);
	172
	173	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_STA\|I2C_PCA_CON_SI\|I2C_PCA_CON_AA);
	174
2086ca48	175	if (ack)
1da177e4 LT	176	sta \|= I2C_PCA_CON_AA;
	177
	178	pca_set_con(adap, sta);
2378bc09	179	return pca_wait(adap);
1da177e4 LT	180	}
1da177e4 LT	181
1da177e4	182	static int pca_xfer(struct i2c_adapter *i2c_adap,
2086ca48 FH	183	struct i2c_msg *msgs,
2086ca48 FH	184	int num)
1da177e4	185	{
2086ca48 FH	186	struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
	187	struct i2c_msg *msg = NULL;
	188	int curmsg;
1da177e4 LT	189	int numbytes = 0;
	190	int state;
	191	int ret;
2378bc09	192	int completed = 1;
8e99ada8 WS	193	unsigned long timeout = jiffies + i2c_adap->timeout;
8e99ada8 WS	194
c454dee2	195	while ((state = pca_status(adap)) != 0xf8) {
8e99ada8 WS	196	if (time_before(jiffies, timeout)) {
	197	msleep(10);
	198	} else {
	199	dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
	200	"%#04x\n", state);
4403988a	201	return -EBUSY;
8e99ada8	202	}
1da177e4 LT	203	}
	204
	205	DEB1("{{{ XFER %d messages\n", num);
	206
2086ca48	207	if (i2c_debug >= 2) {
1da177e4 LT	208	for (curmsg = 0; curmsg < num; curmsg++) {
	209	int addr, i;
	210	msg = &msgs[curmsg];
3d438291	211
1da177e4	212	addr = (0x7f & msg->addr) ;
3d438291	213
2086ca48	214	if (msg->flags & I2C_M_RD)
3d438291	215	printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
2086ca48	216	curmsg, msg->len, addr, (addr << 1) \| 1);
1da177e4	217	else {
3d438291	218	printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
2086ca48	219	curmsg, msg->len, addr, addr << 1,
1da177e4	220	msg->len == 0 ? "" : ", ");
2086ca48	221	for (i = 0; i < msg->len; i++)
1da177e4 LT	222	printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
	223	printk("]\n");
	224	}
	225	}
	226	}
	227
	228	curmsg = 0;
4403988a	229	ret = -EIO;
1da177e4 LT	230	while (curmsg < num) {
	231	state = pca_status(adap);
	232
	233	DEB3("STATE is 0x%02x\n", state);
	234	msg = &msgs[curmsg];
	235
	236	switch (state) {
	237	case 0xf8: /* On reset or stop the bus is idle */
2378bc09	238	completed = pca_start(adap);
1da177e4 LT	239	break;
	240
	241	case 0x08: /* A START condition has been transmitted */
	242	case 0x10: /* A repeated start condition has been transmitted */
2378bc09	243	completed = pca_address(adap, msg);
1da177e4	244	break;
3d438291	245
1da177e4 LT	246	case 0x18: /* SLA+W has been transmitted; ACK has been received */
	247	case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
	248	if (numbytes < msg->len) {
2378bc09 WS	249	completed = pca_tx_byte(adap,
2378bc09 WS	250	msg->buf[numbytes]);
1da177e4 LT	251	numbytes++;
	252	break;
	253	}
	254	curmsg++; numbytes = 0;
	255	if (curmsg == num)
	256	pca_stop(adap);
	257	else
2378bc09	258	completed = pca_repeated_start(adap);
1da177e4 LT	259	break;
	260
	261	case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
	262	DEB2("NOT ACK received after SLA+W\n");
	263	pca_stop(adap);
4403988a	264	ret = -ENXIO;
1da177e4 LT	265	goto out;
	266
	267	case 0x40: /* SLA+R has been transmitted; ACK has been received */
2378bc09	268	completed = pca_rx_ack(adap, msg->len > 1);
1da177e4 LT	269	break;
	270
	271	case 0x50: /* Data bytes has been received; ACK has been returned */
	272	if (numbytes < msg->len) {
	273	pca_rx_byte(adap, &msg->buf[numbytes], 1);
	274	numbytes++;
2378bc09 WS	275	completed = pca_rx_ack(adap,
2378bc09 WS	276	numbytes < msg->len - 1);
1da177e4 LT	277	break;
	278	}
	279	curmsg++; numbytes = 0;
	280	if (curmsg == num)
	281	pca_stop(adap);
	282	else
2378bc09	283	completed = pca_repeated_start(adap);
1da177e4 LT	284	break;
	285
	286	case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
	287	DEB2("NOT ACK received after SLA+R\n");
	288	pca_stop(adap);
4403988a	289	ret = -ENXIO;
1da177e4 LT	290	goto out;
	291
	292	case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
	293	DEB2("NOT ACK received after data byte\n");
2196d1cf	294	pca_stop(adap);
1da177e4 LT	295	goto out;
	296
	297	case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
	298	DEB2("Arbitration lost\n");
2196d1cf EB	299	/*
	300	* The PCA9564 data sheet (2006-09-01) says "A
	301	* START condition will be transmitted when the
	302	* bus becomes free (STOP or SCL and SDA high)"
	303	* when the STA bit is set (p. 11).
	304	*
	305	* In case this won't work, try pca_reset()
	306	* instead.
	307	*/
	308	pca_start(adap);
1da177e4	309	goto out;
3d438291	310
1da177e4	311	case 0x58: /* Data byte has been received; NOT ACK has been returned */
2086ca48	312	if (numbytes == msg->len - 1) {
1da177e4 LT	313	pca_rx_byte(adap, &msg->buf[numbytes], 0);
	314	curmsg++; numbytes = 0;
	315	if (curmsg == num)
	316	pca_stop(adap);
	317	else
2378bc09	318	completed = pca_repeated_start(adap);
1da177e4 LT	319	} else {
	320	DEB2("NOT ACK sent after data byte received. "
	321	"Not final byte. numbytes %d. len %d\n",
	322	numbytes, msg->len);
	323	pca_stop(adap);
	324	goto out;
	325	}
	326	break;
	327	case 0x70: /* Bus error - SDA stuck low */
	328	DEB2("BUS ERROR - SDA Stuck low\n");
	329	pca_reset(adap);
	330	goto out;
cd217f23 CP	331	case 0x78: /* Bus error - SCL stuck low (PCA9665) */
cd217f23 CP	332	case 0x90: /* Bus error - SCL stuck low (PCA9564) */
1da177e4 LT	333	DEB2("BUS ERROR - SCL Stuck low\n");
	334	pca_reset(adap);
	335	goto out;
	336	case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
	337	DEB2("BUS ERROR - Illegal START or STOP\n");
	338	pca_reset(adap);
	339	goto out;
	340	default:
c01b0831	341	dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
1da177e4 LT	342	break;
1da177e4 LT	343	}
3d438291	344
2378bc09 WS	345	if (!completed)
2378bc09 WS	346	goto out;
1da177e4 LT	347	}
	348
	349	ret = curmsg;
	350	out:
25985edc	351	DEB1("}}} transferred %d/%d messages. "
3d438291	352	"status is %#04x. control is %#04x\n",
1da177e4 LT	353	curmsg, num, pca_status(adap),
	354	pca_get_con(adap));
	355	return ret;
	356	}
	357
	358	static u32 pca_func(struct i2c_adapter *adap)
	359	{
2086ca48	360	return I2C_FUNC_I2C \| I2C_FUNC_SMBUS_EMUL;
1da177e4 LT	361	}
1da177e4 LT	362
c01b0831 WS	363	static const struct i2c_algorithm pca_algo = {
	364	.master_xfer = pca_xfer,
	365	.functionality = pca_func,
	366	};
	367
eff9ec95	368	static unsigned int pca_probe_chip(struct i2c_adapter *adap)
1da177e4	369	{
c01b0831	370	struct i2c_algo_pca_data *pca_data = adap->algo_data;
eff9ec95 MAC	371	/* The trick here is to check if there is an indirect register
	372	* available. If there is one, we will read the value we first
	373	* wrote on I2C_PCA_IADR. Otherwise, we will read the last value
	374	* we wrote on I2C_PCA_ADR
	375	*/
	376	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	377	pca_outw(pca_data, I2C_PCA_IND, 0xAA);
	378	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
	379	pca_outw(pca_data, I2C_PCA_IND, 0x00);
	380	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	381	if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
	382	printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
a76e7c68	383	pca_data->chip = I2C_PCA_CHIP_9665;
eff9ec95 MAC	384	} else {
eff9ec95 MAC	385	printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
a76e7c68	386	pca_data->chip = I2C_PCA_CHIP_9564;
c01b0831	387	}
a76e7c68	388	return pca_data->chip;
eff9ec95 MAC	389	}
	390
	391	static int pca_init(struct i2c_adapter *adap)
	392	{
	393	struct i2c_algo_pca_data *pca_data = adap->algo_data;
c01b0831 WS	394
c01b0831 WS	395	adap->algo = &pca_algo;
1da177e4	396
eff9ec95 MAC	397	if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
	398	static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
	399	int clock;
	400
	401	if (pca_data->i2c_clock > 7) {
	402	switch (pca_data->i2c_clock) {
	403	case 330000:
	404	pca_data->i2c_clock = I2C_PCA_CON_330kHz;
	405	break;
	406	case 288000:
	407	pca_data->i2c_clock = I2C_PCA_CON_288kHz;
	408	break;
	409	case 217000:
	410	pca_data->i2c_clock = I2C_PCA_CON_217kHz;
	411	break;
	412	case 146000:
	413	pca_data->i2c_clock = I2C_PCA_CON_146kHz;
	414	break;
	415	case 88000:
	416	pca_data->i2c_clock = I2C_PCA_CON_88kHz;
	417	break;
	418	case 59000:
	419	pca_data->i2c_clock = I2C_PCA_CON_59kHz;
	420	break;
	421	case 44000:
	422	pca_data->i2c_clock = I2C_PCA_CON_44kHz;
	423	break;
	424	case 36000:
	425	pca_data->i2c_clock = I2C_PCA_CON_36kHz;
	426	break;
	427	default:
	428	printk(KERN_WARNING
	429	"%s: Invalid I2C clock speed selected."
	430	" Using default 59kHz.\n", adap->name);
	431	pca_data->i2c_clock = I2C_PCA_CON_59kHz;
	432	}
	433	} else {
	434	printk(KERN_WARNING "%s: "
	435	"Choosing the clock frequency based on "
	436	"index is deprecated."
	437	" Use the nominal frequency.\n", adap->name);
	438	}
	439
eff9ec95 MAC	440	clock = pca_clock(pca_data);
	441	printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
	442	adap->name, freqs[clock]);
	443
0a355aeb EN	444	/* Store settings as these will be needed when the PCA chip is reset */
	445	pca_data->bus_settings.clock_freq = clock;
	446
	447	pca_reset(pca_data);
eff9ec95 MAC	448	} else {
	449	int clock;
	450	int mode;
	451	int tlow, thi;
	452	/* Values can be found on PCA9665 datasheet section 7.3.2.6 */
	453	int min_tlow, min_thi;
	454	/* These values are the maximum raise and fall values allowed
	455	* by the I2C operation mode (Standard, Fast or Fast+)
	456	* They are used (added) below to calculate the clock dividers
	457	* of PCA9665. Note that they are slightly different of the
	458	* real maximum, to allow the change on mode exactly on the
	459	* maximum clock rate for each mode
	460	*/
	461	int raise_fall_time;
	462
eff9ec95 MAC	463	if (pca_data->i2c_clock > 1265800) {
	464	printk(KERN_WARNING "%s: I2C clock speed too high."
	465	" Using 1265.8kHz.\n", adap->name);
	466	pca_data->i2c_clock = 1265800;
	467	}
	468
	469	if (pca_data->i2c_clock < 60300) {
	470	printk(KERN_WARNING "%s: I2C clock speed too low."
	471	" Using 60.3kHz.\n", adap->name);
	472	pca_data->i2c_clock = 60300;
	473	}
	474
	475	/* To avoid integer overflow, use clock/100 for calculations */
	476	clock = pca_clock(pca_data) / 100;
	477
7b8c4c0b	478	if (pca_data->i2c_clock > I2C_MAX_FAST_MODE_PLUS_FREQ) {
eff9ec95 MAC	479	mode = I2C_PCA_MODE_TURBO;
	480	min_tlow = 14;
	481	min_thi = 5;
	482	raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
7b8c4c0b	483	} else if (pca_data->i2c_clock > I2C_MAX_FAST_MODE_FREQ) {
eff9ec95 MAC	484	mode = I2C_PCA_MODE_FASTP;
	485	min_tlow = 17;
	486	min_thi = 9;
	487	raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
7b8c4c0b	488	} else if (pca_data->i2c_clock > I2C_MAX_STANDARD_MODE_FREQ) {
eff9ec95 MAC	489	mode = I2C_PCA_MODE_FAST;
	490	min_tlow = 44;
	491	min_thi = 20;
	492	raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
	493	} else {
	494	mode = I2C_PCA_MODE_STD;
	495	min_tlow = 157;
	496	min_thi = 134;
	497	raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
	498	}
	499
	500	/* The minimum clock that respects the thi/tlow = 134/157 is
	501	* 64800 Hz. Below that, we have to fix the tlow to 255 and
	502	* calculate the thi factor.
	503	*/
	504	if (clock < 648) {
	505	tlow = 255;
	506	thi = 1000000 - clock * raise_fall_time;
	507	thi /= (I2C_PCA_OSC_PER * clock) - tlow;
	508	} else {
	509	tlow = (1000000 - clock * raise_fall_time) * min_tlow;
	510	tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
	511	thi = tlow * min_thi / min_tlow;
	512	}
	513
0a355aeb EN	514	/* Store settings as these will be needed when the PCA chip is reset */
	515	pca_data->bus_settings.mode = mode;
	516	pca_data->bus_settings.tlow = tlow;
	517	pca_data->bus_settings.thi = thi;
	518
eff9ec95	519	pca_reset(pca_data);
1da177e4	520
eff9ec95 MAC	521	printk(KERN_INFO
eff9ec95 MAC	522	"%s: Clock frequency is %dHz\n", adap->name, clock * 100);
eff9ec95	523	}
0e6dd6a2	524	udelay(500); /* 500 us for oscillator to stabilise */
1da177e4 LT	525
	526	return 0;
	527	}
	528
3d438291 WS	529	/*
3d438291 WS	530	* registering functions to load algorithms at runtime
1da177e4 LT	531	*/
	532	int i2c_pca_add_bus(struct i2c_adapter *adap)
	533	{
1da177e4 LT	534	int rval;
1da177e4 LT	535
c01b0831 WS	536	rval = pca_init(adap);
	537	if (rval)
	538	return rval;
1da177e4	539
c01b0831 WS	540	return i2c_add_adapter(adap);
	541	}
	542	EXPORT_SYMBOL(i2c_pca_add_bus);
1da177e4	543
c01b0831 WS	544	int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
	545	{
	546	int rval;
1da177e4	547
c01b0831 WS	548	rval = pca_init(adap);
	549	if (rval)
	550	return rval;
1da177e4	551
c01b0831	552	return i2c_add_numbered_adapter(adap);
1da177e4	553	}
c01b0831	554	EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
1da177e4	555
f80531c8 JN	556	MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>");
f80531c8 JN	557	MODULE_AUTHOR("Wolfram Sang <kernel@pengutronix.de>");
eff9ec95	558	MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
1da177e4 LT	559	MODULE_LICENSE("GPL");
	560
	561	module_param(i2c_debug, int, 0);