[linux-2.6-block.git] / drivers / i2c / algos / i2c-algo-pca.c

/*
 *  i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
 *    Copyright (C) 2004 Arcom Control Systems
 *    Copyright (C) 2008 Pengutronix
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-pca.h>

#define DEB1(fmt, args...) do { if (i2c_debug >= 1)			\
				 printk(KERN_DEBUG fmt, ## args); } while (0)
#define DEB2(fmt, args...) do { if (i2c_debug >= 2)			\
				 printk(KERN_DEBUG fmt, ## args); } while (0)
#define DEB3(fmt, args...) do { if (i2c_debug >= 3)			\
				 printk(KERN_DEBUG fmt, ## args); } while (0)

static int i2c_debug;

#define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
#define pca_inw(adap, reg) adap->read_byte(adap->data, reg)

#define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
#define pca_clock(adap) adap->i2c_clock
#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
#define pca_wait(adap) adap->wait_for_completion(adap->data)
#define pca_reset(adap) adap->reset_chip(adap->data)

static void pca9665_reset(void *pd)
{
	struct i2c_algo_pca_data *adap = pd;
	pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
	pca_outw(adap, I2C_PCA_IND, 0xA5);
	pca_outw(adap, I2C_PCA_IND, 0x5A);
}

/*
 * Generate a start condition on the i2c bus.
 *
 * returns after the start condition has occurred
 */
static void pca_start(struct i2c_algo_pca_data *adap)
{
	int sta = pca_get_con(adap);
	DEB2("=== START\n");
	sta |= I2C_PCA_CON_STA;
	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);
	pca_wait(adap);
}

/*
 * Generate a repeated start condition on the i2c bus
 *
 * return after the repeated start condition has occurred
 */
static void pca_repeated_start(struct i2c_algo_pca_data *adap)
{
	int sta = pca_get_con(adap);
	DEB2("=== REPEATED START\n");
	sta |= I2C_PCA_CON_STA;
	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);
	pca_wait(adap);
}

/*
 * Generate a stop condition on the i2c bus
 *
 * returns after the stop condition has been generated
 *
 * STOPs do not generate an interrupt or set the SI flag, since the
 * part returns the idle state (0xf8). Hence we don't need to
 * pca_wait here.
 */
static void pca_stop(struct i2c_algo_pca_data *adap)
{
	int sta = pca_get_con(adap);
	DEB2("=== STOP\n");
	sta |= I2C_PCA_CON_STO;
	sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);
}

/*
 * Send the slave address and R/W bit
 *
 * returns after the address has been sent
 */
static void pca_address(struct i2c_algo_pca_data *adap,
			struct i2c_msg *msg)
{
	int sta = pca_get_con(adap);
	int addr;

	addr = ( (0x7f & msg->addr) << 1 );
	if (msg->flags & I2C_M_RD )
		addr |= 1;
	DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
	     msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);

	pca_outw(adap, I2C_PCA_DAT, addr);

	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);

	pca_wait(adap);
}

/*
 * Transmit a byte.
 *
 * Returns after the byte has been transmitted
 */
static void pca_tx_byte(struct i2c_algo_pca_data *adap,
			__u8 b)
{
	int sta = pca_get_con(adap);
	DEB2("=== WRITE %#04x\n", b);
	pca_outw(adap, I2C_PCA_DAT, b);

	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);

	pca_wait(adap);
}

/*
 * Receive a byte
 *
 * returns immediately.
 */
static void pca_rx_byte(struct i2c_algo_pca_data *adap,
			__u8 *b, int ack)
{
	*b = pca_inw(adap, I2C_PCA_DAT);
	DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
}

/*
 * Setup ACK or NACK for next received byte and wait for it to arrive.
 *
 * Returns after next byte has arrived.
 */
static void pca_rx_ack(struct i2c_algo_pca_data *adap,
		       int ack)
{
	int sta = pca_get_con(adap);

	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);

	if ( ack )
		sta |= I2C_PCA_CON_AA;

	pca_set_con(adap, sta);
	pca_wait(adap);
}

static int pca_xfer(struct i2c_adapter *i2c_adap,
                    struct i2c_msg *msgs,
                    int num)
{
        struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
        struct i2c_msg *msg = NULL;
        int curmsg;
	int numbytes = 0;
	int state;
	int ret;
	int timeout = i2c_adap->timeout;

	while ((state = pca_status(adap)) != 0xf8 && timeout--) {
		msleep(10);
	}
	if (state != 0xf8) {
		dev_dbg(&i2c_adap->dev, "bus is not idle. status is %#04x\n", state);
		return -EAGAIN;
	}

	DEB1("{{{ XFER %d messages\n", num);

	if (i2c_debug>=2) {
		for (curmsg = 0; curmsg < num; curmsg++) {
			int addr, i;
			msg = &msgs[curmsg];

			addr = (0x7f & msg->addr) ;

			if (msg->flags & I2C_M_RD )
				printk(KERN_INFO "    [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
				       curmsg, msg->len, addr, (addr<<1) | 1);
			else {
				printk(KERN_INFO "    [%02d] WR %d bytes to %#02x [%#02x%s",
				       curmsg, msg->len, addr, addr<<1,
				       msg->len == 0 ? "" : ", ");
				for(i=0; i < msg->len; i++)
					printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
				printk("]\n");
			}
		}
	}

	curmsg = 0;
	ret = -EREMOTEIO;
	while (curmsg < num) {
		state = pca_status(adap);

		DEB3("STATE is 0x%02x\n", state);
		msg = &msgs[curmsg];

		switch (state) {
		case 0xf8: /* On reset or stop the bus is idle */
			pca_start(adap);
			break;

		case 0x08: /* A START condition has been transmitted */
		case 0x10: /* A repeated start condition has been transmitted */
			pca_address(adap, msg);
			break;

		case 0x18: /* SLA+W has been transmitted; ACK has been received */
		case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
			if (numbytes < msg->len) {
				pca_tx_byte(adap, msg->buf[numbytes]);
				numbytes++;
				break;
			}
			curmsg++; numbytes = 0;
			if (curmsg == num)
				pca_stop(adap);
			else
				pca_repeated_start(adap);
			break;

		case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
			DEB2("NOT ACK received after SLA+W\n");
			pca_stop(adap);
			goto out;

		case 0x40: /* SLA+R has been transmitted; ACK has been received */
			pca_rx_ack(adap, msg->len > 1);
			break;

		case 0x50: /* Data bytes has been received; ACK has been returned */
			if (numbytes < msg->len) {
				pca_rx_byte(adap, &msg->buf[numbytes], 1);
				numbytes++;
				pca_rx_ack(adap, numbytes < msg->len - 1);
				break;
			}
			curmsg++; numbytes = 0;
			if (curmsg == num)
				pca_stop(adap);
			else
				pca_repeated_start(adap);
			break;

		case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
			DEB2("NOT ACK received after SLA+R\n");
			pca_stop(adap);
			goto out;

		case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
			DEB2("NOT ACK received after data byte\n");
			goto out;

		case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
			DEB2("Arbitration lost\n");
			goto out;

		case 0x58: /* Data byte has been received; NOT ACK has been returned */
			if ( numbytes == msg->len - 1 ) {
				pca_rx_byte(adap, &msg->buf[numbytes], 0);
				curmsg++; numbytes = 0;
				if (curmsg == num)
					pca_stop(adap);
				else
					pca_repeated_start(adap);
			} else {
				DEB2("NOT ACK sent after data byte received. "
				     "Not final byte. numbytes %d. len %d\n",
				     numbytes, msg->len);
				pca_stop(adap);
				goto out;
			}
			break;
		case 0x70: /* Bus error - SDA stuck low */
			DEB2("BUS ERROR - SDA Stuck low\n");
			pca_reset(adap);
			goto out;
		case 0x90: /* Bus error - SCL stuck low */
			DEB2("BUS ERROR - SCL Stuck low\n");
			pca_reset(adap);
			goto out;
		case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
			DEB2("BUS ERROR - Illegal START or STOP\n");
			pca_reset(adap);
			goto out;
		default:
			dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
			break;
		}

	}

	ret = curmsg;
 out:
	DEB1("}}} transfered %d/%d messages. "
	     "status is %#04x. control is %#04x\n",
	     curmsg, num, pca_status(adap),
	     pca_get_con(adap));
	return ret;
}

static u32 pca_func(struct i2c_adapter *adap)
{
        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}

static const struct i2c_algorithm pca_algo = {
	.master_xfer	= pca_xfer,
	.functionality	= pca_func,
};

static unsigned int pca_probe_chip(struct i2c_adapter *adap)
{
	struct i2c_algo_pca_data *pca_data = adap->algo_data;
	/* The trick here is to check if there is an indirect register
	 * available. If there is one, we will read the value we first
	 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
	 * we wrote on I2C_PCA_ADR
	 */
	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	pca_outw(pca_data, I2C_PCA_IND, 0xAA);
	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
	pca_outw(pca_data, I2C_PCA_IND, 0x00);
	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
		printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
		return I2C_PCA_CHIP_9665;
	} else {
		printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
		return I2C_PCA_CHIP_9564;
	}
}

static int pca_init(struct i2c_adapter *adap)
{
	struct i2c_algo_pca_data *pca_data = adap->algo_data;

	adap->algo = &pca_algo;

	if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
		static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
		int clock;

		if (pca_data->i2c_clock > 7) {
			switch (pca_data->i2c_clock) {
			case 330000:
				pca_data->i2c_clock = I2C_PCA_CON_330kHz;
				break;
			case 288000:
				pca_data->i2c_clock = I2C_PCA_CON_288kHz;
				break;
			case 217000:
				pca_data->i2c_clock = I2C_PCA_CON_217kHz;
				break;
			case 146000:
				pca_data->i2c_clock = I2C_PCA_CON_146kHz;
				break;
			case 88000:
				pca_data->i2c_clock = I2C_PCA_CON_88kHz;
				break;
			case 59000:
				pca_data->i2c_clock = I2C_PCA_CON_59kHz;
				break;
			case 44000:
				pca_data->i2c_clock = I2C_PCA_CON_44kHz;
				break;
			case 36000:
				pca_data->i2c_clock = I2C_PCA_CON_36kHz;
				break;
			default:
				printk(KERN_WARNING
					"%s: Invalid I2C clock speed selected."
					" Using default 59kHz.\n", adap->name);
			pca_data->i2c_clock = I2C_PCA_CON_59kHz;
			}
		} else {
			printk(KERN_WARNING "%s: "
				"Choosing the clock frequency based on "
				"index is deprecated."
				" Use the nominal frequency.\n", adap->name);
		}

		pca_reset(pca_data);

		clock = pca_clock(pca_data);
		printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
		     adap->name, freqs[clock]);

		pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
	} else {
		int clock;
		int mode;
		int tlow, thi;
		/* Values can be found on PCA9665 datasheet section 7.3.2.6 */
		int min_tlow, min_thi;
		/* These values are the maximum raise and fall values allowed
		 * by the I2C operation mode (Standard, Fast or Fast+)
		 * They are used (added) below to calculate the clock dividers
		 * of PCA9665. Note that they are slightly different of the
		 * real maximum, to allow the change on mode exactly on the
		 * maximum clock rate for each mode
		 */
		int raise_fall_time;

		struct i2c_algo_pca_data *pca_data = adap->algo_data;

		/* Ignore the reset function from the module,
		 * we can use the parallel bus reset
		 */
		pca_data->reset_chip = pca9665_reset;

		if (pca_data->i2c_clock > 1265800) {
			printk(KERN_WARNING "%s: I2C clock speed too high."
				" Using 1265.8kHz.\n", adap->name);
			pca_data->i2c_clock = 1265800;
		}

		if (pca_data->i2c_clock < 60300) {
			printk(KERN_WARNING "%s: I2C clock speed too low."
				" Using 60.3kHz.\n", adap->name);
			pca_data->i2c_clock = 60300;
		}

		/* To avoid integer overflow, use clock/100 for calculations */
		clock = pca_clock(pca_data) / 100;

		if (pca_data->i2c_clock > 10000) {
			mode = I2C_PCA_MODE_TURBO;
			min_tlow = 14;
			min_thi  = 5;
			raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
		} else if (pca_data->i2c_clock > 4000) {
			mode = I2C_PCA_MODE_FASTP;
			min_tlow = 17;
			min_thi  = 9;
			raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
		} else if (pca_data->i2c_clock > 1000) {
			mode = I2C_PCA_MODE_FAST;
			min_tlow = 44;
			min_thi  = 20;
			raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
		} else {
			mode = I2C_PCA_MODE_STD;
			min_tlow = 157;
			min_thi  = 134;
			raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
		}

		/* The minimum clock that respects the thi/tlow = 134/157 is
		 * 64800 Hz. Below that, we have to fix the tlow to 255 and
		 * calculate the thi factor.
		 */
		if (clock < 648) {
			tlow = 255;
			thi = 1000000 - clock * raise_fall_time;
			thi /= (I2C_PCA_OSC_PER * clock) - tlow;
		} else {
			tlow = (1000000 - clock * raise_fall_time) * min_tlow;
			tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
			thi = tlow * min_thi / min_tlow;
		}

		pca_reset(pca_data);

		printk(KERN_INFO
		     "%s: Clock frequency is %dHz\n", adap->name, clock * 100);

		pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
		pca_outw(pca_data, I2C_PCA_IND, mode);
		pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
		pca_outw(pca_data, I2C_PCA_IND, tlow);
		pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
		pca_outw(pca_data, I2C_PCA_IND, thi);

		pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
	}
	udelay(500); /* 500 us for oscilator to stabilise */

	return 0;
}

/*
 * registering functions to load algorithms at runtime
 */
int i2c_pca_add_bus(struct i2c_adapter *adap)
{
	int rval;

	rval = pca_init(adap);
	if (rval)
		return rval;

	return i2c_add_adapter(adap);
}
EXPORT_SYMBOL(i2c_pca_add_bus);

int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
{
	int rval;

	rval = pca_init(adap);
	if (rval)
		return rval;

	return i2c_add_numbered_adapter(adap);
}
EXPORT_SYMBOL(i2c_pca_add_numbered_bus);

MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
	"Wolfram Sang <w.sang@pengutronix.de>");
MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
MODULE_LICENSE("GPL");

module_param(i2c_debug, int, 0);
Commit	Line	Data
1da177e4	1	/*
3d438291	2	* i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
1da177e4	3	* Copyright (C) 2004 Arcom Control Systems
c01b0831	4	* Copyright (C) 2008 Pengutronix
1da177e4 LT	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	19	*/
	20
	21	#include <linux/kernel.h>
	22	#include <linux/module.h>
	23	#include <linux/moduleparam.h>
	24	#include <linux/delay.h>
1da177e4 LT	25	#include <linux/init.h>
	26	#include <linux/errno.h>
	27	#include <linux/i2c.h>
	28	#include <linux/i2c-algo-pca.h>
1da177e4	29
bac3e7c2 FS	30	#define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
	31	printk(KERN_DEBUG fmt, ## args); } while (0)
	32	#define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
	33	printk(KERN_DEBUG fmt, ## args); } while (0)
	34	#define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
	35	printk(KERN_DEBUG fmt, ## args); } while (0)
1da177e4	36
60507095	37	static int i2c_debug;
1da177e4	38
c01b0831 WS	39	#define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
c01b0831 WS	40	#define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
1da177e4 LT	41
1da177e4 LT	42	#define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
c01b0831	43	#define pca_clock(adap) adap->i2c_clock
1da177e4 LT	44	#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
1da177e4 LT	45	#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
c01b0831 WS	46	#define pca_wait(adap) adap->wait_for_completion(adap->data)
c01b0831 WS	47	#define pca_reset(adap) adap->reset_chip(adap->data)
1da177e4	48
eff9ec95 MAC	49	static void pca9665_reset(void *pd)
	50	{
	51	struct i2c_algo_pca_data *adap = pd;
	52	pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
	53	pca_outw(adap, I2C_PCA_IND, 0xA5);
	54	pca_outw(adap, I2C_PCA_IND, 0x5A);
	55	}
	56
1da177e4 LT	57	/*
	58	* Generate a start condition on the i2c bus.
	59	*
44bbe87e	60	* returns after the start condition has occurred
1da177e4 LT	61	*/
	62	static void pca_start(struct i2c_algo_pca_data *adap)
	63	{
	64	int sta = pca_get_con(adap);
	65	DEB2("=== START\n");
	66	sta \|= I2C_PCA_CON_STA;
	67	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_SI);
	68	pca_set_con(adap, sta);
	69	pca_wait(adap);
	70	}
	71
	72	/*
46b615f4	73	* Generate a repeated start condition on the i2c bus
1da177e4	74	*
44bbe87e	75	* return after the repeated start condition has occurred
1da177e4 LT	76	*/
	77	static void pca_repeated_start(struct i2c_algo_pca_data *adap)
	78	{
	79	int sta = pca_get_con(adap);
	80	DEB2("=== REPEATED START\n");
	81	sta \|= I2C_PCA_CON_STA;
	82	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_SI);
	83	pca_set_con(adap, sta);
	84	pca_wait(adap);
	85	}
	86
	87	/*
	88	* Generate a stop condition on the i2c bus
	89	*
	90	* returns after the stop condition has been generated
	91	*
	92	* STOPs do not generate an interrupt or set the SI flag, since the
46b615f4	93	* part returns the idle state (0xf8). Hence we don't need to
1da177e4 LT	94	* pca_wait here.
	95	*/
	96	static void pca_stop(struct i2c_algo_pca_data *adap)
	97	{
	98	int sta = pca_get_con(adap);
	99	DEB2("=== STOP\n");
	100	sta \|= I2C_PCA_CON_STO;
	101	sta &= ~(I2C_PCA_CON_STA\|I2C_PCA_CON_SI);
	102	pca_set_con(adap, sta);
	103	}
	104
	105	/*
	106	* Send the slave address and R/W bit
	107	*
	108	* returns after the address has been sent
	109	*/
3d438291	110	static void pca_address(struct i2c_algo_pca_data *adap,
1da177e4 LT	111	struct i2c_msg *msg)
	112	{
	113	int sta = pca_get_con(adap);
	114	int addr;
	115
	116	addr = ( (0x7f & msg->addr) << 1 );
	117	if (msg->flags & I2C_M_RD )
	118	addr \|= 1;
3d438291	119	DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
1da177e4	120	msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
3d438291	121
1da177e4 LT	122	pca_outw(adap, I2C_PCA_DAT, addr);
	123
	124	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_STA\|I2C_PCA_CON_SI);
	125	pca_set_con(adap, sta);
	126
	127	pca_wait(adap);
	128	}
	129
	130	/*
	131	* Transmit a byte.
	132	*
	133	* Returns after the byte has been transmitted
	134	*/
3d438291	135	static void pca_tx_byte(struct i2c_algo_pca_data *adap,
1da177e4 LT	136	__u8 b)
	137	{
	138	int sta = pca_get_con(adap);
	139	DEB2("=== WRITE %#04x\n", b);
	140	pca_outw(adap, I2C_PCA_DAT, b);
	141
	142	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_STA\|I2C_PCA_CON_SI);
	143	pca_set_con(adap, sta);
	144
	145	pca_wait(adap);
	146	}
	147
	148	/*
	149	* Receive a byte
	150	*
	151	* returns immediately.
	152	*/
3d438291	153	static void pca_rx_byte(struct i2c_algo_pca_data *adap,
1da177e4 LT	154	__u8 *b, int ack)
	155	{
	156	*b = pca_inw(adap, I2C_PCA_DAT);
	157	DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
	158	}
	159
3d438291	160	/*
1da177e4 LT	161	* Setup ACK or NACK for next received byte and wait for it to arrive.
	162	*
	163	* Returns after next byte has arrived.
	164	*/
3d438291	165	static void pca_rx_ack(struct i2c_algo_pca_data *adap,
1da177e4 LT	166	int ack)
	167	{
	168	int sta = pca_get_con(adap);
	169
	170	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_STA\|I2C_PCA_CON_SI\|I2C_PCA_CON_AA);
	171
	172	if ( ack )
	173	sta \|= I2C_PCA_CON_AA;
	174
	175	pca_set_con(adap, sta);
	176	pca_wait(adap);
	177	}
	178
1da177e4 LT	179	static int pca_xfer(struct i2c_adapter *i2c_adap,
	180	struct i2c_msg *msgs,
	181	int num)
	182	{
	183	struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
	184	struct i2c_msg *msg = NULL;
	185	int curmsg;
	186	int numbytes = 0;
	187	int state;
	188	int ret;
c01b0831	189	int timeout = i2c_adap->timeout;
1da177e4	190
48edcb65 IC	191	while ((state = pca_status(adap)) != 0xf8 && timeout--) {
	192	msleep(10);
	193	}
	194	if (state != 0xf8) {
	195	dev_dbg(&i2c_adap->dev, "bus is not idle. status is %#04x\n", state);
c80ebe79	196	return -EAGAIN;
1da177e4 LT	197	}
	198
	199	DEB1("{{{ XFER %d messages\n", num);
	200
	201	if (i2c_debug>=2) {
	202	for (curmsg = 0; curmsg < num; curmsg++) {
	203	int addr, i;
	204	msg = &msgs[curmsg];
3d438291	205
1da177e4	206	addr = (0x7f & msg->addr) ;
3d438291	207
1da177e4	208	if (msg->flags & I2C_M_RD )
3d438291	209	printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
1da177e4 LT	210	curmsg, msg->len, addr, (addr<<1) \| 1);
1da177e4 LT	211	else {
3d438291	212	printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
1da177e4 LT	213	curmsg, msg->len, addr, addr<<1,
	214	msg->len == 0 ? "" : ", ");
	215	for(i=0; i < msg->len; i++)
	216	printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
	217	printk("]\n");
	218	}
	219	}
	220	}
	221
	222	curmsg = 0;
	223	ret = -EREMOTEIO;
	224	while (curmsg < num) {
	225	state = pca_status(adap);
	226
	227	DEB3("STATE is 0x%02x\n", state);
	228	msg = &msgs[curmsg];
	229
	230	switch (state) {
	231	case 0xf8: /* On reset or stop the bus is idle */
	232	pca_start(adap);
	233	break;
	234
	235	case 0x08: /* A START condition has been transmitted */
	236	case 0x10: /* A repeated start condition has been transmitted */
	237	pca_address(adap, msg);
	238	break;
3d438291	239
1da177e4 LT	240	case 0x18: /* SLA+W has been transmitted; ACK has been received */
	241	case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
	242	if (numbytes < msg->len) {
	243	pca_tx_byte(adap, msg->buf[numbytes]);
	244	numbytes++;
	245	break;
	246	}
	247	curmsg++; numbytes = 0;
	248	if (curmsg == num)
	249	pca_stop(adap);
	250	else
	251	pca_repeated_start(adap);
	252	break;
	253
	254	case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
	255	DEB2("NOT ACK received after SLA+W\n");
	256	pca_stop(adap);
	257	goto out;
	258
	259	case 0x40: /* SLA+R has been transmitted; ACK has been received */
	260	pca_rx_ack(adap, msg->len > 1);
	261	break;
	262
	263	case 0x50: /* Data bytes has been received; ACK has been returned */
	264	if (numbytes < msg->len) {
	265	pca_rx_byte(adap, &msg->buf[numbytes], 1);
	266	numbytes++;
	267	pca_rx_ack(adap, numbytes < msg->len - 1);
	268	break;
	269	}
	270	curmsg++; numbytes = 0;
	271	if (curmsg == num)
	272	pca_stop(adap);
	273	else
	274	pca_repeated_start(adap);
	275	break;
	276
	277	case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
	278	DEB2("NOT ACK received after SLA+R\n");
	279	pca_stop(adap);
	280	goto out;
	281
	282	case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
	283	DEB2("NOT ACK received after data byte\n");
	284	goto out;
	285
	286	case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
	287	DEB2("Arbitration lost\n");
	288	goto out;
3d438291	289
1da177e4 LT	290	case 0x58: /* Data byte has been received; NOT ACK has been returned */
	291	if ( numbytes == msg->len - 1 ) {
	292	pca_rx_byte(adap, &msg->buf[numbytes], 0);
	293	curmsg++; numbytes = 0;
	294	if (curmsg == num)
	295	pca_stop(adap);
	296	else
	297	pca_repeated_start(adap);
	298	} else {
	299	DEB2("NOT ACK sent after data byte received. "
	300	"Not final byte. numbytes %d. len %d\n",
	301	numbytes, msg->len);
	302	pca_stop(adap);
	303	goto out;
	304	}
	305	break;
	306	case 0x70: /* Bus error - SDA stuck low */
	307	DEB2("BUS ERROR - SDA Stuck low\n");
	308	pca_reset(adap);
	309	goto out;
	310	case 0x90: /* Bus error - SCL stuck low */
	311	DEB2("BUS ERROR - SCL Stuck low\n");
	312	pca_reset(adap);
	313	goto out;
	314	case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
	315	DEB2("BUS ERROR - Illegal START or STOP\n");
	316	pca_reset(adap);
	317	goto out;
	318	default:
c01b0831	319	dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
1da177e4 LT	320	break;
1da177e4 LT	321	}
3d438291	322
1da177e4 LT	323	}
	324
	325	ret = curmsg;
	326	out:
bac3e7c2	327	DEB1("}}} transfered %d/%d messages. "
3d438291	328	"status is %#04x. control is %#04x\n",
1da177e4 LT	329	curmsg, num, pca_status(adap),
	330	pca_get_con(adap));
	331	return ret;
	332	}
	333
	334	static u32 pca_func(struct i2c_adapter *adap)
	335	{
	336	return I2C_FUNC_I2C \| I2C_FUNC_SMBUS_EMUL;
	337	}
	338
c01b0831 WS	339	static const struct i2c_algorithm pca_algo = {
	340	.master_xfer = pca_xfer,
	341	.functionality = pca_func,
	342	};
	343
eff9ec95	344	static unsigned int pca_probe_chip(struct i2c_adapter *adap)
1da177e4	345	{
c01b0831	346	struct i2c_algo_pca_data *pca_data = adap->algo_data;
eff9ec95 MAC	347	/* The trick here is to check if there is an indirect register
	348	* available. If there is one, we will read the value we first
	349	* wrote on I2C_PCA_IADR. Otherwise, we will read the last value
	350	* we wrote on I2C_PCA_ADR
	351	*/
	352	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	353	pca_outw(pca_data, I2C_PCA_IND, 0xAA);
	354	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
	355	pca_outw(pca_data, I2C_PCA_IND, 0x00);
	356	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	357	if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
	358	printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
	359	return I2C_PCA_CHIP_9665;
	360	} else {
	361	printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
	362	return I2C_PCA_CHIP_9564;
c01b0831	363	}
eff9ec95 MAC	364	}
	365
	366	static int pca_init(struct i2c_adapter *adap)
	367	{
	368	struct i2c_algo_pca_data *pca_data = adap->algo_data;
c01b0831 WS	369
c01b0831 WS	370	adap->algo = &pca_algo;
1da177e4	371
eff9ec95 MAC	372	if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
	373	static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
	374	int clock;
	375
	376	if (pca_data->i2c_clock > 7) {
	377	switch (pca_data->i2c_clock) {
	378	case 330000:
	379	pca_data->i2c_clock = I2C_PCA_CON_330kHz;
	380	break;
	381	case 288000:
	382	pca_data->i2c_clock = I2C_PCA_CON_288kHz;
	383	break;
	384	case 217000:
	385	pca_data->i2c_clock = I2C_PCA_CON_217kHz;
	386	break;
	387	case 146000:
	388	pca_data->i2c_clock = I2C_PCA_CON_146kHz;
	389	break;
	390	case 88000:
	391	pca_data->i2c_clock = I2C_PCA_CON_88kHz;
	392	break;
	393	case 59000:
	394	pca_data->i2c_clock = I2C_PCA_CON_59kHz;
	395	break;
	396	case 44000:
	397	pca_data->i2c_clock = I2C_PCA_CON_44kHz;
	398	break;
	399	case 36000:
	400	pca_data->i2c_clock = I2C_PCA_CON_36kHz;
	401	break;
	402	default:
	403	printk(KERN_WARNING
	404	"%s: Invalid I2C clock speed selected."
	405	" Using default 59kHz.\n", adap->name);
	406	pca_data->i2c_clock = I2C_PCA_CON_59kHz;
	407	}
	408	} else {
	409	printk(KERN_WARNING "%s: "
	410	"Choosing the clock frequency based on "
	411	"index is deprecated."
	412	" Use the nominal frequency.\n", adap->name);
	413	}
	414
	415	pca_reset(pca_data);
	416
	417	clock = pca_clock(pca_data);
	418	printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
	419	adap->name, freqs[clock]);
	420
	421	pca_set_con(pca_data, I2C_PCA_CON_ENSIO \| clock);
	422	} else {
	423	int clock;
	424	int mode;
	425	int tlow, thi;
	426	/* Values can be found on PCA9665 datasheet section 7.3.2.6 */
	427	int min_tlow, min_thi;
	428	/* These values are the maximum raise and fall values allowed
	429	* by the I2C operation mode (Standard, Fast or Fast+)
	430	* They are used (added) below to calculate the clock dividers
	431	* of PCA9665. Note that they are slightly different of the
	432	* real maximum, to allow the change on mode exactly on the
	433	* maximum clock rate for each mode
	434	*/
	435	int raise_fall_time;
436
437	struct i2c_algo_pca_data *pca_data = adap->algo_data;
438
439	/* Ignore the reset function from the module,
440	* we can use the parallel bus reset
441	*/
442	pca_data->reset_chip = pca9665_reset;
443
444	if (pca_data->i2c_clock > 1265800) {
445	printk(KERN_WARNING "%s: I2C clock speed too high."
446	" Using 1265.8kHz.\n", adap->name);
447	pca_data->i2c_clock = 1265800;
448	}
449
450	if (pca_data->i2c_clock < 60300) {
451	printk(KERN_WARNING "%s: I2C clock speed too low."
452	" Using 60.3kHz.\n", adap->name);
453	pca_data->i2c_clock = 60300;
454	}
455
456	/* To avoid integer overflow, use clock/100 for calculations */
457	clock = pca_clock(pca_data) / 100;
458
459	if (pca_data->i2c_clock > 10000) {
460	mode = I2C_PCA_MODE_TURBO;
461	min_tlow = 14;
462	min_thi = 5;
463	raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
464	} else if (pca_data->i2c_clock > 4000) {
465	mode = I2C_PCA_MODE_FASTP;
466	min_tlow = 17;
467	min_thi = 9;
468	raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
469	} else if (pca_data->i2c_clock > 1000) {
470	mode = I2C_PCA_MODE_FAST;
471	min_tlow = 44;
472	min_thi = 20;
473	raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
474	} else {
475	mode = I2C_PCA_MODE_STD;
476	min_tlow = 157;
477	min_thi = 134;
478	raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
479	}
480
481	/* The minimum clock that respects the thi/tlow = 134/157 is
482	* 64800 Hz. Below that, we have to fix the tlow to 255 and
483	* calculate the thi factor.
484	*/
485	if (clock < 648) {
486	tlow = 255;
487	thi = 1000000 - clock * raise_fall_time;
488	thi /= (I2C_PCA_OSC_PER * clock) - tlow;
489	} else {
490	tlow = (1000000 - clock * raise_fall_time) * min_tlow;
491	tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
492	thi = tlow * min_thi / min_tlow;
493	}
494
495	pca_reset(pca_data);
1da177e4	496
eff9ec95 MAC	497	printk(KERN_INFO
eff9ec95 MAC	498	"%s: Clock frequency is %dHz\n", adap->name, clock * 100);
1da177e4	499
eff9ec95 MAC	500	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
	501	pca_outw(pca_data, I2C_PCA_IND, mode);
	502	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
	503	pca_outw(pca_data, I2C_PCA_IND, tlow);
	504	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
	505	pca_outw(pca_data, I2C_PCA_IND, thi);
	506
	507	pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
	508	}
3d438291	509	udelay(500); /* 500 us for oscilator to stabilise */
1da177e4 LT	510
	511	return 0;
	512	}
	513
3d438291 WS	514	/*
3d438291 WS	515	* registering functions to load algorithms at runtime
1da177e4 LT	516	*/
	517	int i2c_pca_add_bus(struct i2c_adapter *adap)
	518	{
1da177e4 LT	519	int rval;
1da177e4 LT	520
c01b0831 WS	521	rval = pca_init(adap);
	522	if (rval)
	523	return rval;
1da177e4	524
c01b0831 WS	525	return i2c_add_adapter(adap);
	526	}
	527	EXPORT_SYMBOL(i2c_pca_add_bus);
1da177e4	528
c01b0831 WS	529	int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
	530	{
	531	int rval;
1da177e4	532
c01b0831 WS	533	rval = pca_init(adap);
	534	if (rval)
	535	return rval;
1da177e4	536
c01b0831	537	return i2c_add_numbered_adapter(adap);
1da177e4	538	}
c01b0831	539	EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
1da177e4	540
c01b0831 WS	541	MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
c01b0831 WS	542	"Wolfram Sang <w.sang@pengutronix.de>");
eff9ec95	543	MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
1da177e4 LT	544	MODULE_LICENSE("GPL");
	545
	546	module_param(i2c_debug, int, 0);