Commit | Line | Data |
---|---|---|
cf978ab2 DB |
1 | /* ------------------------------------------------------------------------- |
2 | * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters | |
3 | * ------------------------------------------------------------------------- | |
4 | * Copyright (C) 1995-2000 Simon G. Vogl | |
1da177e4 LT |
5 | |
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
cf978ab2 | 15 | * ------------------------------------------------------------------------- */ |
1da177e4 | 16 | |
96de0e25 | 17 | /* With some changes from Frodo Looijaard <frodol@dds.nl>, Kyösti Mälkki |
7c81c60f | 18 | <kmalkki@cc.hut.fi> and Jean Delvare <jdelvare@suse.de> */ |
1da177e4 LT |
19 | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/delay.h> | |
1da177e4 LT |
23 | #include <linux/errno.h> |
24 | #include <linux/sched.h> | |
25 | #include <linux/i2c.h> | |
26 | #include <linux/i2c-algo-bit.h> | |
27 | ||
28 | ||
29 | /* ----- global defines ----------------------------------------------- */ | |
1da177e4 | 30 | |
494dbb64 JD |
31 | #ifdef DEBUG |
32 | #define bit_dbg(level, dev, format, args...) \ | |
33 | do { \ | |
34 | if (i2c_debug >= level) \ | |
35 | dev_dbg(dev, format, ##args); \ | |
36 | } while (0) | |
37 | #else | |
38 | #define bit_dbg(level, dev, format, args...) \ | |
39 | do {} while (0) | |
40 | #endif /* DEBUG */ | |
1da177e4 LT |
41 | |
42 | /* ----- global variables --------------------------------------------- */ | |
43 | ||
1da177e4 | 44 | static int bit_test; /* see if the line-setting functions work */ |
1bddab7f JD |
45 | module_param(bit_test, int, S_IRUGO); |
46 | MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck"); | |
494dbb64 JD |
47 | |
48 | #ifdef DEBUG | |
49 | static int i2c_debug = 1; | |
50 | module_param(i2c_debug, int, S_IRUGO | S_IWUSR); | |
51 | MODULE_PARM_DESC(i2c_debug, | |
52 | "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose"); | |
53 | #endif | |
1da177e4 LT |
54 | |
55 | /* --- setting states on the bus with the right timing: --------------- */ | |
56 | ||
cf978ab2 DB |
57 | #define setsda(adap, val) adap->setsda(adap->data, val) |
58 | #define setscl(adap, val) adap->setscl(adap->data, val) | |
59 | #define getsda(adap) adap->getsda(adap->data) | |
60 | #define getscl(adap) adap->getscl(adap->data) | |
1da177e4 LT |
61 | |
62 | static inline void sdalo(struct i2c_algo_bit_data *adap) | |
63 | { | |
cf978ab2 | 64 | setsda(adap, 0); |
424ed67c | 65 | udelay((adap->udelay + 1) / 2); |
1da177e4 LT |
66 | } |
67 | ||
68 | static inline void sdahi(struct i2c_algo_bit_data *adap) | |
69 | { | |
cf978ab2 | 70 | setsda(adap, 1); |
424ed67c | 71 | udelay((adap->udelay + 1) / 2); |
1da177e4 LT |
72 | } |
73 | ||
74 | static inline void scllo(struct i2c_algo_bit_data *adap) | |
75 | { | |
cf978ab2 | 76 | setscl(adap, 0); |
424ed67c | 77 | udelay(adap->udelay / 2); |
1da177e4 LT |
78 | } |
79 | ||
80 | /* | |
81 | * Raise scl line, and do checking for delays. This is necessary for slower | |
82 | * devices. | |
83 | */ | |
7b288a01 | 84 | static int sclhi(struct i2c_algo_bit_data *adap) |
1da177e4 LT |
85 | { |
86 | unsigned long start; | |
87 | ||
cf978ab2 | 88 | setscl(adap, 1); |
1da177e4 LT |
89 | |
90 | /* Not all adapters have scl sense line... */ | |
7b288a01 JD |
91 | if (!adap->getscl) |
92 | goto done; | |
1da177e4 | 93 | |
cf978ab2 DB |
94 | start = jiffies; |
95 | while (!getscl(adap)) { | |
96 | /* This hw knows how to read the clock line, so we wait | |
97 | * until it actually gets high. This is safer as some | |
98 | * chips may hold it low ("clock stretching") while they | |
99 | * are processing data internally. | |
100 | */ | |
8ee161ce VS |
101 | if (time_after(jiffies, start + adap->timeout)) { |
102 | /* Test one last time, as we may have been preempted | |
103 | * between last check and timeout test. | |
104 | */ | |
105 | if (getscl(adap)) | |
106 | break; | |
1da177e4 | 107 | return -ETIMEDOUT; |
8ee161ce | 108 | } |
41101a33 | 109 | cpu_relax(); |
1da177e4 | 110 | } |
494dbb64 JD |
111 | #ifdef DEBUG |
112 | if (jiffies != start && i2c_debug >= 3) | |
113 | pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go " | |
114 | "high\n", jiffies - start); | |
115 | #endif | |
7b288a01 JD |
116 | |
117 | done: | |
1da177e4 LT |
118 | udelay(adap->udelay); |
119 | return 0; | |
cf978ab2 | 120 | } |
1da177e4 LT |
121 | |
122 | ||
123 | /* --- other auxiliary functions -------------------------------------- */ | |
cf978ab2 | 124 | static void i2c_start(struct i2c_algo_bit_data *adap) |
1da177e4 LT |
125 | { |
126 | /* assert: scl, sda are high */ | |
424ed67c JD |
127 | setsda(adap, 0); |
128 | udelay(adap->udelay); | |
1da177e4 LT |
129 | scllo(adap); |
130 | } | |
131 | ||
cf978ab2 | 132 | static void i2c_repstart(struct i2c_algo_bit_data *adap) |
1da177e4 | 133 | { |
424ed67c | 134 | /* assert: scl is low */ |
424ed67c | 135 | sdahi(adap); |
1da177e4 | 136 | sclhi(adap); |
424ed67c JD |
137 | setsda(adap, 0); |
138 | udelay(adap->udelay); | |
1da177e4 LT |
139 | scllo(adap); |
140 | } | |
141 | ||
142 | ||
cf978ab2 | 143 | static void i2c_stop(struct i2c_algo_bit_data *adap) |
1da177e4 | 144 | { |
1da177e4 LT |
145 | /* assert: scl is low */ |
146 | sdalo(adap); | |
cf978ab2 | 147 | sclhi(adap); |
424ed67c JD |
148 | setsda(adap, 1); |
149 | udelay(adap->udelay); | |
1da177e4 LT |
150 | } |
151 | ||
152 | ||
153 | ||
cf978ab2 | 154 | /* send a byte without start cond., look for arbitration, |
1da177e4 LT |
155 | check ackn. from slave */ |
156 | /* returns: | |
157 | * 1 if the device acknowledged | |
158 | * 0 if the device did not ack | |
159 | * -ETIMEDOUT if an error occurred (while raising the scl line) | |
160 | */ | |
494dbb64 | 161 | static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c) |
1da177e4 LT |
162 | { |
163 | int i; | |
164 | int sb; | |
165 | int ack; | |
166 | struct i2c_algo_bit_data *adap = i2c_adap->algo_data; | |
167 | ||
168 | /* assert: scl is low */ | |
cf978ab2 | 169 | for (i = 7; i >= 0; i--) { |
494dbb64 | 170 | sb = (c >> i) & 1; |
cf978ab2 | 171 | setsda(adap, sb); |
424ed67c | 172 | udelay((adap->udelay + 1) / 2); |
cf978ab2 | 173 | if (sclhi(adap) < 0) { /* timed out */ |
494dbb64 JD |
174 | bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, " |
175 | "timeout at bit #%d\n", (int)c, i); | |
1da177e4 | 176 | return -ETIMEDOUT; |
cf978ab2 DB |
177 | } |
178 | /* FIXME do arbitration here: | |
179 | * if (sb && !getsda(adap)) -> ouch! Get out of here. | |
180 | * | |
181 | * Report a unique code, so higher level code can retry | |
182 | * the whole (combined) message and *NOT* issue STOP. | |
1da177e4 | 183 | */ |
424ed67c | 184 | scllo(adap); |
1da177e4 LT |
185 | } |
186 | sdahi(adap); | |
cf978ab2 | 187 | if (sclhi(adap) < 0) { /* timeout */ |
494dbb64 JD |
188 | bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, " |
189 | "timeout at ack\n", (int)c); | |
190 | return -ETIMEDOUT; | |
cf978ab2 DB |
191 | } |
192 | ||
193 | /* read ack: SDA should be pulled down by slave, or it may | |
194 | * NAK (usually to report problems with the data we wrote). | |
195 | */ | |
494dbb64 JD |
196 | ack = !getsda(adap); /* ack: sda is pulled low -> success */ |
197 | bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c, | |
198 | ack ? "A" : "NA"); | |
1da177e4 | 199 | |
1da177e4 | 200 | scllo(adap); |
494dbb64 | 201 | return ack; |
1da177e4 LT |
202 | /* assert: scl is low (sda undef) */ |
203 | } | |
204 | ||
205 | ||
cf978ab2 | 206 | static int i2c_inb(struct i2c_adapter *i2c_adap) |
1da177e4 LT |
207 | { |
208 | /* read byte via i2c port, without start/stop sequence */ | |
209 | /* acknowledge is sent in i2c_read. */ | |
210 | int i; | |
cf978ab2 | 211 | unsigned char indata = 0; |
1da177e4 LT |
212 | struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
213 | ||
214 | /* assert: scl is low */ | |
215 | sdahi(adap); | |
cf978ab2 DB |
216 | for (i = 0; i < 8; i++) { |
217 | if (sclhi(adap) < 0) { /* timeout */ | |
494dbb64 JD |
218 | bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit " |
219 | "#%d\n", 7 - i); | |
1da177e4 | 220 | return -ETIMEDOUT; |
cf978ab2 | 221 | } |
1da177e4 | 222 | indata *= 2; |
cf978ab2 | 223 | if (getsda(adap)) |
1da177e4 | 224 | indata |= 0x01; |
424ed67c JD |
225 | setscl(adap, 0); |
226 | udelay(i == 7 ? adap->udelay / 2 : adap->udelay); | |
1da177e4 LT |
227 | } |
228 | /* assert: scl is low */ | |
494dbb64 | 229 | return indata; |
1da177e4 LT |
230 | } |
231 | ||
232 | /* | |
233 | * Sanity check for the adapter hardware - check the reaction of | |
234 | * the bus lines only if it seems to be idle. | |
235 | */ | |
d3b3e15d | 236 | static int test_bus(struct i2c_adapter *i2c_adap) |
cf978ab2 | 237 | { |
d3b3e15d AD |
238 | struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
239 | const char *name = i2c_adap->name; | |
240 | int scl, sda, ret; | |
241 | ||
242 | if (adap->pre_xfer) { | |
243 | ret = adap->pre_xfer(i2c_adap); | |
244 | if (ret < 0) | |
245 | return -ENODEV; | |
246 | } | |
1da177e4 | 247 | |
cf978ab2 | 248 | if (adap->getscl == NULL) |
494dbb64 | 249 | pr_info("%s: Testing SDA only, SCL is not readable\n", name); |
1da177e4 | 250 | |
cf978ab2 DB |
251 | sda = getsda(adap); |
252 | scl = (adap->getscl == NULL) ? 1 : getscl(adap); | |
253 | if (!scl || !sda) { | |
f6beb67d JD |
254 | printk(KERN_WARNING |
255 | "%s: bus seems to be busy (scl=%d, sda=%d)\n", | |
256 | name, scl, sda); | |
1da177e4 LT |
257 | goto bailout; |
258 | } | |
259 | ||
260 | sdalo(adap); | |
cf978ab2 DB |
261 | sda = getsda(adap); |
262 | scl = (adap->getscl == NULL) ? 1 : getscl(adap); | |
263 | if (sda) { | |
494dbb64 | 264 | printk(KERN_WARNING "%s: SDA stuck high!\n", name); |
1da177e4 LT |
265 | goto bailout; |
266 | } | |
cf978ab2 | 267 | if (!scl) { |
494dbb64 JD |
268 | printk(KERN_WARNING "%s: SCL unexpected low " |
269 | "while pulling SDA low!\n", name); | |
1da177e4 | 270 | goto bailout; |
cf978ab2 | 271 | } |
1da177e4 LT |
272 | |
273 | sdahi(adap); | |
cf978ab2 DB |
274 | sda = getsda(adap); |
275 | scl = (adap->getscl == NULL) ? 1 : getscl(adap); | |
276 | if (!sda) { | |
494dbb64 | 277 | printk(KERN_WARNING "%s: SDA stuck low!\n", name); |
1da177e4 LT |
278 | goto bailout; |
279 | } | |
cf978ab2 | 280 | if (!scl) { |
494dbb64 JD |
281 | printk(KERN_WARNING "%s: SCL unexpected low " |
282 | "while pulling SDA high!\n", name); | |
1da177e4 LT |
283 | goto bailout; |
284 | } | |
285 | ||
286 | scllo(adap); | |
cf978ab2 DB |
287 | sda = getsda(adap); |
288 | scl = (adap->getscl == NULL) ? 0 : getscl(adap); | |
289 | if (scl) { | |
494dbb64 | 290 | printk(KERN_WARNING "%s: SCL stuck high!\n", name); |
1da177e4 LT |
291 | goto bailout; |
292 | } | |
cf978ab2 | 293 | if (!sda) { |
494dbb64 JD |
294 | printk(KERN_WARNING "%s: SDA unexpected low " |
295 | "while pulling SCL low!\n", name); | |
1da177e4 LT |
296 | goto bailout; |
297 | } | |
cf978ab2 | 298 | |
1da177e4 | 299 | sclhi(adap); |
cf978ab2 DB |
300 | sda = getsda(adap); |
301 | scl = (adap->getscl == NULL) ? 1 : getscl(adap); | |
302 | if (!scl) { | |
494dbb64 | 303 | printk(KERN_WARNING "%s: SCL stuck low!\n", name); |
1da177e4 LT |
304 | goto bailout; |
305 | } | |
cf978ab2 | 306 | if (!sda) { |
494dbb64 JD |
307 | printk(KERN_WARNING "%s: SDA unexpected low " |
308 | "while pulling SCL high!\n", name); | |
1da177e4 LT |
309 | goto bailout; |
310 | } | |
d3b3e15d AD |
311 | |
312 | if (adap->post_xfer) | |
313 | adap->post_xfer(i2c_adap); | |
314 | ||
494dbb64 | 315 | pr_info("%s: Test OK\n", name); |
1da177e4 LT |
316 | return 0; |
317 | bailout: | |
318 | sdahi(adap); | |
319 | sclhi(adap); | |
d3b3e15d AD |
320 | |
321 | if (adap->post_xfer) | |
322 | adap->post_xfer(i2c_adap); | |
323 | ||
1da177e4 LT |
324 | return -ENODEV; |
325 | } | |
326 | ||
327 | /* ----- Utility functions | |
328 | */ | |
329 | ||
330 | /* try_address tries to contact a chip for a number of | |
331 | * times before it gives up. | |
332 | * return values: | |
333 | * 1 chip answered | |
334 | * 0 chip did not answer | |
335 | * -x transmission error | |
336 | */ | |
7b288a01 | 337 | static int try_address(struct i2c_adapter *i2c_adap, |
1da177e4 LT |
338 | unsigned char addr, int retries) |
339 | { | |
340 | struct i2c_algo_bit_data *adap = i2c_adap->algo_data; | |
97140342 | 341 | int i, ret = 0; |
cf978ab2 DB |
342 | |
343 | for (i = 0; i <= retries; i++) { | |
344 | ret = i2c_outb(i2c_adap, addr); | |
1ecac07a JD |
345 | if (ret == 1 || i == retries) |
346 | break; | |
494dbb64 | 347 | bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); |
1da177e4 | 348 | i2c_stop(adap); |
1da177e4 | 349 | udelay(adap->udelay); |
424ed67c | 350 | yield(); |
494dbb64 | 351 | bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); |
424ed67c | 352 | i2c_start(adap); |
1da177e4 | 353 | } |
494dbb64 JD |
354 | if (i && ret) |
355 | bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at " | |
356 | "0x%02x: %s\n", i + 1, | |
357 | addr & 1 ? "read from" : "write to", addr >> 1, | |
358 | ret == 1 ? "success" : "failed, timeout?"); | |
1da177e4 LT |
359 | return ret; |
360 | } | |
361 | ||
362 | static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) | |
363 | { | |
494dbb64 | 364 | const unsigned char *temp = msg->buf; |
1da177e4 | 365 | int count = msg->len; |
cf978ab2 | 366 | unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; |
1da177e4 | 367 | int retval; |
cf978ab2 | 368 | int wrcount = 0; |
1da177e4 LT |
369 | |
370 | while (count > 0) { | |
494dbb64 | 371 | retval = i2c_outb(i2c_adap, *temp); |
cf978ab2 DB |
372 | |
373 | /* OK/ACK; or ignored NAK */ | |
374 | if ((retval > 0) || (nak_ok && (retval == 0))) { | |
375 | count--; | |
1da177e4 LT |
376 | temp++; |
377 | wrcount++; | |
bf3e2d1d DB |
378 | |
379 | /* A slave NAKing the master means the slave didn't like | |
380 | * something about the data it saw. For example, maybe | |
381 | * the SMBus PEC was wrong. | |
382 | */ | |
383 | } else if (retval == 0) { | |
384 | dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n"); | |
385 | return -EIO; | |
386 | ||
387 | /* Timeout; or (someday) lost arbitration | |
388 | * | |
389 | * FIXME Lost ARB implies retrying the transaction from | |
390 | * the first message, after the "winning" master issues | |
391 | * its STOP. As a rule, upper layer code has no reason | |
392 | * to know or care about this ... it is *NOT* an error. | |
393 | */ | |
394 | } else { | |
395 | dev_err(&i2c_adap->dev, "sendbytes: error %d\n", | |
396 | retval); | |
397 | return retval; | |
1da177e4 | 398 | } |
1da177e4 LT |
399 | } |
400 | return wrcount; | |
401 | } | |
402 | ||
939bc494 DB |
403 | static int acknak(struct i2c_adapter *i2c_adap, int is_ack) |
404 | { | |
405 | struct i2c_algo_bit_data *adap = i2c_adap->algo_data; | |
406 | ||
407 | /* assert: sda is high */ | |
408 | if (is_ack) /* send ack */ | |
409 | setsda(adap, 0); | |
410 | udelay((adap->udelay + 1) / 2); | |
411 | if (sclhi(adap) < 0) { /* timeout */ | |
412 | dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n"); | |
413 | return -ETIMEDOUT; | |
414 | } | |
415 | scllo(adap); | |
416 | return 0; | |
417 | } | |
418 | ||
7b288a01 | 419 | static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) |
1da177e4 LT |
420 | { |
421 | int inval; | |
cf978ab2 | 422 | int rdcount = 0; /* counts bytes read */ |
494dbb64 | 423 | unsigned char *temp = msg->buf; |
1da177e4 | 424 | int count = msg->len; |
939bc494 | 425 | const unsigned flags = msg->flags; |
1da177e4 LT |
426 | |
427 | while (count > 0) { | |
428 | inval = i2c_inb(i2c_adap); | |
cf978ab2 | 429 | if (inval >= 0) { |
1da177e4 LT |
430 | *temp = inval; |
431 | rdcount++; | |
432 | } else { /* read timed out */ | |
1da177e4 LT |
433 | break; |
434 | } | |
435 | ||
436 | temp++; | |
437 | count--; | |
438 | ||
3c4bb241 JD |
439 | /* Some SMBus transactions require that we receive the |
440 | transaction length as the first read byte. */ | |
939bc494 | 441 | if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) { |
3c4bb241 | 442 | if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) { |
939bc494 DB |
443 | if (!(flags & I2C_M_NO_RD_ACK)) |
444 | acknak(i2c_adap, 0); | |
494dbb64 JD |
445 | dev_err(&i2c_adap->dev, "readbytes: invalid " |
446 | "block length (%d)\n", inval); | |
abc01b27 | 447 | return -EPROTO; |
3c4bb241 JD |
448 | } |
449 | /* The original count value accounts for the extra | |
450 | bytes, that is, either 1 for a regular transaction, | |
451 | or 2 for a PEC transaction. */ | |
452 | count += inval; | |
453 | msg->len += inval; | |
454 | } | |
939bc494 DB |
455 | |
456 | bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n", | |
457 | inval, | |
458 | (flags & I2C_M_NO_RD_ACK) | |
459 | ? "(no ack/nak)" | |
460 | : (count ? "A" : "NA")); | |
461 | ||
462 | if (!(flags & I2C_M_NO_RD_ACK)) { | |
463 | inval = acknak(i2c_adap, count); | |
464 | if (inval < 0) | |
465 | return inval; | |
466 | } | |
1da177e4 LT |
467 | } |
468 | return rdcount; | |
469 | } | |
470 | ||
471 | /* doAddress initiates the transfer by generating the start condition (in | |
472 | * try_address) and transmits the address in the necessary format to handle | |
473 | * reads, writes as well as 10bit-addresses. | |
474 | * returns: | |
475 | * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set | |
abc01b27 | 476 | * -x an error occurred (like: -ENXIO if the device did not answer, or |
cf978ab2 | 477 | * -ETIMEDOUT, for example if the lines are stuck...) |
1da177e4 | 478 | */ |
7b288a01 | 479 | static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) |
1da177e4 LT |
480 | { |
481 | unsigned short flags = msg->flags; | |
482 | unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; | |
483 | struct i2c_algo_bit_data *adap = i2c_adap->algo_data; | |
484 | ||
485 | unsigned char addr; | |
486 | int ret, retries; | |
487 | ||
488 | retries = nak_ok ? 0 : i2c_adap->retries; | |
cf978ab2 DB |
489 | |
490 | if (flags & I2C_M_TEN) { | |
1da177e4 | 491 | /* a ten bit address */ |
cc6bcf7d | 492 | addr = 0xf0 | ((msg->addr >> 7) & 0x06); |
494dbb64 | 493 | bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr); |
1da177e4 LT |
494 | /* try extended address code...*/ |
495 | ret = try_address(i2c_adap, addr, retries); | |
496 | if ((ret != 1) && !nak_ok) { | |
494dbb64 JD |
497 | dev_err(&i2c_adap->dev, |
498 | "died at extended address code\n"); | |
abc01b27 | 499 | return -ENXIO; |
1da177e4 LT |
500 | } |
501 | /* the remaining 8 bit address */ | |
cc6bcf7d | 502 | ret = i2c_outb(i2c_adap, msg->addr & 0xff); |
1da177e4 LT |
503 | if ((ret != 1) && !nak_ok) { |
504 | /* the chip did not ack / xmission error occurred */ | |
494dbb64 | 505 | dev_err(&i2c_adap->dev, "died at 2nd address code\n"); |
abc01b27 | 506 | return -ENXIO; |
1da177e4 | 507 | } |
cf978ab2 | 508 | if (flags & I2C_M_RD) { |
494dbb64 JD |
509 | bit_dbg(3, &i2c_adap->dev, "emitting repeated " |
510 | "start condition\n"); | |
1da177e4 LT |
511 | i2c_repstart(adap); |
512 | /* okay, now switch into reading mode */ | |
513 | addr |= 0x01; | |
514 | ret = try_address(i2c_adap, addr, retries); | |
cf978ab2 | 515 | if ((ret != 1) && !nak_ok) { |
494dbb64 JD |
516 | dev_err(&i2c_adap->dev, |
517 | "died at repeated address code\n"); | |
abc01b27 | 518 | return -EIO; |
1da177e4 LT |
519 | } |
520 | } | |
521 | } else { /* normal 7bit address */ | |
ac6d5298 | 522 | addr = i2c_8bit_addr_from_msg(msg); |
cf978ab2 | 523 | if (flags & I2C_M_REV_DIR_ADDR) |
1da177e4 LT |
524 | addr ^= 1; |
525 | ret = try_address(i2c_adap, addr, retries); | |
cf978ab2 | 526 | if ((ret != 1) && !nak_ok) |
97140342 | 527 | return -ENXIO; |
1da177e4 LT |
528 | } |
529 | ||
530 | return 0; | |
531 | } | |
532 | ||
533 | static int bit_xfer(struct i2c_adapter *i2c_adap, | |
534 | struct i2c_msg msgs[], int num) | |
535 | { | |
536 | struct i2c_msg *pmsg; | |
537 | struct i2c_algo_bit_data *adap = i2c_adap->algo_data; | |
cf978ab2 | 538 | int i, ret; |
1da177e4 LT |
539 | unsigned short nak_ok; |
540 | ||
0a9c1475 JD |
541 | if (adap->pre_xfer) { |
542 | ret = adap->pre_xfer(i2c_adap); | |
543 | if (ret < 0) | |
544 | return ret; | |
545 | } | |
546 | ||
494dbb64 | 547 | bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); |
1da177e4 | 548 | i2c_start(adap); |
cf978ab2 | 549 | for (i = 0; i < num; i++) { |
1da177e4 | 550 | pmsg = &msgs[i]; |
cf978ab2 | 551 | nak_ok = pmsg->flags & I2C_M_IGNORE_NAK; |
1da177e4 LT |
552 | if (!(pmsg->flags & I2C_M_NOSTART)) { |
553 | if (i) { | |
606fd278 JD |
554 | if (msgs[i - 1].flags & I2C_M_STOP) { |
555 | bit_dbg(3, &i2c_adap->dev, | |
556 | "emitting enforced stop/start condition\n"); | |
557 | i2c_stop(adap); | |
558 | i2c_start(adap); | |
559 | } else { | |
560 | bit_dbg(3, &i2c_adap->dev, | |
561 | "emitting repeated start condition\n"); | |
562 | i2c_repstart(adap); | |
563 | } | |
1da177e4 LT |
564 | } |
565 | ret = bit_doAddress(i2c_adap, pmsg); | |
566 | if ((ret != 0) && !nak_ok) { | |
494dbb64 JD |
567 | bit_dbg(1, &i2c_adap->dev, "NAK from " |
568 | "device addr 0x%02x msg #%d\n", | |
569 | msgs[i].addr, i); | |
1ecac07a | 570 | goto bailout; |
1da177e4 LT |
571 | } |
572 | } | |
cf978ab2 | 573 | if (pmsg->flags & I2C_M_RD) { |
1da177e4 LT |
574 | /* read bytes into buffer*/ |
575 | ret = readbytes(i2c_adap, pmsg); | |
494dbb64 JD |
576 | if (ret >= 1) |
577 | bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n", | |
578 | ret, ret == 1 ? "" : "s"); | |
1ecac07a JD |
579 | if (ret < pmsg->len) { |
580 | if (ret >= 0) | |
abc01b27 | 581 | ret = -EIO; |
1ecac07a | 582 | goto bailout; |
1da177e4 LT |
583 | } |
584 | } else { | |
585 | /* write bytes from buffer */ | |
586 | ret = sendbytes(i2c_adap, pmsg); | |
494dbb64 JD |
587 | if (ret >= 1) |
588 | bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n", | |
589 | ret, ret == 1 ? "" : "s"); | |
1ecac07a JD |
590 | if (ret < pmsg->len) { |
591 | if (ret >= 0) | |
abc01b27 | 592 | ret = -EIO; |
1ecac07a | 593 | goto bailout; |
1da177e4 LT |
594 | } |
595 | } | |
596 | } | |
1ecac07a JD |
597 | ret = i; |
598 | ||
599 | bailout: | |
494dbb64 | 600 | bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); |
1da177e4 | 601 | i2c_stop(adap); |
0a9c1475 JD |
602 | |
603 | if (adap->post_xfer) | |
604 | adap->post_xfer(i2c_adap); | |
1ecac07a | 605 | return ret; |
1da177e4 LT |
606 | } |
607 | ||
608 | static u32 bit_func(struct i2c_adapter *adap) | |
609 | { | |
14674e70 | 610 | return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL | |
3c4bb241 JD |
611 | I2C_FUNC_SMBUS_READ_BLOCK_DATA | |
612 | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | | |
1da177e4 LT |
613 | I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING; |
614 | } | |
615 | ||
616 | ||
617 | /* -----exported algorithm data: ------------------------------------- */ | |
618 | ||
b0209b39 | 619 | const struct i2c_algorithm i2c_bit_algo = { |
1da177e4 LT |
620 | .master_xfer = bit_xfer, |
621 | .functionality = bit_func, | |
622 | }; | |
b0209b39 | 623 | EXPORT_SYMBOL(i2c_bit_algo); |
1da177e4 | 624 | |
ef51d3ff | 625 | static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = { |
a94d306b NC |
626 | .flags = I2C_AQ_NO_CLK_STRETCH, |
627 | }; | |
628 | ||
cf978ab2 DB |
629 | /* |
630 | * registering functions to load algorithms at runtime | |
1da177e4 | 631 | */ |
f451171c JD |
632 | static int __i2c_bit_add_bus(struct i2c_adapter *adap, |
633 | int (*add_adapter)(struct i2c_adapter *)) | |
1da177e4 LT |
634 | { |
635 | struct i2c_algo_bit_data *bit_adap = adap->algo_data; | |
af5a60ba | 636 | int ret; |
1da177e4 LT |
637 | |
638 | if (bit_test) { | |
d3b3e15d | 639 | ret = test_bus(adap); |
1bddab7f | 640 | if (bit_test >= 2 && ret < 0) |
1da177e4 LT |
641 | return -ENODEV; |
642 | } | |
643 | ||
1da177e4 | 644 | /* register new adapter to i2c module... */ |
1da177e4 | 645 | adap->algo = &i2c_bit_algo; |
8fcfef6e | 646 | adap->retries = 3; |
a94d306b NC |
647 | if (bit_adap->getscl == NULL) |
648 | adap->quirks = &i2c_bit_quirk_no_clk_stretch; | |
1da177e4 | 649 | |
2173ed0a WS |
650 | /* |
651 | * We tried forcing SCL/SDA to an initial state here. But that caused a | |
652 | * regression, sadly. Check Bugzilla #200045 for details. | |
653 | */ | |
654 | ||
af5a60ba JD |
655 | ret = add_adapter(adap); |
656 | if (ret < 0) | |
657 | return ret; | |
658 | ||
659 | /* Complain if SCL can't be read */ | |
660 | if (bit_adap->getscl == NULL) { | |
661 | dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n"); | |
662 | dev_warn(&adap->dev, "Bus may be unreliable\n"); | |
663 | } | |
664 | return 0; | |
0f3b4838 JD |
665 | } |
666 | ||
667 | int i2c_bit_add_bus(struct i2c_adapter *adap) | |
668 | { | |
f451171c | 669 | return __i2c_bit_add_bus(adap, i2c_add_adapter); |
1da177e4 | 670 | } |
1da177e4 | 671 | EXPORT_SYMBOL(i2c_bit_add_bus); |
1da177e4 | 672 | |
0f3b4838 JD |
673 | int i2c_bit_add_numbered_bus(struct i2c_adapter *adap) |
674 | { | |
f451171c | 675 | return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter); |
0f3b4838 JD |
676 | } |
677 | EXPORT_SYMBOL(i2c_bit_add_numbered_bus); | |
678 | ||
1da177e4 LT |
679 | MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>"); |
680 | MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm"); | |
681 | MODULE_LICENSE("GPL"); |