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19a0f612 BA |
1 | /* |
2 | * Copyright (c) 2013, The Linux Foundation. All rights reserved. | |
3 | * Copyright (c) 2015, Sony Mobile Communications AB | |
4 | * | |
5 | * This software is licensed under the terms of the GNU General Public | |
6 | * License version 2, as published by the Free Software Foundation, and | |
7 | * may be copied, distributed, and modified under those terms. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | */ | |
14 | ||
15 | #include <linux/hwspinlock.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/mfd/syscon.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/of.h> | |
21 | #include <linux/of_device.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/pm_runtime.h> | |
24 | #include <linux/regmap.h> | |
25 | ||
26 | #include "hwspinlock_internal.h" | |
27 | ||
28 | #define QCOM_MUTEX_APPS_PROC_ID 1 | |
29 | #define QCOM_MUTEX_NUM_LOCKS 32 | |
30 | ||
31 | static int qcom_hwspinlock_trylock(struct hwspinlock *lock) | |
32 | { | |
33 | struct regmap_field *field = lock->priv; | |
34 | u32 lock_owner; | |
35 | int ret; | |
36 | ||
37 | ret = regmap_field_write(field, QCOM_MUTEX_APPS_PROC_ID); | |
38 | if (ret) | |
39 | return ret; | |
40 | ||
41 | ret = regmap_field_read(field, &lock_owner); | |
42 | if (ret) | |
43 | return ret; | |
44 | ||
45 | return lock_owner == QCOM_MUTEX_APPS_PROC_ID; | |
46 | } | |
47 | ||
48 | static void qcom_hwspinlock_unlock(struct hwspinlock *lock) | |
49 | { | |
50 | struct regmap_field *field = lock->priv; | |
51 | u32 lock_owner; | |
52 | int ret; | |
53 | ||
54 | ret = regmap_field_read(field, &lock_owner); | |
55 | if (ret) { | |
56 | pr_err("%s: unable to query spinlock owner\n", __func__); | |
57 | return; | |
58 | } | |
59 | ||
60 | if (lock_owner != QCOM_MUTEX_APPS_PROC_ID) { | |
61 | pr_err("%s: spinlock not owned by us (actual owner is %d)\n", | |
62 | __func__, lock_owner); | |
63 | } | |
64 | ||
65 | ret = regmap_field_write(field, 0); | |
66 | if (ret) | |
67 | pr_err("%s: failed to unlock spinlock\n", __func__); | |
68 | } | |
69 | ||
70 | static const struct hwspinlock_ops qcom_hwspinlock_ops = { | |
71 | .trylock = qcom_hwspinlock_trylock, | |
72 | .unlock = qcom_hwspinlock_unlock, | |
73 | }; | |
74 | ||
75 | static const struct of_device_id qcom_hwspinlock_of_match[] = { | |
76 | { .compatible = "qcom,sfpb-mutex" }, | |
77 | { .compatible = "qcom,tcsr-mutex" }, | |
78 | { } | |
79 | }; | |
80 | MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match); | |
81 | ||
82 | static int qcom_hwspinlock_probe(struct platform_device *pdev) | |
83 | { | |
84 | struct hwspinlock_device *bank; | |
85 | struct device_node *syscon; | |
86 | struct reg_field field; | |
87 | struct regmap *regmap; | |
88 | size_t array_size; | |
89 | u32 stride; | |
90 | u32 base; | |
91 | int ret; | |
92 | int i; | |
93 | ||
94 | syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0); | |
95 | if (!syscon) { | |
96 | dev_err(&pdev->dev, "no syscon property\n"); | |
97 | return -ENODEV; | |
98 | } | |
99 | ||
100 | regmap = syscon_node_to_regmap(syscon); | |
101 | if (IS_ERR(regmap)) | |
102 | return PTR_ERR(regmap); | |
103 | ||
104 | ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, &base); | |
105 | if (ret < 0) { | |
106 | dev_err(&pdev->dev, "no offset in syscon\n"); | |
107 | return -EINVAL; | |
108 | } | |
109 | ||
110 | ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, &stride); | |
111 | if (ret < 0) { | |
112 | dev_err(&pdev->dev, "no stride syscon\n"); | |
113 | return -EINVAL; | |
114 | } | |
115 | ||
116 | array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock); | |
117 | bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL); | |
118 | if (!bank) | |
119 | return -ENOMEM; | |
120 | ||
121 | platform_set_drvdata(pdev, bank); | |
122 | ||
123 | for (i = 0; i < QCOM_MUTEX_NUM_LOCKS; i++) { | |
124 | field.reg = base + i * stride; | |
125 | field.lsb = 0; | |
bd5717a4 | 126 | field.msb = 31; |
19a0f612 BA |
127 | |
128 | bank->lock[i].priv = devm_regmap_field_alloc(&pdev->dev, | |
129 | regmap, field); | |
130 | } | |
131 | ||
132 | pm_runtime_enable(&pdev->dev); | |
133 | ||
134 | ret = hwspin_lock_register(bank, &pdev->dev, &qcom_hwspinlock_ops, | |
135 | 0, QCOM_MUTEX_NUM_LOCKS); | |
136 | if (ret) | |
137 | pm_runtime_disable(&pdev->dev); | |
138 | ||
139 | return ret; | |
140 | } | |
141 | ||
142 | static int qcom_hwspinlock_remove(struct platform_device *pdev) | |
143 | { | |
144 | struct hwspinlock_device *bank = platform_get_drvdata(pdev); | |
145 | int ret; | |
146 | ||
147 | ret = hwspin_lock_unregister(bank); | |
148 | if (ret) { | |
149 | dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret); | |
150 | return ret; | |
151 | } | |
152 | ||
153 | pm_runtime_disable(&pdev->dev); | |
154 | ||
155 | return 0; | |
156 | } | |
157 | ||
158 | static struct platform_driver qcom_hwspinlock_driver = { | |
159 | .probe = qcom_hwspinlock_probe, | |
160 | .remove = qcom_hwspinlock_remove, | |
161 | .driver = { | |
162 | .name = "qcom_hwspinlock", | |
163 | .of_match_table = qcom_hwspinlock_of_match, | |
164 | }, | |
165 | }; | |
166 | ||
167 | static int __init qcom_hwspinlock_init(void) | |
168 | { | |
169 | return platform_driver_register(&qcom_hwspinlock_driver); | |
170 | } | |
171 | /* board init code might need to reserve hwspinlocks for predefined purposes */ | |
172 | postcore_initcall(qcom_hwspinlock_init); | |
173 | ||
174 | static void __exit qcom_hwspinlock_exit(void) | |
175 | { | |
176 | platform_driver_unregister(&qcom_hwspinlock_driver); | |
177 | } | |
178 | module_exit(qcom_hwspinlock_exit); | |
179 | ||
180 | MODULE_LICENSE("GPL v2"); | |
181 | MODULE_DESCRIPTION("Hardware spinlock driver for Qualcomm SoCs"); |