Commit | Line | Data |
---|---|---|
8ba01cae | 1 | // SPDX-License-Identifier: GPL-2.0 |
19a0f612 BA |
2 | /* |
3 | * Copyright (c) 2013, The Linux Foundation. All rights reserved. | |
4 | * Copyright (c) 2015, Sony Mobile Communications AB | |
19a0f612 BA |
5 | */ |
6 | ||
7 | #include <linux/hwspinlock.h> | |
8 | #include <linux/io.h> | |
9 | #include <linux/kernel.h> | |
10 | #include <linux/mfd/syscon.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/of.h> | |
13 | #include <linux/of_device.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/pm_runtime.h> | |
16 | #include <linux/regmap.h> | |
17 | ||
18 | #include "hwspinlock_internal.h" | |
19 | ||
20 | #define QCOM_MUTEX_APPS_PROC_ID 1 | |
21 | #define QCOM_MUTEX_NUM_LOCKS 32 | |
22 | ||
23 | static int qcom_hwspinlock_trylock(struct hwspinlock *lock) | |
24 | { | |
25 | struct regmap_field *field = lock->priv; | |
26 | u32 lock_owner; | |
27 | int ret; | |
28 | ||
29 | ret = regmap_field_write(field, QCOM_MUTEX_APPS_PROC_ID); | |
30 | if (ret) | |
31 | return ret; | |
32 | ||
33 | ret = regmap_field_read(field, &lock_owner); | |
34 | if (ret) | |
35 | return ret; | |
36 | ||
37 | return lock_owner == QCOM_MUTEX_APPS_PROC_ID; | |
38 | } | |
39 | ||
40 | static void qcom_hwspinlock_unlock(struct hwspinlock *lock) | |
41 | { | |
42 | struct regmap_field *field = lock->priv; | |
43 | u32 lock_owner; | |
44 | int ret; | |
45 | ||
46 | ret = regmap_field_read(field, &lock_owner); | |
47 | if (ret) { | |
48 | pr_err("%s: unable to query spinlock owner\n", __func__); | |
49 | return; | |
50 | } | |
51 | ||
52 | if (lock_owner != QCOM_MUTEX_APPS_PROC_ID) { | |
53 | pr_err("%s: spinlock not owned by us (actual owner is %d)\n", | |
54 | __func__, lock_owner); | |
55 | } | |
56 | ||
57 | ret = regmap_field_write(field, 0); | |
58 | if (ret) | |
59 | pr_err("%s: failed to unlock spinlock\n", __func__); | |
60 | } | |
61 | ||
62 | static const struct hwspinlock_ops qcom_hwspinlock_ops = { | |
63 | .trylock = qcom_hwspinlock_trylock, | |
64 | .unlock = qcom_hwspinlock_unlock, | |
65 | }; | |
66 | ||
67 | static const struct of_device_id qcom_hwspinlock_of_match[] = { | |
68 | { .compatible = "qcom,sfpb-mutex" }, | |
69 | { .compatible = "qcom,tcsr-mutex" }, | |
70 | { } | |
71 | }; | |
72 | MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match); | |
73 | ||
74 | static int qcom_hwspinlock_probe(struct platform_device *pdev) | |
75 | { | |
76 | struct hwspinlock_device *bank; | |
77 | struct device_node *syscon; | |
78 | struct reg_field field; | |
79 | struct regmap *regmap; | |
80 | size_t array_size; | |
81 | u32 stride; | |
82 | u32 base; | |
83 | int ret; | |
84 | int i; | |
85 | ||
86 | syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0); | |
87 | if (!syscon) { | |
88 | dev_err(&pdev->dev, "no syscon property\n"); | |
89 | return -ENODEV; | |
90 | } | |
91 | ||
92 | regmap = syscon_node_to_regmap(syscon); | |
4d41c8cb | 93 | of_node_put(syscon); |
19a0f612 BA |
94 | if (IS_ERR(regmap)) |
95 | return PTR_ERR(regmap); | |
96 | ||
97 | ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, &base); | |
98 | if (ret < 0) { | |
99 | dev_err(&pdev->dev, "no offset in syscon\n"); | |
100 | return -EINVAL; | |
101 | } | |
102 | ||
103 | ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, &stride); | |
104 | if (ret < 0) { | |
105 | dev_err(&pdev->dev, "no stride syscon\n"); | |
106 | return -EINVAL; | |
107 | } | |
108 | ||
109 | array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock); | |
110 | bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL); | |
111 | if (!bank) | |
112 | return -ENOMEM; | |
113 | ||
114 | platform_set_drvdata(pdev, bank); | |
115 | ||
116 | for (i = 0; i < QCOM_MUTEX_NUM_LOCKS; i++) { | |
117 | field.reg = base + i * stride; | |
118 | field.lsb = 0; | |
bd5717a4 | 119 | field.msb = 31; |
19a0f612 BA |
120 | |
121 | bank->lock[i].priv = devm_regmap_field_alloc(&pdev->dev, | |
122 | regmap, field); | |
123 | } | |
124 | ||
125 | pm_runtime_enable(&pdev->dev); | |
126 | ||
127 | ret = hwspin_lock_register(bank, &pdev->dev, &qcom_hwspinlock_ops, | |
128 | 0, QCOM_MUTEX_NUM_LOCKS); | |
129 | if (ret) | |
130 | pm_runtime_disable(&pdev->dev); | |
131 | ||
132 | return ret; | |
133 | } | |
134 | ||
135 | static int qcom_hwspinlock_remove(struct platform_device *pdev) | |
136 | { | |
137 | struct hwspinlock_device *bank = platform_get_drvdata(pdev); | |
138 | int ret; | |
139 | ||
140 | ret = hwspin_lock_unregister(bank); | |
141 | if (ret) { | |
142 | dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret); | |
143 | return ret; | |
144 | } | |
145 | ||
146 | pm_runtime_disable(&pdev->dev); | |
147 | ||
148 | return 0; | |
149 | } | |
150 | ||
151 | static struct platform_driver qcom_hwspinlock_driver = { | |
152 | .probe = qcom_hwspinlock_probe, | |
153 | .remove = qcom_hwspinlock_remove, | |
154 | .driver = { | |
155 | .name = "qcom_hwspinlock", | |
156 | .of_match_table = qcom_hwspinlock_of_match, | |
157 | }, | |
158 | }; | |
159 | ||
160 | static int __init qcom_hwspinlock_init(void) | |
161 | { | |
162 | return platform_driver_register(&qcom_hwspinlock_driver); | |
163 | } | |
164 | /* board init code might need to reserve hwspinlocks for predefined purposes */ | |
165 | postcore_initcall(qcom_hwspinlock_init); | |
166 | ||
167 | static void __exit qcom_hwspinlock_exit(void) | |
168 | { | |
169 | platform_driver_unregister(&qcom_hwspinlock_driver); | |
170 | } | |
171 | module_exit(qcom_hwspinlock_exit); | |
172 | ||
173 | MODULE_LICENSE("GPL v2"); | |
174 | MODULE_DESCRIPTION("Hardware spinlock driver for Qualcomm SoCs"); |