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hwmon: (w83795) Add myself as co-author and maintainer
[linux-2.6-block.git] / drivers / hwmon / w83795.c
CommitLineData
792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
e3760b43 5 * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
792d376b
WS		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation - version 2.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301 USA.
20 *
21 * Supports following chips:
22 *
23 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
24 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
25 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/i2c.h>
33#include <linux/hwmon.h>
34#include <linux/hwmon-sysfs.h>
35#include <linux/err.h>
36#include <linux/mutex.h>
37#include <linux/delay.h>
38
39/* Addresses to scan */
86ef4d2f
JD		 40static const unsigned short normal_i2c[] = {
41 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
42};
792d376b 43
792d376b
WS		 44
45static int reset;
46module_param(reset, bool, 0);
47MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
48
49
50#define W83795_REG_BANKSEL 0x00
51#define W83795_REG_VENDORID 0xfd
52#define W83795_REG_CHIPID 0xfe
53#define W83795_REG_DEVICEID 0xfb
2be381de 54#define W83795_REG_DEVICEID_A 0xff
792d376b
WS		 55
56#define W83795_REG_I2C_ADDR 0xfc
57#define W83795_REG_CONFIG 0x01
58#define W83795_REG_CONFIG_CONFIG48 0x04
80646b95 59#define W83795_REG_CONFIG_START 0x01
792d376b
WS		 60
61/* Multi-Function Pin Ctrl Registers */
62#define W83795_REG_VOLT_CTRL1 0x02
63#define W83795_REG_VOLT_CTRL2 0x03
64#define W83795_REG_TEMP_CTRL1 0x04
65#define W83795_REG_TEMP_CTRL2 0x05
66#define W83795_REG_FANIN_CTRL1 0x06
67#define W83795_REG_FANIN_CTRL2 0x07
68#define W83795_REG_VMIGB_CTRL 0x08
69
792d376b
WS		 70#define TEMP_READ 0
71#define TEMP_CRIT 1
72#define TEMP_CRIT_HYST 2
73#define TEMP_WARN 3
74#define TEMP_WARN_HYST 4
75/* only crit and crit_hyst affect real-time alarm status
76 * current crit crit_hyst warn warn_hyst */
86ef4d2f 77static const u16 W83795_REG_TEMP[][5] = {
792d376b
WS		 78 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
79 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
80 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
81 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
82 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
83 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
84};
85
86#define IN_READ 0
87#define IN_MAX 1
88#define IN_LOW 2
89static const u16 W83795_REG_IN[][3] = {
90 /* Current, HL, LL */
91 {0x10, 0x70, 0x71}, /* VSEN1 */
92 {0x11, 0x72, 0x73}, /* VSEN2 */
93 {0x12, 0x74, 0x75}, /* VSEN3 */
94 {0x13, 0x76, 0x77}, /* VSEN4 */
95 {0x14, 0x78, 0x79}, /* VSEN5 */
96 {0x15, 0x7a, 0x7b}, /* VSEN6 */
97 {0x16, 0x7c, 0x7d}, /* VSEN7 */
98 {0x17, 0x7e, 0x7f}, /* VSEN8 */
99 {0x18, 0x80, 0x81}, /* VSEN9 */
100 {0x19, 0x82, 0x83}, /* VSEN10 */
101 {0x1A, 0x84, 0x85}, /* VSEN11 */
102 {0x1B, 0x86, 0x87}, /* VTT */
103 {0x1C, 0x88, 0x89}, /* 3VDD */
104 {0x1D, 0x8a, 0x8b}, /* 3VSB */
105 {0x1E, 0x8c, 0x8d}, /* VBAT */
106 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
107 {0x20, 0xaa, 0xab}, /* VSEN13 */
108 {0x21, 0x96, 0x97}, /* VSEN14 */
109 {0x22, 0x9a, 0x9b}, /* VSEN15 */
110 {0x23, 0x9e, 0x9f}, /* VSEN16 */
111 {0x24, 0xa2, 0xa3}, /* VSEN17 */
112};
113#define W83795_REG_VRLSB 0x3C
792d376b
WS		 114
115static const u8 W83795_REG_IN_HL_LSB[] = {
116 0x8e, /* VSEN1-4 */
117 0x90, /* VSEN5-8 */
118 0x92, /* VSEN9-11 */
119 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
120 0xa8, /* VSEN12 */
121 0xac, /* VSEN13 */
122 0x98, /* VSEN14 */
123 0x9c, /* VSEN15 */
124 0xa0, /* VSEN16 */
125 0xa4, /* VSEN17 */
126};
127
128#define IN_LSB_REG(index, type) \
129 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
130 : (W83795_REG_IN_HL_LSB[(index)] + 1))
131
792d376b
WS		 132#define IN_LSB_SHIFT 0
133#define IN_LSB_IDX 1
134static const u8 IN_LSB_SHIFT_IDX[][2] = {
135 /* High/Low LSB shift, LSB No. */
136 {0x00, 0x00}, /* VSEN1 */
137 {0x02, 0x00}, /* VSEN2 */
138 {0x04, 0x00}, /* VSEN3 */
139 {0x06, 0x00}, /* VSEN4 */
140 {0x00, 0x01}, /* VSEN5 */
141 {0x02, 0x01}, /* VSEN6 */
142 {0x04, 0x01}, /* VSEN7 */
143 {0x06, 0x01}, /* VSEN8 */
144 {0x00, 0x02}, /* VSEN9 */
145 {0x02, 0x02}, /* VSEN10 */
146 {0x04, 0x02}, /* VSEN11 */
147 {0x00, 0x03}, /* VTT */
148 {0x02, 0x03}, /* 3VDD */
149 {0x04, 0x03}, /* 3VSB */
150 {0x06, 0x03}, /* VBAT */
151 {0x06, 0x04}, /* VSEN12 */
152 {0x06, 0x05}, /* VSEN13 */
153 {0x06, 0x06}, /* VSEN14 */
154 {0x06, 0x07}, /* VSEN15 */
155 {0x06, 0x08}, /* VSEN16 */
156 {0x06, 0x09}, /* VSEN17 */
157};
158
159
792d376b
WS		 160#define W83795_REG_FAN(index) (0x2E + (index))
161#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
162#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
163#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
7eb8d508 164 (((index) & 1) ? 4 : 0)
792d376b
WS		 165
166#define W83795_REG_VID_CTRL 0x6A
167
792d376b
WS		 168#define W83795_REG_ALARM(index) (0x41 + (index))
169#define W83795_REG_BEEP(index) (0x50 + (index))
170
171#define W83795_REG_CLR_CHASSIS 0x4D
172
173
792d376b
WS		 174#define W83795_REG_FCMS1 0x201
175#define W83795_REG_FCMS2 0x208
176#define W83795_REG_TFMR(index) (0x202 + (index))
177#define W83795_REG_FOMC 0x20F
792d376b
WS		 178
179#define W83795_REG_TSS(index) (0x209 + (index))
180
181#define PWM_OUTPUT 0
fd7f82b8
JD		 182#define PWM_FREQ 1
183#define PWM_START 2
184#define PWM_NONSTOP 3
185#define PWM_STOP_TIME 4
186#define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
792d376b 187
792d376b
WS		 188#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
189#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
190#define W83795_REG_TFTS 0x250
191
192#define TEMP_PWM_TTTI 0
193#define TEMP_PWM_CTFS 1
194#define TEMP_PWM_HCT 2
195#define TEMP_PWM_HOT 3
196#define W83795_REG_TTTI(index) (0x260 + (index))
197#define W83795_REG_CTFS(index) (0x268 + (index))
198#define W83795_REG_HT(index) (0x270 + (index))
199
200#define SF4_TEMP 0
201#define SF4_PWM 1
202#define W83795_REG_SF4_TEMP(temp_num, index) \
203 (0x280 + 0x10 * (temp_num) + (index))
204#define W83795_REG_SF4_PWM(temp_num, index) \
205 (0x288 + 0x10 * (temp_num) + (index))
206
207#define W83795_REG_DTSC 0x301
208#define W83795_REG_DTSE 0x302
209#define W83795_REG_DTS(index) (0x26 + (index))
54891a3c 210#define W83795_REG_PECI_TBASE(index) (0x320 + (index))
792d376b
WS		 211
212#define DTS_CRIT 0
213#define DTS_CRIT_HYST 1
214#define DTS_WARN 2
215#define DTS_WARN_HYST 3
216#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
217
218#define SETUP_PWM_DEFAULT 0
219#define SETUP_PWM_UPTIME 1
220#define SETUP_PWM_DOWNTIME 2
221#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
222
223static inline u16 in_from_reg(u8 index, u16 val)
224{
49c7347a
JD		 225 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
226 if (index >= 12 && index <= 14)
792d376b
WS		 227 return val * 6;
228 else
229 return val * 2;
230}
231
232static inline u16 in_to_reg(u8 index, u16 val)
233{
49c7347a 234 if (index >= 12 && index <= 14)
792d376b
WS		 235 return val / 6;
236 else
237 return val / 2;
238}
239
240static inline unsigned long fan_from_reg(u16 val)
241{
6c82b2f3 242 if ((val == 0xfff) || (val == 0))
792d376b
WS		 243 return 0;
244 return 1350000UL / val;
245}
246
247static inline u16 fan_to_reg(long rpm)
248{
249 if (rpm <= 0)
250 return 0x0fff;
251 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
252}
253
254static inline unsigned long time_from_reg(u8 reg)
255{
256 return reg * 100;
257}
258
259static inline u8 time_to_reg(unsigned long val)
260{
261 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
262}
263
264static inline long temp_from_reg(s8 reg)
265{
266 return reg * 1000;
267}
268
269static inline s8 temp_to_reg(long val, s8 min, s8 max)
270{
dd127f5c 271 return SENSORS_LIMIT(val / 1000, min, max);
792d376b
WS		 272}
273
01879a85
JD		 274static const u16 pwm_freq_cksel0[16] = {
275 1024, 512, 341, 256, 205, 171, 146, 128,
276 85, 64, 32, 16, 8, 4, 2, 1
277};
278
279static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
280{
281 unsigned long base_clock;
282
283 if (reg & 0x80) {
284 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
285 return base_clock / ((reg & 0x7f) + 1);
286 } else
287 return pwm_freq_cksel0[reg & 0x0f];
288}
289
290static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
291{
292 unsigned long base_clock;
293 u8 reg0, reg1;
294 unsigned long best0, best1;
295
296 /* Best fit for cksel = 0 */
297 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
298 if (val > (pwm_freq_cksel0[reg0] +
299 pwm_freq_cksel0[reg0 + 1]) / 2)
300 break;
301 }
302 if (val < 375) /* cksel = 1 can't beat this */
303 return reg0;
304 best0 = pwm_freq_cksel0[reg0];
305
306 /* Best fit for cksel = 1 */
307 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
308 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
309 best1 = base_clock / reg1;
310 reg1 = 0x80 | (reg1 - 1);
311
312 /* Choose the closest one */
313 if (abs(val - best0) > abs(val - best1))
314 return reg1;
315 else
316 return reg0;
317}
792d376b
WS		 318
319enum chip_types {w83795g, w83795adg};
320
321struct w83795_data {
322 struct device *hwmon_dev;
323 struct mutex update_lock;
324 unsigned long last_updated; /* In jiffies */
325 enum chip_types chip_type;
326
327 u8 bank;
328
329 u32 has_in; /* Enable monitor VIN or not */
0e256018 330 u8 has_dyn_in; /* Only in2-0 can have this */
792d376b
WS		 331 u16 in[21][3]; /* Register value, read/high/low */
332 u8 in_lsb[10][3]; /* LSB Register value, high/low */
333 u8 has_gain; /* has gain: in17-20 * 8 */
334
335 u16 has_fan; /* Enable fan14-1 or not */
336 u16 fan[14]; /* Register value combine */
337 u16 fan_min[14]; /* Register value combine */
338
339 u8 has_temp; /* Enable monitor temp6-1 or not */
dd127f5c 340 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
792d376b 341 u8 temp_read_vrlsb[6];
39deb699 342 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
792d376b
WS		 343 u8 temp_src[3]; /* Register value */
344
345 u8 enable_dts; /* Enable PECI and SB-TSI,
346 * bit 0: =1 enable, =0 disable,
347 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
348 u8 has_dts; /* Enable monitor DTS temp */
dd127f5c 349 s8 dts[8]; /* Register value */
792d376b 350 u8 dts_read_vrlsb[8]; /* Register value */
dd127f5c 351 s8 dts_ext[4]; /* Register value */
792d376b
WS		 352
353 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
354 * no config register, only affected by chip
355 * type */
fd7f82b8
JD		 356 u8 pwm[8][5]; /* Register value, output, freq, start,
357 * non stop, stop time */
01879a85 358 u16 clkin; /* CLKIN frequency in kHz */
792d376b
WS		 359 u8 pwm_fcms[2]; /* Register value */
360 u8 pwm_tfmr[6]; /* Register value */
361 u8 pwm_fomc; /* Register value */
362
363 u16 target_speed[8]; /* Register value, target speed for speed
364 * cruise */
365 u8 tol_speed; /* tolerance of target speed */
366 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
367 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
368
369 u8 setup_pwm[3]; /* Register value */
370
371 u8 alarms[6]; /* Register value */
372 u8 beeps[6]; /* Register value */
792d376b
WS		 373
374 char valid;
2ae61de9 375 char valid_limits;
1bb3450c 376 char valid_pwm_config;
792d376b
WS		 377};
378
379/*
380 * Hardware access
b2469f42 381 * We assume that nobdody can change the bank outside the driver.
792d376b
WS		 382 */
383
b2469f42
JD		 384/* Must be called with data->update_lock held, except during initialization */
385static int w83795_set_bank(struct i2c_client *client, u8 bank)
792d376b
WS		 386{
387 struct w83795_data *data = i2c_get_clientdata(client);
b2469f42
JD		 388 int err;
389
390 /* If the same bank is already set, nothing to do */
391 if ((data->bank & 0x07) == bank)
392 return 0;
393
394 /* Change to new bank, preserve all other bits */
395 bank |= data->bank & ~0x07;
396 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
397 if (err < 0) {
398 dev_err(&client->dev,
399 "Failed to set bank to %d, err %d\n",
400 (int)bank, err);
401 return err;
792d376b 402 }
b2469f42
JD		 403 data->bank = bank;
404
405 return 0;
792d376b
WS		 406}
407
408/* Must be called with data->update_lock held, except during initialization */
b2469f42 409static u8 w83795_read(struct i2c_client *client, u16 reg)
792d376b 410{
b2469f42
JD		 411 int err;
412
413 err = w83795_set_bank(client, reg >> 8);
414 if (err < 0)
415 return 0x00; /* Arbitrary */
416
417 err = i2c_smbus_read_byte_data(client, reg & 0xff);
418 if (err < 0) {
419 dev_err(&client->dev,
420 "Failed to read from register 0x%03x, err %d\n",
421 (int)reg, err);
422 return 0x00; /* Arbitrary */
792d376b 423 }
b2469f42
JD		 424 return err;
425}
792d376b 426
b2469f42
JD		 427/* Must be called with data->update_lock held, except during initialization */
428static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
429{
430 int err;
431
432 err = w83795_set_bank(client, reg >> 8);
433 if (err < 0)
434 return err;
435
436 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
437 if (err < 0)
438 dev_err(&client->dev,
439 "Failed to write to register 0x%03x, err %d\n",
440 (int)reg, err);
441 return err;
792d376b
WS		 442}
443
0d7237bf
JD		 444static void w83795_update_limits(struct i2c_client *client)
445{
446 struct w83795_data *data = i2c_get_clientdata(client);
447 int i, limit;
448
449 /* Read the voltage limits */
450 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
451 if (!(data->has_in & (1 << i)))
452 continue;
453 data->in[i][IN_MAX] =
454 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
455 data->in[i][IN_LOW] =
456 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
457 }
458 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
459 if ((i == 2 && data->chip_type == w83795adg) ||
460 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
461 continue;
462 data->in_lsb[i][IN_MAX] =
463 w83795_read(client, IN_LSB_REG(i, IN_MAX));
464 data->in_lsb[i][IN_LOW] =
465 w83795_read(client, IN_LSB_REG(i, IN_LOW));
466 }
467
468 /* Read the fan limits */
469 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
470 u8 lsb;
471
472 /* Each register contains LSB for 2 fans, but we want to
473 * read it only once to save time */
474 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
475 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
476
477 if (!(data->has_fan & (1 << i)))
478 continue;
479 data->fan_min[i] =
480 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
481 data->fan_min[i] |=
482 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
483 }
484
485 /* Read the temperature limits */
486 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
487 if (!(data->has_temp & (1 << i)))
488 continue;
489 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
490 data->temp[i][limit] =
491 w83795_read(client, W83795_REG_TEMP[i][limit]);
492 }
493
494 /* Read the DTS limits */
eb02755a 495 if (data->enable_dts) {
0d7237bf
JD		 496 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
497 data->dts_ext[limit] =
498 w83795_read(client, W83795_REG_DTS_EXT(limit));
499 }
500
501 /* Read beep settings */
502 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
503 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2ae61de9
JD		 504
505 data->valid_limits = 1;
0d7237bf
JD		 506}
507
1bb3450c 508static struct w83795_data *w83795_update_pwm_config(struct device *dev)
0d7237bf 509{
1bb3450c 510 struct i2c_client *client = to_i2c_client(dev);
0d7237bf
JD		 511 struct w83795_data *data = i2c_get_clientdata(client);
512 int i, tmp;
513
1bb3450c
JD		 514 mutex_lock(&data->update_lock);
515
516 if (data->valid_pwm_config)
517 goto END;
518
0d7237bf
JD		 519 /* Read temperature source selection */
520 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
521 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
522
523 /* Read automatic fan speed control settings */
524 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
525 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
526 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
527 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
528 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
529 for (i = 0; i < data->has_pwm; i++) {
530 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
531 data->pwm[i][tmp] =
532 w83795_read(client, W83795_REG_PWM(i, tmp));
533 }
534 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
535 data->target_speed[i] =
536 w83795_read(client, W83795_REG_FTSH(i)) << 4;
537 data->target_speed[i] |=
538 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
539 }
540 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
541
542 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
543 data->pwm_temp[i][TEMP_PWM_TTTI] =
544 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
545 data->pwm_temp[i][TEMP_PWM_CTFS] =
546 w83795_read(client, W83795_REG_CTFS(i));
547 tmp = w83795_read(client, W83795_REG_HT(i));
eb02755a 548 data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
0d7237bf
JD		 549 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
550 }
551
552 /* Read SmartFanIV trip points */
553 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
554 for (tmp = 0; tmp < 7; tmp++) {
555 data->sf4_reg[i][SF4_TEMP][tmp] =
556 w83795_read(client,
557 W83795_REG_SF4_TEMP(i, tmp));
558 data->sf4_reg[i][SF4_PWM][tmp] =
559 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
560 }
561 }
562
563 /* Read setup PWM */
564 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
565 data->setup_pwm[i] =
566 w83795_read(client, W83795_REG_SETUP_PWM(i));
1bb3450c
JD		 567
568 data->valid_pwm_config = 1;
569
570END:
571 mutex_unlock(&data->update_lock);
572 return data;
0d7237bf
JD		 573}
574
792d376b
WS		 575static struct w83795_data *w83795_update_device(struct device *dev)
576{
577 struct i2c_client *client = to_i2c_client(dev);
578 struct w83795_data *data = i2c_get_clientdata(client);
579 u16 tmp;
580 int i;
581
582 mutex_lock(&data->update_lock);
583
2ae61de9
JD		 584 if (!data->valid_limits)
585 w83795_update_limits(client);
586
792d376b
WS		 587 if (!(time_after(jiffies, data->last_updated + HZ * 2)
588 || !data->valid))
589 goto END;
590
591 /* Update the voltages value */
592 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
593 if (!(data->has_in & (1 << i)))
594 continue;
595 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
a654b9d4 596 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
792d376b
WS		 597 data->in[i][IN_READ] = tmp;
598 }
599
0e256018
JD		 600 /* in0-2 can have dynamic limits (W83795G only) */
601 if (data->has_dyn_in) {
602 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
603 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
604
605 for (i = 0; i < 3; i++) {
606 if (!(data->has_dyn_in & (1 << i)))
607 continue;
608 data->in[i][IN_MAX] =
609 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
610 data->in[i][IN_LOW] =
611 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
612 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
613 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
614 }
615 }
616
792d376b
WS		 617 /* Update fan */
618 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
619 if (!(data->has_fan & (1 << i)))
620 continue;
621 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
eb02755a 622 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
792d376b
WS		 623 }
624
625 /* Update temperature */
626 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
792d376b
WS		 627 data->temp[i][TEMP_READ] =
628 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
629 data->temp_read_vrlsb[i] =
630 w83795_read(client, W83795_REG_VRLSB);
631 }
632
633 /* Update dts temperature */
eb02755a 634 if (data->enable_dts) {
792d376b
WS		 635 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
636 if (!(data->has_dts & (1 << i)))
637 continue;
638 data->dts[i] =
639 w83795_read(client, W83795_REG_DTS(i));
640 data->dts_read_vrlsb[i] =
641 w83795_read(client, W83795_REG_VRLSB);
642 }
643 }
644
645 /* Update pwm output */
646 for (i = 0; i < data->has_pwm; i++) {
647 data->pwm[i][PWM_OUTPUT] =
648 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
649 }
650
651 /* update alarm */
cd316df5 652 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
792d376b
WS		 653 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
654
655 data->last_updated = jiffies;
656 data->valid = 1;
657
658END:
659 mutex_unlock(&data->update_lock);
660 return data;
661}
662
663/*
664 * Sysfs attributes
665 */
666
667#define ALARM_STATUS 0
668#define BEEP_ENABLE 1
669static ssize_t
670show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
671{
672 struct w83795_data *data = w83795_update_device(dev);
673 struct sensor_device_attribute_2 *sensor_attr =
674 to_sensor_dev_attr_2(attr);
675 int nr = sensor_attr->nr;
676 int index = sensor_attr->index >> 3;
677 int bit = sensor_attr->index & 0x07;
678 u8 val;
679
eb02755a
JD		 680 if (nr == ALARM_STATUS)
681 val = (data->alarms[index] >> bit) & 1;
682 else /* BEEP_ENABLE */
683 val = (data->beeps[index] >> bit) & 1;
792d376b
WS		 684
685 return sprintf(buf, "%u\n", val);
686}
687
688static ssize_t
689store_beep(struct device *dev, struct device_attribute *attr,
690 const char *buf, size_t count)
691{
692 struct i2c_client *client = to_i2c_client(dev);
693 struct w83795_data *data = i2c_get_clientdata(client);
694 struct sensor_device_attribute_2 *sensor_attr =
695 to_sensor_dev_attr_2(attr);
696 int index = sensor_attr->index >> 3;
697 int shift = sensor_attr->index & 0x07;
698 u8 beep_bit = 1 << shift;
699 unsigned long val;
700
701 if (strict_strtoul(buf, 10, &val) < 0)
702 return -EINVAL;
703 if (val != 0 && val != 1)
704 return -EINVAL;
705
706 mutex_lock(&data->update_lock);
707 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
708 data->beeps[index] &= ~beep_bit;
709 data->beeps[index] |= val << shift;
710 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
711 mutex_unlock(&data->update_lock);
712
713 return count;
714}
715
792d376b
WS		 716/* Write any value to clear chassis alarm */
717static ssize_t
718store_chassis_clear(struct device *dev,
719 struct device_attribute *attr, const char *buf,
720 size_t count)
721{
722 struct i2c_client *client = to_i2c_client(dev);
723 struct w83795_data *data = i2c_get_clientdata(client);
724 u8 val;
725
726 mutex_lock(&data->update_lock);
727 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
728 val |= 0x80;
729 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
730 mutex_unlock(&data->update_lock);
731 return count;
732}
733
734#define FAN_INPUT 0
735#define FAN_MIN 1
736static ssize_t
737show_fan(struct device *dev, struct device_attribute *attr, char *buf)
738{
739 struct sensor_device_attribute_2 *sensor_attr =
740 to_sensor_dev_attr_2(attr);
741 int nr = sensor_attr->nr;
742 int index = sensor_attr->index;
743 struct w83795_data *data = w83795_update_device(dev);
744 u16 val;
745
eb02755a 746 if (nr == FAN_INPUT)
792d376b
WS		 747 val = data->fan[index] & 0x0fff;
748 else
749 val = data->fan_min[index] & 0x0fff;
750
751 return sprintf(buf, "%lu\n", fan_from_reg(val));
752}
753
754static ssize_t
755store_fan_min(struct device *dev, struct device_attribute *attr,
756 const char *buf, size_t count)
757{
758 struct sensor_device_attribute_2 *sensor_attr =
759 to_sensor_dev_attr_2(attr);
760 int index = sensor_attr->index;
761 struct i2c_client *client = to_i2c_client(dev);
762 struct w83795_data *data = i2c_get_clientdata(client);
763 unsigned long val;
764
765 if (strict_strtoul(buf, 10, &val))
766 return -EINVAL;
767 val = fan_to_reg(val);
768
769 mutex_lock(&data->update_lock);
770 data->fan_min[index] = val;
771 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
772 val &= 0x0f;
7eb8d508 773 if (index & 1) {
792d376b
WS		 774 val <<= 4;
775 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
776 & 0x0f;
777 } else {
778 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
779 & 0xf0;
780 }
781 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
782 mutex_unlock(&data->update_lock);
783
784 return count;
785}
786
787static ssize_t
788show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
789{
1bb3450c 790 struct w83795_data *data;
792d376b
WS		 791 struct sensor_device_attribute_2 *sensor_attr =
792 to_sensor_dev_attr_2(attr);
793 int nr = sensor_attr->nr;
794 int index = sensor_attr->index;
01879a85 795 unsigned int val;
792d376b 796
1bb3450c
JD		 797 data = nr == PWM_OUTPUT ? w83795_update_device(dev)
798 : w83795_update_pwm_config(dev);
799
792d376b
WS		 800 switch (nr) {
801 case PWM_STOP_TIME:
802 val = time_from_reg(data->pwm[index][nr]);
803 break;
01879a85
JD		 804 case PWM_FREQ:
805 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
792d376b
WS		 806 break;
807 default:
808 val = data->pwm[index][nr];
809 break;
810 }
811
812 return sprintf(buf, "%u\n", val);
813}
814
815static ssize_t
816store_pwm(struct device *dev, struct device_attribute *attr,
817 const char *buf, size_t count)
818{
819 struct i2c_client *client = to_i2c_client(dev);
820 struct w83795_data *data = i2c_get_clientdata(client);
821 struct sensor_device_attribute_2 *sensor_attr =
822 to_sensor_dev_attr_2(attr);
823 int nr = sensor_attr->nr;
824 int index = sensor_attr->index;
825 unsigned long val;
792d376b
WS		 826
827 if (strict_strtoul(buf, 10, &val) < 0)
828 return -EINVAL;
829
830 mutex_lock(&data->update_lock);
831 switch (nr) {
832 case PWM_STOP_TIME:
833 val = time_to_reg(val);
834 break;
01879a85
JD		 835 case PWM_FREQ:
836 val = pwm_freq_to_reg(val, data->clkin);
792d376b
WS		 837 break;
838 default:
839 val = SENSORS_LIMIT(val, 0, 0xff);
840 break;
841 }
842 w83795_write(client, W83795_REG_PWM(index, nr), val);
01879a85 843 data->pwm[index][nr] = val;
792d376b
WS		 844 mutex_unlock(&data->update_lock);
845 return count;
792d376b
WS		 846}
847
848static ssize_t
849show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
850{
851 struct sensor_device_attribute_2 *sensor_attr =
852 to_sensor_dev_attr_2(attr);
1bb3450c 853 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 854 int index = sensor_attr->index;
855 u8 tmp;
856
857 if (1 == (data->pwm_fcms[0] & (1 << index))) {
858 tmp = 2;
859 goto out;
860 }
861 for (tmp = 0; tmp < 6; tmp++) {
862 if (data->pwm_tfmr[tmp] & (1 << index)) {
863 tmp = 3;
864 goto out;
865 }
866 }
867 if (data->pwm_fomc & (1 << index))
868 tmp = 0;
869 else
870 tmp = 1;
871
872out:
873 return sprintf(buf, "%u\n", tmp);
874}
875
876static ssize_t
877store_pwm_enable(struct device *dev, struct device_attribute *attr,
878 const char *buf, size_t count)
879{
880 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 881 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 882 struct sensor_device_attribute_2 *sensor_attr =
883 to_sensor_dev_attr_2(attr);
884 int index = sensor_attr->index;
885 unsigned long val;
886 int i;
887
888 if (strict_strtoul(buf, 10, &val) < 0)
889 return -EINVAL;
890 if (val > 2)
891 return -EINVAL;
892
893 mutex_lock(&data->update_lock);
894 switch (val) {
895 case 0:
896 case 1:
897 data->pwm_fcms[0] &= ~(1 << index);
898 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
899 for (i = 0; i < 6; i++) {
900 data->pwm_tfmr[i] &= ~(1 << index);
901 w83795_write(client, W83795_REG_TFMR(i),
902 data->pwm_tfmr[i]);
903 }
904 data->pwm_fomc |= 1 << index;
905 data->pwm_fomc ^= val << index;
906 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
907 break;
908 case 2:
909 data->pwm_fcms[0] |= (1 << index);
910 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
911 break;
912 }
913 mutex_unlock(&data->update_lock);
914 return count;
792d376b
WS		 915}
916
917static ssize_t
918show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
919{
920 struct sensor_device_attribute_2 *sensor_attr =
921 to_sensor_dev_attr_2(attr);
1bb3450c 922 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 923 int index = sensor_attr->index;
924 u8 val = index / 2;
925 u8 tmp = data->temp_src[val];
926
7eb8d508 927 if (index & 1)
792d376b
WS		 928 val = 4;
929 else
930 val = 0;
931 tmp >>= val;
932 tmp &= 0x0f;
933
934 return sprintf(buf, "%u\n", tmp);
935}
936
937static ssize_t
938store_temp_src(struct device *dev, struct device_attribute *attr,
939 const char *buf, size_t count)
940{
941 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 942 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 943 struct sensor_device_attribute_2 *sensor_attr =
944 to_sensor_dev_attr_2(attr);
945 int index = sensor_attr->index;
946 unsigned long tmp;
947 u8 val = index / 2;
948
949 if (strict_strtoul(buf, 10, &tmp) < 0)
950 return -EINVAL;
951 tmp = SENSORS_LIMIT(tmp, 0, 15);
952
953 mutex_lock(&data->update_lock);
7eb8d508 954 if (index & 1) {
792d376b
WS		 955 tmp <<= 4;
956 data->temp_src[val] &= 0x0f;
957 } else {
958 data->temp_src[val] &= 0xf0;
959 }
960 data->temp_src[val] |= tmp;
961 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
962 mutex_unlock(&data->update_lock);
963
964 return count;
965}
966
967#define TEMP_PWM_ENABLE 0
968#define TEMP_PWM_FAN_MAP 1
969static ssize_t
970show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
971 char *buf)
972{
1bb3450c 973 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 974 struct sensor_device_attribute_2 *sensor_attr =
975 to_sensor_dev_attr_2(attr);
976 int nr = sensor_attr->nr;
977 int index = sensor_attr->index;
978 u8 tmp = 0xff;
979
980 switch (nr) {
981 case TEMP_PWM_ENABLE:
982 tmp = (data->pwm_fcms[1] >> index) & 1;
983 if (tmp)
984 tmp = 4;
985 else
986 tmp = 3;
987 break;
988 case TEMP_PWM_FAN_MAP:
989 tmp = data->pwm_tfmr[index];
990 break;
991 }
992
993 return sprintf(buf, "%u\n", tmp);
994}
995
996static ssize_t
997store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
998 const char *buf, size_t count)
999{
1000 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 1001 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1002 struct sensor_device_attribute_2 *sensor_attr =
1003 to_sensor_dev_attr_2(attr);
1004 int nr = sensor_attr->nr;
1005 int index = sensor_attr->index;
1006 unsigned long tmp;
1007
1008 if (strict_strtoul(buf, 10, &tmp) < 0)
1009 return -EINVAL;
1010
1011 switch (nr) {
1012 case TEMP_PWM_ENABLE:
eb02755a 1013 if (tmp != 3 && tmp != 4)
792d376b
WS		 1014 return -EINVAL;
1015 tmp -= 3;
1016 mutex_lock(&data->update_lock);
1017 data->pwm_fcms[1] &= ~(1 << index);
1018 data->pwm_fcms[1] |= tmp << index;
1019 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
1020 mutex_unlock(&data->update_lock);
1021 break;
1022 case TEMP_PWM_FAN_MAP:
1023 mutex_lock(&data->update_lock);
1024 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
1025 w83795_write(client, W83795_REG_TFMR(index), tmp);
1026 data->pwm_tfmr[index] = tmp;
1027 mutex_unlock(&data->update_lock);
1028 break;
1029 }
1030 return count;
1031}
1032
1033#define FANIN_TARGET 0
1034#define FANIN_TOL 1
1035static ssize_t
1036show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
1037{
1bb3450c 1038 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1039 struct sensor_device_attribute_2 *sensor_attr =
1040 to_sensor_dev_attr_2(attr);
1041 int nr = sensor_attr->nr;
1042 int index = sensor_attr->index;
1043 u16 tmp = 0;
1044
1045 switch (nr) {
1046 case FANIN_TARGET:
1047 tmp = fan_from_reg(data->target_speed[index]);
1048 break;
1049 case FANIN_TOL:
1050 tmp = data->tol_speed;
1051 break;
1052 }
1053
1054 return sprintf(buf, "%u\n", tmp);
1055}
1056
1057static ssize_t
1058store_fanin(struct device *dev, struct device_attribute *attr,
1059 const char *buf, size_t count)
1060{
1061 struct i2c_client *client = to_i2c_client(dev);
1062 struct w83795_data *data = i2c_get_clientdata(client);
1063 struct sensor_device_attribute_2 *sensor_attr =
1064 to_sensor_dev_attr_2(attr);
1065 int nr = sensor_attr->nr;
1066 int index = sensor_attr->index;
1067 unsigned long val;
1068
1069 if (strict_strtoul(buf, 10, &val) < 0)
1070 return -EINVAL;
1071
1072 mutex_lock(&data->update_lock);
1073 switch (nr) {
1074 case FANIN_TARGET:
1075 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
eb02755a 1076 w83795_write(client, W83795_REG_FTSH(index), val >> 4);
792d376b
WS		 1077 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1078 data->target_speed[index] = val;
1079 break;
1080 case FANIN_TOL:
1081 val = SENSORS_LIMIT(val, 0, 0x3f);
1082 w83795_write(client, W83795_REG_TFTS, val);
1083 data->tol_speed = val;
1084 break;
1085 }
1086 mutex_unlock(&data->update_lock);
1087
1088 return count;
1089}
1090
1091
1092static ssize_t
1093show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1094{
1bb3450c 1095 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1096 struct sensor_device_attribute_2 *sensor_attr =
1097 to_sensor_dev_attr_2(attr);
1098 int nr = sensor_attr->nr;
1099 int index = sensor_attr->index;
1100 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1101
1102 return sprintf(buf, "%ld\n", tmp);
1103}
1104
1105static ssize_t
1106store_temp_pwm(struct device *dev, struct device_attribute *attr,
1107 const char *buf, size_t count)
1108{
1109 struct i2c_client *client = to_i2c_client(dev);
1110 struct w83795_data *data = i2c_get_clientdata(client);
1111 struct sensor_device_attribute_2 *sensor_attr =
1112 to_sensor_dev_attr_2(attr);
1113 int nr = sensor_attr->nr;
1114 int index = sensor_attr->index;
1115 unsigned long val;
1116 u8 tmp;
1117
1118 if (strict_strtoul(buf, 10, &val) < 0)
1119 return -EINVAL;
1120 val /= 1000;
1121
1122 mutex_lock(&data->update_lock);
1123 switch (nr) {
1124 case TEMP_PWM_TTTI:
1125 val = SENSORS_LIMIT(val, 0, 0x7f);
1126 w83795_write(client, W83795_REG_TTTI(index), val);
1127 break;
1128 case TEMP_PWM_CTFS:
1129 val = SENSORS_LIMIT(val, 0, 0x7f);
1130 w83795_write(client, W83795_REG_CTFS(index), val);
1131 break;
1132 case TEMP_PWM_HCT:
1133 val = SENSORS_LIMIT(val, 0, 0x0f);
1134 tmp = w83795_read(client, W83795_REG_HT(index));
1135 tmp &= 0x0f;
1136 tmp |= (val << 4) & 0xf0;
1137 w83795_write(client, W83795_REG_HT(index), tmp);
1138 break;
1139 case TEMP_PWM_HOT:
1140 val = SENSORS_LIMIT(val, 0, 0x0f);
1141 tmp = w83795_read(client, W83795_REG_HT(index));
1142 tmp &= 0xf0;
1143 tmp |= val & 0x0f;
1144 w83795_write(client, W83795_REG_HT(index), tmp);
1145 break;
1146 }
1147 data->pwm_temp[index][nr] = val;
1148 mutex_unlock(&data->update_lock);
1149
1150 return count;
1151}
1152
1153static ssize_t
1154show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1155{
1bb3450c 1156 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1157 struct sensor_device_attribute_2 *sensor_attr =
1158 to_sensor_dev_attr_2(attr);
1159 int nr = sensor_attr->nr;
1160 int index = sensor_attr->index;
1161
1162 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1163}
1164
1165static ssize_t
1166store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1167 const char *buf, size_t count)
1168{
1169 struct i2c_client *client = to_i2c_client(dev);
1170 struct w83795_data *data = i2c_get_clientdata(client);
1171 struct sensor_device_attribute_2 *sensor_attr =
1172 to_sensor_dev_attr_2(attr);
1173 int nr = sensor_attr->nr;
1174 int index = sensor_attr->index;
1175 unsigned long val;
1176
1177 if (strict_strtoul(buf, 10, &val) < 0)
1178 return -EINVAL;
1179
1180 mutex_lock(&data->update_lock);
1181 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1182 data->sf4_reg[index][SF4_PWM][nr] = val;
1183 mutex_unlock(&data->update_lock);
1184
1185 return count;
1186}
1187
1188static ssize_t
1189show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1190{
1bb3450c 1191 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1192 struct sensor_device_attribute_2 *sensor_attr =
1193 to_sensor_dev_attr_2(attr);
1194 int nr = sensor_attr->nr;
1195 int index = sensor_attr->index;
1196
1197 return sprintf(buf, "%u\n",
1198 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1199}
1200
1201static ssize_t
1202store_sf4_temp(struct device *dev, struct device_attribute *attr,
1203 const char *buf, size_t count)
1204{
1205 struct i2c_client *client = to_i2c_client(dev);
1206 struct w83795_data *data = i2c_get_clientdata(client);
1207 struct sensor_device_attribute_2 *sensor_attr =
1208 to_sensor_dev_attr_2(attr);
1209 int nr = sensor_attr->nr;
1210 int index = sensor_attr->index;
1211 unsigned long val;
1212
1213 if (strict_strtoul(buf, 10, &val) < 0)
1214 return -EINVAL;
1215 val /= 1000;
1216
1217 mutex_lock(&data->update_lock);
1218 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1219 data->sf4_reg[index][SF4_TEMP][nr] = val;
1220 mutex_unlock(&data->update_lock);
1221
1222 return count;
1223}
1224
1225
1226static ssize_t
1227show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1228{
1229 struct sensor_device_attribute_2 *sensor_attr =
1230 to_sensor_dev_attr_2(attr);
1231 int nr = sensor_attr->nr;
1232 int index = sensor_attr->index;
1233 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1234 long temp = temp_from_reg(data->temp[index][nr]);
792d376b 1235
eb02755a 1236 if (nr == TEMP_READ)
a654b9d4 1237 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1238 return sprintf(buf, "%ld\n", temp);
1239}
1240
1241static ssize_t
1242store_temp(struct device *dev, struct device_attribute *attr,
1243 const char *buf, size_t count)
1244{
1245 struct sensor_device_attribute_2 *sensor_attr =
1246 to_sensor_dev_attr_2(attr);
1247 int nr = sensor_attr->nr;
1248 int index = sensor_attr->index;
1249 struct i2c_client *client = to_i2c_client(dev);
1250 struct w83795_data *data = i2c_get_clientdata(client);
1251 long tmp;
1252
1253 if (strict_strtol(buf, 10, &tmp) < 0)
1254 return -EINVAL;
1255
1256 mutex_lock(&data->update_lock);
1257 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1258 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1259 mutex_unlock(&data->update_lock);
1260 return count;
1261}
1262
1263
1264static ssize_t
1265show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1266{
21fc9775 1267 struct w83795_data *data = dev_get_drvdata(dev);
39deb699 1268 int tmp;
792d376b 1269
39deb699
JD		 1270 if (data->enable_dts & 2)
1271 tmp = 5;
1272 else
1273 tmp = 6;
792d376b
WS		 1274
1275 return sprintf(buf, "%d\n", tmp);
1276}
1277
1278static ssize_t
1279show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1280{
1281 struct sensor_device_attribute_2 *sensor_attr =
1282 to_sensor_dev_attr_2(attr);
1283 int index = sensor_attr->index;
1284 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1285 long temp = temp_from_reg(data->dts[index]);
792d376b 1286
a654b9d4 1287 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1288 return sprintf(buf, "%ld\n", temp);
1289}
1290
1291static ssize_t
1292show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1293{
1294 struct sensor_device_attribute_2 *sensor_attr =
1295 to_sensor_dev_attr_2(attr);
1296 int nr = sensor_attr->nr;
21fc9775 1297 struct w83795_data *data = dev_get_drvdata(dev);
dd127f5c 1298 long temp = temp_from_reg(data->dts_ext[nr]);
792d376b 1299
792d376b
WS		 1300 return sprintf(buf, "%ld\n", temp);
1301}
1302
1303static ssize_t
1304store_dts_ext(struct device *dev, struct device_attribute *attr,
1305 const char *buf, size_t count)
1306{
1307 struct sensor_device_attribute_2 *sensor_attr =
1308 to_sensor_dev_attr_2(attr);
1309 int nr = sensor_attr->nr;
1310 struct i2c_client *client = to_i2c_client(dev);
1311 struct w83795_data *data = i2c_get_clientdata(client);
1312 long tmp;
1313
1314 if (strict_strtol(buf, 10, &tmp) < 0)
1315 return -EINVAL;
1316
1317 mutex_lock(&data->update_lock);
1318 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1319 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1320 mutex_unlock(&data->update_lock);
1321 return count;
1322}
1323
1324
792d376b
WS		 1325static ssize_t
1326show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1327{
21fc9775 1328 struct w83795_data *data = dev_get_drvdata(dev);
792d376b
WS		 1329 struct sensor_device_attribute_2 *sensor_attr =
1330 to_sensor_dev_attr_2(attr);
1331 int index = sensor_attr->index;
39deb699 1332 int tmp;
792d376b 1333
39deb699
JD		 1334 if (data->temp_mode & (1 << index))
1335 tmp = 3; /* Thermal diode */
1336 else
1337 tmp = 4; /* Thermistor */
792d376b
WS		 1338
1339 return sprintf(buf, "%d\n", tmp);
1340}
1341
39deb699 1342/* Only for temp1-4 (temp5-6 can only be thermistor) */
792d376b
WS		 1343static ssize_t
1344store_temp_mode(struct device *dev, struct device_attribute *attr,
1345 const char *buf, size_t count)
1346{
1347 struct i2c_client *client = to_i2c_client(dev);
1348 struct w83795_data *data = i2c_get_clientdata(client);
1349 struct sensor_device_attribute_2 *sensor_attr =
1350 to_sensor_dev_attr_2(attr);
1351 int index = sensor_attr->index;
39deb699 1352 int reg_shift;
792d376b
WS		 1353 unsigned long val;
1354 u8 tmp;
792d376b
WS		 1355
1356 if (strict_strtoul(buf, 10, &val) < 0)
1357 return -EINVAL;
1358 if ((val != 4) && (val != 3))
1359 return -EINVAL;
792d376b
WS		 1360
1361 mutex_lock(&data->update_lock);
1362 if (val == 3) {
39deb699
JD		 1363 /* Thermal diode */
1364 val = 0x01;
792d376b
WS		 1365 data->temp_mode |= 1 << index;
1366 } else if (val == 4) {
39deb699
JD		 1367 /* Thermistor */
1368 val = 0x03;
1369 data->temp_mode &= ~(1 << index);
792d376b
WS		 1370 }
1371
39deb699
JD		 1372 reg_shift = 2 * index;
1373 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1374 tmp &= ~(0x03 << reg_shift);
1375 tmp |= val << reg_shift;
1376 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
792d376b
WS		 1377
1378 mutex_unlock(&data->update_lock);
1379 return count;
1380}
1381
1382
1383/* show/store VIN */
1384static ssize_t
1385show_in(struct device *dev, struct device_attribute *attr, char *buf)
1386{
1387 struct sensor_device_attribute_2 *sensor_attr =
1388 to_sensor_dev_attr_2(attr);
1389 int nr = sensor_attr->nr;
1390 int index = sensor_attr->index;
1391 struct w83795_data *data = w83795_update_device(dev);
1392 u16 val = data->in[index][nr];
1393 u8 lsb_idx;
1394
1395 switch (nr) {
1396 case IN_READ:
1397 /* calculate this value again by sensors as sensors3.conf */
1398 if ((index >= 17) &&
6f9dfd85 1399 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1400 val *= 8;
1401 break;
1402 case IN_MAX:
1403 case IN_LOW:
1404 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1405 val <<= 2;
1406 val |= (data->in_lsb[lsb_idx][nr] >>
5d2cd958 1407 IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
792d376b 1408 if ((index >= 17) &&
6f9dfd85 1409 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1410 val *= 8;
1411 break;
1412 }
1413 val = in_from_reg(index, val);
1414
1415 return sprintf(buf, "%d\n", val);
1416}
1417
1418static ssize_t
1419store_in(struct device *dev, struct device_attribute *attr,
1420 const char *buf, size_t count)
1421{
1422 struct sensor_device_attribute_2 *sensor_attr =
1423 to_sensor_dev_attr_2(attr);
1424 int nr = sensor_attr->nr;
1425 int index = sensor_attr->index;
1426 struct i2c_client *client = to_i2c_client(dev);
1427 struct w83795_data *data = i2c_get_clientdata(client);
1428 unsigned long val;
1429 u8 tmp;
1430 u8 lsb_idx;
1431
1432 if (strict_strtoul(buf, 10, &val) < 0)
1433 return -EINVAL;
1434 val = in_to_reg(index, val);
1435
1436 if ((index >= 17) &&
6f9dfd85 1437 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1438 val /= 8;
1439 val = SENSORS_LIMIT(val, 0, 0x3FF);
1440 mutex_lock(&data->update_lock);
1441
1442 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1443 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1444 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1445 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1446 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1447 data->in_lsb[lsb_idx][nr] = tmp;
1448
1449 tmp = (val >> 2) & 0xff;
1450 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1451 data->in[index][nr] = tmp;
1452
1453 mutex_unlock(&data->update_lock);
1454 return count;
1455}
1456
1457
1458static ssize_t
1459show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1460{
1461 struct sensor_device_attribute_2 *sensor_attr =
1462 to_sensor_dev_attr_2(attr);
1463 int nr = sensor_attr->nr;
1bb3450c 1464 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1465 u16 val = data->setup_pwm[nr];
1466
1467 switch (nr) {
1468 case SETUP_PWM_UPTIME:
1469 case SETUP_PWM_DOWNTIME:
1470 val = time_from_reg(val);
1471 break;
1472 }
1473
1474 return sprintf(buf, "%d\n", val);
1475}
1476
1477static ssize_t
1478store_sf_setup(struct device *dev, struct device_attribute *attr,
1479 const char *buf, size_t count)
1480{
1481 struct sensor_device_attribute_2 *sensor_attr =
1482 to_sensor_dev_attr_2(attr);
1483 int nr = sensor_attr->nr;
1484 struct i2c_client *client = to_i2c_client(dev);
1485 struct w83795_data *data = i2c_get_clientdata(client);
1486 unsigned long val;
1487
1488 if (strict_strtoul(buf, 10, &val) < 0)
1489 return -EINVAL;
1490
1491 switch (nr) {
1492 case SETUP_PWM_DEFAULT:
1493 val = SENSORS_LIMIT(val, 0, 0xff);
1494 break;
1495 case SETUP_PWM_UPTIME:
1496 case SETUP_PWM_DOWNTIME:
1497 val = time_to_reg(val);
1498 if (val == 0)
1499 return -EINVAL;
1500 break;
1501 }
1502
1503 mutex_lock(&data->update_lock);
1504 data->setup_pwm[nr] = val;
1505 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1506 mutex_unlock(&data->update_lock);
1507 return count;
1508}
1509
1510
1511#define NOT_USED -1
1512
0e256018
JD		 1513/* Don't change the attribute order, _max and _min are accessed by index
1514 * somewhere else in the code */
87df0dad 1515#define SENSOR_ATTR_IN(index) { \
792d376b
WS		 1516 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1517 IN_READ, index), \
1518 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1519 store_in, IN_MAX, index), \
1520 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1521 store_in, IN_LOW, index), \
1522 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1523 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1524 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1525 show_alarm_beep, store_beep, BEEP_ENABLE, \
87df0dad 1526 index + ((index > 14) ? 1 : 0)) }
792d376b 1527
87df0dad 1528#define SENSOR_ATTR_FAN(index) { \
792d376b
WS		 1529 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1530 NULL, FAN_INPUT, index - 1), \
1531 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1532 show_fan, store_fan_min, FAN_MIN, index - 1), \
1533 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1534 NULL, ALARM_STATUS, index + 31), \
1535 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1536 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
792d376b 1537
b5f6a90a 1538#define SENSOR_ATTR_PWM(index) { \
792d376b
WS		 1539 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1540 store_pwm, PWM_OUTPUT, index - 1), \
1541 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1542 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1543 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1544 show_pwm, store_pwm, PWM_START, index - 1), \
1545 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1546 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
01879a85
JD		 1547 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1548 show_pwm, store_pwm, PWM_FREQ, index - 1), \
792d376b 1549 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
b2cc528e
JD		 1550 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1551 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1552 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
792d376b 1553
87df0dad 1554#define SENSOR_ATTR_DTS(index) { \
792d376b
WS		 1555 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1556 show_dts_mode, NULL, NOT_USED, index - 7), \
1557 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1558 NULL, NOT_USED, index - 7), \
a0ce402f 1559 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1560 store_dts_ext, DTS_CRIT, NOT_USED), \
a0ce402f 1561 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1562 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
a0ce402f 1563 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1564 store_dts_ext, DTS_WARN, NOT_USED), \
a0ce402f 1565 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1566 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1567 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1568 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1569 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1570 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
792d376b 1571
87df0dad 1572#define SENSOR_ATTR_TEMP(index) { \
39deb699 1573 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
792d376b
WS		 1574 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1575 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1576 NULL, TEMP_READ, index - 1), \
a0ce402f 1577 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1578 store_temp, TEMP_CRIT, index - 1), \
a0ce402f 1579 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1580 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
a0ce402f 1581 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1582 store_temp, TEMP_WARN, index - 1), \
a0ce402f 1583 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1584 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1585 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1586 show_alarm_beep, NULL, ALARM_STATUS, \
1587 index + (index > 4 ? 11 : 17)), \
1588 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1589 show_alarm_beep, store_beep, BEEP_ENABLE, \
1590 index + (index > 4 ? 11 : 17)), \
1591 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1592 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1593 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1594 show_temp_pwm_enable, store_temp_pwm_enable, \
1595 TEMP_PWM_ENABLE, index - 1), \
1596 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1597 show_temp_pwm_enable, store_temp_pwm_enable, \
1598 TEMP_PWM_FAN_MAP, index - 1), \
1599 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1600 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
a0ce402f 1601 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
792d376b 1602 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
a0ce402f 1603 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
792d376b
WS		 1604 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1605 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1606 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1607 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1608 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1609 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1610 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1611 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1612 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1613 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1614 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1615 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1616 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1617 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1618 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1619 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1620 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1621 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1622 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1623 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1624 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1625 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1626 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1627 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1628 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1629 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1630 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1631 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1632 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1633 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
87df0dad 1634 show_sf4_temp, store_sf4_temp, 6, index - 1) }
792d376b
WS		 1635
1636
87df0dad 1637static struct sensor_device_attribute_2 w83795_in[][5] = {
792d376b
WS		 1638 SENSOR_ATTR_IN(0),
1639 SENSOR_ATTR_IN(1),
1640 SENSOR_ATTR_IN(2),
1641 SENSOR_ATTR_IN(3),
1642 SENSOR_ATTR_IN(4),
1643 SENSOR_ATTR_IN(5),
1644 SENSOR_ATTR_IN(6),
1645 SENSOR_ATTR_IN(7),
1646 SENSOR_ATTR_IN(8),
1647 SENSOR_ATTR_IN(9),
1648 SENSOR_ATTR_IN(10),
1649 SENSOR_ATTR_IN(11),
1650 SENSOR_ATTR_IN(12),
1651 SENSOR_ATTR_IN(13),
1652 SENSOR_ATTR_IN(14),
1653 SENSOR_ATTR_IN(15),
1654 SENSOR_ATTR_IN(16),
1655 SENSOR_ATTR_IN(17),
1656 SENSOR_ATTR_IN(18),
1657 SENSOR_ATTR_IN(19),
1658 SENSOR_ATTR_IN(20),
1659};
1660
86ef4d2f 1661static const struct sensor_device_attribute_2 w83795_fan[][4] = {
792d376b
WS		 1662 SENSOR_ATTR_FAN(1),
1663 SENSOR_ATTR_FAN(2),
1664 SENSOR_ATTR_FAN(3),
1665 SENSOR_ATTR_FAN(4),
1666 SENSOR_ATTR_FAN(5),
1667 SENSOR_ATTR_FAN(6),
1668 SENSOR_ATTR_FAN(7),
1669 SENSOR_ATTR_FAN(8),
1670 SENSOR_ATTR_FAN(9),
1671 SENSOR_ATTR_FAN(10),
1672 SENSOR_ATTR_FAN(11),
1673 SENSOR_ATTR_FAN(12),
1674 SENSOR_ATTR_FAN(13),
1675 SENSOR_ATTR_FAN(14),
1676};
1677
86ef4d2f 1678static const struct sensor_device_attribute_2 w83795_temp[][29] = {
792d376b
WS		 1679 SENSOR_ATTR_TEMP(1),
1680 SENSOR_ATTR_TEMP(2),
1681 SENSOR_ATTR_TEMP(3),
1682 SENSOR_ATTR_TEMP(4),
1683 SENSOR_ATTR_TEMP(5),
1684 SENSOR_ATTR_TEMP(6),
1685};
1686
86ef4d2f 1687static const struct sensor_device_attribute_2 w83795_dts[][8] = {
792d376b
WS		 1688 SENSOR_ATTR_DTS(7),
1689 SENSOR_ATTR_DTS(8),
1690 SENSOR_ATTR_DTS(9),
1691 SENSOR_ATTR_DTS(10),
1692 SENSOR_ATTR_DTS(11),
1693 SENSOR_ATTR_DTS(12),
1694 SENSOR_ATTR_DTS(13),
1695 SENSOR_ATTR_DTS(14),
1696};
1697
86ef4d2f 1698static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
b5f6a90a
JD		 1699 SENSOR_ATTR_PWM(1),
1700 SENSOR_ATTR_PWM(2),
792d376b
WS		 1701 SENSOR_ATTR_PWM(3),
1702 SENSOR_ATTR_PWM(4),
1703 SENSOR_ATTR_PWM(5),
1704 SENSOR_ATTR_PWM(6),
1705 SENSOR_ATTR_PWM(7),
1706 SENSOR_ATTR_PWM(8),
1707};
1708
86ef4d2f 1709static const struct sensor_device_attribute_2 sda_single_files[] = {
792d376b
WS		 1710 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1711 store_chassis_clear, ALARM_STATUS, 46),
02728ffe
JD		 1712 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1713 store_beep, BEEP_ENABLE, 47),
792d376b
WS		 1714 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1715 store_fanin, FANIN_TOL, NOT_USED),
1716 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1717 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1718 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1719 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1720 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1721 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1722};
1723
1724/*
1725 * Driver interface
1726 */
1727
1728static void w83795_init_client(struct i2c_client *client)
1729{
01879a85
JD		 1730 struct w83795_data *data = i2c_get_clientdata(client);
1731 static const u16 clkin[4] = { /* in kHz */
1732 14318, 24000, 33333, 48000
1733 };
80646b95
JD		 1734 u8 config;
1735
792d376b
WS		 1736 if (reset)
1737 w83795_write(client, W83795_REG_CONFIG, 0x80);
1738
80646b95
JD		 1739 /* Start monitoring if needed */
1740 config = w83795_read(client, W83795_REG_CONFIG);
1741 if (!(config & W83795_REG_CONFIG_START)) {
1742 dev_info(&client->dev, "Enabling monitoring operations\n");
1743 w83795_write(client, W83795_REG_CONFIG,
1744 config | W83795_REG_CONFIG_START);
1745 }
01879a85
JD		 1746
1747 data->clkin = clkin[(config >> 3) & 0x3];
1748 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
792d376b
WS		 1749}
1750
2be381de
JD		 1751static int w83795_get_device_id(struct i2c_client *client)
1752{
1753 int device_id;
1754
1755 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1756
1757 /* Special case for rev. A chips; can't be checked first because later
1758 revisions emulate this for compatibility */
1759 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1760 int alt_id;
1761
1762 alt_id = i2c_smbus_read_byte_data(client,
1763 W83795_REG_DEVICEID_A);
1764 if (alt_id == 0x50)
1765 device_id = alt_id;
1766 }
1767
1768 return device_id;
1769}
1770
792d376b
WS		 1771/* Return 0 if detection is successful, -ENODEV otherwise */
1772static int w83795_detect(struct i2c_client *client,
1773 struct i2c_board_info *info)
1774{
2be381de 1775 int bank, vendor_id, device_id, expected, i2c_addr, config;
792d376b
WS		 1776 struct i2c_adapter *adapter = client->adapter;
1777 unsigned short address = client->addr;
093d1a47 1778 const char *chip_name;
792d376b
WS		 1779
1780 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1781 return -ENODEV;
1782 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2be381de
JD		 1783 if (bank < 0 || (bank & 0x7c)) {
1784 dev_dbg(&adapter->dev,
1785 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1786 address, "bank");
1787 return -ENODEV;
1788 }
792d376b 1789
792d376b 1790 /* Check Nuvoton vendor ID */
2be381de
JD		 1791 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1792 expected = bank & 0x80 ? 0x5c : 0xa3;
1793 if (vendor_id != expected) {
1794 dev_dbg(&adapter->dev,
1795 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1796 address, "vendor id");
792d376b
WS		 1797 return -ENODEV;
1798 }
1799
2be381de
JD		 1800 /* Check device ID */
1801 device_id = w83795_get_device_id(client) |
1802 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1803 if ((device_id >> 4) != 0x795) {
1804 dev_dbg(&adapter->dev,
1805 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1806 address, "device id\n");
792d376b
WS		 1807 return -ENODEV;
1808 }
1809
2be381de
JD		 1810 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1811 should match */
1812 if ((bank & 0x07) == 0) {
1813 i2c_addr = i2c_smbus_read_byte_data(client,
1814 W83795_REG_I2C_ADDR);
1815 if ((i2c_addr & 0x7f) != address) {
1816 dev_dbg(&adapter->dev,
1817 "w83795: Detection failed at addr 0x%02hx, "
1818 "check %s\n", address, "i2c addr");
1819 return -ENODEV;
1820 }
792d376b
WS		 1821 }
1822
093d1a47
JD		 1823 /* Check 795 chip type: 795G or 795ADG
1824 Usually we don't write to chips during detection, but here we don't
1825 quite have the choice; hopefully it's OK, we are about to return
1826 success anyway */
1827 if ((bank & 0x07) != 0)
1828 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1829 bank & ~0x07);
2be381de
JD		 1830 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1831 if (config & W83795_REG_CONFIG_CONFIG48)
093d1a47 1832 chip_name = "w83795adg";
2be381de 1833 else
093d1a47 1834 chip_name = "w83795g";
792d376b 1835
093d1a47 1836 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
2be381de
JD		 1837 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1838 'A' + (device_id & 0xf), address);
792d376b
WS		 1839
1840 return 0;
1841}
1842
6f3dcde9
JD		 1843static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1844 const struct device_attribute *))
892514a6
JD		 1845{
1846 struct w83795_data *data = dev_get_drvdata(dev);
87df0dad 1847 int err, i, j;
892514a6
JD		 1848
1849 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
87df0dad 1850 if (!(data->has_in & (1 << i)))
892514a6 1851 continue;
87df0dad
JD		 1852 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1853 err = fn(dev, &w83795_in[i][j].dev_attr);
1854 if (err)
1855 return err;
1856 }
892514a6
JD		 1857 }
1858
1859 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
87df0dad 1860 if (!(data->has_fan & (1 << i)))
892514a6 1861 continue;
87df0dad
JD		 1862 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1863 err = fn(dev, &w83795_fan[i][j].dev_attr);
1864 if (err)
1865 return err;
1866 }
892514a6
JD		 1867 }
1868
1869 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
6f3dcde9 1870 err = fn(dev, &sda_single_files[i].dev_attr);
892514a6
JD		 1871 if (err)
1872 return err;
1873 }
1874
b5f6a90a
JD		 1875 for (i = 0; i < data->has_pwm; i++) {
1876 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1877 err = fn(dev, &w83795_pwm[i][j].dev_attr);
892514a6
JD		 1878 if (err)
1879 return err;
1880 }
1881 }
1882
1883 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
87df0dad 1884 if (!(data->has_temp & (1 << i)))
892514a6 1885 continue;
87df0dad
JD		 1886 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1887 err = fn(dev, &w83795_temp[i][j].dev_attr);
1888 if (err)
1889 return err;
1890 }
892514a6
JD		 1891 }
1892
eb02755a 1893 if (data->enable_dts) {
892514a6 1894 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
87df0dad 1895 if (!(data->has_dts & (1 << i)))
892514a6 1896 continue;
87df0dad
JD		 1897 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1898 err = fn(dev, &w83795_dts[i][j].dev_attr);
1899 if (err)
1900 return err;
1901 }
892514a6
JD		 1902 }
1903 }
1904
892514a6
JD		 1905 return 0;
1906}
1907
6f3dcde9
JD		 1908/* We need a wrapper that fits in w83795_handle_files */
1909static int device_remove_file_wrapper(struct device *dev,
1910 const struct device_attribute *attr)
2fa09878 1911{
6f3dcde9
JD		 1912 device_remove_file(dev, attr);
1913 return 0;
2fa09878
JD		 1914}
1915
0e256018
JD		 1916static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1917{
1918 struct w83795_data *data = i2c_get_clientdata(client);
1919 u8 vid_ctl;
1920 int i, err_max, err_min;
1921
1922 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1923
1924 /* Return immediately if VRM isn't configured */
1925 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1926 return;
1927
1928 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1929 for (i = 0; i < 2; i++) {
1930 if (!(data->has_dyn_in & (1 << i)))
1931 continue;
1932
1933 /* Voltage limits in dynamic mode, switch to read-only */
1934 err_max = sysfs_chmod_file(&client->dev.kobj,
1935 &w83795_in[i][2].dev_attr.attr,
1936 S_IRUGO);
1937 err_min = sysfs_chmod_file(&client->dev.kobj,
1938 &w83795_in[i][3].dev_attr.attr,
1939 S_IRUGO);
1940 if (err_max || err_min)
1941 dev_warn(&client->dev, "Failed to set in%d limits "
1942 "read-only (%d, %d)\n", i, err_max, err_min);
1943 else
1944 dev_info(&client->dev, "in%d limits set dynamically "
1945 "from VID\n", i);
1946 }
1947}
1948
71caf46f
JD		 1949/* Check pins that can be used for either temperature or voltage monitoring */
1950static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1951 int temp_chan, int in_chan)
1952{
1953 /* config is a 2-bit value */
1954 switch (config) {
1955 case 0x2: /* Voltage monitoring */
1956 data->has_in |= 1 << in_chan;
1957 break;
1958 case 0x1: /* Thermal diode */
1959 if (temp_chan >= 4)
1960 break;
1961 data->temp_mode |= 1 << temp_chan;
1962 /* fall through */
1963 case 0x3: /* Thermistor */
1964 data->has_temp |= 1 << temp_chan;
1965 break;
1966 }
1967}
1968
792d376b
WS		 1969static int w83795_probe(struct i2c_client *client,
1970 const struct i2c_device_id *id)
1971{
1972 int i;
1973 u8 tmp;
1974 struct device *dev = &client->dev;
1975 struct w83795_data *data;
71caf46f 1976 int err;
792d376b
WS		 1977
1978 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1979 if (!data) {
1980 err = -ENOMEM;
1981 goto exit;
1982 }
1983
1984 i2c_set_clientdata(client, data);
093d1a47 1985 data->chip_type = id->driver_data;
792d376b
WS		 1986 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1987 mutex_init(&data->update_lock);
1988
1989 /* Initialize the chip */
1990 w83795_init_client(client);
1991
71caf46f
JD		 1992 /* Check which voltages and fans are present */
1993 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
1994 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
1995 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
1996 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
792d376b 1997
71caf46f 1998 /* Check which analog temperatures and extra voltages are present */
792d376b
WS		 1999 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
2000 if (tmp & 0x20)
2001 data->enable_dts = 1;
71caf46f
JD		 2002 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
2003 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
792d376b 2004 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
71caf46f
JD		 2005 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
2006 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
2007 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
2008 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
792d376b
WS		 2009
2010 /* Check DTS enable status */
71caf46f 2011 if (data->enable_dts) {
792d376b
WS		 2012 if (1 & w83795_read(client, W83795_REG_DTSC))
2013 data->enable_dts |= 2;
2014 data->has_dts = w83795_read(client, W83795_REG_DTSE);
2015 }
2016
54891a3c
JD		 2017 /* Report PECI Tbase values */
2018 if (data->enable_dts == 1) {
2019 for (i = 0; i < 8; i++) {
2020 if (!(data->has_dts & (1 << i)))
2021 continue;
2022 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
2023 dev_info(&client->dev,
2024 "PECI agent %d Tbase temperature: %u\n",
2025 i + 1, (unsigned int)tmp & 0x7f);
2026 }
2027 }
2028
792d376b 2029 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
792d376b
WS		 2030
2031 /* pwm and smart fan */
2032 if (data->chip_type == w83795g)
2033 data->has_pwm = 8;
2034 else
2035 data->has_pwm = 2;
792d376b 2036
6f3dcde9 2037 err = w83795_handle_files(dev, device_create_file);
892514a6
JD		 2038 if (err)
2039 goto exit_remove;
792d376b 2040
0e256018
JD		 2041 if (data->chip_type == w83795g)
2042 w83795_check_dynamic_in_limits(client);
2043
792d376b
WS		 2044 data->hwmon_dev = hwmon_device_register(dev);
2045 if (IS_ERR(data->hwmon_dev)) {
2046 err = PTR_ERR(data->hwmon_dev);
2047 goto exit_remove;
2048 }
2049
2050 return 0;
2051
792d376b 2052exit_remove:
6f3dcde9 2053 w83795_handle_files(dev, device_remove_file_wrapper);
792d376b
WS		 2054 kfree(data);
2055exit:
2056 return err;
2057}
2058
2059static int w83795_remove(struct i2c_client *client)
2060{
2061 struct w83795_data *data = i2c_get_clientdata(client);
792d376b
WS		 2062
2063 hwmon_device_unregister(data->hwmon_dev);
6f3dcde9 2064 w83795_handle_files(&client->dev, device_remove_file_wrapper);
792d376b
WS		 2065 kfree(data);
2066
2067 return 0;
2068}
2069
2070
2071static const struct i2c_device_id w83795_id[] = {
093d1a47
JD		 2072 { "w83795g", w83795g },
2073 { "w83795adg", w83795adg },
792d376b
WS		 2074 { }
2075};
2076MODULE_DEVICE_TABLE(i2c, w83795_id);
2077
2078static struct i2c_driver w83795_driver = {
2079 .driver = {
2080 .name = "w83795",
2081 },
2082 .probe = w83795_probe,
2083 .remove = w83795_remove,
2084 .id_table = w83795_id,
2085
2086 .class = I2C_CLASS_HWMON,
2087 .detect = w83795_detect,
2088 .address_list = normal_i2c,
2089};
2090
2091static int __init sensors_w83795_init(void)
2092{
2093 return i2c_add_driver(&w83795_driver);
2094}
2095
2096static void __exit sensors_w83795_exit(void)
2097{
2098 i2c_del_driver(&w83795_driver);
2099}
2100
e3760b43 2101MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
315bacfd 2102MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
792d376b
WS		 2103MODULE_LICENSE("GPL");
2104
2105module_init(sensors_w83795_init);
2106module_exit(sensors_w83795_exit);
Linux 6.x block layer and io_uring tree(s)