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hwmon: (w83795) Expose fan control method
[linux-2.6-block.git] / drivers / hwmon / w83795.c
CommitLineData
792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
e3760b43 5 * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
792d376b
WS		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation - version 2.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301 USA.
20 *
21 * Supports following chips:
22 *
23 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
24 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
25 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/i2c.h>
33#include <linux/hwmon.h>
34#include <linux/hwmon-sysfs.h>
35#include <linux/err.h>
36#include <linux/mutex.h>
37#include <linux/delay.h>
38
39/* Addresses to scan */
86ef4d2f
JD		 40static const unsigned short normal_i2c[] = {
41 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
42};
792d376b 43
792d376b
WS		 44
45static int reset;
46module_param(reset, bool, 0);
47MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
48
49
50#define W83795_REG_BANKSEL 0x00
51#define W83795_REG_VENDORID 0xfd
52#define W83795_REG_CHIPID 0xfe
53#define W83795_REG_DEVICEID 0xfb
2be381de 54#define W83795_REG_DEVICEID_A 0xff
792d376b
WS		 55
56#define W83795_REG_I2C_ADDR 0xfc
57#define W83795_REG_CONFIG 0x01
58#define W83795_REG_CONFIG_CONFIG48 0x04
80646b95 59#define W83795_REG_CONFIG_START 0x01
792d376b
WS		 60
61/* Multi-Function Pin Ctrl Registers */
62#define W83795_REG_VOLT_CTRL1 0x02
63#define W83795_REG_VOLT_CTRL2 0x03
64#define W83795_REG_TEMP_CTRL1 0x04
65#define W83795_REG_TEMP_CTRL2 0x05
66#define W83795_REG_FANIN_CTRL1 0x06
67#define W83795_REG_FANIN_CTRL2 0x07
68#define W83795_REG_VMIGB_CTRL 0x08
69
792d376b
WS		 70#define TEMP_READ 0
71#define TEMP_CRIT 1
72#define TEMP_CRIT_HYST 2
73#define TEMP_WARN 3
74#define TEMP_WARN_HYST 4
75/* only crit and crit_hyst affect real-time alarm status
76 * current crit crit_hyst warn warn_hyst */
86ef4d2f 77static const u16 W83795_REG_TEMP[][5] = {
792d376b
WS		 78 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
79 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
80 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
81 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
82 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
83 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
84};
85
86#define IN_READ 0
87#define IN_MAX 1
88#define IN_LOW 2
89static const u16 W83795_REG_IN[][3] = {
90 /* Current, HL, LL */
91 {0x10, 0x70, 0x71}, /* VSEN1 */
92 {0x11, 0x72, 0x73}, /* VSEN2 */
93 {0x12, 0x74, 0x75}, /* VSEN3 */
94 {0x13, 0x76, 0x77}, /* VSEN4 */
95 {0x14, 0x78, 0x79}, /* VSEN5 */
96 {0x15, 0x7a, 0x7b}, /* VSEN6 */
97 {0x16, 0x7c, 0x7d}, /* VSEN7 */
98 {0x17, 0x7e, 0x7f}, /* VSEN8 */
99 {0x18, 0x80, 0x81}, /* VSEN9 */
100 {0x19, 0x82, 0x83}, /* VSEN10 */
101 {0x1A, 0x84, 0x85}, /* VSEN11 */
102 {0x1B, 0x86, 0x87}, /* VTT */
103 {0x1C, 0x88, 0x89}, /* 3VDD */
104 {0x1D, 0x8a, 0x8b}, /* 3VSB */
105 {0x1E, 0x8c, 0x8d}, /* VBAT */
106 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
107 {0x20, 0xaa, 0xab}, /* VSEN13 */
108 {0x21, 0x96, 0x97}, /* VSEN14 */
109 {0x22, 0x9a, 0x9b}, /* VSEN15 */
110 {0x23, 0x9e, 0x9f}, /* VSEN16 */
111 {0x24, 0xa2, 0xa3}, /* VSEN17 */
112};
113#define W83795_REG_VRLSB 0x3C
792d376b
WS		 114
115static const u8 W83795_REG_IN_HL_LSB[] = {
116 0x8e, /* VSEN1-4 */
117 0x90, /* VSEN5-8 */
118 0x92, /* VSEN9-11 */
119 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
120 0xa8, /* VSEN12 */
121 0xac, /* VSEN13 */
122 0x98, /* VSEN14 */
123 0x9c, /* VSEN15 */
124 0xa0, /* VSEN16 */
125 0xa4, /* VSEN17 */
126};
127
128#define IN_LSB_REG(index, type) \
129 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
130 : (W83795_REG_IN_HL_LSB[(index)] + 1))
131
792d376b
WS		 132#define IN_LSB_SHIFT 0
133#define IN_LSB_IDX 1
134static const u8 IN_LSB_SHIFT_IDX[][2] = {
135 /* High/Low LSB shift, LSB No. */
136 {0x00, 0x00}, /* VSEN1 */
137 {0x02, 0x00}, /* VSEN2 */
138 {0x04, 0x00}, /* VSEN3 */
139 {0x06, 0x00}, /* VSEN4 */
140 {0x00, 0x01}, /* VSEN5 */
141 {0x02, 0x01}, /* VSEN6 */
142 {0x04, 0x01}, /* VSEN7 */
143 {0x06, 0x01}, /* VSEN8 */
144 {0x00, 0x02}, /* VSEN9 */
145 {0x02, 0x02}, /* VSEN10 */
146 {0x04, 0x02}, /* VSEN11 */
147 {0x00, 0x03}, /* VTT */
148 {0x02, 0x03}, /* 3VDD */
149 {0x04, 0x03}, /* 3VSB */
150 {0x06, 0x03}, /* VBAT */
151 {0x06, 0x04}, /* VSEN12 */
152 {0x06, 0x05}, /* VSEN13 */
153 {0x06, 0x06}, /* VSEN14 */
154 {0x06, 0x07}, /* VSEN15 */
155 {0x06, 0x08}, /* VSEN16 */
156 {0x06, 0x09}, /* VSEN17 */
157};
158
159
792d376b
WS		 160#define W83795_REG_FAN(index) (0x2E + (index))
161#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
162#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
163#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
7eb8d508 164 (((index) & 1) ? 4 : 0)
792d376b
WS		 165
166#define W83795_REG_VID_CTRL 0x6A
167
792d376b
WS		 168#define W83795_REG_ALARM(index) (0x41 + (index))
169#define W83795_REG_BEEP(index) (0x50 + (index))
170
171#define W83795_REG_CLR_CHASSIS 0x4D
172
173
792d376b
WS		 174#define W83795_REG_FCMS1 0x201
175#define W83795_REG_FCMS2 0x208
176#define W83795_REG_TFMR(index) (0x202 + (index))
177#define W83795_REG_FOMC 0x20F
792d376b
WS		 178
179#define W83795_REG_TSS(index) (0x209 + (index))
180
181#define PWM_OUTPUT 0
fd7f82b8
JD		 182#define PWM_FREQ 1
183#define PWM_START 2
184#define PWM_NONSTOP 3
185#define PWM_STOP_TIME 4
186#define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
792d376b 187
792d376b
WS		 188#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
189#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
190#define W83795_REG_TFTS 0x250
191
192#define TEMP_PWM_TTTI 0
193#define TEMP_PWM_CTFS 1
194#define TEMP_PWM_HCT 2
195#define TEMP_PWM_HOT 3
196#define W83795_REG_TTTI(index) (0x260 + (index))
197#define W83795_REG_CTFS(index) (0x268 + (index))
198#define W83795_REG_HT(index) (0x270 + (index))
199
200#define SF4_TEMP 0
201#define SF4_PWM 1
202#define W83795_REG_SF4_TEMP(temp_num, index) \
203 (0x280 + 0x10 * (temp_num) + (index))
204#define W83795_REG_SF4_PWM(temp_num, index) \
205 (0x288 + 0x10 * (temp_num) + (index))
206
207#define W83795_REG_DTSC 0x301
208#define W83795_REG_DTSE 0x302
209#define W83795_REG_DTS(index) (0x26 + (index))
54891a3c 210#define W83795_REG_PECI_TBASE(index) (0x320 + (index))
792d376b
WS		 211
212#define DTS_CRIT 0
213#define DTS_CRIT_HYST 1
214#define DTS_WARN 2
215#define DTS_WARN_HYST 3
216#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
217
218#define SETUP_PWM_DEFAULT 0
219#define SETUP_PWM_UPTIME 1
220#define SETUP_PWM_DOWNTIME 2
221#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
222
223static inline u16 in_from_reg(u8 index, u16 val)
224{
49c7347a
JD		 225 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
226 if (index >= 12 && index <= 14)
792d376b
WS		 227 return val * 6;
228 else
229 return val * 2;
230}
231
232static inline u16 in_to_reg(u8 index, u16 val)
233{
49c7347a 234 if (index >= 12 && index <= 14)
792d376b
WS		 235 return val / 6;
236 else
237 return val / 2;
238}
239
240static inline unsigned long fan_from_reg(u16 val)
241{
6c82b2f3 242 if ((val == 0xfff) || (val == 0))
792d376b
WS		 243 return 0;
244 return 1350000UL / val;
245}
246
247static inline u16 fan_to_reg(long rpm)
248{
249 if (rpm <= 0)
250 return 0x0fff;
251 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
252}
253
254static inline unsigned long time_from_reg(u8 reg)
255{
256 return reg * 100;
257}
258
259static inline u8 time_to_reg(unsigned long val)
260{
261 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
262}
263
264static inline long temp_from_reg(s8 reg)
265{
266 return reg * 1000;
267}
268
269static inline s8 temp_to_reg(long val, s8 min, s8 max)
270{
dd127f5c 271 return SENSORS_LIMIT(val / 1000, min, max);
792d376b
WS		 272}
273
01879a85
JD		 274static const u16 pwm_freq_cksel0[16] = {
275 1024, 512, 341, 256, 205, 171, 146, 128,
276 85, 64, 32, 16, 8, 4, 2, 1
277};
278
279static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
280{
281 unsigned long base_clock;
282
283 if (reg & 0x80) {
284 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
285 return base_clock / ((reg & 0x7f) + 1);
286 } else
287 return pwm_freq_cksel0[reg & 0x0f];
288}
289
290static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
291{
292 unsigned long base_clock;
293 u8 reg0, reg1;
294 unsigned long best0, best1;
295
296 /* Best fit for cksel = 0 */
297 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
298 if (val > (pwm_freq_cksel0[reg0] +
299 pwm_freq_cksel0[reg0 + 1]) / 2)
300 break;
301 }
302 if (val < 375) /* cksel = 1 can't beat this */
303 return reg0;
304 best0 = pwm_freq_cksel0[reg0];
305
306 /* Best fit for cksel = 1 */
307 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
308 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
309 best1 = base_clock / reg1;
310 reg1 = 0x80 | (reg1 - 1);
311
312 /* Choose the closest one */
313 if (abs(val - best0) > abs(val - best1))
314 return reg1;
315 else
316 return reg0;
317}
792d376b
WS		 318
319enum chip_types {w83795g, w83795adg};
320
321struct w83795_data {
322 struct device *hwmon_dev;
323 struct mutex update_lock;
324 unsigned long last_updated; /* In jiffies */
325 enum chip_types chip_type;
326
327 u8 bank;
328
329 u32 has_in; /* Enable monitor VIN or not */
0e256018 330 u8 has_dyn_in; /* Only in2-0 can have this */
792d376b
WS		 331 u16 in[21][3]; /* Register value, read/high/low */
332 u8 in_lsb[10][3]; /* LSB Register value, high/low */
333 u8 has_gain; /* has gain: in17-20 * 8 */
334
335 u16 has_fan; /* Enable fan14-1 or not */
336 u16 fan[14]; /* Register value combine */
337 u16 fan_min[14]; /* Register value combine */
338
339 u8 has_temp; /* Enable monitor temp6-1 or not */
dd127f5c 340 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
792d376b 341 u8 temp_read_vrlsb[6];
39deb699 342 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
792d376b
WS		 343 u8 temp_src[3]; /* Register value */
344
345 u8 enable_dts; /* Enable PECI and SB-TSI,
346 * bit 0: =1 enable, =0 disable,
347 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
348 u8 has_dts; /* Enable monitor DTS temp */
dd127f5c 349 s8 dts[8]; /* Register value */
792d376b 350 u8 dts_read_vrlsb[8]; /* Register value */
dd127f5c 351 s8 dts_ext[4]; /* Register value */
792d376b
WS		 352
353 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
354 * no config register, only affected by chip
355 * type */
fd7f82b8
JD		 356 u8 pwm[8][5]; /* Register value, output, freq, start,
357 * non stop, stop time */
01879a85 358 u16 clkin; /* CLKIN frequency in kHz */
792d376b
WS		 359 u8 pwm_fcms[2]; /* Register value */
360 u8 pwm_tfmr[6]; /* Register value */
361 u8 pwm_fomc; /* Register value */
362
363 u16 target_speed[8]; /* Register value, target speed for speed
364 * cruise */
365 u8 tol_speed; /* tolerance of target speed */
366 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
367 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
368
369 u8 setup_pwm[3]; /* Register value */
370
371 u8 alarms[6]; /* Register value */
372 u8 beeps[6]; /* Register value */
792d376b
WS		 373
374 char valid;
2ae61de9 375 char valid_limits;
1bb3450c 376 char valid_pwm_config;
792d376b
WS		 377};
378
379/*
380 * Hardware access
b2469f42 381 * We assume that nobdody can change the bank outside the driver.
792d376b
WS		 382 */
383
b2469f42
JD		 384/* Must be called with data->update_lock held, except during initialization */
385static int w83795_set_bank(struct i2c_client *client, u8 bank)
792d376b
WS		 386{
387 struct w83795_data *data = i2c_get_clientdata(client);
b2469f42
JD		 388 int err;
389
390 /* If the same bank is already set, nothing to do */
391 if ((data->bank & 0x07) == bank)
392 return 0;
393
394 /* Change to new bank, preserve all other bits */
395 bank |= data->bank & ~0x07;
396 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
397 if (err < 0) {
398 dev_err(&client->dev,
399 "Failed to set bank to %d, err %d\n",
400 (int)bank, err);
401 return err;
792d376b 402 }
b2469f42
JD		 403 data->bank = bank;
404
405 return 0;
792d376b
WS		 406}
407
408/* Must be called with data->update_lock held, except during initialization */
b2469f42 409static u8 w83795_read(struct i2c_client *client, u16 reg)
792d376b 410{
b2469f42
JD		 411 int err;
412
413 err = w83795_set_bank(client, reg >> 8);
414 if (err < 0)
415 return 0x00; /* Arbitrary */
416
417 err = i2c_smbus_read_byte_data(client, reg & 0xff);
418 if (err < 0) {
419 dev_err(&client->dev,
420 "Failed to read from register 0x%03x, err %d\n",
421 (int)reg, err);
422 return 0x00; /* Arbitrary */
792d376b 423 }
b2469f42
JD		 424 return err;
425}
792d376b 426
b2469f42
JD		 427/* Must be called with data->update_lock held, except during initialization */
428static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
429{
430 int err;
431
432 err = w83795_set_bank(client, reg >> 8);
433 if (err < 0)
434 return err;
435
436 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
437 if (err < 0)
438 dev_err(&client->dev,
439 "Failed to write to register 0x%03x, err %d\n",
440 (int)reg, err);
441 return err;
792d376b
WS		 442}
443
0d7237bf
JD		 444static void w83795_update_limits(struct i2c_client *client)
445{
446 struct w83795_data *data = i2c_get_clientdata(client);
447 int i, limit;
448
449 /* Read the voltage limits */
450 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
451 if (!(data->has_in & (1 << i)))
452 continue;
453 data->in[i][IN_MAX] =
454 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
455 data->in[i][IN_LOW] =
456 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
457 }
458 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
459 if ((i == 2 && data->chip_type == w83795adg) ||
460 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
461 continue;
462 data->in_lsb[i][IN_MAX] =
463 w83795_read(client, IN_LSB_REG(i, IN_MAX));
464 data->in_lsb[i][IN_LOW] =
465 w83795_read(client, IN_LSB_REG(i, IN_LOW));
466 }
467
468 /* Read the fan limits */
469 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
470 u8 lsb;
471
472 /* Each register contains LSB for 2 fans, but we want to
473 * read it only once to save time */
474 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
475 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
476
477 if (!(data->has_fan & (1 << i)))
478 continue;
479 data->fan_min[i] =
480 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
481 data->fan_min[i] |=
482 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
483 }
484
485 /* Read the temperature limits */
486 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
487 if (!(data->has_temp & (1 << i)))
488 continue;
489 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
490 data->temp[i][limit] =
491 w83795_read(client, W83795_REG_TEMP[i][limit]);
492 }
493
494 /* Read the DTS limits */
eb02755a 495 if (data->enable_dts) {
0d7237bf
JD		 496 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
497 data->dts_ext[limit] =
498 w83795_read(client, W83795_REG_DTS_EXT(limit));
499 }
500
501 /* Read beep settings */
502 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
503 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2ae61de9
JD		 504
505 data->valid_limits = 1;
0d7237bf
JD		 506}
507
1bb3450c 508static struct w83795_data *w83795_update_pwm_config(struct device *dev)
0d7237bf 509{
1bb3450c 510 struct i2c_client *client = to_i2c_client(dev);
0d7237bf
JD		 511 struct w83795_data *data = i2c_get_clientdata(client);
512 int i, tmp;
513
1bb3450c
JD		 514 mutex_lock(&data->update_lock);
515
516 if (data->valid_pwm_config)
517 goto END;
518
0d7237bf
JD		 519 /* Read temperature source selection */
520 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
521 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
522
523 /* Read automatic fan speed control settings */
524 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
525 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
526 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
527 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
528 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
529 for (i = 0; i < data->has_pwm; i++) {
530 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
531 data->pwm[i][tmp] =
532 w83795_read(client, W83795_REG_PWM(i, tmp));
533 }
534 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
535 data->target_speed[i] =
536 w83795_read(client, W83795_REG_FTSH(i)) << 4;
537 data->target_speed[i] |=
538 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
539 }
540 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
541
542 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
543 data->pwm_temp[i][TEMP_PWM_TTTI] =
544 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
545 data->pwm_temp[i][TEMP_PWM_CTFS] =
546 w83795_read(client, W83795_REG_CTFS(i));
547 tmp = w83795_read(client, W83795_REG_HT(i));
eb02755a 548 data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
0d7237bf
JD		 549 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
550 }
551
552 /* Read SmartFanIV trip points */
553 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
554 for (tmp = 0; tmp < 7; tmp++) {
555 data->sf4_reg[i][SF4_TEMP][tmp] =
556 w83795_read(client,
557 W83795_REG_SF4_TEMP(i, tmp));
558 data->sf4_reg[i][SF4_PWM][tmp] =
559 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
560 }
561 }
562
563 /* Read setup PWM */
564 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
565 data->setup_pwm[i] =
566 w83795_read(client, W83795_REG_SETUP_PWM(i));
1bb3450c
JD		 567
568 data->valid_pwm_config = 1;
569
570END:
571 mutex_unlock(&data->update_lock);
572 return data;
0d7237bf
JD		 573}
574
792d376b
WS		 575static struct w83795_data *w83795_update_device(struct device *dev)
576{
577 struct i2c_client *client = to_i2c_client(dev);
578 struct w83795_data *data = i2c_get_clientdata(client);
579 u16 tmp;
580 int i;
581
582 mutex_lock(&data->update_lock);
583
2ae61de9
JD		 584 if (!data->valid_limits)
585 w83795_update_limits(client);
586
792d376b
WS		 587 if (!(time_after(jiffies, data->last_updated + HZ * 2)
588 || !data->valid))
589 goto END;
590
591 /* Update the voltages value */
592 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
593 if (!(data->has_in & (1 << i)))
594 continue;
595 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
a654b9d4 596 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
792d376b
WS		 597 data->in[i][IN_READ] = tmp;
598 }
599
0e256018
JD		 600 /* in0-2 can have dynamic limits (W83795G only) */
601 if (data->has_dyn_in) {
602 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
603 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
604
605 for (i = 0; i < 3; i++) {
606 if (!(data->has_dyn_in & (1 << i)))
607 continue;
608 data->in[i][IN_MAX] =
609 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
610 data->in[i][IN_LOW] =
611 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
612 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
613 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
614 }
615 }
616
792d376b
WS		 617 /* Update fan */
618 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
619 if (!(data->has_fan & (1 << i)))
620 continue;
621 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
eb02755a 622 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
792d376b
WS		 623 }
624
625 /* Update temperature */
626 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
792d376b
WS		 627 data->temp[i][TEMP_READ] =
628 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
629 data->temp_read_vrlsb[i] =
630 w83795_read(client, W83795_REG_VRLSB);
631 }
632
633 /* Update dts temperature */
eb02755a 634 if (data->enable_dts) {
792d376b
WS		 635 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
636 if (!(data->has_dts & (1 << i)))
637 continue;
638 data->dts[i] =
639 w83795_read(client, W83795_REG_DTS(i));
640 data->dts_read_vrlsb[i] =
641 w83795_read(client, W83795_REG_VRLSB);
642 }
643 }
644
645 /* Update pwm output */
646 for (i = 0; i < data->has_pwm; i++) {
647 data->pwm[i][PWM_OUTPUT] =
648 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
649 }
650
651 /* update alarm */
cd316df5 652 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
792d376b
WS		 653 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
654
655 data->last_updated = jiffies;
656 data->valid = 1;
657
658END:
659 mutex_unlock(&data->update_lock);
660 return data;
661}
662
663/*
664 * Sysfs attributes
665 */
666
667#define ALARM_STATUS 0
668#define BEEP_ENABLE 1
669static ssize_t
670show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
671{
672 struct w83795_data *data = w83795_update_device(dev);
673 struct sensor_device_attribute_2 *sensor_attr =
674 to_sensor_dev_attr_2(attr);
675 int nr = sensor_attr->nr;
676 int index = sensor_attr->index >> 3;
677 int bit = sensor_attr->index & 0x07;
678 u8 val;
679
eb02755a
JD		 680 if (nr == ALARM_STATUS)
681 val = (data->alarms[index] >> bit) & 1;
682 else /* BEEP_ENABLE */
683 val = (data->beeps[index] >> bit) & 1;
792d376b
WS		 684
685 return sprintf(buf, "%u\n", val);
686}
687
688static ssize_t
689store_beep(struct device *dev, struct device_attribute *attr,
690 const char *buf, size_t count)
691{
692 struct i2c_client *client = to_i2c_client(dev);
693 struct w83795_data *data = i2c_get_clientdata(client);
694 struct sensor_device_attribute_2 *sensor_attr =
695 to_sensor_dev_attr_2(attr);
696 int index = sensor_attr->index >> 3;
697 int shift = sensor_attr->index & 0x07;
698 u8 beep_bit = 1 << shift;
699 unsigned long val;
700
701 if (strict_strtoul(buf, 10, &val) < 0)
702 return -EINVAL;
703 if (val != 0 && val != 1)
704 return -EINVAL;
705
706 mutex_lock(&data->update_lock);
707 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
708 data->beeps[index] &= ~beep_bit;
709 data->beeps[index] |= val << shift;
710 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
711 mutex_unlock(&data->update_lock);
712
713 return count;
714}
715
24377101 716/* Write 0 to clear chassis alarm */
792d376b
WS		 717static ssize_t
718store_chassis_clear(struct device *dev,
719 struct device_attribute *attr, const char *buf,
720 size_t count)
721{
722 struct i2c_client *client = to_i2c_client(dev);
723 struct w83795_data *data = i2c_get_clientdata(client);
24377101
JD		 724 unsigned long val;
725
726 if (strict_strtoul(buf, 10, &val) < 0 || val != 0)
727 return -EINVAL;
792d376b
WS		 728
729 mutex_lock(&data->update_lock);
730 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
731 val |= 0x80;
732 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
733 mutex_unlock(&data->update_lock);
734 return count;
735}
736
737#define FAN_INPUT 0
738#define FAN_MIN 1
739static ssize_t
740show_fan(struct device *dev, struct device_attribute *attr, char *buf)
741{
742 struct sensor_device_attribute_2 *sensor_attr =
743 to_sensor_dev_attr_2(attr);
744 int nr = sensor_attr->nr;
745 int index = sensor_attr->index;
746 struct w83795_data *data = w83795_update_device(dev);
747 u16 val;
748
eb02755a 749 if (nr == FAN_INPUT)
792d376b
WS		 750 val = data->fan[index] & 0x0fff;
751 else
752 val = data->fan_min[index] & 0x0fff;
753
754 return sprintf(buf, "%lu\n", fan_from_reg(val));
755}
756
757static ssize_t
758store_fan_min(struct device *dev, struct device_attribute *attr,
759 const char *buf, size_t count)
760{
761 struct sensor_device_attribute_2 *sensor_attr =
762 to_sensor_dev_attr_2(attr);
763 int index = sensor_attr->index;
764 struct i2c_client *client = to_i2c_client(dev);
765 struct w83795_data *data = i2c_get_clientdata(client);
766 unsigned long val;
767
768 if (strict_strtoul(buf, 10, &val))
769 return -EINVAL;
770 val = fan_to_reg(val);
771
772 mutex_lock(&data->update_lock);
773 data->fan_min[index] = val;
774 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
775 val &= 0x0f;
7eb8d508 776 if (index & 1) {
792d376b
WS		 777 val <<= 4;
778 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
779 & 0x0f;
780 } else {
781 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
782 & 0xf0;
783 }
784 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
785 mutex_unlock(&data->update_lock);
786
787 return count;
788}
789
790static ssize_t
791show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
792{
1bb3450c 793 struct w83795_data *data;
792d376b
WS		 794 struct sensor_device_attribute_2 *sensor_attr =
795 to_sensor_dev_attr_2(attr);
796 int nr = sensor_attr->nr;
797 int index = sensor_attr->index;
01879a85 798 unsigned int val;
792d376b 799
1bb3450c
JD		 800 data = nr == PWM_OUTPUT ? w83795_update_device(dev)
801 : w83795_update_pwm_config(dev);
802
792d376b
WS		 803 switch (nr) {
804 case PWM_STOP_TIME:
805 val = time_from_reg(data->pwm[index][nr]);
806 break;
01879a85
JD		 807 case PWM_FREQ:
808 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
792d376b
WS		 809 break;
810 default:
811 val = data->pwm[index][nr];
812 break;
813 }
814
815 return sprintf(buf, "%u\n", val);
816}
817
818static ssize_t
819store_pwm(struct device *dev, struct device_attribute *attr,
820 const char *buf, size_t count)
821{
822 struct i2c_client *client = to_i2c_client(dev);
823 struct w83795_data *data = i2c_get_clientdata(client);
824 struct sensor_device_attribute_2 *sensor_attr =
825 to_sensor_dev_attr_2(attr);
826 int nr = sensor_attr->nr;
827 int index = sensor_attr->index;
828 unsigned long val;
792d376b
WS		 829
830 if (strict_strtoul(buf, 10, &val) < 0)
831 return -EINVAL;
832
833 mutex_lock(&data->update_lock);
834 switch (nr) {
835 case PWM_STOP_TIME:
836 val = time_to_reg(val);
837 break;
01879a85
JD		 838 case PWM_FREQ:
839 val = pwm_freq_to_reg(val, data->clkin);
792d376b
WS		 840 break;
841 default:
842 val = SENSORS_LIMIT(val, 0, 0xff);
843 break;
844 }
845 w83795_write(client, W83795_REG_PWM(index, nr), val);
01879a85 846 data->pwm[index][nr] = val;
792d376b
WS		 847 mutex_unlock(&data->update_lock);
848 return count;
792d376b
WS		 849}
850
851static ssize_t
852show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
853{
854 struct sensor_device_attribute_2 *sensor_attr =
855 to_sensor_dev_attr_2(attr);
1bb3450c 856 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 857 int index = sensor_attr->index;
858 u8 tmp;
859
ae51cd9b
JD		 860 /* Speed cruise mode */
861 if (data->pwm_fcms[0] & (1 << index)) {
792d376b
WS		 862 tmp = 2;
863 goto out;
864 }
ae51cd9b 865 /* Thermal cruise or SmartFan IV mode */
792d376b
WS		 866 for (tmp = 0; tmp < 6; tmp++) {
867 if (data->pwm_tfmr[tmp] & (1 << index)) {
868 tmp = 3;
869 goto out;
870 }
871 }
ae51cd9b
JD		 872 /* Manual mode */
873 tmp = 1;
792d376b
WS		 874
875out:
876 return sprintf(buf, "%u\n", tmp);
877}
878
879static ssize_t
880store_pwm_enable(struct device *dev, struct device_attribute *attr,
881 const char *buf, size_t count)
882{
883 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 884 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 885 struct sensor_device_attribute_2 *sensor_attr =
886 to_sensor_dev_attr_2(attr);
887 int index = sensor_attr->index;
888 unsigned long val;
889 int i;
890
891 if (strict_strtoul(buf, 10, &val) < 0)
892 return -EINVAL;
ae51cd9b 893 if (val < 1 || val > 2)
792d376b
WS		 894 return -EINVAL;
895
896 mutex_lock(&data->update_lock);
897 switch (val) {
792d376b 898 case 1:
ae51cd9b 899 /* Clear speed cruise mode bits */
792d376b
WS		 900 data->pwm_fcms[0] &= ~(1 << index);
901 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
ae51cd9b 902 /* Clear thermal cruise mode bits */
792d376b
WS		 903 for (i = 0; i < 6; i++) {
904 data->pwm_tfmr[i] &= ~(1 << index);
905 w83795_write(client, W83795_REG_TFMR(i),
906 data->pwm_tfmr[i]);
907 }
792d376b
WS		 908 break;
909 case 2:
910 data->pwm_fcms[0] |= (1 << index);
911 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
912 break;
913 }
914 mutex_unlock(&data->update_lock);
915 return count;
792d376b
WS		 916}
917
d5ab845a
JD		 918static ssize_t
919show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
920{
921 struct w83795_data *data = w83795_update_pwm_config(dev);
922 int index = to_sensor_dev_attr_2(attr)->index;
923 unsigned int mode;
924
925 if (data->pwm_fomc & (1 << index))
926 mode = 0; /* DC */
927 else
928 mode = 1; /* PWM */
929
930 return sprintf(buf, "%u\n", mode);
931}
932
792d376b
WS		 933static ssize_t
934show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
935{
936 struct sensor_device_attribute_2 *sensor_attr =
937 to_sensor_dev_attr_2(attr);
1bb3450c 938 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 939 int index = sensor_attr->index;
940 u8 val = index / 2;
941 u8 tmp = data->temp_src[val];
942
7eb8d508 943 if (index & 1)
792d376b
WS		 944 val = 4;
945 else
946 val = 0;
947 tmp >>= val;
948 tmp &= 0x0f;
949
950 return sprintf(buf, "%u\n", tmp);
951}
952
953static ssize_t
954store_temp_src(struct device *dev, struct device_attribute *attr,
955 const char *buf, size_t count)
956{
957 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 958 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 959 struct sensor_device_attribute_2 *sensor_attr =
960 to_sensor_dev_attr_2(attr);
961 int index = sensor_attr->index;
962 unsigned long tmp;
963 u8 val = index / 2;
964
965 if (strict_strtoul(buf, 10, &tmp) < 0)
966 return -EINVAL;
967 tmp = SENSORS_LIMIT(tmp, 0, 15);
968
969 mutex_lock(&data->update_lock);
7eb8d508 970 if (index & 1) {
792d376b
WS		 971 tmp <<= 4;
972 data->temp_src[val] &= 0x0f;
973 } else {
974 data->temp_src[val] &= 0xf0;
975 }
976 data->temp_src[val] |= tmp;
977 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
978 mutex_unlock(&data->update_lock);
979
980 return count;
981}
982
983#define TEMP_PWM_ENABLE 0
984#define TEMP_PWM_FAN_MAP 1
985static ssize_t
986show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
987 char *buf)
988{
1bb3450c 989 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 990 struct sensor_device_attribute_2 *sensor_attr =
991 to_sensor_dev_attr_2(attr);
992 int nr = sensor_attr->nr;
993 int index = sensor_attr->index;
994 u8 tmp = 0xff;
995
996 switch (nr) {
997 case TEMP_PWM_ENABLE:
998 tmp = (data->pwm_fcms[1] >> index) & 1;
999 if (tmp)
1000 tmp = 4;
1001 else
1002 tmp = 3;
1003 break;
1004 case TEMP_PWM_FAN_MAP:
1005 tmp = data->pwm_tfmr[index];
1006 break;
1007 }
1008
1009 return sprintf(buf, "%u\n", tmp);
1010}
1011
1012static ssize_t
1013store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1014 const char *buf, size_t count)
1015{
1016 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 1017 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1018 struct sensor_device_attribute_2 *sensor_attr =
1019 to_sensor_dev_attr_2(attr);
1020 int nr = sensor_attr->nr;
1021 int index = sensor_attr->index;
1022 unsigned long tmp;
1023
1024 if (strict_strtoul(buf, 10, &tmp) < 0)
1025 return -EINVAL;
1026
1027 switch (nr) {
1028 case TEMP_PWM_ENABLE:
eb02755a 1029 if (tmp != 3 && tmp != 4)
792d376b
WS		 1030 return -EINVAL;
1031 tmp -= 3;
1032 mutex_lock(&data->update_lock);
1033 data->pwm_fcms[1] &= ~(1 << index);
1034 data->pwm_fcms[1] |= tmp << index;
1035 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
1036 mutex_unlock(&data->update_lock);
1037 break;
1038 case TEMP_PWM_FAN_MAP:
1039 mutex_lock(&data->update_lock);
1040 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
1041 w83795_write(client, W83795_REG_TFMR(index), tmp);
1042 data->pwm_tfmr[index] = tmp;
1043 mutex_unlock(&data->update_lock);
1044 break;
1045 }
1046 return count;
1047}
1048
1049#define FANIN_TARGET 0
1050#define FANIN_TOL 1
1051static ssize_t
1052show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
1053{
1bb3450c 1054 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1055 struct sensor_device_attribute_2 *sensor_attr =
1056 to_sensor_dev_attr_2(attr);
1057 int nr = sensor_attr->nr;
1058 int index = sensor_attr->index;
1059 u16 tmp = 0;
1060
1061 switch (nr) {
1062 case FANIN_TARGET:
1063 tmp = fan_from_reg(data->target_speed[index]);
1064 break;
1065 case FANIN_TOL:
1066 tmp = data->tol_speed;
1067 break;
1068 }
1069
1070 return sprintf(buf, "%u\n", tmp);
1071}
1072
1073static ssize_t
1074store_fanin(struct device *dev, struct device_attribute *attr,
1075 const char *buf, size_t count)
1076{
1077 struct i2c_client *client = to_i2c_client(dev);
1078 struct w83795_data *data = i2c_get_clientdata(client);
1079 struct sensor_device_attribute_2 *sensor_attr =
1080 to_sensor_dev_attr_2(attr);
1081 int nr = sensor_attr->nr;
1082 int index = sensor_attr->index;
1083 unsigned long val;
1084
1085 if (strict_strtoul(buf, 10, &val) < 0)
1086 return -EINVAL;
1087
1088 mutex_lock(&data->update_lock);
1089 switch (nr) {
1090 case FANIN_TARGET:
1091 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
eb02755a 1092 w83795_write(client, W83795_REG_FTSH(index), val >> 4);
792d376b
WS		 1093 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1094 data->target_speed[index] = val;
1095 break;
1096 case FANIN_TOL:
1097 val = SENSORS_LIMIT(val, 0, 0x3f);
1098 w83795_write(client, W83795_REG_TFTS, val);
1099 data->tol_speed = val;
1100 break;
1101 }
1102 mutex_unlock(&data->update_lock);
1103
1104 return count;
1105}
1106
1107
1108static ssize_t
1109show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1110{
1bb3450c 1111 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1112 struct sensor_device_attribute_2 *sensor_attr =
1113 to_sensor_dev_attr_2(attr);
1114 int nr = sensor_attr->nr;
1115 int index = sensor_attr->index;
1116 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1117
1118 return sprintf(buf, "%ld\n", tmp);
1119}
1120
1121static ssize_t
1122store_temp_pwm(struct device *dev, struct device_attribute *attr,
1123 const char *buf, size_t count)
1124{
1125 struct i2c_client *client = to_i2c_client(dev);
1126 struct w83795_data *data = i2c_get_clientdata(client);
1127 struct sensor_device_attribute_2 *sensor_attr =
1128 to_sensor_dev_attr_2(attr);
1129 int nr = sensor_attr->nr;
1130 int index = sensor_attr->index;
1131 unsigned long val;
1132 u8 tmp;
1133
1134 if (strict_strtoul(buf, 10, &val) < 0)
1135 return -EINVAL;
1136 val /= 1000;
1137
1138 mutex_lock(&data->update_lock);
1139 switch (nr) {
1140 case TEMP_PWM_TTTI:
1141 val = SENSORS_LIMIT(val, 0, 0x7f);
1142 w83795_write(client, W83795_REG_TTTI(index), val);
1143 break;
1144 case TEMP_PWM_CTFS:
1145 val = SENSORS_LIMIT(val, 0, 0x7f);
1146 w83795_write(client, W83795_REG_CTFS(index), val);
1147 break;
1148 case TEMP_PWM_HCT:
1149 val = SENSORS_LIMIT(val, 0, 0x0f);
1150 tmp = w83795_read(client, W83795_REG_HT(index));
1151 tmp &= 0x0f;
1152 tmp |= (val << 4) & 0xf0;
1153 w83795_write(client, W83795_REG_HT(index), tmp);
1154 break;
1155 case TEMP_PWM_HOT:
1156 val = SENSORS_LIMIT(val, 0, 0x0f);
1157 tmp = w83795_read(client, W83795_REG_HT(index));
1158 tmp &= 0xf0;
1159 tmp |= val & 0x0f;
1160 w83795_write(client, W83795_REG_HT(index), tmp);
1161 break;
1162 }
1163 data->pwm_temp[index][nr] = val;
1164 mutex_unlock(&data->update_lock);
1165
1166 return count;
1167}
1168
1169static ssize_t
1170show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1171{
1bb3450c 1172 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1173 struct sensor_device_attribute_2 *sensor_attr =
1174 to_sensor_dev_attr_2(attr);
1175 int nr = sensor_attr->nr;
1176 int index = sensor_attr->index;
1177
1178 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1179}
1180
1181static ssize_t
1182store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1183 const char *buf, size_t count)
1184{
1185 struct i2c_client *client = to_i2c_client(dev);
1186 struct w83795_data *data = i2c_get_clientdata(client);
1187 struct sensor_device_attribute_2 *sensor_attr =
1188 to_sensor_dev_attr_2(attr);
1189 int nr = sensor_attr->nr;
1190 int index = sensor_attr->index;
1191 unsigned long val;
1192
1193 if (strict_strtoul(buf, 10, &val) < 0)
1194 return -EINVAL;
1195
1196 mutex_lock(&data->update_lock);
1197 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1198 data->sf4_reg[index][SF4_PWM][nr] = val;
1199 mutex_unlock(&data->update_lock);
1200
1201 return count;
1202}
1203
1204static ssize_t
1205show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1206{
1bb3450c 1207 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1208 struct sensor_device_attribute_2 *sensor_attr =
1209 to_sensor_dev_attr_2(attr);
1210 int nr = sensor_attr->nr;
1211 int index = sensor_attr->index;
1212
1213 return sprintf(buf, "%u\n",
1214 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1215}
1216
1217static ssize_t
1218store_sf4_temp(struct device *dev, struct device_attribute *attr,
1219 const char *buf, size_t count)
1220{
1221 struct i2c_client *client = to_i2c_client(dev);
1222 struct w83795_data *data = i2c_get_clientdata(client);
1223 struct sensor_device_attribute_2 *sensor_attr =
1224 to_sensor_dev_attr_2(attr);
1225 int nr = sensor_attr->nr;
1226 int index = sensor_attr->index;
1227 unsigned long val;
1228
1229 if (strict_strtoul(buf, 10, &val) < 0)
1230 return -EINVAL;
1231 val /= 1000;
1232
1233 mutex_lock(&data->update_lock);
1234 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1235 data->sf4_reg[index][SF4_TEMP][nr] = val;
1236 mutex_unlock(&data->update_lock);
1237
1238 return count;
1239}
1240
1241
1242static ssize_t
1243show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1244{
1245 struct sensor_device_attribute_2 *sensor_attr =
1246 to_sensor_dev_attr_2(attr);
1247 int nr = sensor_attr->nr;
1248 int index = sensor_attr->index;
1249 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1250 long temp = temp_from_reg(data->temp[index][nr]);
792d376b 1251
eb02755a 1252 if (nr == TEMP_READ)
a654b9d4 1253 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1254 return sprintf(buf, "%ld\n", temp);
1255}
1256
1257static ssize_t
1258store_temp(struct device *dev, struct device_attribute *attr,
1259 const char *buf, size_t count)
1260{
1261 struct sensor_device_attribute_2 *sensor_attr =
1262 to_sensor_dev_attr_2(attr);
1263 int nr = sensor_attr->nr;
1264 int index = sensor_attr->index;
1265 struct i2c_client *client = to_i2c_client(dev);
1266 struct w83795_data *data = i2c_get_clientdata(client);
1267 long tmp;
1268
1269 if (strict_strtol(buf, 10, &tmp) < 0)
1270 return -EINVAL;
1271
1272 mutex_lock(&data->update_lock);
1273 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1274 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1275 mutex_unlock(&data->update_lock);
1276 return count;
1277}
1278
1279
1280static ssize_t
1281show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1282{
21fc9775 1283 struct w83795_data *data = dev_get_drvdata(dev);
39deb699 1284 int tmp;
792d376b 1285
39deb699
JD		 1286 if (data->enable_dts & 2)
1287 tmp = 5;
1288 else
1289 tmp = 6;
792d376b
WS		 1290
1291 return sprintf(buf, "%d\n", tmp);
1292}
1293
1294static ssize_t
1295show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1296{
1297 struct sensor_device_attribute_2 *sensor_attr =
1298 to_sensor_dev_attr_2(attr);
1299 int index = sensor_attr->index;
1300 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1301 long temp = temp_from_reg(data->dts[index]);
792d376b 1302
a654b9d4 1303 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1304 return sprintf(buf, "%ld\n", temp);
1305}
1306
1307static ssize_t
1308show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1309{
1310 struct sensor_device_attribute_2 *sensor_attr =
1311 to_sensor_dev_attr_2(attr);
1312 int nr = sensor_attr->nr;
21fc9775 1313 struct w83795_data *data = dev_get_drvdata(dev);
dd127f5c 1314 long temp = temp_from_reg(data->dts_ext[nr]);
792d376b 1315
792d376b
WS		 1316 return sprintf(buf, "%ld\n", temp);
1317}
1318
1319static ssize_t
1320store_dts_ext(struct device *dev, struct device_attribute *attr,
1321 const char *buf, size_t count)
1322{
1323 struct sensor_device_attribute_2 *sensor_attr =
1324 to_sensor_dev_attr_2(attr);
1325 int nr = sensor_attr->nr;
1326 struct i2c_client *client = to_i2c_client(dev);
1327 struct w83795_data *data = i2c_get_clientdata(client);
1328 long tmp;
1329
1330 if (strict_strtol(buf, 10, &tmp) < 0)
1331 return -EINVAL;
1332
1333 mutex_lock(&data->update_lock);
1334 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1335 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1336 mutex_unlock(&data->update_lock);
1337 return count;
1338}
1339
1340
792d376b
WS		 1341static ssize_t
1342show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1343{
21fc9775 1344 struct w83795_data *data = dev_get_drvdata(dev);
792d376b
WS		 1345 struct sensor_device_attribute_2 *sensor_attr =
1346 to_sensor_dev_attr_2(attr);
1347 int index = sensor_attr->index;
39deb699 1348 int tmp;
792d376b 1349
39deb699
JD		 1350 if (data->temp_mode & (1 << index))
1351 tmp = 3; /* Thermal diode */
1352 else
1353 tmp = 4; /* Thermistor */
792d376b
WS		 1354
1355 return sprintf(buf, "%d\n", tmp);
1356}
1357
39deb699 1358/* Only for temp1-4 (temp5-6 can only be thermistor) */
792d376b
WS		 1359static ssize_t
1360store_temp_mode(struct device *dev, struct device_attribute *attr,
1361 const char *buf, size_t count)
1362{
1363 struct i2c_client *client = to_i2c_client(dev);
1364 struct w83795_data *data = i2c_get_clientdata(client);
1365 struct sensor_device_attribute_2 *sensor_attr =
1366 to_sensor_dev_attr_2(attr);
1367 int index = sensor_attr->index;
39deb699 1368 int reg_shift;
792d376b
WS		 1369 unsigned long val;
1370 u8 tmp;
792d376b
WS		 1371
1372 if (strict_strtoul(buf, 10, &val) < 0)
1373 return -EINVAL;
1374 if ((val != 4) && (val != 3))
1375 return -EINVAL;
792d376b
WS		 1376
1377 mutex_lock(&data->update_lock);
1378 if (val == 3) {
39deb699
JD		 1379 /* Thermal diode */
1380 val = 0x01;
792d376b
WS		 1381 data->temp_mode |= 1 << index;
1382 } else if (val == 4) {
39deb699
JD		 1383 /* Thermistor */
1384 val = 0x03;
1385 data->temp_mode &= ~(1 << index);
792d376b
WS		 1386 }
1387
39deb699
JD		 1388 reg_shift = 2 * index;
1389 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1390 tmp &= ~(0x03 << reg_shift);
1391 tmp |= val << reg_shift;
1392 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
792d376b
WS		 1393
1394 mutex_unlock(&data->update_lock);
1395 return count;
1396}
1397
1398
1399/* show/store VIN */
1400static ssize_t
1401show_in(struct device *dev, struct device_attribute *attr, char *buf)
1402{
1403 struct sensor_device_attribute_2 *sensor_attr =
1404 to_sensor_dev_attr_2(attr);
1405 int nr = sensor_attr->nr;
1406 int index = sensor_attr->index;
1407 struct w83795_data *data = w83795_update_device(dev);
1408 u16 val = data->in[index][nr];
1409 u8 lsb_idx;
1410
1411 switch (nr) {
1412 case IN_READ:
1413 /* calculate this value again by sensors as sensors3.conf */
1414 if ((index >= 17) &&
6f9dfd85 1415 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1416 val *= 8;
1417 break;
1418 case IN_MAX:
1419 case IN_LOW:
1420 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1421 val <<= 2;
1422 val |= (data->in_lsb[lsb_idx][nr] >>
5d2cd958 1423 IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
792d376b 1424 if ((index >= 17) &&
6f9dfd85 1425 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1426 val *= 8;
1427 break;
1428 }
1429 val = in_from_reg(index, val);
1430
1431 return sprintf(buf, "%d\n", val);
1432}
1433
1434static ssize_t
1435store_in(struct device *dev, struct device_attribute *attr,
1436 const char *buf, size_t count)
1437{
1438 struct sensor_device_attribute_2 *sensor_attr =
1439 to_sensor_dev_attr_2(attr);
1440 int nr = sensor_attr->nr;
1441 int index = sensor_attr->index;
1442 struct i2c_client *client = to_i2c_client(dev);
1443 struct w83795_data *data = i2c_get_clientdata(client);
1444 unsigned long val;
1445 u8 tmp;
1446 u8 lsb_idx;
1447
1448 if (strict_strtoul(buf, 10, &val) < 0)
1449 return -EINVAL;
1450 val = in_to_reg(index, val);
1451
1452 if ((index >= 17) &&
6f9dfd85 1453 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1454 val /= 8;
1455 val = SENSORS_LIMIT(val, 0, 0x3FF);
1456 mutex_lock(&data->update_lock);
1457
1458 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1459 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1460 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1461 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1462 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1463 data->in_lsb[lsb_idx][nr] = tmp;
1464
1465 tmp = (val >> 2) & 0xff;
1466 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1467 data->in[index][nr] = tmp;
1468
1469 mutex_unlock(&data->update_lock);
1470 return count;
1471}
1472
1473
00030af2 1474#ifdef CONFIG_SENSORS_W83795_FANCTRL
792d376b
WS		 1475static ssize_t
1476show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1477{
1478 struct sensor_device_attribute_2 *sensor_attr =
1479 to_sensor_dev_attr_2(attr);
1480 int nr = sensor_attr->nr;
1bb3450c 1481 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1482 u16 val = data->setup_pwm[nr];
1483
1484 switch (nr) {
1485 case SETUP_PWM_UPTIME:
1486 case SETUP_PWM_DOWNTIME:
1487 val = time_from_reg(val);
1488 break;
1489 }
1490
1491 return sprintf(buf, "%d\n", val);
1492}
1493
1494static ssize_t
1495store_sf_setup(struct device *dev, struct device_attribute *attr,
1496 const char *buf, size_t count)
1497{
1498 struct sensor_device_attribute_2 *sensor_attr =
1499 to_sensor_dev_attr_2(attr);
1500 int nr = sensor_attr->nr;
1501 struct i2c_client *client = to_i2c_client(dev);
1502 struct w83795_data *data = i2c_get_clientdata(client);
1503 unsigned long val;
1504
1505 if (strict_strtoul(buf, 10, &val) < 0)
1506 return -EINVAL;
1507
1508 switch (nr) {
1509 case SETUP_PWM_DEFAULT:
1510 val = SENSORS_LIMIT(val, 0, 0xff);
1511 break;
1512 case SETUP_PWM_UPTIME:
1513 case SETUP_PWM_DOWNTIME:
1514 val = time_to_reg(val);
1515 if (val == 0)
1516 return -EINVAL;
1517 break;
1518 }
1519
1520 mutex_lock(&data->update_lock);
1521 data->setup_pwm[nr] = val;
1522 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1523 mutex_unlock(&data->update_lock);
1524 return count;
1525}
00030af2 1526#endif
792d376b
WS		 1527
1528
1529#define NOT_USED -1
1530
0e256018
JD		 1531/* Don't change the attribute order, _max and _min are accessed by index
1532 * somewhere else in the code */
87df0dad 1533#define SENSOR_ATTR_IN(index) { \
792d376b
WS		 1534 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1535 IN_READ, index), \
1536 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1537 store_in, IN_MAX, index), \
1538 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1539 store_in, IN_LOW, index), \
1540 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1541 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1542 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1543 show_alarm_beep, store_beep, BEEP_ENABLE, \
87df0dad 1544 index + ((index > 14) ? 1 : 0)) }
792d376b 1545
87df0dad 1546#define SENSOR_ATTR_FAN(index) { \
792d376b
WS		 1547 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1548 NULL, FAN_INPUT, index - 1), \
1549 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1550 show_fan, store_fan_min, FAN_MIN, index - 1), \
1551 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1552 NULL, ALARM_STATUS, index + 31), \
1553 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1554 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
792d376b 1555
b5f6a90a 1556#define SENSOR_ATTR_PWM(index) { \
792d376b
WS		 1557 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1558 store_pwm, PWM_OUTPUT, index - 1), \
1559 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1560 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1561 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1562 show_pwm, store_pwm, PWM_START, index - 1), \
1563 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1564 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
01879a85
JD		 1565 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1566 show_pwm, store_pwm, PWM_FREQ, index - 1), \
792d376b 1567 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
b2cc528e 1568 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
d5ab845a
JD		 1569 SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \
1570 show_pwm_mode, NULL, NOT_USED, index - 1), \
b2cc528e
JD		 1571 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1572 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
792d376b 1573
87df0dad 1574#define SENSOR_ATTR_DTS(index) { \
792d376b
WS		 1575 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1576 show_dts_mode, NULL, NOT_USED, index - 7), \
1577 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1578 NULL, NOT_USED, index - 7), \
a0ce402f 1579 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1580 store_dts_ext, DTS_CRIT, NOT_USED), \
a0ce402f 1581 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1582 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
a0ce402f 1583 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1584 store_dts_ext, DTS_WARN, NOT_USED), \
a0ce402f 1585 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1586 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1587 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1588 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1589 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1590 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
792d376b 1591
87df0dad 1592#define SENSOR_ATTR_TEMP(index) { \
39deb699 1593 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
792d376b
WS		 1594 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1595 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1596 NULL, TEMP_READ, index - 1), \
a0ce402f 1597 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1598 store_temp, TEMP_CRIT, index - 1), \
a0ce402f 1599 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1600 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
a0ce402f 1601 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1602 store_temp, TEMP_WARN, index - 1), \
a0ce402f 1603 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1604 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1605 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1606 show_alarm_beep, NULL, ALARM_STATUS, \
1607 index + (index > 4 ? 11 : 17)), \
1608 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1609 show_alarm_beep, store_beep, BEEP_ENABLE, \
1610 index + (index > 4 ? 11 : 17)), \
1611 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1612 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1613 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1614 show_temp_pwm_enable, store_temp_pwm_enable, \
1615 TEMP_PWM_ENABLE, index - 1), \
1616 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1617 show_temp_pwm_enable, store_temp_pwm_enable, \
1618 TEMP_PWM_FAN_MAP, index - 1), \
1619 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1620 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
a0ce402f 1621 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
792d376b 1622 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
a0ce402f 1623 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
792d376b
WS		 1624 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1625 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1626 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1627 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1628 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1629 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1630 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1631 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1632 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1633 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1634 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1635 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1636 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1637 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1638 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1639 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1640 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1641 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1642 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1643 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1644 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1645 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1646 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1647 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1648 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1649 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1650 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1651 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1652 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1653 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
87df0dad 1654 show_sf4_temp, store_sf4_temp, 6, index - 1) }
792d376b
WS		 1655
1656
87df0dad 1657static struct sensor_device_attribute_2 w83795_in[][5] = {
792d376b
WS		 1658 SENSOR_ATTR_IN(0),
1659 SENSOR_ATTR_IN(1),
1660 SENSOR_ATTR_IN(2),
1661 SENSOR_ATTR_IN(3),
1662 SENSOR_ATTR_IN(4),
1663 SENSOR_ATTR_IN(5),
1664 SENSOR_ATTR_IN(6),
1665 SENSOR_ATTR_IN(7),
1666 SENSOR_ATTR_IN(8),
1667 SENSOR_ATTR_IN(9),
1668 SENSOR_ATTR_IN(10),
1669 SENSOR_ATTR_IN(11),
1670 SENSOR_ATTR_IN(12),
1671 SENSOR_ATTR_IN(13),
1672 SENSOR_ATTR_IN(14),
1673 SENSOR_ATTR_IN(15),
1674 SENSOR_ATTR_IN(16),
1675 SENSOR_ATTR_IN(17),
1676 SENSOR_ATTR_IN(18),
1677 SENSOR_ATTR_IN(19),
1678 SENSOR_ATTR_IN(20),
1679};
1680
86ef4d2f 1681static const struct sensor_device_attribute_2 w83795_fan[][4] = {
792d376b
WS		 1682 SENSOR_ATTR_FAN(1),
1683 SENSOR_ATTR_FAN(2),
1684 SENSOR_ATTR_FAN(3),
1685 SENSOR_ATTR_FAN(4),
1686 SENSOR_ATTR_FAN(5),
1687 SENSOR_ATTR_FAN(6),
1688 SENSOR_ATTR_FAN(7),
1689 SENSOR_ATTR_FAN(8),
1690 SENSOR_ATTR_FAN(9),
1691 SENSOR_ATTR_FAN(10),
1692 SENSOR_ATTR_FAN(11),
1693 SENSOR_ATTR_FAN(12),
1694 SENSOR_ATTR_FAN(13),
1695 SENSOR_ATTR_FAN(14),
1696};
1697
86ef4d2f 1698static const struct sensor_device_attribute_2 w83795_temp[][29] = {
792d376b
WS		 1699 SENSOR_ATTR_TEMP(1),
1700 SENSOR_ATTR_TEMP(2),
1701 SENSOR_ATTR_TEMP(3),
1702 SENSOR_ATTR_TEMP(4),
1703 SENSOR_ATTR_TEMP(5),
1704 SENSOR_ATTR_TEMP(6),
1705};
1706
86ef4d2f 1707static const struct sensor_device_attribute_2 w83795_dts[][8] = {
792d376b
WS		 1708 SENSOR_ATTR_DTS(7),
1709 SENSOR_ATTR_DTS(8),
1710 SENSOR_ATTR_DTS(9),
1711 SENSOR_ATTR_DTS(10),
1712 SENSOR_ATTR_DTS(11),
1713 SENSOR_ATTR_DTS(12),
1714 SENSOR_ATTR_DTS(13),
1715 SENSOR_ATTR_DTS(14),
1716};
1717
d5ab845a 1718static const struct sensor_device_attribute_2 w83795_pwm[][8] = {
b5f6a90a
JD		 1719 SENSOR_ATTR_PWM(1),
1720 SENSOR_ATTR_PWM(2),
792d376b
WS		 1721 SENSOR_ATTR_PWM(3),
1722 SENSOR_ATTR_PWM(4),
1723 SENSOR_ATTR_PWM(5),
1724 SENSOR_ATTR_PWM(6),
1725 SENSOR_ATTR_PWM(7),
1726 SENSOR_ATTR_PWM(8),
1727};
1728
86ef4d2f 1729static const struct sensor_device_attribute_2 sda_single_files[] = {
24377101 1730 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
792d376b 1731 store_chassis_clear, ALARM_STATUS, 46),
24377101
JD		 1732 SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
1733 store_beep, BEEP_ENABLE, 46),
02728ffe
JD		 1734 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1735 store_beep, BEEP_ENABLE, 47),
00030af2 1736#ifdef CONFIG_SENSORS_W83795_FANCTRL
792d376b
WS		 1737 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1738 store_fanin, FANIN_TOL, NOT_USED),
1739 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1740 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1741 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1742 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1743 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1744 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
00030af2 1745#endif
792d376b
WS		 1746};
1747
1748/*
1749 * Driver interface
1750 */
1751
1752static void w83795_init_client(struct i2c_client *client)
1753{
01879a85
JD		 1754 struct w83795_data *data = i2c_get_clientdata(client);
1755 static const u16 clkin[4] = { /* in kHz */
1756 14318, 24000, 33333, 48000
1757 };
80646b95
JD		 1758 u8 config;
1759
792d376b
WS		 1760 if (reset)
1761 w83795_write(client, W83795_REG_CONFIG, 0x80);
1762
80646b95
JD		 1763 /* Start monitoring if needed */
1764 config = w83795_read(client, W83795_REG_CONFIG);
1765 if (!(config & W83795_REG_CONFIG_START)) {
1766 dev_info(&client->dev, "Enabling monitoring operations\n");
1767 w83795_write(client, W83795_REG_CONFIG,
1768 config | W83795_REG_CONFIG_START);
1769 }
01879a85
JD		 1770
1771 data->clkin = clkin[(config >> 3) & 0x3];
1772 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
792d376b
WS		 1773}
1774
2be381de
JD		 1775static int w83795_get_device_id(struct i2c_client *client)
1776{
1777 int device_id;
1778
1779 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1780
1781 /* Special case for rev. A chips; can't be checked first because later
1782 revisions emulate this for compatibility */
1783 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1784 int alt_id;
1785
1786 alt_id = i2c_smbus_read_byte_data(client,
1787 W83795_REG_DEVICEID_A);
1788 if (alt_id == 0x50)
1789 device_id = alt_id;
1790 }
1791
1792 return device_id;
1793}
1794
792d376b
WS		 1795/* Return 0 if detection is successful, -ENODEV otherwise */
1796static int w83795_detect(struct i2c_client *client,
1797 struct i2c_board_info *info)
1798{
2be381de 1799 int bank, vendor_id, device_id, expected, i2c_addr, config;
792d376b
WS		 1800 struct i2c_adapter *adapter = client->adapter;
1801 unsigned short address = client->addr;
093d1a47 1802 const char *chip_name;
792d376b
WS		 1803
1804 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1805 return -ENODEV;
1806 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2be381de
JD		 1807 if (bank < 0 || (bank & 0x7c)) {
1808 dev_dbg(&adapter->dev,
1809 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1810 address, "bank");
1811 return -ENODEV;
1812 }
792d376b 1813
792d376b 1814 /* Check Nuvoton vendor ID */
2be381de
JD		 1815 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1816 expected = bank & 0x80 ? 0x5c : 0xa3;
1817 if (vendor_id != expected) {
1818 dev_dbg(&adapter->dev,
1819 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1820 address, "vendor id");
792d376b
WS		 1821 return -ENODEV;
1822 }
1823
2be381de
JD		 1824 /* Check device ID */
1825 device_id = w83795_get_device_id(client) |
1826 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1827 if ((device_id >> 4) != 0x795) {
1828 dev_dbg(&adapter->dev,
1829 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1830 address, "device id\n");
792d376b
WS		 1831 return -ENODEV;
1832 }
1833
2be381de
JD		 1834 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1835 should match */
1836 if ((bank & 0x07) == 0) {
1837 i2c_addr = i2c_smbus_read_byte_data(client,
1838 W83795_REG_I2C_ADDR);
1839 if ((i2c_addr & 0x7f) != address) {
1840 dev_dbg(&adapter->dev,
1841 "w83795: Detection failed at addr 0x%02hx, "
1842 "check %s\n", address, "i2c addr");
1843 return -ENODEV;
1844 }
792d376b
WS		 1845 }
1846
093d1a47
JD		 1847 /* Check 795 chip type: 795G or 795ADG
1848 Usually we don't write to chips during detection, but here we don't
1849 quite have the choice; hopefully it's OK, we are about to return
1850 success anyway */
1851 if ((bank & 0x07) != 0)
1852 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1853 bank & ~0x07);
2be381de
JD		 1854 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1855 if (config & W83795_REG_CONFIG_CONFIG48)
093d1a47 1856 chip_name = "w83795adg";
2be381de 1857 else
093d1a47 1858 chip_name = "w83795g";
792d376b 1859
093d1a47 1860 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
2be381de
JD		 1861 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1862 'A' + (device_id & 0xf), address);
792d376b
WS		 1863
1864 return 0;
1865}
1866
6f3dcde9
JD		 1867static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1868 const struct device_attribute *))
892514a6
JD		 1869{
1870 struct w83795_data *data = dev_get_drvdata(dev);
87df0dad 1871 int err, i, j;
892514a6
JD		 1872
1873 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
87df0dad 1874 if (!(data->has_in & (1 << i)))
892514a6 1875 continue;
87df0dad
JD		 1876 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1877 err = fn(dev, &w83795_in[i][j].dev_attr);
1878 if (err)
1879 return err;
1880 }
892514a6
JD		 1881 }
1882
1883 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
87df0dad 1884 if (!(data->has_fan & (1 << i)))
892514a6 1885 continue;
87df0dad
JD		 1886 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1887 err = fn(dev, &w83795_fan[i][j].dev_attr);
1888 if (err)
1889 return err;
1890 }
892514a6
JD		 1891 }
1892
1893 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
6f3dcde9 1894 err = fn(dev, &sda_single_files[i].dev_attr);
892514a6
JD		 1895 if (err)
1896 return err;
1897 }
1898
00030af2 1899#ifdef CONFIG_SENSORS_W83795_FANCTRL
b5f6a90a
JD		 1900 for (i = 0; i < data->has_pwm; i++) {
1901 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1902 err = fn(dev, &w83795_pwm[i][j].dev_attr);
892514a6
JD		 1903 if (err)
1904 return err;
1905 }
1906 }
00030af2 1907#endif
892514a6
JD		 1908
1909 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
87df0dad 1910 if (!(data->has_temp & (1 << i)))
892514a6 1911 continue;
00030af2 1912#ifdef CONFIG_SENSORS_W83795_FANCTRL
87df0dad 1913 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
00030af2
JD		 1914#else
1915 for (j = 0; j < 8; j++) {
1916#endif
87df0dad
JD		 1917 err = fn(dev, &w83795_temp[i][j].dev_attr);
1918 if (err)
1919 return err;
1920 }
892514a6
JD		 1921 }
1922
eb02755a 1923 if (data->enable_dts) {
892514a6 1924 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
87df0dad 1925 if (!(data->has_dts & (1 << i)))
892514a6 1926 continue;
87df0dad
JD		 1927 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1928 err = fn(dev, &w83795_dts[i][j].dev_attr);
1929 if (err)
1930 return err;
1931 }
892514a6
JD		 1932 }
1933 }
1934
892514a6
JD		 1935 return 0;
1936}
1937
6f3dcde9
JD		 1938/* We need a wrapper that fits in w83795_handle_files */
1939static int device_remove_file_wrapper(struct device *dev,
1940 const struct device_attribute *attr)
2fa09878 1941{
6f3dcde9
JD		 1942 device_remove_file(dev, attr);
1943 return 0;
2fa09878
JD		 1944}
1945
0e256018
JD		 1946static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1947{
1948 struct w83795_data *data = i2c_get_clientdata(client);
1949 u8 vid_ctl;
1950 int i, err_max, err_min;
1951
1952 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1953
1954 /* Return immediately if VRM isn't configured */
1955 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1956 return;
1957
1958 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1959 for (i = 0; i < 2; i++) {
1960 if (!(data->has_dyn_in & (1 << i)))
1961 continue;
1962
1963 /* Voltage limits in dynamic mode, switch to read-only */
1964 err_max = sysfs_chmod_file(&client->dev.kobj,
1965 &w83795_in[i][2].dev_attr.attr,
1966 S_IRUGO);
1967 err_min = sysfs_chmod_file(&client->dev.kobj,
1968 &w83795_in[i][3].dev_attr.attr,
1969 S_IRUGO);
1970 if (err_max || err_min)
1971 dev_warn(&client->dev, "Failed to set in%d limits "
1972 "read-only (%d, %d)\n", i, err_max, err_min);
1973 else
1974 dev_info(&client->dev, "in%d limits set dynamically "
1975 "from VID\n", i);
1976 }
1977}
1978
71caf46f
JD		 1979/* Check pins that can be used for either temperature or voltage monitoring */
1980static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1981 int temp_chan, int in_chan)
1982{
1983 /* config is a 2-bit value */
1984 switch (config) {
1985 case 0x2: /* Voltage monitoring */
1986 data->has_in |= 1 << in_chan;
1987 break;
1988 case 0x1: /* Thermal diode */
1989 if (temp_chan >= 4)
1990 break;
1991 data->temp_mode |= 1 << temp_chan;
1992 /* fall through */
1993 case 0x3: /* Thermistor */
1994 data->has_temp |= 1 << temp_chan;
1995 break;
1996 }
1997}
1998
792d376b
WS		 1999static int w83795_probe(struct i2c_client *client,
2000 const struct i2c_device_id *id)
2001{
2002 int i;
2003 u8 tmp;
2004 struct device *dev = &client->dev;
2005 struct w83795_data *data;
71caf46f 2006 int err;
792d376b
WS		 2007
2008 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
2009 if (!data) {
2010 err = -ENOMEM;
2011 goto exit;
2012 }
2013
2014 i2c_set_clientdata(client, data);
093d1a47 2015 data->chip_type = id->driver_data;
792d376b
WS		 2016 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2017 mutex_init(&data->update_lock);
2018
2019 /* Initialize the chip */
2020 w83795_init_client(client);
2021
71caf46f
JD		 2022 /* Check which voltages and fans are present */
2023 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
2024 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
2025 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
2026 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
792d376b 2027
71caf46f 2028 /* Check which analog temperatures and extra voltages are present */
792d376b
WS		 2029 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
2030 if (tmp & 0x20)
2031 data->enable_dts = 1;
71caf46f
JD		 2032 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
2033 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
792d376b 2034 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
71caf46f
JD		 2035 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
2036 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
2037 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
2038 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
792d376b
WS		 2039
2040 /* Check DTS enable status */
71caf46f 2041 if (data->enable_dts) {
792d376b
WS		 2042 if (1 & w83795_read(client, W83795_REG_DTSC))
2043 data->enable_dts |= 2;
2044 data->has_dts = w83795_read(client, W83795_REG_DTSE);
2045 }
2046
54891a3c
JD		 2047 /* Report PECI Tbase values */
2048 if (data->enable_dts == 1) {
2049 for (i = 0; i < 8; i++) {
2050 if (!(data->has_dts & (1 << i)))
2051 continue;
2052 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
2053 dev_info(&client->dev,
2054 "PECI agent %d Tbase temperature: %u\n",
2055 i + 1, (unsigned int)tmp & 0x7f);
2056 }
2057 }
2058
792d376b 2059 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
792d376b
WS		 2060
2061 /* pwm and smart fan */
2062 if (data->chip_type == w83795g)
2063 data->has_pwm = 8;
2064 else
2065 data->has_pwm = 2;
792d376b 2066
6f3dcde9 2067 err = w83795_handle_files(dev, device_create_file);
892514a6
JD		 2068 if (err)
2069 goto exit_remove;
792d376b 2070
0e256018
JD		 2071 if (data->chip_type == w83795g)
2072 w83795_check_dynamic_in_limits(client);
2073
792d376b
WS		 2074 data->hwmon_dev = hwmon_device_register(dev);
2075 if (IS_ERR(data->hwmon_dev)) {
2076 err = PTR_ERR(data->hwmon_dev);
2077 goto exit_remove;
2078 }
2079
2080 return 0;
2081
792d376b 2082exit_remove:
6f3dcde9 2083 w83795_handle_files(dev, device_remove_file_wrapper);
792d376b
WS		 2084 kfree(data);
2085exit:
2086 return err;
2087}
2088
2089static int w83795_remove(struct i2c_client *client)
2090{
2091 struct w83795_data *data = i2c_get_clientdata(client);
792d376b
WS		 2092
2093 hwmon_device_unregister(data->hwmon_dev);
6f3dcde9 2094 w83795_handle_files(&client->dev, device_remove_file_wrapper);
792d376b
WS		 2095 kfree(data);
2096
2097 return 0;
2098}
2099
2100
2101static const struct i2c_device_id w83795_id[] = {
093d1a47
JD		 2102 { "w83795g", w83795g },
2103 { "w83795adg", w83795adg },
792d376b
WS		 2104 { }
2105};
2106MODULE_DEVICE_TABLE(i2c, w83795_id);
2107
2108static struct i2c_driver w83795_driver = {
2109 .driver = {
2110 .name = "w83795",
2111 },
2112 .probe = w83795_probe,
2113 .remove = w83795_remove,
2114 .id_table = w83795_id,
2115
2116 .class = I2C_CLASS_HWMON,
2117 .detect = w83795_detect,
2118 .address_list = normal_i2c,
2119};
2120
2121static int __init sensors_w83795_init(void)
2122{
2123 return i2c_add_driver(&w83795_driver);
2124}
2125
2126static void __exit sensors_w83795_exit(void)
2127{
2128 i2c_del_driver(&w83795_driver);
2129}
2130
e3760b43 2131MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
315bacfd 2132MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
792d376b
WS		 2133MODULE_LICENSE("GPL");
2134
2135module_init(sensors_w83795_init);
2136module_exit(sensors_w83795_exit);
Linux 6.x block layer and io_uring tree(s)