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hwmon: (w83795) Rename temperature limit attributes
[linux-2.6-block.git] / drivers / hwmon / w83795.c
CommitLineData
792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA.
19 *
20 * Supports following chips:
21 *
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/slab.h>
31#include <linux/i2c.h>
32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h>
34#include <linux/err.h>
35#include <linux/mutex.h>
36#include <linux/delay.h>
37
38/* Addresses to scan */
86ef4d2f
JD		 39static const unsigned short normal_i2c[] = {
40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
41};
792d376b 42
792d376b
WS		 43
44static int reset;
45module_param(reset, bool, 0);
46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
47
48
49#define W83795_REG_BANKSEL 0x00
50#define W83795_REG_VENDORID 0xfd
51#define W83795_REG_CHIPID 0xfe
52#define W83795_REG_DEVICEID 0xfb
2be381de 53#define W83795_REG_DEVICEID_A 0xff
792d376b
WS		 54
55#define W83795_REG_I2C_ADDR 0xfc
56#define W83795_REG_CONFIG 0x01
57#define W83795_REG_CONFIG_CONFIG48 0x04
80646b95 58#define W83795_REG_CONFIG_START 0x01
792d376b
WS		 59
60/* Multi-Function Pin Ctrl Registers */
61#define W83795_REG_VOLT_CTRL1 0x02
62#define W83795_REG_VOLT_CTRL2 0x03
63#define W83795_REG_TEMP_CTRL1 0x04
64#define W83795_REG_TEMP_CTRL2 0x05
65#define W83795_REG_FANIN_CTRL1 0x06
66#define W83795_REG_FANIN_CTRL2 0x07
67#define W83795_REG_VMIGB_CTRL 0x08
68
69#define TEMP_CTRL_DISABLE 0
70#define TEMP_CTRL_TD 1
71#define TEMP_CTRL_VSEN 2
72#define TEMP_CTRL_TR 3
73#define TEMP_CTRL_SHIFT 4
74#define TEMP_CTRL_HASIN_SHIFT 5
75/* temp mode may effect VSEN17-12 (in20-15) */
86ef4d2f 76static const u16 W83795_REG_TEMP_CTRL[][6] = {
792d376b
WS		 77 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */
78 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */
79 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */
80 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */
81 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */
82 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */
83 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */
84};
85
86#define TEMP_READ 0
87#define TEMP_CRIT 1
88#define TEMP_CRIT_HYST 2
89#define TEMP_WARN 3
90#define TEMP_WARN_HYST 4
91/* only crit and crit_hyst affect real-time alarm status
92 * current crit crit_hyst warn warn_hyst */
86ef4d2f 93static const u16 W83795_REG_TEMP[][5] = {
792d376b
WS		 94 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
95 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
96 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
97 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
98 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
99 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
100};
101
102#define IN_READ 0
103#define IN_MAX 1
104#define IN_LOW 2
105static const u16 W83795_REG_IN[][3] = {
106 /* Current, HL, LL */
107 {0x10, 0x70, 0x71}, /* VSEN1 */
108 {0x11, 0x72, 0x73}, /* VSEN2 */
109 {0x12, 0x74, 0x75}, /* VSEN3 */
110 {0x13, 0x76, 0x77}, /* VSEN4 */
111 {0x14, 0x78, 0x79}, /* VSEN5 */
112 {0x15, 0x7a, 0x7b}, /* VSEN6 */
113 {0x16, 0x7c, 0x7d}, /* VSEN7 */
114 {0x17, 0x7e, 0x7f}, /* VSEN8 */
115 {0x18, 0x80, 0x81}, /* VSEN9 */
116 {0x19, 0x82, 0x83}, /* VSEN10 */
117 {0x1A, 0x84, 0x85}, /* VSEN11 */
118 {0x1B, 0x86, 0x87}, /* VTT */
119 {0x1C, 0x88, 0x89}, /* 3VDD */
120 {0x1D, 0x8a, 0x8b}, /* 3VSB */
121 {0x1E, 0x8c, 0x8d}, /* VBAT */
122 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
123 {0x20, 0xaa, 0xab}, /* VSEN13 */
124 {0x21, 0x96, 0x97}, /* VSEN14 */
125 {0x22, 0x9a, 0x9b}, /* VSEN15 */
126 {0x23, 0x9e, 0x9f}, /* VSEN16 */
127 {0x24, 0xa2, 0xa3}, /* VSEN17 */
128};
129#define W83795_REG_VRLSB 0x3C
130#define VRLSB_SHIFT 6
131
132static const u8 W83795_REG_IN_HL_LSB[] = {
133 0x8e, /* VSEN1-4 */
134 0x90, /* VSEN5-8 */
135 0x92, /* VSEN9-11 */
136 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
137 0xa8, /* VSEN12 */
138 0xac, /* VSEN13 */
139 0x98, /* VSEN14 */
140 0x9c, /* VSEN15 */
141 0xa0, /* VSEN16 */
142 0xa4, /* VSEN17 */
143};
144
145#define IN_LSB_REG(index, type) \
146 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
147 : (W83795_REG_IN_HL_LSB[(index)] + 1))
148
149#define IN_LSB_REG_NUM 10
150
151#define IN_LSB_SHIFT 0
152#define IN_LSB_IDX 1
153static const u8 IN_LSB_SHIFT_IDX[][2] = {
154 /* High/Low LSB shift, LSB No. */
155 {0x00, 0x00}, /* VSEN1 */
156 {0x02, 0x00}, /* VSEN2 */
157 {0x04, 0x00}, /* VSEN3 */
158 {0x06, 0x00}, /* VSEN4 */
159 {0x00, 0x01}, /* VSEN5 */
160 {0x02, 0x01}, /* VSEN6 */
161 {0x04, 0x01}, /* VSEN7 */
162 {0x06, 0x01}, /* VSEN8 */
163 {0x00, 0x02}, /* VSEN9 */
164 {0x02, 0x02}, /* VSEN10 */
165 {0x04, 0x02}, /* VSEN11 */
166 {0x00, 0x03}, /* VTT */
167 {0x02, 0x03}, /* 3VDD */
168 {0x04, 0x03}, /* 3VSB */
169 {0x06, 0x03}, /* VBAT */
170 {0x06, 0x04}, /* VSEN12 */
171 {0x06, 0x05}, /* VSEN13 */
172 {0x06, 0x06}, /* VSEN14 */
173 {0x06, 0x07}, /* VSEN15 */
174 {0x06, 0x08}, /* VSEN16 */
175 {0x06, 0x09}, /* VSEN17 */
176};
177
178
179/* 3VDD, 3VSB, VBAT * 0.006 */
180#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */
181#define REST_VLT_END 14 /* the 13th volt to 15th */
182
183#define W83795_REG_FAN(index) (0x2E + (index))
184#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
185#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
186#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
187 (((index) % 1) ? 4 : 0)
792d376b
WS		 188
189#define W83795_REG_VID_CTRL 0x6A
190
191#define ALARM_BEEP_REG_NUM 6
192#define W83795_REG_ALARM(index) (0x41 + (index))
193#define W83795_REG_BEEP(index) (0x50 + (index))
194
195#define W83795_REG_CLR_CHASSIS 0x4D
196
197
198#define W83795_REG_TEMP_NUM 6
199#define W83795_REG_FCMS1 0x201
200#define W83795_REG_FCMS2 0x208
201#define W83795_REG_TFMR(index) (0x202 + (index))
202#define W83795_REG_FOMC 0x20F
792d376b
WS		 203
204#define W83795_REG_TSS(index) (0x209 + (index))
205
206#define PWM_OUTPUT 0
207#define PWM_START 1
208#define PWM_NONSTOP 2
209#define PWM_STOP_TIME 3
01879a85 210#define PWM_FREQ 4
792d376b
WS		 211#define W83795_REG_PWM(index, nr) \
212 (((nr) == 0 ? 0x210 : \
213 (nr) == 1 ? 0x220 : \
214 (nr) == 2 ? 0x228 : \
215 (nr) == 3 ? 0x230 : 0x218) + (index))
216
792d376b
WS		 217#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
218#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
219#define W83795_REG_TFTS 0x250
220
221#define TEMP_PWM_TTTI 0
222#define TEMP_PWM_CTFS 1
223#define TEMP_PWM_HCT 2
224#define TEMP_PWM_HOT 3
225#define W83795_REG_TTTI(index) (0x260 + (index))
226#define W83795_REG_CTFS(index) (0x268 + (index))
227#define W83795_REG_HT(index) (0x270 + (index))
228
229#define SF4_TEMP 0
230#define SF4_PWM 1
231#define W83795_REG_SF4_TEMP(temp_num, index) \
232 (0x280 + 0x10 * (temp_num) + (index))
233#define W83795_REG_SF4_PWM(temp_num, index) \
234 (0x288 + 0x10 * (temp_num) + (index))
235
236#define W83795_REG_DTSC 0x301
237#define W83795_REG_DTSE 0x302
238#define W83795_REG_DTS(index) (0x26 + (index))
239
240#define DTS_CRIT 0
241#define DTS_CRIT_HYST 1
242#define DTS_WARN 2
243#define DTS_WARN_HYST 3
244#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
245
246#define SETUP_PWM_DEFAULT 0
247#define SETUP_PWM_UPTIME 1
248#define SETUP_PWM_DOWNTIME 2
249#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
250
251static inline u16 in_from_reg(u8 index, u16 val)
252{
253 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
254 return val * 6;
255 else
256 return val * 2;
257}
258
259static inline u16 in_to_reg(u8 index, u16 val)
260{
261 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
262 return val / 6;
263 else
264 return val / 2;
265}
266
267static inline unsigned long fan_from_reg(u16 val)
268{
6c82b2f3 269 if ((val == 0xfff) || (val == 0))
792d376b
WS		 270 return 0;
271 return 1350000UL / val;
272}
273
274static inline u16 fan_to_reg(long rpm)
275{
276 if (rpm <= 0)
277 return 0x0fff;
278 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
279}
280
281static inline unsigned long time_from_reg(u8 reg)
282{
283 return reg * 100;
284}
285
286static inline u8 time_to_reg(unsigned long val)
287{
288 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
289}
290
291static inline long temp_from_reg(s8 reg)
292{
293 return reg * 1000;
294}
295
296static inline s8 temp_to_reg(long val, s8 min, s8 max)
297{
298 return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max);
299}
300
01879a85
JD		 301static const u16 pwm_freq_cksel0[16] = {
302 1024, 512, 341, 256, 205, 171, 146, 128,
303 85, 64, 32, 16, 8, 4, 2, 1
304};
305
306static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
307{
308 unsigned long base_clock;
309
310 if (reg & 0x80) {
311 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
312 return base_clock / ((reg & 0x7f) + 1);
313 } else
314 return pwm_freq_cksel0[reg & 0x0f];
315}
316
317static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
318{
319 unsigned long base_clock;
320 u8 reg0, reg1;
321 unsigned long best0, best1;
322
323 /* Best fit for cksel = 0 */
324 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
325 if (val > (pwm_freq_cksel0[reg0] +
326 pwm_freq_cksel0[reg0 + 1]) / 2)
327 break;
328 }
329 if (val < 375) /* cksel = 1 can't beat this */
330 return reg0;
331 best0 = pwm_freq_cksel0[reg0];
332
333 /* Best fit for cksel = 1 */
334 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
335 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
336 best1 = base_clock / reg1;
337 reg1 = 0x80 | (reg1 - 1);
338
339 /* Choose the closest one */
340 if (abs(val - best0) > abs(val - best1))
341 return reg1;
342 else
343 return reg0;
344}
792d376b
WS		 345
346enum chip_types {w83795g, w83795adg};
347
348struct w83795_data {
349 struct device *hwmon_dev;
350 struct mutex update_lock;
351 unsigned long last_updated; /* In jiffies */
352 enum chip_types chip_type;
353
354 u8 bank;
355
356 u32 has_in; /* Enable monitor VIN or not */
0e256018 357 u8 has_dyn_in; /* Only in2-0 can have this */
792d376b
WS		 358 u16 in[21][3]; /* Register value, read/high/low */
359 u8 in_lsb[10][3]; /* LSB Register value, high/low */
360 u8 has_gain; /* has gain: in17-20 * 8 */
361
362 u16 has_fan; /* Enable fan14-1 or not */
363 u16 fan[14]; /* Register value combine */
364 u16 fan_min[14]; /* Register value combine */
365
366 u8 has_temp; /* Enable monitor temp6-1 or not */
367 u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
368 u8 temp_read_vrlsb[6];
369 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */
370 u8 temp_src[3]; /* Register value */
371
372 u8 enable_dts; /* Enable PECI and SB-TSI,
373 * bit 0: =1 enable, =0 disable,
374 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
375 u8 has_dts; /* Enable monitor DTS temp */
376 u8 dts[8]; /* Register value */
377 u8 dts_read_vrlsb[8]; /* Register value */
378 u8 dts_ext[4]; /* Register value */
379
380 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
381 * no config register, only affected by chip
382 * type */
383 u8 pwm[8][5]; /* Register value, output, start, non stop, stop
01879a85
JD		 384 * time, freq */
385 u16 clkin; /* CLKIN frequency in kHz */
792d376b
WS		 386 u8 pwm_fcms[2]; /* Register value */
387 u8 pwm_tfmr[6]; /* Register value */
388 u8 pwm_fomc; /* Register value */
389
390 u16 target_speed[8]; /* Register value, target speed for speed
391 * cruise */
392 u8 tol_speed; /* tolerance of target speed */
393 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
394 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
395
396 u8 setup_pwm[3]; /* Register value */
397
398 u8 alarms[6]; /* Register value */
399 u8 beeps[6]; /* Register value */
400 u8 beep_enable;
401
402 char valid;
403};
404
405/*
406 * Hardware access
b2469f42 407 * We assume that nobdody can change the bank outside the driver.
792d376b
WS		 408 */
409
b2469f42
JD		 410/* Must be called with data->update_lock held, except during initialization */
411static int w83795_set_bank(struct i2c_client *client, u8 bank)
792d376b
WS		 412{
413 struct w83795_data *data = i2c_get_clientdata(client);
b2469f42
JD		 414 int err;
415
416 /* If the same bank is already set, nothing to do */
417 if ((data->bank & 0x07) == bank)
418 return 0;
419
420 /* Change to new bank, preserve all other bits */
421 bank |= data->bank & ~0x07;
422 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
423 if (err < 0) {
424 dev_err(&client->dev,
425 "Failed to set bank to %d, err %d\n",
426 (int)bank, err);
427 return err;
792d376b 428 }
b2469f42
JD		 429 data->bank = bank;
430
431 return 0;
792d376b
WS		 432}
433
434/* Must be called with data->update_lock held, except during initialization */
b2469f42 435static u8 w83795_read(struct i2c_client *client, u16 reg)
792d376b 436{
b2469f42
JD		 437 int err;
438
439 err = w83795_set_bank(client, reg >> 8);
440 if (err < 0)
441 return 0x00; /* Arbitrary */
442
443 err = i2c_smbus_read_byte_data(client, reg & 0xff);
444 if (err < 0) {
445 dev_err(&client->dev,
446 "Failed to read from register 0x%03x, err %d\n",
447 (int)reg, err);
448 return 0x00; /* Arbitrary */
792d376b 449 }
b2469f42
JD		 450 return err;
451}
792d376b 452
b2469f42
JD		 453/* Must be called with data->update_lock held, except during initialization */
454static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
455{
456 int err;
457
458 err = w83795_set_bank(client, reg >> 8);
459 if (err < 0)
460 return err;
461
462 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
463 if (err < 0)
464 dev_err(&client->dev,
465 "Failed to write to register 0x%03x, err %d\n",
466 (int)reg, err);
467 return err;
792d376b
WS		 468}
469
470static struct w83795_data *w83795_update_device(struct device *dev)
471{
472 struct i2c_client *client = to_i2c_client(dev);
473 struct w83795_data *data = i2c_get_clientdata(client);
474 u16 tmp;
475 int i;
476
477 mutex_lock(&data->update_lock);
478
479 if (!(time_after(jiffies, data->last_updated + HZ * 2)
480 || !data->valid))
481 goto END;
482
483 /* Update the voltages value */
484 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
485 if (!(data->has_in & (1 << i)))
486 continue;
487 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
488 tmp |= (w83795_read(client, W83795_REG_VRLSB)
489 >> VRLSB_SHIFT) & 0x03;
490 data->in[i][IN_READ] = tmp;
491 }
492
0e256018
JD		 493 /* in0-2 can have dynamic limits (W83795G only) */
494 if (data->has_dyn_in) {
495 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
496 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
497
498 for (i = 0; i < 3; i++) {
499 if (!(data->has_dyn_in & (1 << i)))
500 continue;
501 data->in[i][IN_MAX] =
502 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
503 data->in[i][IN_LOW] =
504 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
505 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
506 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
507 }
508 }
509
792d376b
WS		 510 /* Update fan */
511 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
512 if (!(data->has_fan & (1 << i)))
513 continue;
514 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
515 data->fan[i] |=
6c82b2f3 516 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F;
792d376b
WS		 517 }
518
519 /* Update temperature */
520 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
521 /* even stop monitor, register still keep value, just read out
522 * it */
523 if (!(data->has_temp & (1 << i))) {
524 data->temp[i][TEMP_READ] = 0;
525 data->temp_read_vrlsb[i] = 0;
526 continue;
527 }
528 data->temp[i][TEMP_READ] =
529 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
530 data->temp_read_vrlsb[i] =
531 w83795_read(client, W83795_REG_VRLSB);
532 }
533
534 /* Update dts temperature */
535 if (data->enable_dts != 0) {
536 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
537 if (!(data->has_dts & (1 << i)))
538 continue;
539 data->dts[i] =
540 w83795_read(client, W83795_REG_DTS(i));
541 data->dts_read_vrlsb[i] =
542 w83795_read(client, W83795_REG_VRLSB);
543 }
544 }
545
546 /* Update pwm output */
547 for (i = 0; i < data->has_pwm; i++) {
548 data->pwm[i][PWM_OUTPUT] =
549 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
550 }
551
552 /* update alarm */
553 for (i = 0; i < ALARM_BEEP_REG_NUM; i++)
554 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
555
556 data->last_updated = jiffies;
557 data->valid = 1;
558
559END:
560 mutex_unlock(&data->update_lock);
561 return data;
562}
563
564/*
565 * Sysfs attributes
566 */
567
568#define ALARM_STATUS 0
569#define BEEP_ENABLE 1
570static ssize_t
571show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
572{
573 struct w83795_data *data = w83795_update_device(dev);
574 struct sensor_device_attribute_2 *sensor_attr =
575 to_sensor_dev_attr_2(attr);
576 int nr = sensor_attr->nr;
577 int index = sensor_attr->index >> 3;
578 int bit = sensor_attr->index & 0x07;
579 u8 val;
580
581 if (ALARM_STATUS == nr) {
582 val = (data->alarms[index] >> (bit)) & 1;
583 } else { /* BEEP_ENABLE */
584 val = (data->beeps[index] >> (bit)) & 1;
585 }
586
587 return sprintf(buf, "%u\n", val);
588}
589
590static ssize_t
591store_beep(struct device *dev, struct device_attribute *attr,
592 const char *buf, size_t count)
593{
594 struct i2c_client *client = to_i2c_client(dev);
595 struct w83795_data *data = i2c_get_clientdata(client);
596 struct sensor_device_attribute_2 *sensor_attr =
597 to_sensor_dev_attr_2(attr);
598 int index = sensor_attr->index >> 3;
599 int shift = sensor_attr->index & 0x07;
600 u8 beep_bit = 1 << shift;
601 unsigned long val;
602
603 if (strict_strtoul(buf, 10, &val) < 0)
604 return -EINVAL;
605 if (val != 0 && val != 1)
606 return -EINVAL;
607
608 mutex_lock(&data->update_lock);
609 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
610 data->beeps[index] &= ~beep_bit;
611 data->beeps[index] |= val << shift;
612 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
613 mutex_unlock(&data->update_lock);
614
615 return count;
616}
617
618static ssize_t
619show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
620{
621 struct i2c_client *client = to_i2c_client(dev);
622 struct w83795_data *data = i2c_get_clientdata(client);
623 return sprintf(buf, "%u\n", data->beep_enable);
624}
625
626static ssize_t
627store_beep_enable(struct device *dev, struct device_attribute *attr,
628 const char *buf, size_t count)
629{
630 struct i2c_client *client = to_i2c_client(dev);
631 struct w83795_data *data = i2c_get_clientdata(client);
632 unsigned long val;
633 u8 tmp;
634
635 if (strict_strtoul(buf, 10, &val) < 0)
636 return -EINVAL;
637 if (val != 0 && val != 1)
638 return -EINVAL;
639
640 mutex_lock(&data->update_lock);
641 data->beep_enable = val;
642 tmp = w83795_read(client, W83795_REG_BEEP(5));
643 tmp &= 0x7f;
644 tmp |= val << 7;
645 w83795_write(client, W83795_REG_BEEP(5), tmp);
646 mutex_unlock(&data->update_lock);
647
648 return count;
649}
650
651/* Write any value to clear chassis alarm */
652static ssize_t
653store_chassis_clear(struct device *dev,
654 struct device_attribute *attr, const char *buf,
655 size_t count)
656{
657 struct i2c_client *client = to_i2c_client(dev);
658 struct w83795_data *data = i2c_get_clientdata(client);
659 u8 val;
660
661 mutex_lock(&data->update_lock);
662 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
663 val |= 0x80;
664 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
665 mutex_unlock(&data->update_lock);
666 return count;
667}
668
669#define FAN_INPUT 0
670#define FAN_MIN 1
671static ssize_t
672show_fan(struct device *dev, struct device_attribute *attr, char *buf)
673{
674 struct sensor_device_attribute_2 *sensor_attr =
675 to_sensor_dev_attr_2(attr);
676 int nr = sensor_attr->nr;
677 int index = sensor_attr->index;
678 struct w83795_data *data = w83795_update_device(dev);
679 u16 val;
680
681 if (FAN_INPUT == nr)
682 val = data->fan[index] & 0x0fff;
683 else
684 val = data->fan_min[index] & 0x0fff;
685
686 return sprintf(buf, "%lu\n", fan_from_reg(val));
687}
688
689static ssize_t
690store_fan_min(struct device *dev, struct device_attribute *attr,
691 const char *buf, size_t count)
692{
693 struct sensor_device_attribute_2 *sensor_attr =
694 to_sensor_dev_attr_2(attr);
695 int index = sensor_attr->index;
696 struct i2c_client *client = to_i2c_client(dev);
697 struct w83795_data *data = i2c_get_clientdata(client);
698 unsigned long val;
699
700 if (strict_strtoul(buf, 10, &val))
701 return -EINVAL;
702 val = fan_to_reg(val);
703
704 mutex_lock(&data->update_lock);
705 data->fan_min[index] = val;
706 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
707 val &= 0x0f;
708 if (index % 1) {
709 val <<= 4;
710 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
711 & 0x0f;
712 } else {
713 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
714 & 0xf0;
715 }
716 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
717 mutex_unlock(&data->update_lock);
718
719 return count;
720}
721
722static ssize_t
723show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
724{
725 struct w83795_data *data = w83795_update_device(dev);
726 struct sensor_device_attribute_2 *sensor_attr =
727 to_sensor_dev_attr_2(attr);
728 int nr = sensor_attr->nr;
729 int index = sensor_attr->index;
01879a85 730 unsigned int val;
792d376b
WS		 731
732 switch (nr) {
733 case PWM_STOP_TIME:
734 val = time_from_reg(data->pwm[index][nr]);
735 break;
01879a85
JD		 736 case PWM_FREQ:
737 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
792d376b
WS		 738 break;
739 default:
740 val = data->pwm[index][nr];
741 break;
742 }
743
744 return sprintf(buf, "%u\n", val);
745}
746
747static ssize_t
748store_pwm(struct device *dev, struct device_attribute *attr,
749 const char *buf, size_t count)
750{
751 struct i2c_client *client = to_i2c_client(dev);
752 struct w83795_data *data = i2c_get_clientdata(client);
753 struct sensor_device_attribute_2 *sensor_attr =
754 to_sensor_dev_attr_2(attr);
755 int nr = sensor_attr->nr;
756 int index = sensor_attr->index;
757 unsigned long val;
792d376b
WS		 758
759 if (strict_strtoul(buf, 10, &val) < 0)
760 return -EINVAL;
761
762 mutex_lock(&data->update_lock);
763 switch (nr) {
764 case PWM_STOP_TIME:
765 val = time_to_reg(val);
766 break;
01879a85
JD		 767 case PWM_FREQ:
768 val = pwm_freq_to_reg(val, data->clkin);
792d376b
WS		 769 break;
770 default:
771 val = SENSORS_LIMIT(val, 0, 0xff);
772 break;
773 }
774 w83795_write(client, W83795_REG_PWM(index, nr), val);
01879a85 775 data->pwm[index][nr] = val;
792d376b
WS		 776 mutex_unlock(&data->update_lock);
777 return count;
792d376b
WS		 778}
779
780static ssize_t
781show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
782{
783 struct sensor_device_attribute_2 *sensor_attr =
784 to_sensor_dev_attr_2(attr);
785 struct i2c_client *client = to_i2c_client(dev);
786 struct w83795_data *data = i2c_get_clientdata(client);
787 int index = sensor_attr->index;
788 u8 tmp;
789
790 if (1 == (data->pwm_fcms[0] & (1 << index))) {
791 tmp = 2;
792 goto out;
793 }
794 for (tmp = 0; tmp < 6; tmp++) {
795 if (data->pwm_tfmr[tmp] & (1 << index)) {
796 tmp = 3;
797 goto out;
798 }
799 }
800 if (data->pwm_fomc & (1 << index))
801 tmp = 0;
802 else
803 tmp = 1;
804
805out:
806 return sprintf(buf, "%u\n", tmp);
807}
808
809static ssize_t
810store_pwm_enable(struct device *dev, struct device_attribute *attr,
811 const char *buf, size_t count)
812{
813 struct i2c_client *client = to_i2c_client(dev);
814 struct w83795_data *data = i2c_get_clientdata(client);
815 struct sensor_device_attribute_2 *sensor_attr =
816 to_sensor_dev_attr_2(attr);
817 int index = sensor_attr->index;
818 unsigned long val;
819 int i;
820
821 if (strict_strtoul(buf, 10, &val) < 0)
822 return -EINVAL;
823 if (val > 2)
824 return -EINVAL;
825
826 mutex_lock(&data->update_lock);
827 switch (val) {
828 case 0:
829 case 1:
830 data->pwm_fcms[0] &= ~(1 << index);
831 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
832 for (i = 0; i < 6; i++) {
833 data->pwm_tfmr[i] &= ~(1 << index);
834 w83795_write(client, W83795_REG_TFMR(i),
835 data->pwm_tfmr[i]);
836 }
837 data->pwm_fomc |= 1 << index;
838 data->pwm_fomc ^= val << index;
839 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
840 break;
841 case 2:
842 data->pwm_fcms[0] |= (1 << index);
843 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
844 break;
845 }
846 mutex_unlock(&data->update_lock);
847 return count;
792d376b
WS		 848}
849
850static ssize_t
851show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
852{
853 struct sensor_device_attribute_2 *sensor_attr =
854 to_sensor_dev_attr_2(attr);
855 struct i2c_client *client = to_i2c_client(dev);
856 struct w83795_data *data = i2c_get_clientdata(client);
857 int index = sensor_attr->index;
858 u8 val = index / 2;
859 u8 tmp = data->temp_src[val];
860
861 if (index % 1)
862 val = 4;
863 else
864 val = 0;
865 tmp >>= val;
866 tmp &= 0x0f;
867
868 return sprintf(buf, "%u\n", tmp);
869}
870
871static ssize_t
872store_temp_src(struct device *dev, struct device_attribute *attr,
873 const char *buf, size_t count)
874{
875 struct i2c_client *client = to_i2c_client(dev);
876 struct w83795_data *data = i2c_get_clientdata(client);
877 struct sensor_device_attribute_2 *sensor_attr =
878 to_sensor_dev_attr_2(attr);
879 int index = sensor_attr->index;
880 unsigned long tmp;
881 u8 val = index / 2;
882
883 if (strict_strtoul(buf, 10, &tmp) < 0)
884 return -EINVAL;
885 tmp = SENSORS_LIMIT(tmp, 0, 15);
886
887 mutex_lock(&data->update_lock);
888 if (index % 1) {
889 tmp <<= 4;
890 data->temp_src[val] &= 0x0f;
891 } else {
892 data->temp_src[val] &= 0xf0;
893 }
894 data->temp_src[val] |= tmp;
895 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
896 mutex_unlock(&data->update_lock);
897
898 return count;
899}
900
901#define TEMP_PWM_ENABLE 0
902#define TEMP_PWM_FAN_MAP 1
903static ssize_t
904show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
905 char *buf)
906{
907 struct i2c_client *client = to_i2c_client(dev);
908 struct w83795_data *data = i2c_get_clientdata(client);
909 struct sensor_device_attribute_2 *sensor_attr =
910 to_sensor_dev_attr_2(attr);
911 int nr = sensor_attr->nr;
912 int index = sensor_attr->index;
913 u8 tmp = 0xff;
914
915 switch (nr) {
916 case TEMP_PWM_ENABLE:
917 tmp = (data->pwm_fcms[1] >> index) & 1;
918 if (tmp)
919 tmp = 4;
920 else
921 tmp = 3;
922 break;
923 case TEMP_PWM_FAN_MAP:
924 tmp = data->pwm_tfmr[index];
925 break;
926 }
927
928 return sprintf(buf, "%u\n", tmp);
929}
930
931static ssize_t
932store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
933 const char *buf, size_t count)
934{
935 struct i2c_client *client = to_i2c_client(dev);
936 struct w83795_data *data = i2c_get_clientdata(client);
937 struct sensor_device_attribute_2 *sensor_attr =
938 to_sensor_dev_attr_2(attr);
939 int nr = sensor_attr->nr;
940 int index = sensor_attr->index;
941 unsigned long tmp;
942
943 if (strict_strtoul(buf, 10, &tmp) < 0)
944 return -EINVAL;
945
946 switch (nr) {
947 case TEMP_PWM_ENABLE:
948 if ((tmp != 3) && (tmp != 4))
949 return -EINVAL;
950 tmp -= 3;
951 mutex_lock(&data->update_lock);
952 data->pwm_fcms[1] &= ~(1 << index);
953 data->pwm_fcms[1] |= tmp << index;
954 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
955 mutex_unlock(&data->update_lock);
956 break;
957 case TEMP_PWM_FAN_MAP:
958 mutex_lock(&data->update_lock);
959 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
960 w83795_write(client, W83795_REG_TFMR(index), tmp);
961 data->pwm_tfmr[index] = tmp;
962 mutex_unlock(&data->update_lock);
963 break;
964 }
965 return count;
966}
967
968#define FANIN_TARGET 0
969#define FANIN_TOL 1
970static ssize_t
971show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
972{
973 struct i2c_client *client = to_i2c_client(dev);
974 struct w83795_data *data = i2c_get_clientdata(client);
975 struct sensor_device_attribute_2 *sensor_attr =
976 to_sensor_dev_attr_2(attr);
977 int nr = sensor_attr->nr;
978 int index = sensor_attr->index;
979 u16 tmp = 0;
980
981 switch (nr) {
982 case FANIN_TARGET:
983 tmp = fan_from_reg(data->target_speed[index]);
984 break;
985 case FANIN_TOL:
986 tmp = data->tol_speed;
987 break;
988 }
989
990 return sprintf(buf, "%u\n", tmp);
991}
992
993static ssize_t
994store_fanin(struct device *dev, struct device_attribute *attr,
995 const char *buf, size_t count)
996{
997 struct i2c_client *client = to_i2c_client(dev);
998 struct w83795_data *data = i2c_get_clientdata(client);
999 struct sensor_device_attribute_2 *sensor_attr =
1000 to_sensor_dev_attr_2(attr);
1001 int nr = sensor_attr->nr;
1002 int index = sensor_attr->index;
1003 unsigned long val;
1004
1005 if (strict_strtoul(buf, 10, &val) < 0)
1006 return -EINVAL;
1007
1008 mutex_lock(&data->update_lock);
1009 switch (nr) {
1010 case FANIN_TARGET:
1011 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
1012 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
1013 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1014 data->target_speed[index] = val;
1015 break;
1016 case FANIN_TOL:
1017 val = SENSORS_LIMIT(val, 0, 0x3f);
1018 w83795_write(client, W83795_REG_TFTS, val);
1019 data->tol_speed = val;
1020 break;
1021 }
1022 mutex_unlock(&data->update_lock);
1023
1024 return count;
1025}
1026
1027
1028static ssize_t
1029show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1030{
1031 struct i2c_client *client = to_i2c_client(dev);
1032 struct w83795_data *data = i2c_get_clientdata(client);
1033 struct sensor_device_attribute_2 *sensor_attr =
1034 to_sensor_dev_attr_2(attr);
1035 int nr = sensor_attr->nr;
1036 int index = sensor_attr->index;
1037 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1038
1039 return sprintf(buf, "%ld\n", tmp);
1040}
1041
1042static ssize_t
1043store_temp_pwm(struct device *dev, struct device_attribute *attr,
1044 const char *buf, size_t count)
1045{
1046 struct i2c_client *client = to_i2c_client(dev);
1047 struct w83795_data *data = i2c_get_clientdata(client);
1048 struct sensor_device_attribute_2 *sensor_attr =
1049 to_sensor_dev_attr_2(attr);
1050 int nr = sensor_attr->nr;
1051 int index = sensor_attr->index;
1052 unsigned long val;
1053 u8 tmp;
1054
1055 if (strict_strtoul(buf, 10, &val) < 0)
1056 return -EINVAL;
1057 val /= 1000;
1058
1059 mutex_lock(&data->update_lock);
1060 switch (nr) {
1061 case TEMP_PWM_TTTI:
1062 val = SENSORS_LIMIT(val, 0, 0x7f);
1063 w83795_write(client, W83795_REG_TTTI(index), val);
1064 break;
1065 case TEMP_PWM_CTFS:
1066 val = SENSORS_LIMIT(val, 0, 0x7f);
1067 w83795_write(client, W83795_REG_CTFS(index), val);
1068 break;
1069 case TEMP_PWM_HCT:
1070 val = SENSORS_LIMIT(val, 0, 0x0f);
1071 tmp = w83795_read(client, W83795_REG_HT(index));
1072 tmp &= 0x0f;
1073 tmp |= (val << 4) & 0xf0;
1074 w83795_write(client, W83795_REG_HT(index), tmp);
1075 break;
1076 case TEMP_PWM_HOT:
1077 val = SENSORS_LIMIT(val, 0, 0x0f);
1078 tmp = w83795_read(client, W83795_REG_HT(index));
1079 tmp &= 0xf0;
1080 tmp |= val & 0x0f;
1081 w83795_write(client, W83795_REG_HT(index), tmp);
1082 break;
1083 }
1084 data->pwm_temp[index][nr] = val;
1085 mutex_unlock(&data->update_lock);
1086
1087 return count;
1088}
1089
1090static ssize_t
1091show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1092{
1093 struct i2c_client *client = to_i2c_client(dev);
1094 struct w83795_data *data = i2c_get_clientdata(client);
1095 struct sensor_device_attribute_2 *sensor_attr =
1096 to_sensor_dev_attr_2(attr);
1097 int nr = sensor_attr->nr;
1098 int index = sensor_attr->index;
1099
1100 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1101}
1102
1103static ssize_t
1104store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1105 const char *buf, size_t count)
1106{
1107 struct i2c_client *client = to_i2c_client(dev);
1108 struct w83795_data *data = i2c_get_clientdata(client);
1109 struct sensor_device_attribute_2 *sensor_attr =
1110 to_sensor_dev_attr_2(attr);
1111 int nr = sensor_attr->nr;
1112 int index = sensor_attr->index;
1113 unsigned long val;
1114
1115 if (strict_strtoul(buf, 10, &val) < 0)
1116 return -EINVAL;
1117
1118 mutex_lock(&data->update_lock);
1119 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1120 data->sf4_reg[index][SF4_PWM][nr] = val;
1121 mutex_unlock(&data->update_lock);
1122
1123 return count;
1124}
1125
1126static ssize_t
1127show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1128{
1129 struct i2c_client *client = to_i2c_client(dev);
1130 struct w83795_data *data = i2c_get_clientdata(client);
1131 struct sensor_device_attribute_2 *sensor_attr =
1132 to_sensor_dev_attr_2(attr);
1133 int nr = sensor_attr->nr;
1134 int index = sensor_attr->index;
1135
1136 return sprintf(buf, "%u\n",
1137 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1138}
1139
1140static ssize_t
1141store_sf4_temp(struct device *dev, struct device_attribute *attr,
1142 const char *buf, size_t count)
1143{
1144 struct i2c_client *client = to_i2c_client(dev);
1145 struct w83795_data *data = i2c_get_clientdata(client);
1146 struct sensor_device_attribute_2 *sensor_attr =
1147 to_sensor_dev_attr_2(attr);
1148 int nr = sensor_attr->nr;
1149 int index = sensor_attr->index;
1150 unsigned long val;
1151
1152 if (strict_strtoul(buf, 10, &val) < 0)
1153 return -EINVAL;
1154 val /= 1000;
1155
1156 mutex_lock(&data->update_lock);
1157 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1158 data->sf4_reg[index][SF4_TEMP][nr] = val;
1159 mutex_unlock(&data->update_lock);
1160
1161 return count;
1162}
1163
1164
1165static ssize_t
1166show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1167{
1168 struct sensor_device_attribute_2 *sensor_attr =
1169 to_sensor_dev_attr_2(attr);
1170 int nr = sensor_attr->nr;
1171 int index = sensor_attr->index;
1172 struct w83795_data *data = w83795_update_device(dev);
1173 long temp = temp_from_reg(data->temp[index][nr] & 0x7f);
1174
1175 if (TEMP_READ == nr)
1176 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03)
1177 * 250;
1178 if (data->temp[index][nr] & 0x80)
1179 temp = -temp;
1180 return sprintf(buf, "%ld\n", temp);
1181}
1182
1183static ssize_t
1184store_temp(struct device *dev, struct device_attribute *attr,
1185 const char *buf, size_t count)
1186{
1187 struct sensor_device_attribute_2 *sensor_attr =
1188 to_sensor_dev_attr_2(attr);
1189 int nr = sensor_attr->nr;
1190 int index = sensor_attr->index;
1191 struct i2c_client *client = to_i2c_client(dev);
1192 struct w83795_data *data = i2c_get_clientdata(client);
1193 long tmp;
1194
1195 if (strict_strtol(buf, 10, &tmp) < 0)
1196 return -EINVAL;
1197
1198 mutex_lock(&data->update_lock);
1199 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1200 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1201 mutex_unlock(&data->update_lock);
1202 return count;
1203}
1204
1205
1206static ssize_t
1207show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1208{
1209 struct i2c_client *client = to_i2c_client(dev);
1210 struct w83795_data *data = i2c_get_clientdata(client);
1211 struct sensor_device_attribute_2 *sensor_attr =
1212 to_sensor_dev_attr_2(attr);
1213 int index = sensor_attr->index;
1214 u8 tmp;
1215
1216 if (data->enable_dts == 0)
1217 return sprintf(buf, "%d\n", 0);
1218
1219 if ((data->has_dts >> index) & 0x01) {
1220 if (data->enable_dts & 2)
1221 tmp = 5;
1222 else
1223 tmp = 6;
1224 } else {
1225 tmp = 0;
1226 }
1227
1228 return sprintf(buf, "%d\n", tmp);
1229}
1230
1231static ssize_t
1232show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1233{
1234 struct sensor_device_attribute_2 *sensor_attr =
1235 to_sensor_dev_attr_2(attr);
1236 int index = sensor_attr->index;
1237 struct w83795_data *data = w83795_update_device(dev);
1238 long temp = temp_from_reg(data->dts[index] & 0x7f);
1239
1240 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250;
1241 if (data->dts[index] & 0x80)
1242 temp = -temp;
1243 return sprintf(buf, "%ld\n", temp);
1244}
1245
1246static ssize_t
1247show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1248{
1249 struct sensor_device_attribute_2 *sensor_attr =
1250 to_sensor_dev_attr_2(attr);
1251 int nr = sensor_attr->nr;
1252 struct i2c_client *client = to_i2c_client(dev);
1253 struct w83795_data *data = i2c_get_clientdata(client);
1254 long temp = temp_from_reg(data->dts_ext[nr] & 0x7f);
1255
1256 if (data->dts_ext[nr] & 0x80)
1257 temp = -temp;
1258 return sprintf(buf, "%ld\n", temp);
1259}
1260
1261static ssize_t
1262store_dts_ext(struct device *dev, struct device_attribute *attr,
1263 const char *buf, size_t count)
1264{
1265 struct sensor_device_attribute_2 *sensor_attr =
1266 to_sensor_dev_attr_2(attr);
1267 int nr = sensor_attr->nr;
1268 struct i2c_client *client = to_i2c_client(dev);
1269 struct w83795_data *data = i2c_get_clientdata(client);
1270 long tmp;
1271
1272 if (strict_strtol(buf, 10, &tmp) < 0)
1273 return -EINVAL;
1274
1275 mutex_lock(&data->update_lock);
1276 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1277 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1278 mutex_unlock(&data->update_lock);
1279 return count;
1280}
1281
1282
1283/*
1284 Type 3: Thermal diode
1285 Type 4: Thermistor
1286
1287 Temp5-6, default TR
1288 Temp1-4, default TD
1289*/
1290
1291static ssize_t
1292show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1293{
1294 struct i2c_client *client = to_i2c_client(dev);
1295 struct w83795_data *data = i2c_get_clientdata(client);
1296 struct sensor_device_attribute_2 *sensor_attr =
1297 to_sensor_dev_attr_2(attr);
1298 int index = sensor_attr->index;
1299 u8 tmp;
1300
1301 if (data->has_temp >> index & 0x01) {
1302 if (data->temp_mode >> index & 0x01)
1303 tmp = 3;
1304 else
1305 tmp = 4;
1306 } else {
1307 tmp = 0;
1308 }
1309
1310 return sprintf(buf, "%d\n", tmp);
1311}
1312
1313static ssize_t
1314store_temp_mode(struct device *dev, struct device_attribute *attr,
1315 const char *buf, size_t count)
1316{
1317 struct i2c_client *client = to_i2c_client(dev);
1318 struct w83795_data *data = i2c_get_clientdata(client);
1319 struct sensor_device_attribute_2 *sensor_attr =
1320 to_sensor_dev_attr_2(attr);
1321 int index = sensor_attr->index;
1322 unsigned long val;
1323 u8 tmp;
1324 u32 mask;
1325
1326 if (strict_strtoul(buf, 10, &val) < 0)
1327 return -EINVAL;
1328 if ((val != 4) && (val != 3))
1329 return -EINVAL;
1330 if ((index > 3) && (val == 3))
1331 return -EINVAL;
1332
1333 mutex_lock(&data->update_lock);
1334 if (val == 3) {
1335 val = TEMP_CTRL_TD;
1336 data->has_temp |= 1 << index;
1337 data->temp_mode |= 1 << index;
1338 } else if (val == 4) {
1339 val = TEMP_CTRL_TR;
1340 data->has_temp |= 1 << index;
1341 tmp = 1 << index;
1342 data->temp_mode &= ~tmp;
1343 }
1344
1345 if (index > 3)
1346 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1347 else
1348 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1349
1350 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT];
1351 tmp &= ~mask;
1352 tmp |= W83795_REG_TEMP_CTRL[index][val];
1353
1354 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT];
1355 data->has_in &= ~mask;
1356
1357 if (index > 3)
1358 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp);
1359 else
1360 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1361
1362 mutex_unlock(&data->update_lock);
1363 return count;
1364}
1365
1366
1367/* show/store VIN */
1368static ssize_t
1369show_in(struct device *dev, struct device_attribute *attr, char *buf)
1370{
1371 struct sensor_device_attribute_2 *sensor_attr =
1372 to_sensor_dev_attr_2(attr);
1373 int nr = sensor_attr->nr;
1374 int index = sensor_attr->index;
1375 struct w83795_data *data = w83795_update_device(dev);
1376 u16 val = data->in[index][nr];
1377 u8 lsb_idx;
1378
1379 switch (nr) {
1380 case IN_READ:
1381 /* calculate this value again by sensors as sensors3.conf */
1382 if ((index >= 17) &&
6f9dfd85 1383 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1384 val *= 8;
1385 break;
1386 case IN_MAX:
1387 case IN_LOW:
1388 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1389 val <<= 2;
1390 val |= (data->in_lsb[lsb_idx][nr] >>
1391 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1392 if ((index >= 17) &&
6f9dfd85 1393 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1394 val *= 8;
1395 break;
1396 }
1397 val = in_from_reg(index, val);
1398
1399 return sprintf(buf, "%d\n", val);
1400}
1401
1402static ssize_t
1403store_in(struct device *dev, struct device_attribute *attr,
1404 const char *buf, size_t count)
1405{
1406 struct sensor_device_attribute_2 *sensor_attr =
1407 to_sensor_dev_attr_2(attr);
1408 int nr = sensor_attr->nr;
1409 int index = sensor_attr->index;
1410 struct i2c_client *client = to_i2c_client(dev);
1411 struct w83795_data *data = i2c_get_clientdata(client);
1412 unsigned long val;
1413 u8 tmp;
1414 u8 lsb_idx;
1415
1416 if (strict_strtoul(buf, 10, &val) < 0)
1417 return -EINVAL;
1418 val = in_to_reg(index, val);
1419
1420 if ((index >= 17) &&
6f9dfd85 1421 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1422 val /= 8;
1423 val = SENSORS_LIMIT(val, 0, 0x3FF);
1424 mutex_lock(&data->update_lock);
1425
1426 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1427 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1428 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1429 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1430 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1431 data->in_lsb[lsb_idx][nr] = tmp;
1432
1433 tmp = (val >> 2) & 0xff;
1434 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1435 data->in[index][nr] = tmp;
1436
1437 mutex_unlock(&data->update_lock);
1438 return count;
1439}
1440
1441
1442static ssize_t
1443show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1444{
1445 struct sensor_device_attribute_2 *sensor_attr =
1446 to_sensor_dev_attr_2(attr);
1447 int nr = sensor_attr->nr;
1448 struct i2c_client *client = to_i2c_client(dev);
1449 struct w83795_data *data = i2c_get_clientdata(client);
1450 u16 val = data->setup_pwm[nr];
1451
1452 switch (nr) {
1453 case SETUP_PWM_UPTIME:
1454 case SETUP_PWM_DOWNTIME:
1455 val = time_from_reg(val);
1456 break;
1457 }
1458
1459 return sprintf(buf, "%d\n", val);
1460}
1461
1462static ssize_t
1463store_sf_setup(struct device *dev, struct device_attribute *attr,
1464 const char *buf, size_t count)
1465{
1466 struct sensor_device_attribute_2 *sensor_attr =
1467 to_sensor_dev_attr_2(attr);
1468 int nr = sensor_attr->nr;
1469 struct i2c_client *client = to_i2c_client(dev);
1470 struct w83795_data *data = i2c_get_clientdata(client);
1471 unsigned long val;
1472
1473 if (strict_strtoul(buf, 10, &val) < 0)
1474 return -EINVAL;
1475
1476 switch (nr) {
1477 case SETUP_PWM_DEFAULT:
1478 val = SENSORS_LIMIT(val, 0, 0xff);
1479 break;
1480 case SETUP_PWM_UPTIME:
1481 case SETUP_PWM_DOWNTIME:
1482 val = time_to_reg(val);
1483 if (val == 0)
1484 return -EINVAL;
1485 break;
1486 }
1487
1488 mutex_lock(&data->update_lock);
1489 data->setup_pwm[nr] = val;
1490 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1491 mutex_unlock(&data->update_lock);
1492 return count;
1493}
1494
1495
1496#define NOT_USED -1
1497
0e256018
JD		 1498/* Don't change the attribute order, _max and _min are accessed by index
1499 * somewhere else in the code */
87df0dad 1500#define SENSOR_ATTR_IN(index) { \
792d376b
WS		 1501 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1502 IN_READ, index), \
1503 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1504 store_in, IN_MAX, index), \
1505 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1506 store_in, IN_LOW, index), \
1507 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1508 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1509 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1510 show_alarm_beep, store_beep, BEEP_ENABLE, \
87df0dad 1511 index + ((index > 14) ? 1 : 0)) }
792d376b 1512
87df0dad 1513#define SENSOR_ATTR_FAN(index) { \
792d376b
WS		 1514 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1515 NULL, FAN_INPUT, index - 1), \
1516 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1517 show_fan, store_fan_min, FAN_MIN, index - 1), \
1518 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1519 NULL, ALARM_STATUS, index + 31), \
1520 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1521 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
792d376b 1522
b5f6a90a 1523#define SENSOR_ATTR_PWM(index) { \
792d376b
WS		 1524 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1525 store_pwm, PWM_OUTPUT, index - 1), \
1526 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1527 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1528 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1529 show_pwm, store_pwm, PWM_START, index - 1), \
1530 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1531 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
01879a85
JD		 1532 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1533 show_pwm, store_pwm, PWM_FREQ, index - 1), \
792d376b 1534 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
b2cc528e
JD		 1535 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1536 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1537 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
792d376b 1538
87df0dad 1539#define SENSOR_ATTR_DTS(index) { \
792d376b
WS		 1540 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1541 show_dts_mode, NULL, NOT_USED, index - 7), \
1542 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1543 NULL, NOT_USED, index - 7), \
a0ce402f 1544 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1545 store_dts_ext, DTS_CRIT, NOT_USED), \
a0ce402f 1546 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1547 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
a0ce402f 1548 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1549 store_dts_ext, DTS_WARN, NOT_USED), \
a0ce402f 1550 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1551 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1552 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1553 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1554 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1555 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
792d376b 1556
87df0dad 1557#define SENSOR_ATTR_TEMP(index) { \
792d376b
WS		 1558 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1559 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1560 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1561 NULL, TEMP_READ, index - 1), \
a0ce402f 1562 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1563 store_temp, TEMP_CRIT, index - 1), \
a0ce402f 1564 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1565 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
a0ce402f 1566 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1567 store_temp, TEMP_WARN, index - 1), \
a0ce402f 1568 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1569 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1570 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1571 show_alarm_beep, NULL, ALARM_STATUS, \
1572 index + (index > 4 ? 11 : 17)), \
1573 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1574 show_alarm_beep, store_beep, BEEP_ENABLE, \
1575 index + (index > 4 ? 11 : 17)), \
1576 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1577 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1578 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1579 show_temp_pwm_enable, store_temp_pwm_enable, \
1580 TEMP_PWM_ENABLE, index - 1), \
1581 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1582 show_temp_pwm_enable, store_temp_pwm_enable, \
1583 TEMP_PWM_FAN_MAP, index - 1), \
1584 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1585 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
a0ce402f 1586 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
792d376b 1587 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
a0ce402f 1588 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
792d376b
WS		 1589 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1590 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1591 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1592 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1593 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1594 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1595 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1596 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1597 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1598 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1599 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1600 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1601 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1602 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1603 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1604 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1605 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1606 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1607 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1608 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1609 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1610 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1611 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1612 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1613 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1614 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1615 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1616 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1617 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1618 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
87df0dad 1619 show_sf4_temp, store_sf4_temp, 6, index - 1) }
792d376b
WS		 1620
1621
87df0dad 1622static struct sensor_device_attribute_2 w83795_in[][5] = {
792d376b
WS		 1623 SENSOR_ATTR_IN(0),
1624 SENSOR_ATTR_IN(1),
1625 SENSOR_ATTR_IN(2),
1626 SENSOR_ATTR_IN(3),
1627 SENSOR_ATTR_IN(4),
1628 SENSOR_ATTR_IN(5),
1629 SENSOR_ATTR_IN(6),
1630 SENSOR_ATTR_IN(7),
1631 SENSOR_ATTR_IN(8),
1632 SENSOR_ATTR_IN(9),
1633 SENSOR_ATTR_IN(10),
1634 SENSOR_ATTR_IN(11),
1635 SENSOR_ATTR_IN(12),
1636 SENSOR_ATTR_IN(13),
1637 SENSOR_ATTR_IN(14),
1638 SENSOR_ATTR_IN(15),
1639 SENSOR_ATTR_IN(16),
1640 SENSOR_ATTR_IN(17),
1641 SENSOR_ATTR_IN(18),
1642 SENSOR_ATTR_IN(19),
1643 SENSOR_ATTR_IN(20),
1644};
1645
86ef4d2f 1646static const struct sensor_device_attribute_2 w83795_fan[][4] = {
792d376b
WS		 1647 SENSOR_ATTR_FAN(1),
1648 SENSOR_ATTR_FAN(2),
1649 SENSOR_ATTR_FAN(3),
1650 SENSOR_ATTR_FAN(4),
1651 SENSOR_ATTR_FAN(5),
1652 SENSOR_ATTR_FAN(6),
1653 SENSOR_ATTR_FAN(7),
1654 SENSOR_ATTR_FAN(8),
1655 SENSOR_ATTR_FAN(9),
1656 SENSOR_ATTR_FAN(10),
1657 SENSOR_ATTR_FAN(11),
1658 SENSOR_ATTR_FAN(12),
1659 SENSOR_ATTR_FAN(13),
1660 SENSOR_ATTR_FAN(14),
1661};
1662
86ef4d2f 1663static const struct sensor_device_attribute_2 w83795_temp[][29] = {
792d376b
WS		 1664 SENSOR_ATTR_TEMP(1),
1665 SENSOR_ATTR_TEMP(2),
1666 SENSOR_ATTR_TEMP(3),
1667 SENSOR_ATTR_TEMP(4),
1668 SENSOR_ATTR_TEMP(5),
1669 SENSOR_ATTR_TEMP(6),
1670};
1671
86ef4d2f 1672static const struct sensor_device_attribute_2 w83795_dts[][8] = {
792d376b
WS		 1673 SENSOR_ATTR_DTS(7),
1674 SENSOR_ATTR_DTS(8),
1675 SENSOR_ATTR_DTS(9),
1676 SENSOR_ATTR_DTS(10),
1677 SENSOR_ATTR_DTS(11),
1678 SENSOR_ATTR_DTS(12),
1679 SENSOR_ATTR_DTS(13),
1680 SENSOR_ATTR_DTS(14),
1681};
1682
86ef4d2f 1683static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
b5f6a90a
JD		 1684 SENSOR_ATTR_PWM(1),
1685 SENSOR_ATTR_PWM(2),
792d376b
WS		 1686 SENSOR_ATTR_PWM(3),
1687 SENSOR_ATTR_PWM(4),
1688 SENSOR_ATTR_PWM(5),
1689 SENSOR_ATTR_PWM(6),
1690 SENSOR_ATTR_PWM(7),
1691 SENSOR_ATTR_PWM(8),
1692};
1693
86ef4d2f 1694static const struct sensor_device_attribute_2 sda_single_files[] = {
792d376b
WS		 1695 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1696 store_chassis_clear, ALARM_STATUS, 46),
1697 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1698 store_beep_enable, NOT_USED, NOT_USED),
1699 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1700 store_fanin, FANIN_TOL, NOT_USED),
1701 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1702 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1703 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1704 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1705 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1706 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1707};
1708
1709/*
1710 * Driver interface
1711 */
1712
1713static void w83795_init_client(struct i2c_client *client)
1714{
01879a85
JD		 1715 struct w83795_data *data = i2c_get_clientdata(client);
1716 static const u16 clkin[4] = { /* in kHz */
1717 14318, 24000, 33333, 48000
1718 };
80646b95
JD		 1719 u8 config;
1720
792d376b
WS		 1721 if (reset)
1722 w83795_write(client, W83795_REG_CONFIG, 0x80);
1723
80646b95
JD		 1724 /* Start monitoring if needed */
1725 config = w83795_read(client, W83795_REG_CONFIG);
1726 if (!(config & W83795_REG_CONFIG_START)) {
1727 dev_info(&client->dev, "Enabling monitoring operations\n");
1728 w83795_write(client, W83795_REG_CONFIG,
1729 config | W83795_REG_CONFIG_START);
1730 }
01879a85
JD		 1731
1732 data->clkin = clkin[(config >> 3) & 0x3];
1733 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
792d376b
WS		 1734}
1735
2be381de
JD		 1736static int w83795_get_device_id(struct i2c_client *client)
1737{
1738 int device_id;
1739
1740 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1741
1742 /* Special case for rev. A chips; can't be checked first because later
1743 revisions emulate this for compatibility */
1744 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1745 int alt_id;
1746
1747 alt_id = i2c_smbus_read_byte_data(client,
1748 W83795_REG_DEVICEID_A);
1749 if (alt_id == 0x50)
1750 device_id = alt_id;
1751 }
1752
1753 return device_id;
1754}
1755
792d376b
WS		 1756/* Return 0 if detection is successful, -ENODEV otherwise */
1757static int w83795_detect(struct i2c_client *client,
1758 struct i2c_board_info *info)
1759{
2be381de 1760 int bank, vendor_id, device_id, expected, i2c_addr, config;
792d376b
WS		 1761 struct i2c_adapter *adapter = client->adapter;
1762 unsigned short address = client->addr;
093d1a47 1763 const char *chip_name;
792d376b
WS		 1764
1765 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1766 return -ENODEV;
1767 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2be381de
JD		 1768 if (bank < 0 || (bank & 0x7c)) {
1769 dev_dbg(&adapter->dev,
1770 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1771 address, "bank");
1772 return -ENODEV;
1773 }
792d376b 1774
792d376b 1775 /* Check Nuvoton vendor ID */
2be381de
JD		 1776 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1777 expected = bank & 0x80 ? 0x5c : 0xa3;
1778 if (vendor_id != expected) {
1779 dev_dbg(&adapter->dev,
1780 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1781 address, "vendor id");
792d376b
WS		 1782 return -ENODEV;
1783 }
1784
2be381de
JD		 1785 /* Check device ID */
1786 device_id = w83795_get_device_id(client) |
1787 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1788 if ((device_id >> 4) != 0x795) {
1789 dev_dbg(&adapter->dev,
1790 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1791 address, "device id\n");
792d376b
WS		 1792 return -ENODEV;
1793 }
1794
2be381de
JD		 1795 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1796 should match */
1797 if ((bank & 0x07) == 0) {
1798 i2c_addr = i2c_smbus_read_byte_data(client,
1799 W83795_REG_I2C_ADDR);
1800 if ((i2c_addr & 0x7f) != address) {
1801 dev_dbg(&adapter->dev,
1802 "w83795: Detection failed at addr 0x%02hx, "
1803 "check %s\n", address, "i2c addr");
1804 return -ENODEV;
1805 }
792d376b
WS		 1806 }
1807
093d1a47
JD		 1808 /* Check 795 chip type: 795G or 795ADG
1809 Usually we don't write to chips during detection, but here we don't
1810 quite have the choice; hopefully it's OK, we are about to return
1811 success anyway */
1812 if ((bank & 0x07) != 0)
1813 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1814 bank & ~0x07);
2be381de
JD		 1815 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1816 if (config & W83795_REG_CONFIG_CONFIG48)
093d1a47 1817 chip_name = "w83795adg";
2be381de 1818 else
093d1a47 1819 chip_name = "w83795g";
792d376b 1820
093d1a47 1821 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
2be381de
JD		 1822 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1823 'A' + (device_id & 0xf), address);
792d376b
WS		 1824
1825 return 0;
1826}
1827
6f3dcde9
JD		 1828static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1829 const struct device_attribute *))
892514a6
JD		 1830{
1831 struct w83795_data *data = dev_get_drvdata(dev);
87df0dad 1832 int err, i, j;
892514a6
JD		 1833
1834 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
87df0dad 1835 if (!(data->has_in & (1 << i)))
892514a6 1836 continue;
87df0dad
JD		 1837 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1838 err = fn(dev, &w83795_in[i][j].dev_attr);
1839 if (err)
1840 return err;
1841 }
892514a6
JD		 1842 }
1843
1844 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
87df0dad 1845 if (!(data->has_fan & (1 << i)))
892514a6 1846 continue;
87df0dad
JD		 1847 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1848 err = fn(dev, &w83795_fan[i][j].dev_attr);
1849 if (err)
1850 return err;
1851 }
892514a6
JD		 1852 }
1853
1854 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
6f3dcde9 1855 err = fn(dev, &sda_single_files[i].dev_attr);
892514a6
JD		 1856 if (err)
1857 return err;
1858 }
1859
b5f6a90a
JD		 1860 for (i = 0; i < data->has_pwm; i++) {
1861 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1862 err = fn(dev, &w83795_pwm[i][j].dev_attr);
892514a6
JD		 1863 if (err)
1864 return err;
1865 }
1866 }
1867
1868 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
87df0dad 1869 if (!(data->has_temp & (1 << i)))
892514a6 1870 continue;
87df0dad
JD		 1871 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1872 err = fn(dev, &w83795_temp[i][j].dev_attr);
1873 if (err)
1874 return err;
1875 }
892514a6
JD		 1876 }
1877
1878 if (data->enable_dts != 0) {
1879 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
87df0dad 1880 if (!(data->has_dts & (1 << i)))
892514a6 1881 continue;
87df0dad
JD		 1882 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1883 err = fn(dev, &w83795_dts[i][j].dev_attr);
1884 if (err)
1885 return err;
1886 }
892514a6
JD		 1887 }
1888 }
1889
892514a6
JD		 1890 return 0;
1891}
1892
6f3dcde9
JD		 1893/* We need a wrapper that fits in w83795_handle_files */
1894static int device_remove_file_wrapper(struct device *dev,
1895 const struct device_attribute *attr)
2fa09878 1896{
6f3dcde9
JD		 1897 device_remove_file(dev, attr);
1898 return 0;
2fa09878
JD		 1899}
1900
0e256018
JD		 1901static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1902{
1903 struct w83795_data *data = i2c_get_clientdata(client);
1904 u8 vid_ctl;
1905 int i, err_max, err_min;
1906
1907 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1908
1909 /* Return immediately if VRM isn't configured */
1910 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1911 return;
1912
1913 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1914 for (i = 0; i < 2; i++) {
1915 if (!(data->has_dyn_in & (1 << i)))
1916 continue;
1917
1918 /* Voltage limits in dynamic mode, switch to read-only */
1919 err_max = sysfs_chmod_file(&client->dev.kobj,
1920 &w83795_in[i][2].dev_attr.attr,
1921 S_IRUGO);
1922 err_min = sysfs_chmod_file(&client->dev.kobj,
1923 &w83795_in[i][3].dev_attr.attr,
1924 S_IRUGO);
1925 if (err_max || err_min)
1926 dev_warn(&client->dev, "Failed to set in%d limits "
1927 "read-only (%d, %d)\n", i, err_max, err_min);
1928 else
1929 dev_info(&client->dev, "in%d limits set dynamically "
1930 "from VID\n", i);
1931 }
1932}
1933
71caf46f
JD		 1934/* Check pins that can be used for either temperature or voltage monitoring */
1935static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1936 int temp_chan, int in_chan)
1937{
1938 /* config is a 2-bit value */
1939 switch (config) {
1940 case 0x2: /* Voltage monitoring */
1941 data->has_in |= 1 << in_chan;
1942 break;
1943 case 0x1: /* Thermal diode */
1944 if (temp_chan >= 4)
1945 break;
1946 data->temp_mode |= 1 << temp_chan;
1947 /* fall through */
1948 case 0x3: /* Thermistor */
1949 data->has_temp |= 1 << temp_chan;
1950 break;
1951 }
1952}
1953
792d376b
WS		 1954static int w83795_probe(struct i2c_client *client,
1955 const struct i2c_device_id *id)
1956{
1957 int i;
1958 u8 tmp;
1959 struct device *dev = &client->dev;
1960 struct w83795_data *data;
71caf46f 1961 int err;
792d376b
WS		 1962
1963 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1964 if (!data) {
1965 err = -ENOMEM;
1966 goto exit;
1967 }
1968
1969 i2c_set_clientdata(client, data);
093d1a47 1970 data->chip_type = id->driver_data;
792d376b
WS		 1971 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1972 mutex_init(&data->update_lock);
1973
1974 /* Initialize the chip */
1975 w83795_init_client(client);
1976
71caf46f
JD		 1977 /* Check which voltages and fans are present */
1978 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
1979 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
1980 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
1981 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
792d376b 1982
71caf46f 1983 /* Check which analog temperatures and extra voltages are present */
792d376b
WS		 1984 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1985 if (tmp & 0x20)
1986 data->enable_dts = 1;
71caf46f
JD		 1987 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
1988 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
792d376b 1989 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
71caf46f
JD		 1990 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
1991 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
1992 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
1993 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
792d376b
WS		 1994
1995 /* Check DTS enable status */
71caf46f 1996 if (data->enable_dts) {
792d376b
WS		 1997 if (1 & w83795_read(client, W83795_REG_DTSC))
1998 data->enable_dts |= 2;
1999 data->has_dts = w83795_read(client, W83795_REG_DTSE);
2000 }
2001
2002 /* First update the voltages measured value and limits */
2003 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
2004 if (!(data->has_in & (1 << i)))
2005 continue;
2006 data->in[i][IN_MAX] =
2007 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
2008 data->in[i][IN_LOW] =
2009 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
2010 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
2011 tmp |= (w83795_read(client, W83795_REG_VRLSB)
2012 >> VRLSB_SHIFT) & 0x03;
2013 data->in[i][IN_READ] = tmp;
2014 }
2015 for (i = 0; i < IN_LSB_REG_NUM; i++) {
2016 data->in_lsb[i][IN_MAX] =
2017 w83795_read(client, IN_LSB_REG(i, IN_MAX));
2018 data->in_lsb[i][IN_LOW] =
2019 w83795_read(client, IN_LSB_REG(i, IN_LOW));
2020 }
2021 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
2022
2023 /* First update fan and limits */
2024 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
2025 if (!(data->has_fan & (1 << i)))
2026 continue;
2027 data->fan_min[i] =
2028 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
2029 data->fan_min[i] |=
6c82b2f3
JD		 2030 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i)) >>
2031 W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
792d376b
WS		 2032 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
2033 data->fan[i] |=
6c82b2f3 2034 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F;
792d376b
WS		 2035 }
2036
2037 /* temperature and limits */
2038 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2039 if (!(data->has_temp & (1 << i)))
2040 continue;
2041 data->temp[i][TEMP_CRIT] =
2042 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
2043 data->temp[i][TEMP_CRIT_HYST] =
2044 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
2045 data->temp[i][TEMP_WARN] =
2046 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
2047 data->temp[i][TEMP_WARN_HYST] =
2048 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
2049 data->temp[i][TEMP_READ] =
2050 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
2051 data->temp_read_vrlsb[i] =
2052 w83795_read(client, W83795_REG_VRLSB);
2053 }
2054
2055 /* dts temperature and limits */
2056 if (data->enable_dts != 0) {
2057 data->dts_ext[DTS_CRIT] =
2058 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
2059 data->dts_ext[DTS_CRIT_HYST] =
2060 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
2061 data->dts_ext[DTS_WARN] =
2062 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
2063 data->dts_ext[DTS_WARN_HYST] =
2064 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
2065 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
2066 if (!(data->has_dts & (1 << i)))
2067 continue;
2068 data->dts[i] = w83795_read(client, W83795_REG_DTS(i));
2069 data->dts_read_vrlsb[i] =
2070 w83795_read(client, W83795_REG_VRLSB);
2071 }
2072 }
2073
2074 /* First update temp source selction */
2075 for (i = 0; i < 3; i++)
2076 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
2077
2078 /* pwm and smart fan */
2079 if (data->chip_type == w83795g)
2080 data->has_pwm = 8;
2081 else
2082 data->has_pwm = 2;
2083 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
2084 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
792d376b
WS		 2085 for (i = 0; i < W83795_REG_TEMP_NUM; i++)
2086 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
2087 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
2088 for (i = 0; i < data->has_pwm; i++) {
2089 for (tmp = 0; tmp < 5; tmp++) {
2090 data->pwm[i][tmp] =
2091 w83795_read(client, W83795_REG_PWM(i, tmp));
2092 }
2093 }
2094 for (i = 0; i < 8; i++) {
2095 data->target_speed[i] =
2096 w83795_read(client, W83795_REG_FTSH(i)) << 4;
2097 data->target_speed[i] |=
2098 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
2099 }
2100 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
2101
2102 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
2103 data->pwm_temp[i][TEMP_PWM_TTTI] =
2104 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
2105 data->pwm_temp[i][TEMP_PWM_CTFS] =
2106 w83795_read(client, W83795_REG_CTFS(i));
2107 tmp = w83795_read(client, W83795_REG_HT(i));
2108 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
2109 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
2110 }
2111 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
2112 for (tmp = 0; tmp < 7; tmp++) {
2113 data->sf4_reg[i][SF4_TEMP][tmp] =
2114 w83795_read(client,
2115 W83795_REG_SF4_TEMP(i, tmp));
2116 data->sf4_reg[i][SF4_PWM][tmp] =
2117 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
2118 }
2119 }
2120
2121 /* Setup PWM Register */
2122 for (i = 0; i < 3; i++) {
2123 data->setup_pwm[i] =
2124 w83795_read(client, W83795_REG_SETUP_PWM(i));
2125 }
2126
2127 /* alarm and beep */
2128 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) {
2129 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
2130 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2131 }
2132 data->beep_enable =
2133 (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01;
2134
6f3dcde9 2135 err = w83795_handle_files(dev, device_create_file);
892514a6
JD		 2136 if (err)
2137 goto exit_remove;
792d376b 2138
0e256018
JD		 2139 if (data->chip_type == w83795g)
2140 w83795_check_dynamic_in_limits(client);
2141
792d376b
WS		 2142 data->hwmon_dev = hwmon_device_register(dev);
2143 if (IS_ERR(data->hwmon_dev)) {
2144 err = PTR_ERR(data->hwmon_dev);
2145 goto exit_remove;
2146 }
2147
2148 return 0;
2149
792d376b 2150exit_remove:
6f3dcde9 2151 w83795_handle_files(dev, device_remove_file_wrapper);
792d376b
WS		 2152 kfree(data);
2153exit:
2154 return err;
2155}
2156
2157static int w83795_remove(struct i2c_client *client)
2158{
2159 struct w83795_data *data = i2c_get_clientdata(client);
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WS		 2160
2161 hwmon_device_unregister(data->hwmon_dev);
6f3dcde9 2162 w83795_handle_files(&client->dev, device_remove_file_wrapper);
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WS		 2163 kfree(data);
2164
2165 return 0;
2166}
2167
2168
2169static const struct i2c_device_id w83795_id[] = {
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JD		 2170 { "w83795g", w83795g },
2171 { "w83795adg", w83795adg },
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WS		 2172 { }
2173};
2174MODULE_DEVICE_TABLE(i2c, w83795_id);
2175
2176static struct i2c_driver w83795_driver = {
2177 .driver = {
2178 .name = "w83795",
2179 },
2180 .probe = w83795_probe,
2181 .remove = w83795_remove,
2182 .id_table = w83795_id,
2183
2184 .class = I2C_CLASS_HWMON,
2185 .detect = w83795_detect,
2186 .address_list = normal_i2c,
2187};
2188
2189static int __init sensors_w83795_init(void)
2190{
2191 return i2c_add_driver(&w83795_driver);
2192}
2193
2194static void __exit sensors_w83795_exit(void)
2195{
2196 i2c_del_driver(&w83795_driver);
2197}
2198
2199MODULE_AUTHOR("Wei Song");
315bacfd 2200MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
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WS		 2201MODULE_LICENSE("GPL");
2202
2203module_init(sensors_w83795_init);
2204module_exit(sensors_w83795_exit);
Linux 6.x block layer and io_uring tree(s)