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hwmon: (w83795) Fix parity checks
[linux-2.6-block.git] / drivers / hwmon / w83795.c
CommitLineData
792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA.
19 *
20 * Supports following chips:
21 *
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/slab.h>
31#include <linux/i2c.h>
32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h>
34#include <linux/err.h>
35#include <linux/mutex.h>
36#include <linux/delay.h>
37
38/* Addresses to scan */
86ef4d2f
JD		 39static const unsigned short normal_i2c[] = {
40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
41};
792d376b 42
792d376b
WS		 43
44static int reset;
45module_param(reset, bool, 0);
46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
47
48
49#define W83795_REG_BANKSEL 0x00
50#define W83795_REG_VENDORID 0xfd
51#define W83795_REG_CHIPID 0xfe
52#define W83795_REG_DEVICEID 0xfb
2be381de 53#define W83795_REG_DEVICEID_A 0xff
792d376b
WS		 54
55#define W83795_REG_I2C_ADDR 0xfc
56#define W83795_REG_CONFIG 0x01
57#define W83795_REG_CONFIG_CONFIG48 0x04
80646b95 58#define W83795_REG_CONFIG_START 0x01
792d376b
WS		 59
60/* Multi-Function Pin Ctrl Registers */
61#define W83795_REG_VOLT_CTRL1 0x02
62#define W83795_REG_VOLT_CTRL2 0x03
63#define W83795_REG_TEMP_CTRL1 0x04
64#define W83795_REG_TEMP_CTRL2 0x05
65#define W83795_REG_FANIN_CTRL1 0x06
66#define W83795_REG_FANIN_CTRL2 0x07
67#define W83795_REG_VMIGB_CTRL 0x08
68
69#define TEMP_CTRL_DISABLE 0
70#define TEMP_CTRL_TD 1
71#define TEMP_CTRL_VSEN 2
72#define TEMP_CTRL_TR 3
73#define TEMP_CTRL_SHIFT 4
74#define TEMP_CTRL_HASIN_SHIFT 5
75/* temp mode may effect VSEN17-12 (in20-15) */
86ef4d2f 76static const u16 W83795_REG_TEMP_CTRL[][6] = {
792d376b
WS		 77 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */
78 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */
79 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */
80 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */
81 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */
82 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */
83 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */
84};
85
86#define TEMP_READ 0
87#define TEMP_CRIT 1
88#define TEMP_CRIT_HYST 2
89#define TEMP_WARN 3
90#define TEMP_WARN_HYST 4
91/* only crit and crit_hyst affect real-time alarm status
92 * current crit crit_hyst warn warn_hyst */
86ef4d2f 93static const u16 W83795_REG_TEMP[][5] = {
792d376b
WS		 94 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
95 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
96 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
97 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
98 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
99 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
100};
101
102#define IN_READ 0
103#define IN_MAX 1
104#define IN_LOW 2
105static const u16 W83795_REG_IN[][3] = {
106 /* Current, HL, LL */
107 {0x10, 0x70, 0x71}, /* VSEN1 */
108 {0x11, 0x72, 0x73}, /* VSEN2 */
109 {0x12, 0x74, 0x75}, /* VSEN3 */
110 {0x13, 0x76, 0x77}, /* VSEN4 */
111 {0x14, 0x78, 0x79}, /* VSEN5 */
112 {0x15, 0x7a, 0x7b}, /* VSEN6 */
113 {0x16, 0x7c, 0x7d}, /* VSEN7 */
114 {0x17, 0x7e, 0x7f}, /* VSEN8 */
115 {0x18, 0x80, 0x81}, /* VSEN9 */
116 {0x19, 0x82, 0x83}, /* VSEN10 */
117 {0x1A, 0x84, 0x85}, /* VSEN11 */
118 {0x1B, 0x86, 0x87}, /* VTT */
119 {0x1C, 0x88, 0x89}, /* 3VDD */
120 {0x1D, 0x8a, 0x8b}, /* 3VSB */
121 {0x1E, 0x8c, 0x8d}, /* VBAT */
122 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
123 {0x20, 0xaa, 0xab}, /* VSEN13 */
124 {0x21, 0x96, 0x97}, /* VSEN14 */
125 {0x22, 0x9a, 0x9b}, /* VSEN15 */
126 {0x23, 0x9e, 0x9f}, /* VSEN16 */
127 {0x24, 0xa2, 0xa3}, /* VSEN17 */
128};
129#define W83795_REG_VRLSB 0x3C
792d376b
WS		 130
131static const u8 W83795_REG_IN_HL_LSB[] = {
132 0x8e, /* VSEN1-4 */
133 0x90, /* VSEN5-8 */
134 0x92, /* VSEN9-11 */
135 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
136 0xa8, /* VSEN12 */
137 0xac, /* VSEN13 */
138 0x98, /* VSEN14 */
139 0x9c, /* VSEN15 */
140 0xa0, /* VSEN16 */
141 0xa4, /* VSEN17 */
142};
143
144#define IN_LSB_REG(index, type) \
145 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
146 : (W83795_REG_IN_HL_LSB[(index)] + 1))
147
148#define IN_LSB_REG_NUM 10
149
150#define IN_LSB_SHIFT 0
151#define IN_LSB_IDX 1
152static const u8 IN_LSB_SHIFT_IDX[][2] = {
153 /* High/Low LSB shift, LSB No. */
154 {0x00, 0x00}, /* VSEN1 */
155 {0x02, 0x00}, /* VSEN2 */
156 {0x04, 0x00}, /* VSEN3 */
157 {0x06, 0x00}, /* VSEN4 */
158 {0x00, 0x01}, /* VSEN5 */
159 {0x02, 0x01}, /* VSEN6 */
160 {0x04, 0x01}, /* VSEN7 */
161 {0x06, 0x01}, /* VSEN8 */
162 {0x00, 0x02}, /* VSEN9 */
163 {0x02, 0x02}, /* VSEN10 */
164 {0x04, 0x02}, /* VSEN11 */
165 {0x00, 0x03}, /* VTT */
166 {0x02, 0x03}, /* 3VDD */
167 {0x04, 0x03}, /* 3VSB */
168 {0x06, 0x03}, /* VBAT */
169 {0x06, 0x04}, /* VSEN12 */
170 {0x06, 0x05}, /* VSEN13 */
171 {0x06, 0x06}, /* VSEN14 */
172 {0x06, 0x07}, /* VSEN15 */
173 {0x06, 0x08}, /* VSEN16 */
174 {0x06, 0x09}, /* VSEN17 */
175};
176
177
178/* 3VDD, 3VSB, VBAT * 0.006 */
179#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */
180#define REST_VLT_END 14 /* the 13th volt to 15th */
181
182#define W83795_REG_FAN(index) (0x2E + (index))
183#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
184#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
185#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
7eb8d508 186 (((index) & 1) ? 4 : 0)
792d376b
WS		 187
188#define W83795_REG_VID_CTRL 0x6A
189
190#define ALARM_BEEP_REG_NUM 6
191#define W83795_REG_ALARM(index) (0x41 + (index))
192#define W83795_REG_BEEP(index) (0x50 + (index))
193
194#define W83795_REG_CLR_CHASSIS 0x4D
195
196
197#define W83795_REG_TEMP_NUM 6
198#define W83795_REG_FCMS1 0x201
199#define W83795_REG_FCMS2 0x208
200#define W83795_REG_TFMR(index) (0x202 + (index))
201#define W83795_REG_FOMC 0x20F
792d376b
WS		 202
203#define W83795_REG_TSS(index) (0x209 + (index))
204
205#define PWM_OUTPUT 0
206#define PWM_START 1
207#define PWM_NONSTOP 2
208#define PWM_STOP_TIME 3
01879a85 209#define PWM_FREQ 4
792d376b
WS		 210#define W83795_REG_PWM(index, nr) \
211 (((nr) == 0 ? 0x210 : \
212 (nr) == 1 ? 0x220 : \
213 (nr) == 2 ? 0x228 : \
214 (nr) == 3 ? 0x230 : 0x218) + (index))
215
792d376b
WS		 216#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
217#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
218#define W83795_REG_TFTS 0x250
219
220#define TEMP_PWM_TTTI 0
221#define TEMP_PWM_CTFS 1
222#define TEMP_PWM_HCT 2
223#define TEMP_PWM_HOT 3
224#define W83795_REG_TTTI(index) (0x260 + (index))
225#define W83795_REG_CTFS(index) (0x268 + (index))
226#define W83795_REG_HT(index) (0x270 + (index))
227
228#define SF4_TEMP 0
229#define SF4_PWM 1
230#define W83795_REG_SF4_TEMP(temp_num, index) \
231 (0x280 + 0x10 * (temp_num) + (index))
232#define W83795_REG_SF4_PWM(temp_num, index) \
233 (0x288 + 0x10 * (temp_num) + (index))
234
235#define W83795_REG_DTSC 0x301
236#define W83795_REG_DTSE 0x302
237#define W83795_REG_DTS(index) (0x26 + (index))
54891a3c 238#define W83795_REG_PECI_TBASE(index) (0x320 + (index))
792d376b
WS		 239
240#define DTS_CRIT 0
241#define DTS_CRIT_HYST 1
242#define DTS_WARN 2
243#define DTS_WARN_HYST 3
244#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
245
246#define SETUP_PWM_DEFAULT 0
247#define SETUP_PWM_UPTIME 1
248#define SETUP_PWM_DOWNTIME 2
249#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
250
251static inline u16 in_from_reg(u8 index, u16 val)
252{
253 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
254 return val * 6;
255 else
256 return val * 2;
257}
258
259static inline u16 in_to_reg(u8 index, u16 val)
260{
261 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
262 return val / 6;
263 else
264 return val / 2;
265}
266
267static inline unsigned long fan_from_reg(u16 val)
268{
6c82b2f3 269 if ((val == 0xfff) || (val == 0))
792d376b
WS		 270 return 0;
271 return 1350000UL / val;
272}
273
274static inline u16 fan_to_reg(long rpm)
275{
276 if (rpm <= 0)
277 return 0x0fff;
278 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
279}
280
281static inline unsigned long time_from_reg(u8 reg)
282{
283 return reg * 100;
284}
285
286static inline u8 time_to_reg(unsigned long val)
287{
288 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
289}
290
291static inline long temp_from_reg(s8 reg)
292{
293 return reg * 1000;
294}
295
296static inline s8 temp_to_reg(long val, s8 min, s8 max)
297{
dd127f5c 298 return SENSORS_LIMIT(val / 1000, min, max);
792d376b
WS		 299}
300
01879a85
JD		 301static const u16 pwm_freq_cksel0[16] = {
302 1024, 512, 341, 256, 205, 171, 146, 128,
303 85, 64, 32, 16, 8, 4, 2, 1
304};
305
306static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
307{
308 unsigned long base_clock;
309
310 if (reg & 0x80) {
311 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
312 return base_clock / ((reg & 0x7f) + 1);
313 } else
314 return pwm_freq_cksel0[reg & 0x0f];
315}
316
317static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
318{
319 unsigned long base_clock;
320 u8 reg0, reg1;
321 unsigned long best0, best1;
322
323 /* Best fit for cksel = 0 */
324 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
325 if (val > (pwm_freq_cksel0[reg0] +
326 pwm_freq_cksel0[reg0 + 1]) / 2)
327 break;
328 }
329 if (val < 375) /* cksel = 1 can't beat this */
330 return reg0;
331 best0 = pwm_freq_cksel0[reg0];
332
333 /* Best fit for cksel = 1 */
334 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
335 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
336 best1 = base_clock / reg1;
337 reg1 = 0x80 | (reg1 - 1);
338
339 /* Choose the closest one */
340 if (abs(val - best0) > abs(val - best1))
341 return reg1;
342 else
343 return reg0;
344}
792d376b
WS		 345
346enum chip_types {w83795g, w83795adg};
347
348struct w83795_data {
349 struct device *hwmon_dev;
350 struct mutex update_lock;
351 unsigned long last_updated; /* In jiffies */
352 enum chip_types chip_type;
353
354 u8 bank;
355
356 u32 has_in; /* Enable monitor VIN or not */
0e256018 357 u8 has_dyn_in; /* Only in2-0 can have this */
792d376b
WS		 358 u16 in[21][3]; /* Register value, read/high/low */
359 u8 in_lsb[10][3]; /* LSB Register value, high/low */
360 u8 has_gain; /* has gain: in17-20 * 8 */
361
362 u16 has_fan; /* Enable fan14-1 or not */
363 u16 fan[14]; /* Register value combine */
364 u16 fan_min[14]; /* Register value combine */
365
366 u8 has_temp; /* Enable monitor temp6-1 or not */
dd127f5c 367 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
792d376b
WS		 368 u8 temp_read_vrlsb[6];
369 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */
370 u8 temp_src[3]; /* Register value */
371
372 u8 enable_dts; /* Enable PECI and SB-TSI,
373 * bit 0: =1 enable, =0 disable,
374 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
375 u8 has_dts; /* Enable monitor DTS temp */
dd127f5c 376 s8 dts[8]; /* Register value */
792d376b 377 u8 dts_read_vrlsb[8]; /* Register value */
dd127f5c 378 s8 dts_ext[4]; /* Register value */
792d376b
WS		 379
380 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
381 * no config register, only affected by chip
382 * type */
383 u8 pwm[8][5]; /* Register value, output, start, non stop, stop
01879a85
JD		 384 * time, freq */
385 u16 clkin; /* CLKIN frequency in kHz */
792d376b
WS		 386 u8 pwm_fcms[2]; /* Register value */
387 u8 pwm_tfmr[6]; /* Register value */
388 u8 pwm_fomc; /* Register value */
389
390 u16 target_speed[8]; /* Register value, target speed for speed
391 * cruise */
392 u8 tol_speed; /* tolerance of target speed */
393 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
394 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
395
396 u8 setup_pwm[3]; /* Register value */
397
398 u8 alarms[6]; /* Register value */
399 u8 beeps[6]; /* Register value */
792d376b
WS		 400
401 char valid;
402};
403
404/*
405 * Hardware access
b2469f42 406 * We assume that nobdody can change the bank outside the driver.
792d376b
WS		 407 */
408
b2469f42
JD		 409/* Must be called with data->update_lock held, except during initialization */
410static int w83795_set_bank(struct i2c_client *client, u8 bank)
792d376b
WS		 411{
412 struct w83795_data *data = i2c_get_clientdata(client);
b2469f42
JD		 413 int err;
414
415 /* If the same bank is already set, nothing to do */
416 if ((data->bank & 0x07) == bank)
417 return 0;
418
419 /* Change to new bank, preserve all other bits */
420 bank |= data->bank & ~0x07;
421 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
422 if (err < 0) {
423 dev_err(&client->dev,
424 "Failed to set bank to %d, err %d\n",
425 (int)bank, err);
426 return err;
792d376b 427 }
b2469f42
JD		 428 data->bank = bank;
429
430 return 0;
792d376b
WS		 431}
432
433/* Must be called with data->update_lock held, except during initialization */
b2469f42 434static u8 w83795_read(struct i2c_client *client, u16 reg)
792d376b 435{
b2469f42
JD		 436 int err;
437
438 err = w83795_set_bank(client, reg >> 8);
439 if (err < 0)
440 return 0x00; /* Arbitrary */
441
442 err = i2c_smbus_read_byte_data(client, reg & 0xff);
443 if (err < 0) {
444 dev_err(&client->dev,
445 "Failed to read from register 0x%03x, err %d\n",
446 (int)reg, err);
447 return 0x00; /* Arbitrary */
792d376b 448 }
b2469f42
JD		 449 return err;
450}
792d376b 451
b2469f42
JD		 452/* Must be called with data->update_lock held, except during initialization */
453static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
454{
455 int err;
456
457 err = w83795_set_bank(client, reg >> 8);
458 if (err < 0)
459 return err;
460
461 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
462 if (err < 0)
463 dev_err(&client->dev,
464 "Failed to write to register 0x%03x, err %d\n",
465 (int)reg, err);
466 return err;
792d376b
WS		 467}
468
469static struct w83795_data *w83795_update_device(struct device *dev)
470{
471 struct i2c_client *client = to_i2c_client(dev);
472 struct w83795_data *data = i2c_get_clientdata(client);
473 u16 tmp;
474 int i;
475
476 mutex_lock(&data->update_lock);
477
478 if (!(time_after(jiffies, data->last_updated + HZ * 2)
479 || !data->valid))
480 goto END;
481
482 /* Update the voltages value */
483 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
484 if (!(data->has_in & (1 << i)))
485 continue;
486 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
a654b9d4 487 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
792d376b
WS		 488 data->in[i][IN_READ] = tmp;
489 }
490
0e256018
JD		 491 /* in0-2 can have dynamic limits (W83795G only) */
492 if (data->has_dyn_in) {
493 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
494 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
495
496 for (i = 0; i < 3; i++) {
497 if (!(data->has_dyn_in & (1 << i)))
498 continue;
499 data->in[i][IN_MAX] =
500 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
501 data->in[i][IN_LOW] =
502 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
503 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
504 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
505 }
506 }
507
792d376b
WS		 508 /* Update fan */
509 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
510 if (!(data->has_fan & (1 << i)))
511 continue;
512 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
513 data->fan[i] |=
6c82b2f3 514 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F;
792d376b
WS		 515 }
516
517 /* Update temperature */
518 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
519 /* even stop monitor, register still keep value, just read out
520 * it */
521 if (!(data->has_temp & (1 << i))) {
522 data->temp[i][TEMP_READ] = 0;
523 data->temp_read_vrlsb[i] = 0;
524 continue;
525 }
526 data->temp[i][TEMP_READ] =
527 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
528 data->temp_read_vrlsb[i] =
529 w83795_read(client, W83795_REG_VRLSB);
530 }
531
532 /* Update dts temperature */
533 if (data->enable_dts != 0) {
534 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
535 if (!(data->has_dts & (1 << i)))
536 continue;
537 data->dts[i] =
538 w83795_read(client, W83795_REG_DTS(i));
539 data->dts_read_vrlsb[i] =
540 w83795_read(client, W83795_REG_VRLSB);
541 }
542 }
543
544 /* Update pwm output */
545 for (i = 0; i < data->has_pwm; i++) {
546 data->pwm[i][PWM_OUTPUT] =
547 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
548 }
549
550 /* update alarm */
551 for (i = 0; i < ALARM_BEEP_REG_NUM; i++)
552 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
553
554 data->last_updated = jiffies;
555 data->valid = 1;
556
557END:
558 mutex_unlock(&data->update_lock);
559 return data;
560}
561
562/*
563 * Sysfs attributes
564 */
565
566#define ALARM_STATUS 0
567#define BEEP_ENABLE 1
568static ssize_t
569show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
570{
571 struct w83795_data *data = w83795_update_device(dev);
572 struct sensor_device_attribute_2 *sensor_attr =
573 to_sensor_dev_attr_2(attr);
574 int nr = sensor_attr->nr;
575 int index = sensor_attr->index >> 3;
576 int bit = sensor_attr->index & 0x07;
577 u8 val;
578
579 if (ALARM_STATUS == nr) {
580 val = (data->alarms[index] >> (bit)) & 1;
581 } else { /* BEEP_ENABLE */
582 val = (data->beeps[index] >> (bit)) & 1;
583 }
584
585 return sprintf(buf, "%u\n", val);
586}
587
588static ssize_t
589store_beep(struct device *dev, struct device_attribute *attr,
590 const char *buf, size_t count)
591{
592 struct i2c_client *client = to_i2c_client(dev);
593 struct w83795_data *data = i2c_get_clientdata(client);
594 struct sensor_device_attribute_2 *sensor_attr =
595 to_sensor_dev_attr_2(attr);
596 int index = sensor_attr->index >> 3;
597 int shift = sensor_attr->index & 0x07;
598 u8 beep_bit = 1 << shift;
599 unsigned long val;
600
601 if (strict_strtoul(buf, 10, &val) < 0)
602 return -EINVAL;
603 if (val != 0 && val != 1)
604 return -EINVAL;
605
606 mutex_lock(&data->update_lock);
607 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
608 data->beeps[index] &= ~beep_bit;
609 data->beeps[index] |= val << shift;
610 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
611 mutex_unlock(&data->update_lock);
612
613 return count;
614}
615
792d376b
WS		 616/* Write any value to clear chassis alarm */
617static ssize_t
618store_chassis_clear(struct device *dev,
619 struct device_attribute *attr, const char *buf,
620 size_t count)
621{
622 struct i2c_client *client = to_i2c_client(dev);
623 struct w83795_data *data = i2c_get_clientdata(client);
624 u8 val;
625
626 mutex_lock(&data->update_lock);
627 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
628 val |= 0x80;
629 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
630 mutex_unlock(&data->update_lock);
631 return count;
632}
633
634#define FAN_INPUT 0
635#define FAN_MIN 1
636static ssize_t
637show_fan(struct device *dev, struct device_attribute *attr, char *buf)
638{
639 struct sensor_device_attribute_2 *sensor_attr =
640 to_sensor_dev_attr_2(attr);
641 int nr = sensor_attr->nr;
642 int index = sensor_attr->index;
643 struct w83795_data *data = w83795_update_device(dev);
644 u16 val;
645
646 if (FAN_INPUT == nr)
647 val = data->fan[index] & 0x0fff;
648 else
649 val = data->fan_min[index] & 0x0fff;
650
651 return sprintf(buf, "%lu\n", fan_from_reg(val));
652}
653
654static ssize_t
655store_fan_min(struct device *dev, struct device_attribute *attr,
656 const char *buf, size_t count)
657{
658 struct sensor_device_attribute_2 *sensor_attr =
659 to_sensor_dev_attr_2(attr);
660 int index = sensor_attr->index;
661 struct i2c_client *client = to_i2c_client(dev);
662 struct w83795_data *data = i2c_get_clientdata(client);
663 unsigned long val;
664
665 if (strict_strtoul(buf, 10, &val))
666 return -EINVAL;
667 val = fan_to_reg(val);
668
669 mutex_lock(&data->update_lock);
670 data->fan_min[index] = val;
671 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
672 val &= 0x0f;
7eb8d508 673 if (index & 1) {
792d376b
WS		 674 val <<= 4;
675 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
676 & 0x0f;
677 } else {
678 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
679 & 0xf0;
680 }
681 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
682 mutex_unlock(&data->update_lock);
683
684 return count;
685}
686
687static ssize_t
688show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
689{
690 struct w83795_data *data = w83795_update_device(dev);
691 struct sensor_device_attribute_2 *sensor_attr =
692 to_sensor_dev_attr_2(attr);
693 int nr = sensor_attr->nr;
694 int index = sensor_attr->index;
01879a85 695 unsigned int val;
792d376b
WS		 696
697 switch (nr) {
698 case PWM_STOP_TIME:
699 val = time_from_reg(data->pwm[index][nr]);
700 break;
01879a85
JD		 701 case PWM_FREQ:
702 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
792d376b
WS		 703 break;
704 default:
705 val = data->pwm[index][nr];
706 break;
707 }
708
709 return sprintf(buf, "%u\n", val);
710}
711
712static ssize_t
713store_pwm(struct device *dev, struct device_attribute *attr,
714 const char *buf, size_t count)
715{
716 struct i2c_client *client = to_i2c_client(dev);
717 struct w83795_data *data = i2c_get_clientdata(client);
718 struct sensor_device_attribute_2 *sensor_attr =
719 to_sensor_dev_attr_2(attr);
720 int nr = sensor_attr->nr;
721 int index = sensor_attr->index;
722 unsigned long val;
792d376b
WS		 723
724 if (strict_strtoul(buf, 10, &val) < 0)
725 return -EINVAL;
726
727 mutex_lock(&data->update_lock);
728 switch (nr) {
729 case PWM_STOP_TIME:
730 val = time_to_reg(val);
731 break;
01879a85
JD		 732 case PWM_FREQ:
733 val = pwm_freq_to_reg(val, data->clkin);
792d376b
WS		 734 break;
735 default:
736 val = SENSORS_LIMIT(val, 0, 0xff);
737 break;
738 }
739 w83795_write(client, W83795_REG_PWM(index, nr), val);
01879a85 740 data->pwm[index][nr] = val;
792d376b
WS		 741 mutex_unlock(&data->update_lock);
742 return count;
792d376b
WS		 743}
744
745static ssize_t
746show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
747{
748 struct sensor_device_attribute_2 *sensor_attr =
749 to_sensor_dev_attr_2(attr);
750 struct i2c_client *client = to_i2c_client(dev);
751 struct w83795_data *data = i2c_get_clientdata(client);
752 int index = sensor_attr->index;
753 u8 tmp;
754
755 if (1 == (data->pwm_fcms[0] & (1 << index))) {
756 tmp = 2;
757 goto out;
758 }
759 for (tmp = 0; tmp < 6; tmp++) {
760 if (data->pwm_tfmr[tmp] & (1 << index)) {
761 tmp = 3;
762 goto out;
763 }
764 }
765 if (data->pwm_fomc & (1 << index))
766 tmp = 0;
767 else
768 tmp = 1;
769
770out:
771 return sprintf(buf, "%u\n", tmp);
772}
773
774static ssize_t
775store_pwm_enable(struct device *dev, struct device_attribute *attr,
776 const char *buf, size_t count)
777{
778 struct i2c_client *client = to_i2c_client(dev);
779 struct w83795_data *data = i2c_get_clientdata(client);
780 struct sensor_device_attribute_2 *sensor_attr =
781 to_sensor_dev_attr_2(attr);
782 int index = sensor_attr->index;
783 unsigned long val;
784 int i;
785
786 if (strict_strtoul(buf, 10, &val) < 0)
787 return -EINVAL;
788 if (val > 2)
789 return -EINVAL;
790
791 mutex_lock(&data->update_lock);
792 switch (val) {
793 case 0:
794 case 1:
795 data->pwm_fcms[0] &= ~(1 << index);
796 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
797 for (i = 0; i < 6; i++) {
798 data->pwm_tfmr[i] &= ~(1 << index);
799 w83795_write(client, W83795_REG_TFMR(i),
800 data->pwm_tfmr[i]);
801 }
802 data->pwm_fomc |= 1 << index;
803 data->pwm_fomc ^= val << index;
804 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
805 break;
806 case 2:
807 data->pwm_fcms[0] |= (1 << index);
808 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
809 break;
810 }
811 mutex_unlock(&data->update_lock);
812 return count;
792d376b
WS		 813}
814
815static ssize_t
816show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
817{
818 struct sensor_device_attribute_2 *sensor_attr =
819 to_sensor_dev_attr_2(attr);
820 struct i2c_client *client = to_i2c_client(dev);
821 struct w83795_data *data = i2c_get_clientdata(client);
822 int index = sensor_attr->index;
823 u8 val = index / 2;
824 u8 tmp = data->temp_src[val];
825
7eb8d508 826 if (index & 1)
792d376b
WS		 827 val = 4;
828 else
829 val = 0;
830 tmp >>= val;
831 tmp &= 0x0f;
832
833 return sprintf(buf, "%u\n", tmp);
834}
835
836static ssize_t
837store_temp_src(struct device *dev, struct device_attribute *attr,
838 const char *buf, size_t count)
839{
840 struct i2c_client *client = to_i2c_client(dev);
841 struct w83795_data *data = i2c_get_clientdata(client);
842 struct sensor_device_attribute_2 *sensor_attr =
843 to_sensor_dev_attr_2(attr);
844 int index = sensor_attr->index;
845 unsigned long tmp;
846 u8 val = index / 2;
847
848 if (strict_strtoul(buf, 10, &tmp) < 0)
849 return -EINVAL;
850 tmp = SENSORS_LIMIT(tmp, 0, 15);
851
852 mutex_lock(&data->update_lock);
7eb8d508 853 if (index & 1) {
792d376b
WS		 854 tmp <<= 4;
855 data->temp_src[val] &= 0x0f;
856 } else {
857 data->temp_src[val] &= 0xf0;
858 }
859 data->temp_src[val] |= tmp;
860 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
861 mutex_unlock(&data->update_lock);
862
863 return count;
864}
865
866#define TEMP_PWM_ENABLE 0
867#define TEMP_PWM_FAN_MAP 1
868static ssize_t
869show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
870 char *buf)
871{
872 struct i2c_client *client = to_i2c_client(dev);
873 struct w83795_data *data = i2c_get_clientdata(client);
874 struct sensor_device_attribute_2 *sensor_attr =
875 to_sensor_dev_attr_2(attr);
876 int nr = sensor_attr->nr;
877 int index = sensor_attr->index;
878 u8 tmp = 0xff;
879
880 switch (nr) {
881 case TEMP_PWM_ENABLE:
882 tmp = (data->pwm_fcms[1] >> index) & 1;
883 if (tmp)
884 tmp = 4;
885 else
886 tmp = 3;
887 break;
888 case TEMP_PWM_FAN_MAP:
889 tmp = data->pwm_tfmr[index];
890 break;
891 }
892
893 return sprintf(buf, "%u\n", tmp);
894}
895
896static ssize_t
897store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
898 const char *buf, size_t count)
899{
900 struct i2c_client *client = to_i2c_client(dev);
901 struct w83795_data *data = i2c_get_clientdata(client);
902 struct sensor_device_attribute_2 *sensor_attr =
903 to_sensor_dev_attr_2(attr);
904 int nr = sensor_attr->nr;
905 int index = sensor_attr->index;
906 unsigned long tmp;
907
908 if (strict_strtoul(buf, 10, &tmp) < 0)
909 return -EINVAL;
910
911 switch (nr) {
912 case TEMP_PWM_ENABLE:
913 if ((tmp != 3) && (tmp != 4))
914 return -EINVAL;
915 tmp -= 3;
916 mutex_lock(&data->update_lock);
917 data->pwm_fcms[1] &= ~(1 << index);
918 data->pwm_fcms[1] |= tmp << index;
919 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
920 mutex_unlock(&data->update_lock);
921 break;
922 case TEMP_PWM_FAN_MAP:
923 mutex_lock(&data->update_lock);
924 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
925 w83795_write(client, W83795_REG_TFMR(index), tmp);
926 data->pwm_tfmr[index] = tmp;
927 mutex_unlock(&data->update_lock);
928 break;
929 }
930 return count;
931}
932
933#define FANIN_TARGET 0
934#define FANIN_TOL 1
935static ssize_t
936show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
937{
938 struct i2c_client *client = to_i2c_client(dev);
939 struct w83795_data *data = i2c_get_clientdata(client);
940 struct sensor_device_attribute_2 *sensor_attr =
941 to_sensor_dev_attr_2(attr);
942 int nr = sensor_attr->nr;
943 int index = sensor_attr->index;
944 u16 tmp = 0;
945
946 switch (nr) {
947 case FANIN_TARGET:
948 tmp = fan_from_reg(data->target_speed[index]);
949 break;
950 case FANIN_TOL:
951 tmp = data->tol_speed;
952 break;
953 }
954
955 return sprintf(buf, "%u\n", tmp);
956}
957
958static ssize_t
959store_fanin(struct device *dev, struct device_attribute *attr,
960 const char *buf, size_t count)
961{
962 struct i2c_client *client = to_i2c_client(dev);
963 struct w83795_data *data = i2c_get_clientdata(client);
964 struct sensor_device_attribute_2 *sensor_attr =
965 to_sensor_dev_attr_2(attr);
966 int nr = sensor_attr->nr;
967 int index = sensor_attr->index;
968 unsigned long val;
969
970 if (strict_strtoul(buf, 10, &val) < 0)
971 return -EINVAL;
972
973 mutex_lock(&data->update_lock);
974 switch (nr) {
975 case FANIN_TARGET:
976 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
977 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
978 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
979 data->target_speed[index] = val;
980 break;
981 case FANIN_TOL:
982 val = SENSORS_LIMIT(val, 0, 0x3f);
983 w83795_write(client, W83795_REG_TFTS, val);
984 data->tol_speed = val;
985 break;
986 }
987 mutex_unlock(&data->update_lock);
988
989 return count;
990}
991
992
993static ssize_t
994show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
995{
996 struct i2c_client *client = to_i2c_client(dev);
997 struct w83795_data *data = i2c_get_clientdata(client);
998 struct sensor_device_attribute_2 *sensor_attr =
999 to_sensor_dev_attr_2(attr);
1000 int nr = sensor_attr->nr;
1001 int index = sensor_attr->index;
1002 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1003
1004 return sprintf(buf, "%ld\n", tmp);
1005}
1006
1007static ssize_t
1008store_temp_pwm(struct device *dev, struct device_attribute *attr,
1009 const char *buf, size_t count)
1010{
1011 struct i2c_client *client = to_i2c_client(dev);
1012 struct w83795_data *data = i2c_get_clientdata(client);
1013 struct sensor_device_attribute_2 *sensor_attr =
1014 to_sensor_dev_attr_2(attr);
1015 int nr = sensor_attr->nr;
1016 int index = sensor_attr->index;
1017 unsigned long val;
1018 u8 tmp;
1019
1020 if (strict_strtoul(buf, 10, &val) < 0)
1021 return -EINVAL;
1022 val /= 1000;
1023
1024 mutex_lock(&data->update_lock);
1025 switch (nr) {
1026 case TEMP_PWM_TTTI:
1027 val = SENSORS_LIMIT(val, 0, 0x7f);
1028 w83795_write(client, W83795_REG_TTTI(index), val);
1029 break;
1030 case TEMP_PWM_CTFS:
1031 val = SENSORS_LIMIT(val, 0, 0x7f);
1032 w83795_write(client, W83795_REG_CTFS(index), val);
1033 break;
1034 case TEMP_PWM_HCT:
1035 val = SENSORS_LIMIT(val, 0, 0x0f);
1036 tmp = w83795_read(client, W83795_REG_HT(index));
1037 tmp &= 0x0f;
1038 tmp |= (val << 4) & 0xf0;
1039 w83795_write(client, W83795_REG_HT(index), tmp);
1040 break;
1041 case TEMP_PWM_HOT:
1042 val = SENSORS_LIMIT(val, 0, 0x0f);
1043 tmp = w83795_read(client, W83795_REG_HT(index));
1044 tmp &= 0xf0;
1045 tmp |= val & 0x0f;
1046 w83795_write(client, W83795_REG_HT(index), tmp);
1047 break;
1048 }
1049 data->pwm_temp[index][nr] = val;
1050 mutex_unlock(&data->update_lock);
1051
1052 return count;
1053}
1054
1055static ssize_t
1056show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1057{
1058 struct i2c_client *client = to_i2c_client(dev);
1059 struct w83795_data *data = i2c_get_clientdata(client);
1060 struct sensor_device_attribute_2 *sensor_attr =
1061 to_sensor_dev_attr_2(attr);
1062 int nr = sensor_attr->nr;
1063 int index = sensor_attr->index;
1064
1065 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1066}
1067
1068static ssize_t
1069store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1070 const char *buf, size_t count)
1071{
1072 struct i2c_client *client = to_i2c_client(dev);
1073 struct w83795_data *data = i2c_get_clientdata(client);
1074 struct sensor_device_attribute_2 *sensor_attr =
1075 to_sensor_dev_attr_2(attr);
1076 int nr = sensor_attr->nr;
1077 int index = sensor_attr->index;
1078 unsigned long val;
1079
1080 if (strict_strtoul(buf, 10, &val) < 0)
1081 return -EINVAL;
1082
1083 mutex_lock(&data->update_lock);
1084 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1085 data->sf4_reg[index][SF4_PWM][nr] = val;
1086 mutex_unlock(&data->update_lock);
1087
1088 return count;
1089}
1090
1091static ssize_t
1092show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1093{
1094 struct i2c_client *client = to_i2c_client(dev);
1095 struct w83795_data *data = i2c_get_clientdata(client);
1096 struct sensor_device_attribute_2 *sensor_attr =
1097 to_sensor_dev_attr_2(attr);
1098 int nr = sensor_attr->nr;
1099 int index = sensor_attr->index;
1100
1101 return sprintf(buf, "%u\n",
1102 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1103}
1104
1105static ssize_t
1106store_sf4_temp(struct device *dev, struct device_attribute *attr,
1107 const char *buf, size_t count)
1108{
1109 struct i2c_client *client = to_i2c_client(dev);
1110 struct w83795_data *data = i2c_get_clientdata(client);
1111 struct sensor_device_attribute_2 *sensor_attr =
1112 to_sensor_dev_attr_2(attr);
1113 int nr = sensor_attr->nr;
1114 int index = sensor_attr->index;
1115 unsigned long val;
1116
1117 if (strict_strtoul(buf, 10, &val) < 0)
1118 return -EINVAL;
1119 val /= 1000;
1120
1121 mutex_lock(&data->update_lock);
1122 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1123 data->sf4_reg[index][SF4_TEMP][nr] = val;
1124 mutex_unlock(&data->update_lock);
1125
1126 return count;
1127}
1128
1129
1130static ssize_t
1131show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1132{
1133 struct sensor_device_attribute_2 *sensor_attr =
1134 to_sensor_dev_attr_2(attr);
1135 int nr = sensor_attr->nr;
1136 int index = sensor_attr->index;
1137 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1138 long temp = temp_from_reg(data->temp[index][nr]);
792d376b
WS		 1139
1140 if (TEMP_READ == nr)
a654b9d4 1141 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1142 return sprintf(buf, "%ld\n", temp);
1143}
1144
1145static ssize_t
1146store_temp(struct device *dev, struct device_attribute *attr,
1147 const char *buf, size_t count)
1148{
1149 struct sensor_device_attribute_2 *sensor_attr =
1150 to_sensor_dev_attr_2(attr);
1151 int nr = sensor_attr->nr;
1152 int index = sensor_attr->index;
1153 struct i2c_client *client = to_i2c_client(dev);
1154 struct w83795_data *data = i2c_get_clientdata(client);
1155 long tmp;
1156
1157 if (strict_strtol(buf, 10, &tmp) < 0)
1158 return -EINVAL;
1159
1160 mutex_lock(&data->update_lock);
1161 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1162 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1163 mutex_unlock(&data->update_lock);
1164 return count;
1165}
1166
1167
1168static ssize_t
1169show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1170{
1171 struct i2c_client *client = to_i2c_client(dev);
1172 struct w83795_data *data = i2c_get_clientdata(client);
1173 struct sensor_device_attribute_2 *sensor_attr =
1174 to_sensor_dev_attr_2(attr);
1175 int index = sensor_attr->index;
1176 u8 tmp;
1177
1178 if (data->enable_dts == 0)
1179 return sprintf(buf, "%d\n", 0);
1180
1181 if ((data->has_dts >> index) & 0x01) {
1182 if (data->enable_dts & 2)
1183 tmp = 5;
1184 else
1185 tmp = 6;
1186 } else {
1187 tmp = 0;
1188 }
1189
1190 return sprintf(buf, "%d\n", tmp);
1191}
1192
1193static ssize_t
1194show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1195{
1196 struct sensor_device_attribute_2 *sensor_attr =
1197 to_sensor_dev_attr_2(attr);
1198 int index = sensor_attr->index;
1199 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1200 long temp = temp_from_reg(data->dts[index]);
792d376b 1201
a654b9d4 1202 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1203 return sprintf(buf, "%ld\n", temp);
1204}
1205
1206static ssize_t
1207show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1208{
1209 struct sensor_device_attribute_2 *sensor_attr =
1210 to_sensor_dev_attr_2(attr);
1211 int nr = sensor_attr->nr;
1212 struct i2c_client *client = to_i2c_client(dev);
1213 struct w83795_data *data = i2c_get_clientdata(client);
dd127f5c 1214 long temp = temp_from_reg(data->dts_ext[nr]);
792d376b 1215
792d376b
WS		 1216 return sprintf(buf, "%ld\n", temp);
1217}
1218
1219static ssize_t
1220store_dts_ext(struct device *dev, struct device_attribute *attr,
1221 const char *buf, size_t count)
1222{
1223 struct sensor_device_attribute_2 *sensor_attr =
1224 to_sensor_dev_attr_2(attr);
1225 int nr = sensor_attr->nr;
1226 struct i2c_client *client = to_i2c_client(dev);
1227 struct w83795_data *data = i2c_get_clientdata(client);
1228 long tmp;
1229
1230 if (strict_strtol(buf, 10, &tmp) < 0)
1231 return -EINVAL;
1232
1233 mutex_lock(&data->update_lock);
1234 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1235 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1236 mutex_unlock(&data->update_lock);
1237 return count;
1238}
1239
1240
1241/*
1242 Type 3: Thermal diode
1243 Type 4: Thermistor
1244
1245 Temp5-6, default TR
1246 Temp1-4, default TD
1247*/
1248
1249static ssize_t
1250show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1251{
1252 struct i2c_client *client = to_i2c_client(dev);
1253 struct w83795_data *data = i2c_get_clientdata(client);
1254 struct sensor_device_attribute_2 *sensor_attr =
1255 to_sensor_dev_attr_2(attr);
1256 int index = sensor_attr->index;
1257 u8 tmp;
1258
1259 if (data->has_temp >> index & 0x01) {
1260 if (data->temp_mode >> index & 0x01)
1261 tmp = 3;
1262 else
1263 tmp = 4;
1264 } else {
1265 tmp = 0;
1266 }
1267
1268 return sprintf(buf, "%d\n", tmp);
1269}
1270
1271static ssize_t
1272store_temp_mode(struct device *dev, struct device_attribute *attr,
1273 const char *buf, size_t count)
1274{
1275 struct i2c_client *client = to_i2c_client(dev);
1276 struct w83795_data *data = i2c_get_clientdata(client);
1277 struct sensor_device_attribute_2 *sensor_attr =
1278 to_sensor_dev_attr_2(attr);
1279 int index = sensor_attr->index;
1280 unsigned long val;
1281 u8 tmp;
1282 u32 mask;
1283
1284 if (strict_strtoul(buf, 10, &val) < 0)
1285 return -EINVAL;
1286 if ((val != 4) && (val != 3))
1287 return -EINVAL;
1288 if ((index > 3) && (val == 3))
1289 return -EINVAL;
1290
1291 mutex_lock(&data->update_lock);
1292 if (val == 3) {
1293 val = TEMP_CTRL_TD;
1294 data->has_temp |= 1 << index;
1295 data->temp_mode |= 1 << index;
1296 } else if (val == 4) {
1297 val = TEMP_CTRL_TR;
1298 data->has_temp |= 1 << index;
1299 tmp = 1 << index;
1300 data->temp_mode &= ~tmp;
1301 }
1302
1303 if (index > 3)
1304 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1305 else
1306 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1307
1308 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT];
1309 tmp &= ~mask;
1310 tmp |= W83795_REG_TEMP_CTRL[index][val];
1311
1312 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT];
1313 data->has_in &= ~mask;
1314
1315 if (index > 3)
1316 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp);
1317 else
1318 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1319
1320 mutex_unlock(&data->update_lock);
1321 return count;
1322}
1323
1324
1325/* show/store VIN */
1326static ssize_t
1327show_in(struct device *dev, struct device_attribute *attr, char *buf)
1328{
1329 struct sensor_device_attribute_2 *sensor_attr =
1330 to_sensor_dev_attr_2(attr);
1331 int nr = sensor_attr->nr;
1332 int index = sensor_attr->index;
1333 struct w83795_data *data = w83795_update_device(dev);
1334 u16 val = data->in[index][nr];
1335 u8 lsb_idx;
1336
1337 switch (nr) {
1338 case IN_READ:
1339 /* calculate this value again by sensors as sensors3.conf */
1340 if ((index >= 17) &&
6f9dfd85 1341 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1342 val *= 8;
1343 break;
1344 case IN_MAX:
1345 case IN_LOW:
1346 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1347 val <<= 2;
1348 val |= (data->in_lsb[lsb_idx][nr] >>
1349 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1350 if ((index >= 17) &&
6f9dfd85 1351 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1352 val *= 8;
1353 break;
1354 }
1355 val = in_from_reg(index, val);
1356
1357 return sprintf(buf, "%d\n", val);
1358}
1359
1360static ssize_t
1361store_in(struct device *dev, struct device_attribute *attr,
1362 const char *buf, size_t count)
1363{
1364 struct sensor_device_attribute_2 *sensor_attr =
1365 to_sensor_dev_attr_2(attr);
1366 int nr = sensor_attr->nr;
1367 int index = sensor_attr->index;
1368 struct i2c_client *client = to_i2c_client(dev);
1369 struct w83795_data *data = i2c_get_clientdata(client);
1370 unsigned long val;
1371 u8 tmp;
1372 u8 lsb_idx;
1373
1374 if (strict_strtoul(buf, 10, &val) < 0)
1375 return -EINVAL;
1376 val = in_to_reg(index, val);
1377
1378 if ((index >= 17) &&
6f9dfd85 1379 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1380 val /= 8;
1381 val = SENSORS_LIMIT(val, 0, 0x3FF);
1382 mutex_lock(&data->update_lock);
1383
1384 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1385 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1386 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1387 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1388 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1389 data->in_lsb[lsb_idx][nr] = tmp;
1390
1391 tmp = (val >> 2) & 0xff;
1392 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1393 data->in[index][nr] = tmp;
1394
1395 mutex_unlock(&data->update_lock);
1396 return count;
1397}
1398
1399
1400static ssize_t
1401show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1402{
1403 struct sensor_device_attribute_2 *sensor_attr =
1404 to_sensor_dev_attr_2(attr);
1405 int nr = sensor_attr->nr;
1406 struct i2c_client *client = to_i2c_client(dev);
1407 struct w83795_data *data = i2c_get_clientdata(client);
1408 u16 val = data->setup_pwm[nr];
1409
1410 switch (nr) {
1411 case SETUP_PWM_UPTIME:
1412 case SETUP_PWM_DOWNTIME:
1413 val = time_from_reg(val);
1414 break;
1415 }
1416
1417 return sprintf(buf, "%d\n", val);
1418}
1419
1420static ssize_t
1421store_sf_setup(struct device *dev, struct device_attribute *attr,
1422 const char *buf, size_t count)
1423{
1424 struct sensor_device_attribute_2 *sensor_attr =
1425 to_sensor_dev_attr_2(attr);
1426 int nr = sensor_attr->nr;
1427 struct i2c_client *client = to_i2c_client(dev);
1428 struct w83795_data *data = i2c_get_clientdata(client);
1429 unsigned long val;
1430
1431 if (strict_strtoul(buf, 10, &val) < 0)
1432 return -EINVAL;
1433
1434 switch (nr) {
1435 case SETUP_PWM_DEFAULT:
1436 val = SENSORS_LIMIT(val, 0, 0xff);
1437 break;
1438 case SETUP_PWM_UPTIME:
1439 case SETUP_PWM_DOWNTIME:
1440 val = time_to_reg(val);
1441 if (val == 0)
1442 return -EINVAL;
1443 break;
1444 }
1445
1446 mutex_lock(&data->update_lock);
1447 data->setup_pwm[nr] = val;
1448 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1449 mutex_unlock(&data->update_lock);
1450 return count;
1451}
1452
1453
1454#define NOT_USED -1
1455
0e256018
JD		 1456/* Don't change the attribute order, _max and _min are accessed by index
1457 * somewhere else in the code */
87df0dad 1458#define SENSOR_ATTR_IN(index) { \
792d376b
WS		 1459 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1460 IN_READ, index), \
1461 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1462 store_in, IN_MAX, index), \
1463 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1464 store_in, IN_LOW, index), \
1465 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1466 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1467 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1468 show_alarm_beep, store_beep, BEEP_ENABLE, \
87df0dad 1469 index + ((index > 14) ? 1 : 0)) }
792d376b 1470
87df0dad 1471#define SENSOR_ATTR_FAN(index) { \
792d376b
WS		 1472 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1473 NULL, FAN_INPUT, index - 1), \
1474 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1475 show_fan, store_fan_min, FAN_MIN, index - 1), \
1476 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1477 NULL, ALARM_STATUS, index + 31), \
1478 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1479 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
792d376b 1480
b5f6a90a 1481#define SENSOR_ATTR_PWM(index) { \
792d376b
WS		 1482 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1483 store_pwm, PWM_OUTPUT, index - 1), \
1484 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1485 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1486 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1487 show_pwm, store_pwm, PWM_START, index - 1), \
1488 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1489 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
01879a85
JD		 1490 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1491 show_pwm, store_pwm, PWM_FREQ, index - 1), \
792d376b 1492 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
b2cc528e
JD		 1493 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1494 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1495 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
792d376b 1496
87df0dad 1497#define SENSOR_ATTR_DTS(index) { \
792d376b
WS		 1498 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1499 show_dts_mode, NULL, NOT_USED, index - 7), \
1500 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1501 NULL, NOT_USED, index - 7), \
a0ce402f 1502 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1503 store_dts_ext, DTS_CRIT, NOT_USED), \
a0ce402f 1504 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1505 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
a0ce402f 1506 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1507 store_dts_ext, DTS_WARN, NOT_USED), \
a0ce402f 1508 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1509 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1510 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1511 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1512 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1513 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
792d376b 1514
87df0dad 1515#define SENSOR_ATTR_TEMP(index) { \
792d376b
WS		 1516 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1517 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1518 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1519 NULL, TEMP_READ, index - 1), \
a0ce402f 1520 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1521 store_temp, TEMP_CRIT, index - 1), \
a0ce402f 1522 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1523 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
a0ce402f 1524 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1525 store_temp, TEMP_WARN, index - 1), \
a0ce402f 1526 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1527 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1528 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1529 show_alarm_beep, NULL, ALARM_STATUS, \
1530 index + (index > 4 ? 11 : 17)), \
1531 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1532 show_alarm_beep, store_beep, BEEP_ENABLE, \
1533 index + (index > 4 ? 11 : 17)), \
1534 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1535 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1536 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1537 show_temp_pwm_enable, store_temp_pwm_enable, \
1538 TEMP_PWM_ENABLE, index - 1), \
1539 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1540 show_temp_pwm_enable, store_temp_pwm_enable, \
1541 TEMP_PWM_FAN_MAP, index - 1), \
1542 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1543 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
a0ce402f 1544 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
792d376b 1545 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
a0ce402f 1546 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
792d376b
WS		 1547 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1548 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1549 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1550 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1551 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1552 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1553 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1554 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1555 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1556 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1557 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1558 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1559 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1560 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1561 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1562 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1563 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1564 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1565 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1566 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1567 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1568 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1569 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1570 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1571 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1572 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1573 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1574 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1575 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1576 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
87df0dad 1577 show_sf4_temp, store_sf4_temp, 6, index - 1) }
792d376b
WS		 1578
1579
87df0dad 1580static struct sensor_device_attribute_2 w83795_in[][5] = {
792d376b
WS		 1581 SENSOR_ATTR_IN(0),
1582 SENSOR_ATTR_IN(1),
1583 SENSOR_ATTR_IN(2),
1584 SENSOR_ATTR_IN(3),
1585 SENSOR_ATTR_IN(4),
1586 SENSOR_ATTR_IN(5),
1587 SENSOR_ATTR_IN(6),
1588 SENSOR_ATTR_IN(7),
1589 SENSOR_ATTR_IN(8),
1590 SENSOR_ATTR_IN(9),
1591 SENSOR_ATTR_IN(10),
1592 SENSOR_ATTR_IN(11),
1593 SENSOR_ATTR_IN(12),
1594 SENSOR_ATTR_IN(13),
1595 SENSOR_ATTR_IN(14),
1596 SENSOR_ATTR_IN(15),
1597 SENSOR_ATTR_IN(16),
1598 SENSOR_ATTR_IN(17),
1599 SENSOR_ATTR_IN(18),
1600 SENSOR_ATTR_IN(19),
1601 SENSOR_ATTR_IN(20),
1602};
1603
86ef4d2f 1604static const struct sensor_device_attribute_2 w83795_fan[][4] = {
792d376b
WS		 1605 SENSOR_ATTR_FAN(1),
1606 SENSOR_ATTR_FAN(2),
1607 SENSOR_ATTR_FAN(3),
1608 SENSOR_ATTR_FAN(4),
1609 SENSOR_ATTR_FAN(5),
1610 SENSOR_ATTR_FAN(6),
1611 SENSOR_ATTR_FAN(7),
1612 SENSOR_ATTR_FAN(8),
1613 SENSOR_ATTR_FAN(9),
1614 SENSOR_ATTR_FAN(10),
1615 SENSOR_ATTR_FAN(11),
1616 SENSOR_ATTR_FAN(12),
1617 SENSOR_ATTR_FAN(13),
1618 SENSOR_ATTR_FAN(14),
1619};
1620
86ef4d2f 1621static const struct sensor_device_attribute_2 w83795_temp[][29] = {
792d376b
WS		 1622 SENSOR_ATTR_TEMP(1),
1623 SENSOR_ATTR_TEMP(2),
1624 SENSOR_ATTR_TEMP(3),
1625 SENSOR_ATTR_TEMP(4),
1626 SENSOR_ATTR_TEMP(5),
1627 SENSOR_ATTR_TEMP(6),
1628};
1629
86ef4d2f 1630static const struct sensor_device_attribute_2 w83795_dts[][8] = {
792d376b
WS		 1631 SENSOR_ATTR_DTS(7),
1632 SENSOR_ATTR_DTS(8),
1633 SENSOR_ATTR_DTS(9),
1634 SENSOR_ATTR_DTS(10),
1635 SENSOR_ATTR_DTS(11),
1636 SENSOR_ATTR_DTS(12),
1637 SENSOR_ATTR_DTS(13),
1638 SENSOR_ATTR_DTS(14),
1639};
1640
86ef4d2f 1641static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
b5f6a90a
JD		 1642 SENSOR_ATTR_PWM(1),
1643 SENSOR_ATTR_PWM(2),
792d376b
WS		 1644 SENSOR_ATTR_PWM(3),
1645 SENSOR_ATTR_PWM(4),
1646 SENSOR_ATTR_PWM(5),
1647 SENSOR_ATTR_PWM(6),
1648 SENSOR_ATTR_PWM(7),
1649 SENSOR_ATTR_PWM(8),
1650};
1651
86ef4d2f 1652static const struct sensor_device_attribute_2 sda_single_files[] = {
792d376b
WS		 1653 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1654 store_chassis_clear, ALARM_STATUS, 46),
02728ffe
JD		 1655 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1656 store_beep, BEEP_ENABLE, 47),
792d376b
WS		 1657 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1658 store_fanin, FANIN_TOL, NOT_USED),
1659 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1660 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1661 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1662 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1663 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1664 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1665};
1666
1667/*
1668 * Driver interface
1669 */
1670
1671static void w83795_init_client(struct i2c_client *client)
1672{
01879a85
JD		 1673 struct w83795_data *data = i2c_get_clientdata(client);
1674 static const u16 clkin[4] = { /* in kHz */
1675 14318, 24000, 33333, 48000
1676 };
80646b95
JD		 1677 u8 config;
1678
792d376b
WS		 1679 if (reset)
1680 w83795_write(client, W83795_REG_CONFIG, 0x80);
1681
80646b95
JD		 1682 /* Start monitoring if needed */
1683 config = w83795_read(client, W83795_REG_CONFIG);
1684 if (!(config & W83795_REG_CONFIG_START)) {
1685 dev_info(&client->dev, "Enabling monitoring operations\n");
1686 w83795_write(client, W83795_REG_CONFIG,
1687 config | W83795_REG_CONFIG_START);
1688 }
01879a85
JD		 1689
1690 data->clkin = clkin[(config >> 3) & 0x3];
1691 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
792d376b
WS		 1692}
1693
2be381de
JD		 1694static int w83795_get_device_id(struct i2c_client *client)
1695{
1696 int device_id;
1697
1698 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1699
1700 /* Special case for rev. A chips; can't be checked first because later
1701 revisions emulate this for compatibility */
1702 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1703 int alt_id;
1704
1705 alt_id = i2c_smbus_read_byte_data(client,
1706 W83795_REG_DEVICEID_A);
1707 if (alt_id == 0x50)
1708 device_id = alt_id;
1709 }
1710
1711 return device_id;
1712}
1713
792d376b
WS		 1714/* Return 0 if detection is successful, -ENODEV otherwise */
1715static int w83795_detect(struct i2c_client *client,
1716 struct i2c_board_info *info)
1717{
2be381de 1718 int bank, vendor_id, device_id, expected, i2c_addr, config;
792d376b
WS		 1719 struct i2c_adapter *adapter = client->adapter;
1720 unsigned short address = client->addr;
093d1a47 1721 const char *chip_name;
792d376b
WS		 1722
1723 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1724 return -ENODEV;
1725 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2be381de
JD		 1726 if (bank < 0 || (bank & 0x7c)) {
1727 dev_dbg(&adapter->dev,
1728 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1729 address, "bank");
1730 return -ENODEV;
1731 }
792d376b 1732
792d376b 1733 /* Check Nuvoton vendor ID */
2be381de
JD		 1734 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1735 expected = bank & 0x80 ? 0x5c : 0xa3;
1736 if (vendor_id != expected) {
1737 dev_dbg(&adapter->dev,
1738 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1739 address, "vendor id");
792d376b
WS		 1740 return -ENODEV;
1741 }
1742
2be381de
JD		 1743 /* Check device ID */
1744 device_id = w83795_get_device_id(client) |
1745 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1746 if ((device_id >> 4) != 0x795) {
1747 dev_dbg(&adapter->dev,
1748 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1749 address, "device id\n");
792d376b
WS		 1750 return -ENODEV;
1751 }
1752
2be381de
JD		 1753 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1754 should match */
1755 if ((bank & 0x07) == 0) {
1756 i2c_addr = i2c_smbus_read_byte_data(client,
1757 W83795_REG_I2C_ADDR);
1758 if ((i2c_addr & 0x7f) != address) {
1759 dev_dbg(&adapter->dev,
1760 "w83795: Detection failed at addr 0x%02hx, "
1761 "check %s\n", address, "i2c addr");
1762 return -ENODEV;
1763 }
792d376b
WS		 1764 }
1765
093d1a47
JD		 1766 /* Check 795 chip type: 795G or 795ADG
1767 Usually we don't write to chips during detection, but here we don't
1768 quite have the choice; hopefully it's OK, we are about to return
1769 success anyway */
1770 if ((bank & 0x07) != 0)
1771 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1772 bank & ~0x07);
2be381de
JD		 1773 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1774 if (config & W83795_REG_CONFIG_CONFIG48)
093d1a47 1775 chip_name = "w83795adg";
2be381de 1776 else
093d1a47 1777 chip_name = "w83795g";
792d376b 1778
093d1a47 1779 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
2be381de
JD		 1780 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1781 'A' + (device_id & 0xf), address);
792d376b
WS		 1782
1783 return 0;
1784}
1785
6f3dcde9
JD		 1786static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1787 const struct device_attribute *))
892514a6
JD		 1788{
1789 struct w83795_data *data = dev_get_drvdata(dev);
87df0dad 1790 int err, i, j;
892514a6
JD		 1791
1792 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
87df0dad 1793 if (!(data->has_in & (1 << i)))
892514a6 1794 continue;
87df0dad
JD		 1795 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1796 err = fn(dev, &w83795_in[i][j].dev_attr);
1797 if (err)
1798 return err;
1799 }
892514a6
JD		 1800 }
1801
1802 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
87df0dad 1803 if (!(data->has_fan & (1 << i)))
892514a6 1804 continue;
87df0dad
JD		 1805 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1806 err = fn(dev, &w83795_fan[i][j].dev_attr);
1807 if (err)
1808 return err;
1809 }
892514a6
JD		 1810 }
1811
1812 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
6f3dcde9 1813 err = fn(dev, &sda_single_files[i].dev_attr);
892514a6
JD		 1814 if (err)
1815 return err;
1816 }
1817
b5f6a90a
JD		 1818 for (i = 0; i < data->has_pwm; i++) {
1819 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1820 err = fn(dev, &w83795_pwm[i][j].dev_attr);
892514a6
JD		 1821 if (err)
1822 return err;
1823 }
1824 }
1825
1826 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
87df0dad 1827 if (!(data->has_temp & (1 << i)))
892514a6 1828 continue;
87df0dad
JD		 1829 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1830 err = fn(dev, &w83795_temp[i][j].dev_attr);
1831 if (err)
1832 return err;
1833 }
892514a6
JD		 1834 }
1835
1836 if (data->enable_dts != 0) {
1837 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
87df0dad 1838 if (!(data->has_dts & (1 << i)))
892514a6 1839 continue;
87df0dad
JD		 1840 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1841 err = fn(dev, &w83795_dts[i][j].dev_attr);
1842 if (err)
1843 return err;
1844 }
892514a6
JD		 1845 }
1846 }
1847
892514a6
JD		 1848 return 0;
1849}
1850
6f3dcde9
JD		 1851/* We need a wrapper that fits in w83795_handle_files */
1852static int device_remove_file_wrapper(struct device *dev,
1853 const struct device_attribute *attr)
2fa09878 1854{
6f3dcde9
JD		 1855 device_remove_file(dev, attr);
1856 return 0;
2fa09878
JD		 1857}
1858
0e256018
JD		 1859static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1860{
1861 struct w83795_data *data = i2c_get_clientdata(client);
1862 u8 vid_ctl;
1863 int i, err_max, err_min;
1864
1865 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1866
1867 /* Return immediately if VRM isn't configured */
1868 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1869 return;
1870
1871 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1872 for (i = 0; i < 2; i++) {
1873 if (!(data->has_dyn_in & (1 << i)))
1874 continue;
1875
1876 /* Voltage limits in dynamic mode, switch to read-only */
1877 err_max = sysfs_chmod_file(&client->dev.kobj,
1878 &w83795_in[i][2].dev_attr.attr,
1879 S_IRUGO);
1880 err_min = sysfs_chmod_file(&client->dev.kobj,
1881 &w83795_in[i][3].dev_attr.attr,
1882 S_IRUGO);
1883 if (err_max || err_min)
1884 dev_warn(&client->dev, "Failed to set in%d limits "
1885 "read-only (%d, %d)\n", i, err_max, err_min);
1886 else
1887 dev_info(&client->dev, "in%d limits set dynamically "
1888 "from VID\n", i);
1889 }
1890}
1891
71caf46f
JD		 1892/* Check pins that can be used for either temperature or voltage monitoring */
1893static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1894 int temp_chan, int in_chan)
1895{
1896 /* config is a 2-bit value */
1897 switch (config) {
1898 case 0x2: /* Voltage monitoring */
1899 data->has_in |= 1 << in_chan;
1900 break;
1901 case 0x1: /* Thermal diode */
1902 if (temp_chan >= 4)
1903 break;
1904 data->temp_mode |= 1 << temp_chan;
1905 /* fall through */
1906 case 0x3: /* Thermistor */
1907 data->has_temp |= 1 << temp_chan;
1908 break;
1909 }
1910}
1911
792d376b
WS		 1912static int w83795_probe(struct i2c_client *client,
1913 const struct i2c_device_id *id)
1914{
1915 int i;
1916 u8 tmp;
1917 struct device *dev = &client->dev;
1918 struct w83795_data *data;
71caf46f 1919 int err;
792d376b
WS		 1920
1921 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1922 if (!data) {
1923 err = -ENOMEM;
1924 goto exit;
1925 }
1926
1927 i2c_set_clientdata(client, data);
093d1a47 1928 data->chip_type = id->driver_data;
792d376b
WS		 1929 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1930 mutex_init(&data->update_lock);
1931
1932 /* Initialize the chip */
1933 w83795_init_client(client);
1934
71caf46f
JD		 1935 /* Check which voltages and fans are present */
1936 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
1937 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
1938 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
1939 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
792d376b 1940
71caf46f 1941 /* Check which analog temperatures and extra voltages are present */
792d376b
WS		 1942 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1943 if (tmp & 0x20)
1944 data->enable_dts = 1;
71caf46f
JD		 1945 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
1946 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
792d376b 1947 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
71caf46f
JD		 1948 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
1949 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
1950 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
1951 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
792d376b
WS		 1952
1953 /* Check DTS enable status */
71caf46f 1954 if (data->enable_dts) {
792d376b
WS		 1955 if (1 & w83795_read(client, W83795_REG_DTSC))
1956 data->enable_dts |= 2;
1957 data->has_dts = w83795_read(client, W83795_REG_DTSE);
1958 }
1959
54891a3c
JD		 1960 /* Report PECI Tbase values */
1961 if (data->enable_dts == 1) {
1962 for (i = 0; i < 8; i++) {
1963 if (!(data->has_dts & (1 << i)))
1964 continue;
1965 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
1966 dev_info(&client->dev,
1967 "PECI agent %d Tbase temperature: %u\n",
1968 i + 1, (unsigned int)tmp & 0x7f);
1969 }
1970 }
1971
792d376b
WS		 1972 /* First update the voltages measured value and limits */
1973 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
1974 if (!(data->has_in & (1 << i)))
1975 continue;
1976 data->in[i][IN_MAX] =
1977 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
1978 data->in[i][IN_LOW] =
1979 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
1980 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
a654b9d4 1981 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
792d376b
WS		 1982 data->in[i][IN_READ] = tmp;
1983 }
1984 for (i = 0; i < IN_LSB_REG_NUM; i++) {
c1a792a6
JD		 1985 if ((i == 2 && data->chip_type == w83795adg) ||
1986 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
1987 continue;
792d376b
WS		 1988 data->in_lsb[i][IN_MAX] =
1989 w83795_read(client, IN_LSB_REG(i, IN_MAX));
1990 data->in_lsb[i][IN_LOW] =
1991 w83795_read(client, IN_LSB_REG(i, IN_LOW));
1992 }
1993 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
1994
1995 /* First update fan and limits */
1996 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
c1a792a6
JD		 1997 /* Each register contains LSB for 2 fans, but we want to
1998 * read it only once to save time */
1999 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
2000 tmp = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
2001
792d376b
WS		 2002 if (!(data->has_fan & (1 << i)))
2003 continue;
2004 data->fan_min[i] =
2005 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
2006 data->fan_min[i] |=
c1a792a6 2007 (tmp >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
792d376b 2008 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
a654b9d4 2009 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
792d376b
WS		 2010 }
2011
2012 /* temperature and limits */
2013 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2014 if (!(data->has_temp & (1 << i)))
2015 continue;
2016 data->temp[i][TEMP_CRIT] =
2017 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
2018 data->temp[i][TEMP_CRIT_HYST] =
2019 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
2020 data->temp[i][TEMP_WARN] =
2021 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
2022 data->temp[i][TEMP_WARN_HYST] =
2023 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
2024 data->temp[i][TEMP_READ] =
2025 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
2026 data->temp_read_vrlsb[i] =
2027 w83795_read(client, W83795_REG_VRLSB);
2028 }
2029
2030 /* dts temperature and limits */
2031 if (data->enable_dts != 0) {
2032 data->dts_ext[DTS_CRIT] =
2033 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
2034 data->dts_ext[DTS_CRIT_HYST] =
2035 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
2036 data->dts_ext[DTS_WARN] =
2037 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
2038 data->dts_ext[DTS_WARN_HYST] =
2039 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
2040 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
2041 if (!(data->has_dts & (1 << i)))
2042 continue;
2043 data->dts[i] = w83795_read(client, W83795_REG_DTS(i));
2044 data->dts_read_vrlsb[i] =
2045 w83795_read(client, W83795_REG_VRLSB);
2046 }
2047 }
2048
2049 /* First update temp source selction */
2050 for (i = 0; i < 3; i++)
2051 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
2052
2053 /* pwm and smart fan */
2054 if (data->chip_type == w83795g)
2055 data->has_pwm = 8;
2056 else
2057 data->has_pwm = 2;
2058 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
2059 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
792d376b
WS		 2060 for (i = 0; i < W83795_REG_TEMP_NUM; i++)
2061 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
2062 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
2063 for (i = 0; i < data->has_pwm; i++) {
2064 for (tmp = 0; tmp < 5; tmp++) {
2065 data->pwm[i][tmp] =
2066 w83795_read(client, W83795_REG_PWM(i, tmp));
2067 }
2068 }
2069 for (i = 0; i < 8; i++) {
2070 data->target_speed[i] =
2071 w83795_read(client, W83795_REG_FTSH(i)) << 4;
2072 data->target_speed[i] |=
2073 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
2074 }
2075 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
2076
2077 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
2078 data->pwm_temp[i][TEMP_PWM_TTTI] =
2079 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
2080 data->pwm_temp[i][TEMP_PWM_CTFS] =
2081 w83795_read(client, W83795_REG_CTFS(i));
2082 tmp = w83795_read(client, W83795_REG_HT(i));
2083 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
2084 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
2085 }
2086 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
2087 for (tmp = 0; tmp < 7; tmp++) {
2088 data->sf4_reg[i][SF4_TEMP][tmp] =
2089 w83795_read(client,
2090 W83795_REG_SF4_TEMP(i, tmp));
2091 data->sf4_reg[i][SF4_PWM][tmp] =
2092 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
2093 }
2094 }
2095
2096 /* Setup PWM Register */
2097 for (i = 0; i < 3; i++) {
2098 data->setup_pwm[i] =
2099 w83795_read(client, W83795_REG_SETUP_PWM(i));
2100 }
2101
2102 /* alarm and beep */
2103 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) {
2104 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
2105 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2106 }
792d376b 2107
6f3dcde9 2108 err = w83795_handle_files(dev, device_create_file);
892514a6
JD		 2109 if (err)
2110 goto exit_remove;
792d376b 2111
0e256018
JD		 2112 if (data->chip_type == w83795g)
2113 w83795_check_dynamic_in_limits(client);
2114
792d376b
WS		 2115 data->hwmon_dev = hwmon_device_register(dev);
2116 if (IS_ERR(data->hwmon_dev)) {
2117 err = PTR_ERR(data->hwmon_dev);
2118 goto exit_remove;
2119 }
2120
2121 return 0;
2122
792d376b 2123exit_remove:
6f3dcde9 2124 w83795_handle_files(dev, device_remove_file_wrapper);
792d376b
WS		 2125 kfree(data);
2126exit:
2127 return err;
2128}
2129
2130static int w83795_remove(struct i2c_client *client)
2131{
2132 struct w83795_data *data = i2c_get_clientdata(client);
792d376b
WS		 2133
2134 hwmon_device_unregister(data->hwmon_dev);
6f3dcde9 2135 w83795_handle_files(&client->dev, device_remove_file_wrapper);
792d376b
WS		 2136 kfree(data);
2137
2138 return 0;
2139}
2140
2141
2142static const struct i2c_device_id w83795_id[] = {
093d1a47
JD		 2143 { "w83795g", w83795g },
2144 { "w83795adg", w83795adg },
792d376b
WS		 2145 { }
2146};
2147MODULE_DEVICE_TABLE(i2c, w83795_id);
2148
2149static struct i2c_driver w83795_driver = {
2150 .driver = {
2151 .name = "w83795",
2152 },
2153 .probe = w83795_probe,
2154 .remove = w83795_remove,
2155 .id_table = w83795_id,
2156
2157 .class = I2C_CLASS_HWMON,
2158 .detect = w83795_detect,
2159 .address_list = normal_i2c,
2160};
2161
2162static int __init sensors_w83795_init(void)
2163{
2164 return i2c_add_driver(&w83795_driver);
2165}
2166
2167static void __exit sensors_w83795_exit(void)
2168{
2169 i2c_del_driver(&w83795_driver);
2170}
2171
2172MODULE_AUTHOR("Wei Song");
315bacfd 2173MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
792d376b
WS		 2174MODULE_LICENSE("GPL");
2175
2176module_init(sensors_w83795_init);
2177module_exit(sensors_w83795_exit);
Linux 6.x block layer and io_uring tree(s)