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hwmon: (w83795) Unconditionally support manual fan speed control
[linux-2.6-block.git] / drivers / hwmon / w83795.c
CommitLineData
792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
e3760b43 5 * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
792d376b
WS		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation - version 2.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301 USA.
20 *
21 * Supports following chips:
22 *
23 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
24 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
25 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/i2c.h>
33#include <linux/hwmon.h>
34#include <linux/hwmon-sysfs.h>
35#include <linux/err.h>
36#include <linux/mutex.h>
37#include <linux/delay.h>
38
39/* Addresses to scan */
86ef4d2f
JD		 40static const unsigned short normal_i2c[] = {
41 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
42};
792d376b 43
792d376b 44
90ab5ee9 45static bool reset;
792d376b
WS		 46module_param(reset, bool, 0);
47MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
48
49
50#define W83795_REG_BANKSEL 0x00
51#define W83795_REG_VENDORID 0xfd
52#define W83795_REG_CHIPID 0xfe
53#define W83795_REG_DEVICEID 0xfb
2be381de 54#define W83795_REG_DEVICEID_A 0xff
792d376b
WS		 55
56#define W83795_REG_I2C_ADDR 0xfc
57#define W83795_REG_CONFIG 0x01
58#define W83795_REG_CONFIG_CONFIG48 0x04
80646b95 59#define W83795_REG_CONFIG_START 0x01
792d376b
WS		 60
61/* Multi-Function Pin Ctrl Registers */
62#define W83795_REG_VOLT_CTRL1 0x02
63#define W83795_REG_VOLT_CTRL2 0x03
64#define W83795_REG_TEMP_CTRL1 0x04
65#define W83795_REG_TEMP_CTRL2 0x05
66#define W83795_REG_FANIN_CTRL1 0x06
67#define W83795_REG_FANIN_CTRL2 0x07
68#define W83795_REG_VMIGB_CTRL 0x08
69
792d376b
WS		 70#define TEMP_READ 0
71#define TEMP_CRIT 1
72#define TEMP_CRIT_HYST 2
73#define TEMP_WARN 3
74#define TEMP_WARN_HYST 4
75/* only crit and crit_hyst affect real-time alarm status
76 * current crit crit_hyst warn warn_hyst */
86ef4d2f 77static const u16 W83795_REG_TEMP[][5] = {
792d376b
WS		 78 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
79 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
80 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
81 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
82 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
83 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
84};
85
86#define IN_READ 0
87#define IN_MAX 1
88#define IN_LOW 2
89static const u16 W83795_REG_IN[][3] = {
90 /* Current, HL, LL */
91 {0x10, 0x70, 0x71}, /* VSEN1 */
92 {0x11, 0x72, 0x73}, /* VSEN2 */
93 {0x12, 0x74, 0x75}, /* VSEN3 */
94 {0x13, 0x76, 0x77}, /* VSEN4 */
95 {0x14, 0x78, 0x79}, /* VSEN5 */
96 {0x15, 0x7a, 0x7b}, /* VSEN6 */
97 {0x16, 0x7c, 0x7d}, /* VSEN7 */
98 {0x17, 0x7e, 0x7f}, /* VSEN8 */
99 {0x18, 0x80, 0x81}, /* VSEN9 */
100 {0x19, 0x82, 0x83}, /* VSEN10 */
101 {0x1A, 0x84, 0x85}, /* VSEN11 */
102 {0x1B, 0x86, 0x87}, /* VTT */
103 {0x1C, 0x88, 0x89}, /* 3VDD */
104 {0x1D, 0x8a, 0x8b}, /* 3VSB */
105 {0x1E, 0x8c, 0x8d}, /* VBAT */
106 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
107 {0x20, 0xaa, 0xab}, /* VSEN13 */
108 {0x21, 0x96, 0x97}, /* VSEN14 */
109 {0x22, 0x9a, 0x9b}, /* VSEN15 */
110 {0x23, 0x9e, 0x9f}, /* VSEN16 */
111 {0x24, 0xa2, 0xa3}, /* VSEN17 */
112};
113#define W83795_REG_VRLSB 0x3C
792d376b
WS		 114
115static const u8 W83795_REG_IN_HL_LSB[] = {
116 0x8e, /* VSEN1-4 */
117 0x90, /* VSEN5-8 */
118 0x92, /* VSEN9-11 */
119 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
120 0xa8, /* VSEN12 */
121 0xac, /* VSEN13 */
122 0x98, /* VSEN14 */
123 0x9c, /* VSEN15 */
124 0xa0, /* VSEN16 */
125 0xa4, /* VSEN17 */
126};
127
128#define IN_LSB_REG(index, type) \
129 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
130 : (W83795_REG_IN_HL_LSB[(index)] + 1))
131
792d376b
WS		 132#define IN_LSB_SHIFT 0
133#define IN_LSB_IDX 1
134static const u8 IN_LSB_SHIFT_IDX[][2] = {
135 /* High/Low LSB shift, LSB No. */
136 {0x00, 0x00}, /* VSEN1 */
137 {0x02, 0x00}, /* VSEN2 */
138 {0x04, 0x00}, /* VSEN3 */
139 {0x06, 0x00}, /* VSEN4 */
140 {0x00, 0x01}, /* VSEN5 */
141 {0x02, 0x01}, /* VSEN6 */
142 {0x04, 0x01}, /* VSEN7 */
143 {0x06, 0x01}, /* VSEN8 */
144 {0x00, 0x02}, /* VSEN9 */
145 {0x02, 0x02}, /* VSEN10 */
146 {0x04, 0x02}, /* VSEN11 */
147 {0x00, 0x03}, /* VTT */
148 {0x02, 0x03}, /* 3VDD */
149 {0x04, 0x03}, /* 3VSB */
150 {0x06, 0x03}, /* VBAT */
151 {0x06, 0x04}, /* VSEN12 */
152 {0x06, 0x05}, /* VSEN13 */
153 {0x06, 0x06}, /* VSEN14 */
154 {0x06, 0x07}, /* VSEN15 */
155 {0x06, 0x08}, /* VSEN16 */
156 {0x06, 0x09}, /* VSEN17 */
157};
158
159
792d376b
WS		 160#define W83795_REG_FAN(index) (0x2E + (index))
161#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
162#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
163#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
7eb8d508 164 (((index) & 1) ? 4 : 0)
792d376b
WS		 165
166#define W83795_REG_VID_CTRL 0x6A
167
cf6b9ea6
JD		 168#define W83795_REG_ALARM_CTRL 0x40
169#define ALARM_CTRL_RTSACS (1 << 7)
792d376b 170#define W83795_REG_ALARM(index) (0x41 + (index))
792d376b 171#define W83795_REG_CLR_CHASSIS 0x4D
cf6b9ea6 172#define W83795_REG_BEEP(index) (0x50 + (index))
792d376b 173
52d159ee
JD		 174#define W83795_REG_OVT_CFG 0x58
175#define OVT_CFG_SEL (1 << 7)
176
792d376b 177
792d376b
WS		 178#define W83795_REG_FCMS1 0x201
179#define W83795_REG_FCMS2 0x208
180#define W83795_REG_TFMR(index) (0x202 + (index))
181#define W83795_REG_FOMC 0x20F
792d376b
WS		 182
183#define W83795_REG_TSS(index) (0x209 + (index))
184
edff2f8d
JD		 185#define TSS_MAP_RESERVED 0xff
186static const u8 tss_map[4][6] = {
187 { 0, 1, 2, 3, 4, 5},
188 { 6, 7, 8, 9, 0, 1},
189 {10, 11, 12, 13, 2, 3},
190 { 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED},
191};
192
792d376b 193#define PWM_OUTPUT 0
fd7f82b8
JD		 194#define PWM_FREQ 1
195#define PWM_START 2
196#define PWM_NONSTOP 3
197#define PWM_STOP_TIME 4
198#define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
792d376b 199
792d376b
WS		 200#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
201#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
202#define W83795_REG_TFTS 0x250
203
204#define TEMP_PWM_TTTI 0
205#define TEMP_PWM_CTFS 1
206#define TEMP_PWM_HCT 2
207#define TEMP_PWM_HOT 3
208#define W83795_REG_TTTI(index) (0x260 + (index))
209#define W83795_REG_CTFS(index) (0x268 + (index))
210#define W83795_REG_HT(index) (0x270 + (index))
211
212#define SF4_TEMP 0
213#define SF4_PWM 1
214#define W83795_REG_SF4_TEMP(temp_num, index) \
215 (0x280 + 0x10 * (temp_num) + (index))
216#define W83795_REG_SF4_PWM(temp_num, index) \
217 (0x288 + 0x10 * (temp_num) + (index))
218
219#define W83795_REG_DTSC 0x301
220#define W83795_REG_DTSE 0x302
221#define W83795_REG_DTS(index) (0x26 + (index))
54891a3c 222#define W83795_REG_PECI_TBASE(index) (0x320 + (index))
792d376b
WS		 223
224#define DTS_CRIT 0
225#define DTS_CRIT_HYST 1
226#define DTS_WARN 2
227#define DTS_WARN_HYST 3
228#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
229
230#define SETUP_PWM_DEFAULT 0
231#define SETUP_PWM_UPTIME 1
232#define SETUP_PWM_DOWNTIME 2
233#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
234
235static inline u16 in_from_reg(u8 index, u16 val)
236{
49c7347a
JD		 237 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
238 if (index >= 12 && index <= 14)
792d376b
WS		 239 return val * 6;
240 else
241 return val * 2;
242}
243
244static inline u16 in_to_reg(u8 index, u16 val)
245{
49c7347a 246 if (index >= 12 && index <= 14)
792d376b
WS		 247 return val / 6;
248 else
249 return val / 2;
250}
251
252static inline unsigned long fan_from_reg(u16 val)
253{
6c82b2f3 254 if ((val == 0xfff) || (val == 0))
792d376b
WS		 255 return 0;
256 return 1350000UL / val;
257}
258
259static inline u16 fan_to_reg(long rpm)
260{
261 if (rpm <= 0)
262 return 0x0fff;
263 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
264}
265
266static inline unsigned long time_from_reg(u8 reg)
267{
268 return reg * 100;
269}
270
271static inline u8 time_to_reg(unsigned long val)
272{
273 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
274}
275
276static inline long temp_from_reg(s8 reg)
277{
278 return reg * 1000;
279}
280
281static inline s8 temp_to_reg(long val, s8 min, s8 max)
282{
dd127f5c 283 return SENSORS_LIMIT(val / 1000, min, max);
792d376b
WS		 284}
285
01879a85
JD		 286static const u16 pwm_freq_cksel0[16] = {
287 1024, 512, 341, 256, 205, 171, 146, 128,
288 85, 64, 32, 16, 8, 4, 2, 1
289};
290
291static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
292{
293 unsigned long base_clock;
294
295 if (reg & 0x80) {
296 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
297 return base_clock / ((reg & 0x7f) + 1);
298 } else
299 return pwm_freq_cksel0[reg & 0x0f];
300}
301
302static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
303{
304 unsigned long base_clock;
305 u8 reg0, reg1;
306 unsigned long best0, best1;
307
308 /* Best fit for cksel = 0 */
309 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
310 if (val > (pwm_freq_cksel0[reg0] +
311 pwm_freq_cksel0[reg0 + 1]) / 2)
312 break;
313 }
314 if (val < 375) /* cksel = 1 can't beat this */
315 return reg0;
316 best0 = pwm_freq_cksel0[reg0];
317
318 /* Best fit for cksel = 1 */
319 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
320 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
321 best1 = base_clock / reg1;
322 reg1 = 0x80 | (reg1 - 1);
323
324 /* Choose the closest one */
325 if (abs(val - best0) > abs(val - best1))
326 return reg1;
327 else
328 return reg0;
329}
792d376b
WS		 330
331enum chip_types {w83795g, w83795adg};
332
333struct w83795_data {
334 struct device *hwmon_dev;
335 struct mutex update_lock;
336 unsigned long last_updated; /* In jiffies */
337 enum chip_types chip_type;
338
339 u8 bank;
340
341 u32 has_in; /* Enable monitor VIN or not */
0e256018 342 u8 has_dyn_in; /* Only in2-0 can have this */
792d376b
WS		 343 u16 in[21][3]; /* Register value, read/high/low */
344 u8 in_lsb[10][3]; /* LSB Register value, high/low */
345 u8 has_gain; /* has gain: in17-20 * 8 */
346
347 u16 has_fan; /* Enable fan14-1 or not */
348 u16 fan[14]; /* Register value combine */
349 u16 fan_min[14]; /* Register value combine */
350
351 u8 has_temp; /* Enable monitor temp6-1 or not */
dd127f5c 352 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
792d376b 353 u8 temp_read_vrlsb[6];
39deb699 354 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
792d376b
WS		 355 u8 temp_src[3]; /* Register value */
356
357 u8 enable_dts; /* Enable PECI and SB-TSI,
358 * bit 0: =1 enable, =0 disable,
359 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
360 u8 has_dts; /* Enable monitor DTS temp */
dd127f5c 361 s8 dts[8]; /* Register value */
792d376b 362 u8 dts_read_vrlsb[8]; /* Register value */
dd127f5c 363 s8 dts_ext[4]; /* Register value */
792d376b
WS		 364
365 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
366 * no config register, only affected by chip
367 * type */
fd7f82b8
JD		 368 u8 pwm[8][5]; /* Register value, output, freq, start,
369 * non stop, stop time */
01879a85 370 u16 clkin; /* CLKIN frequency in kHz */
792d376b
WS		 371 u8 pwm_fcms[2]; /* Register value */
372 u8 pwm_tfmr[6]; /* Register value */
373 u8 pwm_fomc; /* Register value */
374
375 u16 target_speed[8]; /* Register value, target speed for speed
376 * cruise */
377 u8 tol_speed; /* tolerance of target speed */
378 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
379 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
380
381 u8 setup_pwm[3]; /* Register value */
382
383 u8 alarms[6]; /* Register value */
52d159ee 384 u8 enable_beep;
792d376b 385 u8 beeps[6]; /* Register value */
792d376b
WS		 386
387 char valid;
2ae61de9 388 char valid_limits;
1bb3450c 389 char valid_pwm_config;
792d376b
WS		 390};
391
392/*
393 * Hardware access
b2469f42 394 * We assume that nobdody can change the bank outside the driver.
792d376b
WS		 395 */
396
b2469f42
JD		 397/* Must be called with data->update_lock held, except during initialization */
398static int w83795_set_bank(struct i2c_client *client, u8 bank)
792d376b
WS		 399{
400 struct w83795_data *data = i2c_get_clientdata(client);
b2469f42
JD		 401 int err;
402
403 /* If the same bank is already set, nothing to do */
404 if ((data->bank & 0x07) == bank)
405 return 0;
406
407 /* Change to new bank, preserve all other bits */
408 bank |= data->bank & ~0x07;
409 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
410 if (err < 0) {
411 dev_err(&client->dev,
412 "Failed to set bank to %d, err %d\n",
413 (int)bank, err);
414 return err;
792d376b 415 }
b2469f42
JD		 416 data->bank = bank;
417
418 return 0;
792d376b
WS		 419}
420
421/* Must be called with data->update_lock held, except during initialization */
b2469f42 422static u8 w83795_read(struct i2c_client *client, u16 reg)
792d376b 423{
b2469f42
JD		 424 int err;
425
426 err = w83795_set_bank(client, reg >> 8);
427 if (err < 0)
428 return 0x00; /* Arbitrary */
429
430 err = i2c_smbus_read_byte_data(client, reg & 0xff);
431 if (err < 0) {
432 dev_err(&client->dev,
433 "Failed to read from register 0x%03x, err %d\n",
434 (int)reg, err);
435 return 0x00; /* Arbitrary */
792d376b 436 }
b2469f42
JD		 437 return err;
438}
792d376b 439
b2469f42
JD		 440/* Must be called with data->update_lock held, except during initialization */
441static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
442{
443 int err;
444
445 err = w83795_set_bank(client, reg >> 8);
446 if (err < 0)
447 return err;
448
449 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
450 if (err < 0)
451 dev_err(&client->dev,
452 "Failed to write to register 0x%03x, err %d\n",
453 (int)reg, err);
454 return err;
792d376b
WS		 455}
456
0d7237bf
JD		 457static void w83795_update_limits(struct i2c_client *client)
458{
459 struct w83795_data *data = i2c_get_clientdata(client);
460 int i, limit;
014bcd28 461 u8 lsb;
0d7237bf
JD		 462
463 /* Read the voltage limits */
464 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
465 if (!(data->has_in & (1 << i)))
466 continue;
467 data->in[i][IN_MAX] =
468 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
469 data->in[i][IN_LOW] =
470 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
471 }
472 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
473 if ((i == 2 && data->chip_type == w83795adg) ||
474 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
475 continue;
476 data->in_lsb[i][IN_MAX] =
477 w83795_read(client, IN_LSB_REG(i, IN_MAX));
478 data->in_lsb[i][IN_LOW] =
479 w83795_read(client, IN_LSB_REG(i, IN_LOW));
480 }
481
482 /* Read the fan limits */
014bcd28 483 lsb = 0; /* Silent false gcc warning */
0d7237bf 484 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
0d7237bf
JD		 485 /* Each register contains LSB for 2 fans, but we want to
486 * read it only once to save time */
487 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
488 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
489
490 if (!(data->has_fan & (1 << i)))
491 continue;
492 data->fan_min[i] =
493 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
494 data->fan_min[i] |=
495 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
496 }
497
498 /* Read the temperature limits */
499 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
500 if (!(data->has_temp & (1 << i)))
501 continue;
502 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
503 data->temp[i][limit] =
504 w83795_read(client, W83795_REG_TEMP[i][limit]);
505 }
506
507 /* Read the DTS limits */
eb02755a 508 if (data->enable_dts) {
0d7237bf
JD		 509 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
510 data->dts_ext[limit] =
511 w83795_read(client, W83795_REG_DTS_EXT(limit));
512 }
513
514 /* Read beep settings */
52d159ee
JD		 515 if (data->enable_beep) {
516 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
517 data->beeps[i] =
518 w83795_read(client, W83795_REG_BEEP(i));
519 }
2ae61de9
JD		 520
521 data->valid_limits = 1;
0d7237bf
JD		 522}
523
1bb3450c 524static struct w83795_data *w83795_update_pwm_config(struct device *dev)
0d7237bf 525{
1bb3450c 526 struct i2c_client *client = to_i2c_client(dev);
0d7237bf
JD		 527 struct w83795_data *data = i2c_get_clientdata(client);
528 int i, tmp;
529
1bb3450c
JD		 530 mutex_lock(&data->update_lock);
531
532 if (data->valid_pwm_config)
533 goto END;
534
0d7237bf
JD		 535 /* Read temperature source selection */
536 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
537 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
538
539 /* Read automatic fan speed control settings */
540 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
541 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
542 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
543 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
544 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
545 for (i = 0; i < data->has_pwm; i++) {
546 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
547 data->pwm[i][tmp] =
548 w83795_read(client, W83795_REG_PWM(i, tmp));
549 }
550 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
551 data->target_speed[i] =
552 w83795_read(client, W83795_REG_FTSH(i)) << 4;
553 data->target_speed[i] |=
554 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
555 }
556 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
557
558 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
559 data->pwm_temp[i][TEMP_PWM_TTTI] =
560 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
561 data->pwm_temp[i][TEMP_PWM_CTFS] =
562 w83795_read(client, W83795_REG_CTFS(i));
563 tmp = w83795_read(client, W83795_REG_HT(i));
eb02755a 564 data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
0d7237bf
JD		 565 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
566 }
567
568 /* Read SmartFanIV trip points */
569 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
570 for (tmp = 0; tmp < 7; tmp++) {
571 data->sf4_reg[i][SF4_TEMP][tmp] =
572 w83795_read(client,
573 W83795_REG_SF4_TEMP(i, tmp));
574 data->sf4_reg[i][SF4_PWM][tmp] =
575 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
576 }
577 }
578
579 /* Read setup PWM */
580 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
581 data->setup_pwm[i] =
582 w83795_read(client, W83795_REG_SETUP_PWM(i));
1bb3450c
JD		 583
584 data->valid_pwm_config = 1;
585
586END:
587 mutex_unlock(&data->update_lock);
588 return data;
0d7237bf
JD		 589}
590
792d376b
WS		 591static struct w83795_data *w83795_update_device(struct device *dev)
592{
593 struct i2c_client *client = to_i2c_client(dev);
594 struct w83795_data *data = i2c_get_clientdata(client);
595 u16 tmp;
cf6b9ea6 596 u8 intrusion;
792d376b
WS		 597 int i;
598
599 mutex_lock(&data->update_lock);
600
2ae61de9
JD		 601 if (!data->valid_limits)
602 w83795_update_limits(client);
603
792d376b
WS		 604 if (!(time_after(jiffies, data->last_updated + HZ * 2)
605 || !data->valid))
606 goto END;
607
608 /* Update the voltages value */
609 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
610 if (!(data->has_in & (1 << i)))
611 continue;
612 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
a654b9d4 613 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
792d376b
WS		 614 data->in[i][IN_READ] = tmp;
615 }
616
0e256018
JD		 617 /* in0-2 can have dynamic limits (W83795G only) */
618 if (data->has_dyn_in) {
619 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
620 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
621
622 for (i = 0; i < 3; i++) {
623 if (!(data->has_dyn_in & (1 << i)))
624 continue;
625 data->in[i][IN_MAX] =
626 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
627 data->in[i][IN_LOW] =
628 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
629 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
630 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
631 }
632 }
633
792d376b
WS		 634 /* Update fan */
635 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
636 if (!(data->has_fan & (1 << i)))
637 continue;
638 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
eb02755a 639 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
792d376b
WS		 640 }
641
642 /* Update temperature */
643 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
792d376b
WS		 644 data->temp[i][TEMP_READ] =
645 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
646 data->temp_read_vrlsb[i] =
647 w83795_read(client, W83795_REG_VRLSB);
648 }
649
650 /* Update dts temperature */
eb02755a 651 if (data->enable_dts) {
792d376b
WS		 652 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
653 if (!(data->has_dts & (1 << i)))
654 continue;
655 data->dts[i] =
656 w83795_read(client, W83795_REG_DTS(i));
657 data->dts_read_vrlsb[i] =
658 w83795_read(client, W83795_REG_VRLSB);
659 }
660 }
661
662 /* Update pwm output */
663 for (i = 0; i < data->has_pwm; i++) {
664 data->pwm[i][PWM_OUTPUT] =
665 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
666 }
667
cf6b9ea6
JD		 668 /* Update intrusion and alarms
669 * It is important to read intrusion first, because reading from
670 * register SMI STS6 clears the interrupt status temporarily. */
671 tmp = w83795_read(client, W83795_REG_ALARM_CTRL);
672 /* Switch to interrupt status for intrusion if needed */
673 if (tmp & ALARM_CTRL_RTSACS)
674 w83795_write(client, W83795_REG_ALARM_CTRL,
675 tmp & ~ALARM_CTRL_RTSACS);
676 intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6);
677 /* Switch to real-time alarms */
678 w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS);
cd316df5 679 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
792d376b 680 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
cf6b9ea6
JD		 681 data->alarms[5] |= intrusion;
682 /* Restore original configuration if needed */
683 if (!(tmp & ALARM_CTRL_RTSACS))
684 w83795_write(client, W83795_REG_ALARM_CTRL,
685 tmp & ~ALARM_CTRL_RTSACS);
792d376b
WS		 686
687 data->last_updated = jiffies;
688 data->valid = 1;
689
690END:
691 mutex_unlock(&data->update_lock);
692 return data;
693}
694
695/*
696 * Sysfs attributes
697 */
698
699#define ALARM_STATUS 0
700#define BEEP_ENABLE 1
701static ssize_t
702show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
703{
704 struct w83795_data *data = w83795_update_device(dev);
705 struct sensor_device_attribute_2 *sensor_attr =
706 to_sensor_dev_attr_2(attr);
707 int nr = sensor_attr->nr;
708 int index = sensor_attr->index >> 3;
709 int bit = sensor_attr->index & 0x07;
710 u8 val;
711
eb02755a
JD		 712 if (nr == ALARM_STATUS)
713 val = (data->alarms[index] >> bit) & 1;
714 else /* BEEP_ENABLE */
715 val = (data->beeps[index] >> bit) & 1;
792d376b
WS		 716
717 return sprintf(buf, "%u\n", val);
718}
719
720static ssize_t
721store_beep(struct device *dev, struct device_attribute *attr,
722 const char *buf, size_t count)
723{
724 struct i2c_client *client = to_i2c_client(dev);
725 struct w83795_data *data = i2c_get_clientdata(client);
726 struct sensor_device_attribute_2 *sensor_attr =
727 to_sensor_dev_attr_2(attr);
728 int index = sensor_attr->index >> 3;
729 int shift = sensor_attr->index & 0x07;
730 u8 beep_bit = 1 << shift;
731 unsigned long val;
732
179c4fdb 733 if (kstrtoul(buf, 10, &val) < 0)
792d376b
WS		 734 return -EINVAL;
735 if (val != 0 && val != 1)
736 return -EINVAL;
737
738 mutex_lock(&data->update_lock);
739 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
740 data->beeps[index] &= ~beep_bit;
741 data->beeps[index] |= val << shift;
742 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
743 mutex_unlock(&data->update_lock);
744
745 return count;
746}
747
24377101 748/* Write 0 to clear chassis alarm */
792d376b
WS		 749static ssize_t
750store_chassis_clear(struct device *dev,
751 struct device_attribute *attr, const char *buf,
752 size_t count)
753{
754 struct i2c_client *client = to_i2c_client(dev);
755 struct w83795_data *data = i2c_get_clientdata(client);
24377101
JD		 756 unsigned long val;
757
179c4fdb 758 if (kstrtoul(buf, 10, &val) < 0 || val != 0)
24377101 759 return -EINVAL;
792d376b
WS		 760
761 mutex_lock(&data->update_lock);
762 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
763 val |= 0x80;
764 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
793c51d5
JD		 765
766 /* Clear status and force cache refresh */
767 w83795_read(client, W83795_REG_ALARM(5));
768 data->valid = 0;
792d376b
WS		 769 mutex_unlock(&data->update_lock);
770 return count;
771}
772
773#define FAN_INPUT 0
774#define FAN_MIN 1
775static ssize_t
776show_fan(struct device *dev, struct device_attribute *attr, char *buf)
777{
778 struct sensor_device_attribute_2 *sensor_attr =
779 to_sensor_dev_attr_2(attr);
780 int nr = sensor_attr->nr;
781 int index = sensor_attr->index;
782 struct w83795_data *data = w83795_update_device(dev);
783 u16 val;
784
eb02755a 785 if (nr == FAN_INPUT)
792d376b
WS		 786 val = data->fan[index] & 0x0fff;
787 else
788 val = data->fan_min[index] & 0x0fff;
789
790 return sprintf(buf, "%lu\n", fan_from_reg(val));
791}
792
793static ssize_t
794store_fan_min(struct device *dev, struct device_attribute *attr,
795 const char *buf, size_t count)
796{
797 struct sensor_device_attribute_2 *sensor_attr =
798 to_sensor_dev_attr_2(attr);
799 int index = sensor_attr->index;
800 struct i2c_client *client = to_i2c_client(dev);
801 struct w83795_data *data = i2c_get_clientdata(client);
802 unsigned long val;
803
179c4fdb 804 if (kstrtoul(buf, 10, &val))
792d376b
WS		 805 return -EINVAL;
806 val = fan_to_reg(val);
807
808 mutex_lock(&data->update_lock);
809 data->fan_min[index] = val;
810 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
811 val &= 0x0f;
7eb8d508 812 if (index & 1) {
792d376b
WS		 813 val <<= 4;
814 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
815 & 0x0f;
816 } else {
817 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
818 & 0xf0;
819 }
820 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
821 mutex_unlock(&data->update_lock);
822
823 return count;
824}
825
826static ssize_t
827show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
828{
1bb3450c 829 struct w83795_data *data;
792d376b
WS		 830 struct sensor_device_attribute_2 *sensor_attr =
831 to_sensor_dev_attr_2(attr);
832 int nr = sensor_attr->nr;
833 int index = sensor_attr->index;
01879a85 834 unsigned int val;
792d376b 835
1bb3450c
JD		 836 data = nr == PWM_OUTPUT ? w83795_update_device(dev)
837 : w83795_update_pwm_config(dev);
838
792d376b
WS		 839 switch (nr) {
840 case PWM_STOP_TIME:
841 val = time_from_reg(data->pwm[index][nr]);
842 break;
01879a85
JD		 843 case PWM_FREQ:
844 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
792d376b
WS		 845 break;
846 default:
847 val = data->pwm[index][nr];
848 break;
849 }
850
851 return sprintf(buf, "%u\n", val);
852}
853
854static ssize_t
855store_pwm(struct device *dev, struct device_attribute *attr,
856 const char *buf, size_t count)
857{
858 struct i2c_client *client = to_i2c_client(dev);
859 struct w83795_data *data = i2c_get_clientdata(client);
860 struct sensor_device_attribute_2 *sensor_attr =
861 to_sensor_dev_attr_2(attr);
862 int nr = sensor_attr->nr;
863 int index = sensor_attr->index;
864 unsigned long val;
792d376b 865
179c4fdb 866 if (kstrtoul(buf, 10, &val) < 0)
792d376b
WS		 867 return -EINVAL;
868
869 mutex_lock(&data->update_lock);
870 switch (nr) {
871 case PWM_STOP_TIME:
872 val = time_to_reg(val);
873 break;
01879a85
JD		 874 case PWM_FREQ:
875 val = pwm_freq_to_reg(val, data->clkin);
792d376b
WS		 876 break;
877 default:
878 val = SENSORS_LIMIT(val, 0, 0xff);
879 break;
880 }
881 w83795_write(client, W83795_REG_PWM(index, nr), val);
01879a85 882 data->pwm[index][nr] = val;
792d376b
WS		 883 mutex_unlock(&data->update_lock);
884 return count;
792d376b
WS		 885}
886
887static ssize_t
888show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
889{
890 struct sensor_device_attribute_2 *sensor_attr =
891 to_sensor_dev_attr_2(attr);
1bb3450c 892 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 893 int index = sensor_attr->index;
894 u8 tmp;
895
ae51cd9b
JD		 896 /* Speed cruise mode */
897 if (data->pwm_fcms[0] & (1 << index)) {
792d376b
WS		 898 tmp = 2;
899 goto out;
900 }
ae51cd9b 901 /* Thermal cruise or SmartFan IV mode */
792d376b
WS		 902 for (tmp = 0; tmp < 6; tmp++) {
903 if (data->pwm_tfmr[tmp] & (1 << index)) {
904 tmp = 3;
905 goto out;
906 }
907 }
ae51cd9b
JD		 908 /* Manual mode */
909 tmp = 1;
792d376b
WS		 910
911out:
912 return sprintf(buf, "%u\n", tmp);
913}
914
915static ssize_t
916store_pwm_enable(struct device *dev, struct device_attribute *attr,
917 const char *buf, size_t count)
918{
919 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 920 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 921 struct sensor_device_attribute_2 *sensor_attr =
922 to_sensor_dev_attr_2(attr);
923 int index = sensor_attr->index;
924 unsigned long val;
925 int i;
926
179c4fdb 927 if (kstrtoul(buf, 10, &val) < 0)
792d376b 928 return -EINVAL;
ae51cd9b 929 if (val < 1 || val > 2)
792d376b
WS		 930 return -EINVAL;
931
72fea694
JD		 932#ifndef CONFIG_SENSORS_W83795_FANCTRL
933 if (val > 1) {
934 dev_warn(dev, "Automatic fan speed control support disabled\n");
935 dev_warn(dev, "Build with CONFIG_SENSORS_W83795_FANCTRL=y if you want it\n");
936 return -EOPNOTSUPP;
937 }
938#endif
939
792d376b
WS		 940 mutex_lock(&data->update_lock);
941 switch (val) {
792d376b 942 case 1:
ae51cd9b 943 /* Clear speed cruise mode bits */
792d376b
WS		 944 data->pwm_fcms[0] &= ~(1 << index);
945 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
ae51cd9b 946 /* Clear thermal cruise mode bits */
792d376b
WS		 947 for (i = 0; i < 6; i++) {
948 data->pwm_tfmr[i] &= ~(1 << index);
949 w83795_write(client, W83795_REG_TFMR(i),
950 data->pwm_tfmr[i]);
951 }
792d376b
WS		 952 break;
953 case 2:
954 data->pwm_fcms[0] |= (1 << index);
955 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
956 break;
957 }
958 mutex_unlock(&data->update_lock);
959 return count;
792d376b
WS		 960}
961
d5ab845a
JD		 962static ssize_t
963show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
964{
965 struct w83795_data *data = w83795_update_pwm_config(dev);
966 int index = to_sensor_dev_attr_2(attr)->index;
967 unsigned int mode;
968
969 if (data->pwm_fomc & (1 << index))
970 mode = 0; /* DC */
971 else
972 mode = 1; /* PWM */
973
974 return sprintf(buf, "%u\n", mode);
975}
976
edff2f8d
JD		 977/*
978 * Check whether a given temperature source can ever be useful.
979 * Returns the number of selectable temperature channels which are
980 * enabled.
981 */
982static int w83795_tss_useful(const struct w83795_data *data, int tsrc)
983{
984 int useful = 0, i;
985
986 for (i = 0; i < 4; i++) {
987 if (tss_map[i][tsrc] == TSS_MAP_RESERVED)
988 continue;
989 if (tss_map[i][tsrc] < 6) /* Analog */
990 useful += (data->has_temp >> tss_map[i][tsrc]) & 1;
991 else /* Digital */
992 useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1;
993 }
994
995 return useful;
996}
997
792d376b
WS		 998static ssize_t
999show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
1000{
1001 struct sensor_device_attribute_2 *sensor_attr =
1002 to_sensor_dev_attr_2(attr);
1bb3450c 1003 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b 1004 int index = sensor_attr->index;
2a2d27da 1005 u8 tmp = data->temp_src[index / 2];
792d376b 1006
7eb8d508 1007 if (index & 1)
2a2d27da 1008 tmp >>= 4; /* Pick high nibble */
792d376b 1009 else
2a2d27da 1010 tmp &= 0x0f; /* Pick low nibble */
792d376b 1011
2a2d27da
JD		 1012 /* Look-up the actual temperature channel number */
1013 if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED)
1014 return -EINVAL; /* Shouldn't happen */
1015
1016 return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1);
792d376b
WS		 1017}
1018
1019static ssize_t
1020store_temp_src(struct device *dev, struct device_attribute *attr,
1021 const char *buf, size_t count)
1022{
1023 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 1024 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1025 struct sensor_device_attribute_2 *sensor_attr =
1026 to_sensor_dev_attr_2(attr);
1027 int index = sensor_attr->index;
2a2d27da
JD		 1028 int tmp;
1029 unsigned long channel;
792d376b
WS		 1030 u8 val = index / 2;
1031
179c4fdb 1032 if (kstrtoul(buf, 10, &channel) < 0 ||
2a2d27da
JD		 1033 channel < 1 || channel > 14)
1034 return -EINVAL;
1035
1036 /* Check if request can be fulfilled */
1037 for (tmp = 0; tmp < 4; tmp++) {
1038 if (tss_map[tmp][index] == channel - 1)
1039 break;
1040 }
1041 if (tmp == 4) /* No match */
792d376b 1042 return -EINVAL;
792d376b
WS		 1043
1044 mutex_lock(&data->update_lock);
7eb8d508 1045 if (index & 1) {
792d376b
WS		 1046 tmp <<= 4;
1047 data->temp_src[val] &= 0x0f;
1048 } else {
1049 data->temp_src[val] &= 0xf0;
1050 }
1051 data->temp_src[val] |= tmp;
1052 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
1053 mutex_unlock(&data->update_lock);
1054
1055 return count;
1056}
1057
1058#define TEMP_PWM_ENABLE 0
1059#define TEMP_PWM_FAN_MAP 1
1060static ssize_t
1061show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1062 char *buf)
1063{
1bb3450c 1064 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1065 struct sensor_device_attribute_2 *sensor_attr =
1066 to_sensor_dev_attr_2(attr);
1067 int nr = sensor_attr->nr;
1068 int index = sensor_attr->index;
1069 u8 tmp = 0xff;
1070
1071 switch (nr) {
1072 case TEMP_PWM_ENABLE:
1073 tmp = (data->pwm_fcms[1] >> index) & 1;
1074 if (tmp)
1075 tmp = 4;
1076 else
1077 tmp = 3;
1078 break;
1079 case TEMP_PWM_FAN_MAP:
1080 tmp = data->pwm_tfmr[index];
1081 break;
1082 }
1083
1084 return sprintf(buf, "%u\n", tmp);
1085}
1086
1087static ssize_t
1088store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1089 const char *buf, size_t count)
1090{
1091 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 1092 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1093 struct sensor_device_attribute_2 *sensor_attr =
1094 to_sensor_dev_attr_2(attr);
1095 int nr = sensor_attr->nr;
1096 int index = sensor_attr->index;
1097 unsigned long tmp;
1098
179c4fdb 1099 if (kstrtoul(buf, 10, &tmp) < 0)
792d376b
WS		 1100 return -EINVAL;
1101
1102 switch (nr) {
1103 case TEMP_PWM_ENABLE:
eb02755a 1104 if (tmp != 3 && tmp != 4)
792d376b
WS		 1105 return -EINVAL;
1106 tmp -= 3;
1107 mutex_lock(&data->update_lock);
1108 data->pwm_fcms[1] &= ~(1 << index);
1109 data->pwm_fcms[1] |= tmp << index;
1110 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
1111 mutex_unlock(&data->update_lock);
1112 break;
1113 case TEMP_PWM_FAN_MAP:
1114 mutex_lock(&data->update_lock);
1115 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
1116 w83795_write(client, W83795_REG_TFMR(index), tmp);
1117 data->pwm_tfmr[index] = tmp;
1118 mutex_unlock(&data->update_lock);
1119 break;
1120 }
1121 return count;
1122}
1123
1124#define FANIN_TARGET 0
1125#define FANIN_TOL 1
1126static ssize_t
1127show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
1128{
1bb3450c 1129 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1130 struct sensor_device_attribute_2 *sensor_attr =
1131 to_sensor_dev_attr_2(attr);
1132 int nr = sensor_attr->nr;
1133 int index = sensor_attr->index;
1134 u16 tmp = 0;
1135
1136 switch (nr) {
1137 case FANIN_TARGET:
1138 tmp = fan_from_reg(data->target_speed[index]);
1139 break;
1140 case FANIN_TOL:
1141 tmp = data->tol_speed;
1142 break;
1143 }
1144
1145 return sprintf(buf, "%u\n", tmp);
1146}
1147
1148static ssize_t
1149store_fanin(struct device *dev, struct device_attribute *attr,
1150 const char *buf, size_t count)
1151{
1152 struct i2c_client *client = to_i2c_client(dev);
1153 struct w83795_data *data = i2c_get_clientdata(client);
1154 struct sensor_device_attribute_2 *sensor_attr =
1155 to_sensor_dev_attr_2(attr);
1156 int nr = sensor_attr->nr;
1157 int index = sensor_attr->index;
1158 unsigned long val;
1159
179c4fdb 1160 if (kstrtoul(buf, 10, &val) < 0)
792d376b
WS		 1161 return -EINVAL;
1162
1163 mutex_lock(&data->update_lock);
1164 switch (nr) {
1165 case FANIN_TARGET:
1166 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
eb02755a 1167 w83795_write(client, W83795_REG_FTSH(index), val >> 4);
792d376b
WS		 1168 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1169 data->target_speed[index] = val;
1170 break;
1171 case FANIN_TOL:
1172 val = SENSORS_LIMIT(val, 0, 0x3f);
1173 w83795_write(client, W83795_REG_TFTS, val);
1174 data->tol_speed = val;
1175 break;
1176 }
1177 mutex_unlock(&data->update_lock);
1178
1179 return count;
1180}
1181
1182
1183static ssize_t
1184show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1185{
1bb3450c 1186 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1187 struct sensor_device_attribute_2 *sensor_attr =
1188 to_sensor_dev_attr_2(attr);
1189 int nr = sensor_attr->nr;
1190 int index = sensor_attr->index;
1191 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1192
1193 return sprintf(buf, "%ld\n", tmp);
1194}
1195
1196static ssize_t
1197store_temp_pwm(struct device *dev, struct device_attribute *attr,
1198 const char *buf, size_t count)
1199{
1200 struct i2c_client *client = to_i2c_client(dev);
1201 struct w83795_data *data = i2c_get_clientdata(client);
1202 struct sensor_device_attribute_2 *sensor_attr =
1203 to_sensor_dev_attr_2(attr);
1204 int nr = sensor_attr->nr;
1205 int index = sensor_attr->index;
1206 unsigned long val;
1207 u8 tmp;
1208
179c4fdb 1209 if (kstrtoul(buf, 10, &val) < 0)
792d376b
WS		 1210 return -EINVAL;
1211 val /= 1000;
1212
1213 mutex_lock(&data->update_lock);
1214 switch (nr) {
1215 case TEMP_PWM_TTTI:
1216 val = SENSORS_LIMIT(val, 0, 0x7f);
1217 w83795_write(client, W83795_REG_TTTI(index), val);
1218 break;
1219 case TEMP_PWM_CTFS:
1220 val = SENSORS_LIMIT(val, 0, 0x7f);
1221 w83795_write(client, W83795_REG_CTFS(index), val);
1222 break;
1223 case TEMP_PWM_HCT:
1224 val = SENSORS_LIMIT(val, 0, 0x0f);
1225 tmp = w83795_read(client, W83795_REG_HT(index));
1226 tmp &= 0x0f;
1227 tmp |= (val << 4) & 0xf0;
1228 w83795_write(client, W83795_REG_HT(index), tmp);
1229 break;
1230 case TEMP_PWM_HOT:
1231 val = SENSORS_LIMIT(val, 0, 0x0f);
1232 tmp = w83795_read(client, W83795_REG_HT(index));
1233 tmp &= 0xf0;
1234 tmp |= val & 0x0f;
1235 w83795_write(client, W83795_REG_HT(index), tmp);
1236 break;
1237 }
1238 data->pwm_temp[index][nr] = val;
1239 mutex_unlock(&data->update_lock);
1240
1241 return count;
1242}
1243
1244static ssize_t
1245show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1246{
1bb3450c 1247 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1248 struct sensor_device_attribute_2 *sensor_attr =
1249 to_sensor_dev_attr_2(attr);
1250 int nr = sensor_attr->nr;
1251 int index = sensor_attr->index;
1252
1253 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1254}
1255
1256static ssize_t
1257store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1258 const char *buf, size_t count)
1259{
1260 struct i2c_client *client = to_i2c_client(dev);
1261 struct w83795_data *data = i2c_get_clientdata(client);
1262 struct sensor_device_attribute_2 *sensor_attr =
1263 to_sensor_dev_attr_2(attr);
1264 int nr = sensor_attr->nr;
1265 int index = sensor_attr->index;
1266 unsigned long val;
1267
179c4fdb 1268 if (kstrtoul(buf, 10, &val) < 0)
792d376b
WS		 1269 return -EINVAL;
1270
1271 mutex_lock(&data->update_lock);
1272 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1273 data->sf4_reg[index][SF4_PWM][nr] = val;
1274 mutex_unlock(&data->update_lock);
1275
1276 return count;
1277}
1278
1279static ssize_t
1280show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1281{
1bb3450c 1282 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1283 struct sensor_device_attribute_2 *sensor_attr =
1284 to_sensor_dev_attr_2(attr);
1285 int nr = sensor_attr->nr;
1286 int index = sensor_attr->index;
1287
1288 return sprintf(buf, "%u\n",
1289 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1290}
1291
1292static ssize_t
1293store_sf4_temp(struct device *dev, struct device_attribute *attr,
1294 const char *buf, size_t count)
1295{
1296 struct i2c_client *client = to_i2c_client(dev);
1297 struct w83795_data *data = i2c_get_clientdata(client);
1298 struct sensor_device_attribute_2 *sensor_attr =
1299 to_sensor_dev_attr_2(attr);
1300 int nr = sensor_attr->nr;
1301 int index = sensor_attr->index;
1302 unsigned long val;
1303
179c4fdb 1304 if (kstrtoul(buf, 10, &val) < 0)
792d376b
WS		 1305 return -EINVAL;
1306 val /= 1000;
1307
1308 mutex_lock(&data->update_lock);
1309 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1310 data->sf4_reg[index][SF4_TEMP][nr] = val;
1311 mutex_unlock(&data->update_lock);
1312
1313 return count;
1314}
1315
1316
1317static ssize_t
1318show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1319{
1320 struct sensor_device_attribute_2 *sensor_attr =
1321 to_sensor_dev_attr_2(attr);
1322 int nr = sensor_attr->nr;
1323 int index = sensor_attr->index;
1324 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1325 long temp = temp_from_reg(data->temp[index][nr]);
792d376b 1326
eb02755a 1327 if (nr == TEMP_READ)
a654b9d4 1328 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1329 return sprintf(buf, "%ld\n", temp);
1330}
1331
1332static ssize_t
1333store_temp(struct device *dev, struct device_attribute *attr,
1334 const char *buf, size_t count)
1335{
1336 struct sensor_device_attribute_2 *sensor_attr =
1337 to_sensor_dev_attr_2(attr);
1338 int nr = sensor_attr->nr;
1339 int index = sensor_attr->index;
1340 struct i2c_client *client = to_i2c_client(dev);
1341 struct w83795_data *data = i2c_get_clientdata(client);
1342 long tmp;
1343
179c4fdb 1344 if (kstrtol(buf, 10, &tmp) < 0)
792d376b
WS		 1345 return -EINVAL;
1346
1347 mutex_lock(&data->update_lock);
1348 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1349 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1350 mutex_unlock(&data->update_lock);
1351 return count;
1352}
1353
1354
1355static ssize_t
1356show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1357{
21fc9775 1358 struct w83795_data *data = dev_get_drvdata(dev);
39deb699 1359 int tmp;
792d376b 1360
39deb699
JD		 1361 if (data->enable_dts & 2)
1362 tmp = 5;
1363 else
1364 tmp = 6;
792d376b
WS		 1365
1366 return sprintf(buf, "%d\n", tmp);
1367}
1368
1369static ssize_t
1370show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1371{
1372 struct sensor_device_attribute_2 *sensor_attr =
1373 to_sensor_dev_attr_2(attr);
1374 int index = sensor_attr->index;
1375 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1376 long temp = temp_from_reg(data->dts[index]);
792d376b 1377
a654b9d4 1378 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1379 return sprintf(buf, "%ld\n", temp);
1380}
1381
1382static ssize_t
1383show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1384{
1385 struct sensor_device_attribute_2 *sensor_attr =
1386 to_sensor_dev_attr_2(attr);
1387 int nr = sensor_attr->nr;
21fc9775 1388 struct w83795_data *data = dev_get_drvdata(dev);
dd127f5c 1389 long temp = temp_from_reg(data->dts_ext[nr]);
792d376b 1390
792d376b
WS		 1391 return sprintf(buf, "%ld\n", temp);
1392}
1393
1394static ssize_t
1395store_dts_ext(struct device *dev, struct device_attribute *attr,
1396 const char *buf, size_t count)
1397{
1398 struct sensor_device_attribute_2 *sensor_attr =
1399 to_sensor_dev_attr_2(attr);
1400 int nr = sensor_attr->nr;
1401 struct i2c_client *client = to_i2c_client(dev);
1402 struct w83795_data *data = i2c_get_clientdata(client);
1403 long tmp;
1404
179c4fdb 1405 if (kstrtol(buf, 10, &tmp) < 0)
792d376b
WS		 1406 return -EINVAL;
1407
1408 mutex_lock(&data->update_lock);
1409 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1410 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1411 mutex_unlock(&data->update_lock);
1412 return count;
1413}
1414
1415
792d376b
WS		 1416static ssize_t
1417show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1418{
21fc9775 1419 struct w83795_data *data = dev_get_drvdata(dev);
792d376b
WS		 1420 struct sensor_device_attribute_2 *sensor_attr =
1421 to_sensor_dev_attr_2(attr);
1422 int index = sensor_attr->index;
39deb699 1423 int tmp;
792d376b 1424
39deb699
JD		 1425 if (data->temp_mode & (1 << index))
1426 tmp = 3; /* Thermal diode */
1427 else
1428 tmp = 4; /* Thermistor */
792d376b
WS		 1429
1430 return sprintf(buf, "%d\n", tmp);
1431}
1432
39deb699 1433/* Only for temp1-4 (temp5-6 can only be thermistor) */
792d376b
WS		 1434static ssize_t
1435store_temp_mode(struct device *dev, struct device_attribute *attr,
1436 const char *buf, size_t count)
1437{
1438 struct i2c_client *client = to_i2c_client(dev);
1439 struct w83795_data *data = i2c_get_clientdata(client);
1440 struct sensor_device_attribute_2 *sensor_attr =
1441 to_sensor_dev_attr_2(attr);
1442 int index = sensor_attr->index;
39deb699 1443 int reg_shift;
792d376b
WS		 1444 unsigned long val;
1445 u8 tmp;
792d376b 1446
179c4fdb 1447 if (kstrtoul(buf, 10, &val) < 0)
792d376b
WS		 1448 return -EINVAL;
1449 if ((val != 4) && (val != 3))
1450 return -EINVAL;
792d376b
WS		 1451
1452 mutex_lock(&data->update_lock);
1453 if (val == 3) {
39deb699
JD		 1454 /* Thermal diode */
1455 val = 0x01;
792d376b
WS		 1456 data->temp_mode |= 1 << index;
1457 } else if (val == 4) {
39deb699
JD		 1458 /* Thermistor */
1459 val = 0x03;
1460 data->temp_mode &= ~(1 << index);
792d376b
WS		 1461 }
1462
39deb699
JD		 1463 reg_shift = 2 * index;
1464 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1465 tmp &= ~(0x03 << reg_shift);
1466 tmp |= val << reg_shift;
1467 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
792d376b
WS		 1468
1469 mutex_unlock(&data->update_lock);
1470 return count;
1471}
1472
1473
1474/* show/store VIN */
1475static ssize_t
1476show_in(struct device *dev, struct device_attribute *attr, char *buf)
1477{
1478 struct sensor_device_attribute_2 *sensor_attr =
1479 to_sensor_dev_attr_2(attr);
1480 int nr = sensor_attr->nr;
1481 int index = sensor_attr->index;
1482 struct w83795_data *data = w83795_update_device(dev);
1483 u16 val = data->in[index][nr];
1484 u8 lsb_idx;
1485
1486 switch (nr) {
1487 case IN_READ:
1488 /* calculate this value again by sensors as sensors3.conf */
1489 if ((index >= 17) &&
6f9dfd85 1490 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1491 val *= 8;
1492 break;
1493 case IN_MAX:
1494 case IN_LOW:
1495 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1496 val <<= 2;
1497 val |= (data->in_lsb[lsb_idx][nr] >>
5d2cd958 1498 IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
792d376b 1499 if ((index >= 17) &&
6f9dfd85 1500 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1501 val *= 8;
1502 break;
1503 }
1504 val = in_from_reg(index, val);
1505
1506 return sprintf(buf, "%d\n", val);
1507}
1508
1509static ssize_t
1510store_in(struct device *dev, struct device_attribute *attr,
1511 const char *buf, size_t count)
1512{
1513 struct sensor_device_attribute_2 *sensor_attr =
1514 to_sensor_dev_attr_2(attr);
1515 int nr = sensor_attr->nr;
1516 int index = sensor_attr->index;
1517 struct i2c_client *client = to_i2c_client(dev);
1518 struct w83795_data *data = i2c_get_clientdata(client);
1519 unsigned long val;
1520 u8 tmp;
1521 u8 lsb_idx;
1522
179c4fdb 1523 if (kstrtoul(buf, 10, &val) < 0)
792d376b
WS		 1524 return -EINVAL;
1525 val = in_to_reg(index, val);
1526
1527 if ((index >= 17) &&
6f9dfd85 1528 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1529 val /= 8;
1530 val = SENSORS_LIMIT(val, 0, 0x3FF);
1531 mutex_lock(&data->update_lock);
1532
1533 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1534 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1535 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1536 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1537 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1538 data->in_lsb[lsb_idx][nr] = tmp;
1539
1540 tmp = (val >> 2) & 0xff;
1541 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1542 data->in[index][nr] = tmp;
1543
1544 mutex_unlock(&data->update_lock);
1545 return count;
1546}
1547
1548
00030af2 1549#ifdef CONFIG_SENSORS_W83795_FANCTRL
792d376b
WS		 1550static ssize_t
1551show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1552{
1553 struct sensor_device_attribute_2 *sensor_attr =
1554 to_sensor_dev_attr_2(attr);
1555 int nr = sensor_attr->nr;
1bb3450c 1556 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1557 u16 val = data->setup_pwm[nr];
1558
1559 switch (nr) {
1560 case SETUP_PWM_UPTIME:
1561 case SETUP_PWM_DOWNTIME:
1562 val = time_from_reg(val);
1563 break;
1564 }
1565
1566 return sprintf(buf, "%d\n", val);
1567}
1568
1569static ssize_t
1570store_sf_setup(struct device *dev, struct device_attribute *attr,
1571 const char *buf, size_t count)
1572{
1573 struct sensor_device_attribute_2 *sensor_attr =
1574 to_sensor_dev_attr_2(attr);
1575 int nr = sensor_attr->nr;
1576 struct i2c_client *client = to_i2c_client(dev);
1577 struct w83795_data *data = i2c_get_clientdata(client);
1578 unsigned long val;
1579
179c4fdb 1580 if (kstrtoul(buf, 10, &val) < 0)
792d376b
WS		 1581 return -EINVAL;
1582
1583 switch (nr) {
1584 case SETUP_PWM_DEFAULT:
1585 val = SENSORS_LIMIT(val, 0, 0xff);
1586 break;
1587 case SETUP_PWM_UPTIME:
1588 case SETUP_PWM_DOWNTIME:
1589 val = time_to_reg(val);
1590 if (val == 0)
1591 return -EINVAL;
1592 break;
1593 }
1594
1595 mutex_lock(&data->update_lock);
1596 data->setup_pwm[nr] = val;
1597 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1598 mutex_unlock(&data->update_lock);
1599 return count;
1600}
00030af2 1601#endif
792d376b
WS		 1602
1603
1604#define NOT_USED -1
1605
52d159ee 1606/* Don't change the attribute order, _max, _min and _beep are accessed by index
0e256018 1607 * somewhere else in the code */
87df0dad 1608#define SENSOR_ATTR_IN(index) { \
792d376b
WS		 1609 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1610 IN_READ, index), \
1611 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1612 store_in, IN_MAX, index), \
1613 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1614 store_in, IN_LOW, index), \
1615 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1616 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1617 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1618 show_alarm_beep, store_beep, BEEP_ENABLE, \
87df0dad 1619 index + ((index > 14) ? 1 : 0)) }
792d376b 1620
52d159ee
JD		 1621/* Don't change the attribute order, _beep is accessed by index
1622 * somewhere else in the code */
87df0dad 1623#define SENSOR_ATTR_FAN(index) { \
792d376b
WS		 1624 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1625 NULL, FAN_INPUT, index - 1), \
1626 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1627 show_fan, store_fan_min, FAN_MIN, index - 1), \
1628 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1629 NULL, ALARM_STATUS, index + 31), \
1630 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1631 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
792d376b 1632
b5f6a90a 1633#define SENSOR_ATTR_PWM(index) { \
792d376b
WS		 1634 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1635 store_pwm, PWM_OUTPUT, index - 1), \
72fea694
JD		 1636 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
1637 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1638 SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \
1639 show_pwm_mode, NULL, NOT_USED, index - 1), \
1640 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1641 show_pwm, store_pwm, PWM_FREQ, index - 1), \
792d376b
WS		 1642 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1643 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1644 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1645 show_pwm, store_pwm, PWM_START, index - 1), \
1646 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1647 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
b2cc528e
JD		 1648 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1649 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
792d376b 1650
52d159ee
JD		 1651/* Don't change the attribute order, _beep is accessed by index
1652 * somewhere else in the code */
87df0dad 1653#define SENSOR_ATTR_DTS(index) { \
792d376b
WS		 1654 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1655 show_dts_mode, NULL, NOT_USED, index - 7), \
1656 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1657 NULL, NOT_USED, index - 7), \
a0ce402f 1658 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1659 store_dts_ext, DTS_CRIT, NOT_USED), \
a0ce402f 1660 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1661 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
a0ce402f 1662 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1663 store_dts_ext, DTS_WARN, NOT_USED), \
a0ce402f 1664 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1665 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1666 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1667 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1668 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1669 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
792d376b 1670
52d159ee
JD		 1671/* Don't change the attribute order, _beep is accessed by index
1672 * somewhere else in the code */
87df0dad 1673#define SENSOR_ATTR_TEMP(index) { \
39deb699 1674 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
792d376b
WS		 1675 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1676 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1677 NULL, TEMP_READ, index - 1), \
a0ce402f 1678 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1679 store_temp, TEMP_CRIT, index - 1), \
a0ce402f 1680 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1681 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
a0ce402f 1682 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1683 store_temp, TEMP_WARN, index - 1), \
a0ce402f 1684 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1685 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1686 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1687 show_alarm_beep, NULL, ALARM_STATUS, \
1688 index + (index > 4 ? 11 : 17)), \
1689 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1690 show_alarm_beep, store_beep, BEEP_ENABLE, \
1691 index + (index > 4 ? 11 : 17)), \
792d376b
WS		 1692 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1693 show_temp_pwm_enable, store_temp_pwm_enable, \
1694 TEMP_PWM_ENABLE, index - 1), \
1695 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1696 show_temp_pwm_enable, store_temp_pwm_enable, \
1697 TEMP_PWM_FAN_MAP, index - 1), \
1698 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1699 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
a0ce402f 1700 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
792d376b 1701 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
a0ce402f 1702 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
792d376b
WS		 1703 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1704 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1705 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1706 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1707 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1708 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1709 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1710 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1711 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1712 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1713 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1714 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1715 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1716 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1717 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1718 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1719 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1720 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1721 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1722 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1723 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1724 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1725 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1726 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1727 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1728 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1729 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1730 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1731 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1732 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
87df0dad 1733 show_sf4_temp, store_sf4_temp, 6, index - 1) }
792d376b
WS		 1734
1735
87df0dad 1736static struct sensor_device_attribute_2 w83795_in[][5] = {
792d376b
WS		 1737 SENSOR_ATTR_IN(0),
1738 SENSOR_ATTR_IN(1),
1739 SENSOR_ATTR_IN(2),
1740 SENSOR_ATTR_IN(3),
1741 SENSOR_ATTR_IN(4),
1742 SENSOR_ATTR_IN(5),
1743 SENSOR_ATTR_IN(6),
1744 SENSOR_ATTR_IN(7),
1745 SENSOR_ATTR_IN(8),
1746 SENSOR_ATTR_IN(9),
1747 SENSOR_ATTR_IN(10),
1748 SENSOR_ATTR_IN(11),
1749 SENSOR_ATTR_IN(12),
1750 SENSOR_ATTR_IN(13),
1751 SENSOR_ATTR_IN(14),
1752 SENSOR_ATTR_IN(15),
1753 SENSOR_ATTR_IN(16),
1754 SENSOR_ATTR_IN(17),
1755 SENSOR_ATTR_IN(18),
1756 SENSOR_ATTR_IN(19),
1757 SENSOR_ATTR_IN(20),
1758};
1759
86ef4d2f 1760static const struct sensor_device_attribute_2 w83795_fan[][4] = {
792d376b
WS		 1761 SENSOR_ATTR_FAN(1),
1762 SENSOR_ATTR_FAN(2),
1763 SENSOR_ATTR_FAN(3),
1764 SENSOR_ATTR_FAN(4),
1765 SENSOR_ATTR_FAN(5),
1766 SENSOR_ATTR_FAN(6),
1767 SENSOR_ATTR_FAN(7),
1768 SENSOR_ATTR_FAN(8),
1769 SENSOR_ATTR_FAN(9),
1770 SENSOR_ATTR_FAN(10),
1771 SENSOR_ATTR_FAN(11),
1772 SENSOR_ATTR_FAN(12),
1773 SENSOR_ATTR_FAN(13),
1774 SENSOR_ATTR_FAN(14),
1775};
1776
edff2f8d 1777static const struct sensor_device_attribute_2 w83795_temp[][28] = {
792d376b
WS		 1778 SENSOR_ATTR_TEMP(1),
1779 SENSOR_ATTR_TEMP(2),
1780 SENSOR_ATTR_TEMP(3),
1781 SENSOR_ATTR_TEMP(4),
1782 SENSOR_ATTR_TEMP(5),
1783 SENSOR_ATTR_TEMP(6),
1784};
1785
86ef4d2f 1786static const struct sensor_device_attribute_2 w83795_dts[][8] = {
792d376b
WS		 1787 SENSOR_ATTR_DTS(7),
1788 SENSOR_ATTR_DTS(8),
1789 SENSOR_ATTR_DTS(9),
1790 SENSOR_ATTR_DTS(10),
1791 SENSOR_ATTR_DTS(11),
1792 SENSOR_ATTR_DTS(12),
1793 SENSOR_ATTR_DTS(13),
1794 SENSOR_ATTR_DTS(14),
1795};
1796
d5ab845a 1797static const struct sensor_device_attribute_2 w83795_pwm[][8] = {
b5f6a90a
JD		 1798 SENSOR_ATTR_PWM(1),
1799 SENSOR_ATTR_PWM(2),
792d376b
WS		 1800 SENSOR_ATTR_PWM(3),
1801 SENSOR_ATTR_PWM(4),
1802 SENSOR_ATTR_PWM(5),
1803 SENSOR_ATTR_PWM(6),
1804 SENSOR_ATTR_PWM(7),
1805 SENSOR_ATTR_PWM(8),
1806};
1807
edff2f8d
JD		 1808static const struct sensor_device_attribute_2 w83795_tss[6] = {
1809 SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO,
1810 show_temp_src, store_temp_src, NOT_USED, 0),
1811 SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO,
1812 show_temp_src, store_temp_src, NOT_USED, 1),
1813 SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO,
1814 show_temp_src, store_temp_src, NOT_USED, 2),
1815 SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO,
1816 show_temp_src, store_temp_src, NOT_USED, 3),
1817 SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO,
1818 show_temp_src, store_temp_src, NOT_USED, 4),
1819 SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO,
1820 show_temp_src, store_temp_src, NOT_USED, 5),
1821};
1822
86ef4d2f 1823static const struct sensor_device_attribute_2 sda_single_files[] = {
24377101 1824 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
792d376b 1825 store_chassis_clear, ALARM_STATUS, 46),
00030af2 1826#ifdef CONFIG_SENSORS_W83795_FANCTRL
792d376b
WS		 1827 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1828 store_fanin, FANIN_TOL, NOT_USED),
1829 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1830 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1831 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1832 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1833 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1834 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
00030af2 1835#endif
792d376b
WS		 1836};
1837
52d159ee
JD		 1838static const struct sensor_device_attribute_2 sda_beep_files[] = {
1839 SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
1840 store_beep, BEEP_ENABLE, 46),
1841 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1842 store_beep, BEEP_ENABLE, 47),
1843};
1844
792d376b
WS		 1845/*
1846 * Driver interface
1847 */
1848
1849static void w83795_init_client(struct i2c_client *client)
1850{
01879a85
JD		 1851 struct w83795_data *data = i2c_get_clientdata(client);
1852 static const u16 clkin[4] = { /* in kHz */
1853 14318, 24000, 33333, 48000
1854 };
80646b95
JD		 1855 u8 config;
1856
792d376b
WS		 1857 if (reset)
1858 w83795_write(client, W83795_REG_CONFIG, 0x80);
1859
80646b95
JD		 1860 /* Start monitoring if needed */
1861 config = w83795_read(client, W83795_REG_CONFIG);
1862 if (!(config & W83795_REG_CONFIG_START)) {
1863 dev_info(&client->dev, "Enabling monitoring operations\n");
1864 w83795_write(client, W83795_REG_CONFIG,
1865 config | W83795_REG_CONFIG_START);
1866 }
01879a85
JD		 1867
1868 data->clkin = clkin[(config >> 3) & 0x3];
1869 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
792d376b
WS		 1870}
1871
2be381de
JD		 1872static int w83795_get_device_id(struct i2c_client *client)
1873{
1874 int device_id;
1875
1876 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1877
1878 /* Special case for rev. A chips; can't be checked first because later
1879 revisions emulate this for compatibility */
1880 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1881 int alt_id;
1882
1883 alt_id = i2c_smbus_read_byte_data(client,
1884 W83795_REG_DEVICEID_A);
1885 if (alt_id == 0x50)
1886 device_id = alt_id;
1887 }
1888
1889 return device_id;
1890}
1891
792d376b
WS		 1892/* Return 0 if detection is successful, -ENODEV otherwise */
1893static int w83795_detect(struct i2c_client *client,
1894 struct i2c_board_info *info)
1895{
2be381de 1896 int bank, vendor_id, device_id, expected, i2c_addr, config;
792d376b
WS		 1897 struct i2c_adapter *adapter = client->adapter;
1898 unsigned short address = client->addr;
093d1a47 1899 const char *chip_name;
792d376b
WS		 1900
1901 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1902 return -ENODEV;
1903 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2be381de
JD		 1904 if (bank < 0 || (bank & 0x7c)) {
1905 dev_dbg(&adapter->dev,
1906 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1907 address, "bank");
1908 return -ENODEV;
1909 }
792d376b 1910
792d376b 1911 /* Check Nuvoton vendor ID */
2be381de
JD		 1912 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1913 expected = bank & 0x80 ? 0x5c : 0xa3;
1914 if (vendor_id != expected) {
1915 dev_dbg(&adapter->dev,
1916 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1917 address, "vendor id");
792d376b
WS		 1918 return -ENODEV;
1919 }
1920
2be381de
JD		 1921 /* Check device ID */
1922 device_id = w83795_get_device_id(client) |
1923 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1924 if ((device_id >> 4) != 0x795) {
1925 dev_dbg(&adapter->dev,
1926 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1927 address, "device id\n");
792d376b
WS		 1928 return -ENODEV;
1929 }
1930
2be381de
JD		 1931 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1932 should match */
1933 if ((bank & 0x07) == 0) {
1934 i2c_addr = i2c_smbus_read_byte_data(client,
1935 W83795_REG_I2C_ADDR);
1936 if ((i2c_addr & 0x7f) != address) {
1937 dev_dbg(&adapter->dev,
1938 "w83795: Detection failed at addr 0x%02hx, "
1939 "check %s\n", address, "i2c addr");
1940 return -ENODEV;
1941 }
792d376b
WS		 1942 }
1943
093d1a47
JD		 1944 /* Check 795 chip type: 795G or 795ADG
1945 Usually we don't write to chips during detection, but here we don't
1946 quite have the choice; hopefully it's OK, we are about to return
1947 success anyway */
1948 if ((bank & 0x07) != 0)
1949 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1950 bank & ~0x07);
2be381de
JD		 1951 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1952 if (config & W83795_REG_CONFIG_CONFIG48)
093d1a47 1953 chip_name = "w83795adg";
2be381de 1954 else
093d1a47 1955 chip_name = "w83795g";
792d376b 1956
093d1a47 1957 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
2be381de
JD		 1958 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1959 'A' + (device_id & 0xf), address);
792d376b
WS		 1960
1961 return 0;
1962}
1963
72fea694
JD		 1964#ifdef CONFIG_SENSORS_W83795_FANCTRL
1965#define NUM_PWM_ATTRIBUTES ARRAY_SIZE(w83795_pwm[0])
1966#define NUM_TEMP_ATTRIBUTES ARRAY_SIZE(w83795_temp[0])
1967#else
1968#define NUM_PWM_ATTRIBUTES 4
1969#define NUM_TEMP_ATTRIBUTES 8
1970#endif
1971
6f3dcde9
JD		 1972static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1973 const struct device_attribute *))
892514a6
JD		 1974{
1975 struct w83795_data *data = dev_get_drvdata(dev);
87df0dad 1976 int err, i, j;
892514a6
JD		 1977
1978 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
87df0dad 1979 if (!(data->has_in & (1 << i)))
892514a6 1980 continue;
87df0dad 1981 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
52d159ee
JD		 1982 if (j == 4 && !data->enable_beep)
1983 continue;
87df0dad
JD		 1984 err = fn(dev, &w83795_in[i][j].dev_attr);
1985 if (err)
1986 return err;
1987 }
892514a6
JD		 1988 }
1989
1990 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
87df0dad 1991 if (!(data->has_fan & (1 << i)))
892514a6 1992 continue;
87df0dad 1993 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
52d159ee
JD		 1994 if (j == 3 && !data->enable_beep)
1995 continue;
87df0dad
JD		 1996 err = fn(dev, &w83795_fan[i][j].dev_attr);
1997 if (err)
1998 return err;
1999 }
892514a6
JD		 2000 }
2001
edff2f8d
JD		 2002 for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) {
2003 j = w83795_tss_useful(data, i);
2004 if (!j)
2005 continue;
2006 err = fn(dev, &w83795_tss[i].dev_attr);
2007 if (err)
2008 return err;
2009 }
2010
892514a6 2011 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
6f3dcde9 2012 err = fn(dev, &sda_single_files[i].dev_attr);
892514a6
JD		 2013 if (err)
2014 return err;
2015 }
2016
52d159ee
JD		 2017 if (data->enable_beep) {
2018 for (i = 0; i < ARRAY_SIZE(sda_beep_files); i++) {
2019 err = fn(dev, &sda_beep_files[i].dev_attr);
2020 if (err)
2021 return err;
2022 }
2023 }
2024
b5f6a90a 2025 for (i = 0; i < data->has_pwm; i++) {
72fea694 2026 for (j = 0; j < NUM_PWM_ATTRIBUTES; j++) {
b5f6a90a 2027 err = fn(dev, &w83795_pwm[i][j].dev_attr);
892514a6
JD		 2028 if (err)
2029 return err;
2030 }
2031 }
2032
2033 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
87df0dad 2034 if (!(data->has_temp & (1 << i)))
892514a6 2035 continue;
72fea694 2036 for (j = 0; j < NUM_TEMP_ATTRIBUTES; j++) {
52d159ee
JD		 2037 if (j == 7 && !data->enable_beep)
2038 continue;
87df0dad
JD		 2039 err = fn(dev, &w83795_temp[i][j].dev_attr);
2040 if (err)
2041 return err;
2042 }
892514a6
JD		 2043 }
2044
eb02755a 2045 if (data->enable_dts) {
892514a6 2046 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
87df0dad 2047 if (!(data->has_dts & (1 << i)))
892514a6 2048 continue;
87df0dad 2049 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
52d159ee
JD		 2050 if (j == 7 && !data->enable_beep)
2051 continue;
87df0dad
JD		 2052 err = fn(dev, &w83795_dts[i][j].dev_attr);
2053 if (err)
2054 return err;
2055 }
892514a6
JD		 2056 }
2057 }
2058
892514a6
JD		 2059 return 0;
2060}
2061
6f3dcde9
JD		 2062/* We need a wrapper that fits in w83795_handle_files */
2063static int device_remove_file_wrapper(struct device *dev,
2064 const struct device_attribute *attr)
2fa09878 2065{
6f3dcde9
JD		 2066 device_remove_file(dev, attr);
2067 return 0;
2fa09878
JD		 2068}
2069
0e256018
JD		 2070static void w83795_check_dynamic_in_limits(struct i2c_client *client)
2071{
2072 struct w83795_data *data = i2c_get_clientdata(client);
2073 u8 vid_ctl;
2074 int i, err_max, err_min;
2075
2076 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
2077
2078 /* Return immediately if VRM isn't configured */
2079 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
2080 return;
2081
2082 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
2083 for (i = 0; i < 2; i++) {
2084 if (!(data->has_dyn_in & (1 << i)))
2085 continue;
2086
2087 /* Voltage limits in dynamic mode, switch to read-only */
2088 err_max = sysfs_chmod_file(&client->dev.kobj,
2089 &w83795_in[i][2].dev_attr.attr,
2090 S_IRUGO);
2091 err_min = sysfs_chmod_file(&client->dev.kobj,
2092 &w83795_in[i][3].dev_attr.attr,
2093 S_IRUGO);
2094 if (err_max || err_min)
2095 dev_warn(&client->dev, "Failed to set in%d limits "
2096 "read-only (%d, %d)\n", i, err_max, err_min);
2097 else
2098 dev_info(&client->dev, "in%d limits set dynamically "
2099 "from VID\n", i);
2100 }
2101}
2102
71caf46f
JD		 2103/* Check pins that can be used for either temperature or voltage monitoring */
2104static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
2105 int temp_chan, int in_chan)
2106{
2107 /* config is a 2-bit value */
2108 switch (config) {
2109 case 0x2: /* Voltage monitoring */
2110 data->has_in |= 1 << in_chan;
2111 break;
2112 case 0x1: /* Thermal diode */
2113 if (temp_chan >= 4)
2114 break;
2115 data->temp_mode |= 1 << temp_chan;
2116 /* fall through */
2117 case 0x3: /* Thermistor */
2118 data->has_temp |= 1 << temp_chan;
2119 break;
2120 }
2121}
2122
792d376b
WS		 2123static int w83795_probe(struct i2c_client *client,
2124 const struct i2c_device_id *id)
2125{
2126 int i;
2127 u8 tmp;
2128 struct device *dev = &client->dev;
2129 struct w83795_data *data;
71caf46f 2130 int err;
792d376b
WS		 2131
2132 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
2133 if (!data) {
2134 err = -ENOMEM;
2135 goto exit;
2136 }
2137
2138 i2c_set_clientdata(client, data);
093d1a47 2139 data->chip_type = id->driver_data;
792d376b
WS		 2140 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2141 mutex_init(&data->update_lock);
2142
2143 /* Initialize the chip */
2144 w83795_init_client(client);
2145
71caf46f
JD		 2146 /* Check which voltages and fans are present */
2147 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
2148 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
2149 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
2150 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
792d376b 2151
71caf46f 2152 /* Check which analog temperatures and extra voltages are present */
792d376b
WS		 2153 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
2154 if (tmp & 0x20)
2155 data->enable_dts = 1;
71caf46f
JD		 2156 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
2157 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
792d376b 2158 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
71caf46f
JD		 2159 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
2160 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
2161 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
2162 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
792d376b
WS		 2163
2164 /* Check DTS enable status */
71caf46f 2165 if (data->enable_dts) {
792d376b
WS		 2166 if (1 & w83795_read(client, W83795_REG_DTSC))
2167 data->enable_dts |= 2;
2168 data->has_dts = w83795_read(client, W83795_REG_DTSE);
2169 }
2170
54891a3c
JD		 2171 /* Report PECI Tbase values */
2172 if (data->enable_dts == 1) {
2173 for (i = 0; i < 8; i++) {
2174 if (!(data->has_dts & (1 << i)))
2175 continue;
2176 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
2177 dev_info(&client->dev,
2178 "PECI agent %d Tbase temperature: %u\n",
2179 i + 1, (unsigned int)tmp & 0x7f);
2180 }
2181 }
2182
792d376b 2183 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
792d376b
WS		 2184
2185 /* pwm and smart fan */
2186 if (data->chip_type == w83795g)
2187 data->has_pwm = 8;
2188 else
2189 data->has_pwm = 2;
792d376b 2190
52d159ee
JD		 2191 /* Check if BEEP pin is available */
2192 if (data->chip_type == w83795g) {
2193 /* The W83795G has a dedicated BEEP pin */
2194 data->enable_beep = 1;
2195 } else {
2196 /* The W83795ADG has a shared pin for OVT# and BEEP, so you
2197 * can't have both */
2198 tmp = w83795_read(client, W83795_REG_OVT_CFG);
2199 if ((tmp & OVT_CFG_SEL) == 0)
2200 data->enable_beep = 1;
2201 }
2202
6f3dcde9 2203 err = w83795_handle_files(dev, device_create_file);
892514a6
JD		 2204 if (err)
2205 goto exit_remove;
792d376b 2206
0e256018
JD		 2207 if (data->chip_type == w83795g)
2208 w83795_check_dynamic_in_limits(client);
2209
792d376b
WS		 2210 data->hwmon_dev = hwmon_device_register(dev);
2211 if (IS_ERR(data->hwmon_dev)) {
2212 err = PTR_ERR(data->hwmon_dev);
2213 goto exit_remove;
2214 }
2215
2216 return 0;
2217
792d376b 2218exit_remove:
6f3dcde9 2219 w83795_handle_files(dev, device_remove_file_wrapper);
792d376b
WS		 2220 kfree(data);
2221exit:
2222 return err;
2223}
2224
2225static int w83795_remove(struct i2c_client *client)
2226{
2227 struct w83795_data *data = i2c_get_clientdata(client);
792d376b
WS		 2228
2229 hwmon_device_unregister(data->hwmon_dev);
6f3dcde9 2230 w83795_handle_files(&client->dev, device_remove_file_wrapper);
792d376b
WS		 2231 kfree(data);
2232
2233 return 0;
2234}
2235
2236
2237static const struct i2c_device_id w83795_id[] = {
093d1a47
JD		 2238 { "w83795g", w83795g },
2239 { "w83795adg", w83795adg },
792d376b
WS		 2240 { }
2241};
2242MODULE_DEVICE_TABLE(i2c, w83795_id);
2243
2244static struct i2c_driver w83795_driver = {
2245 .driver = {
2246 .name = "w83795",
2247 },
2248 .probe = w83795_probe,
2249 .remove = w83795_remove,
2250 .id_table = w83795_id,
2251
2252 .class = I2C_CLASS_HWMON,
2253 .detect = w83795_detect,
2254 .address_list = normal_i2c,
2255};
2256
f0967eea 2257module_i2c_driver(w83795_driver);
792d376b 2258
e3760b43 2259MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
315bacfd 2260MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
792d376b 2261MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)