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hwmon: (w83795) Misc cleanups
[linux-2.6-block.git] / drivers / hwmon / w83795.c
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792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA.
19 *
20 * Supports following chips:
21 *
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/slab.h>
31#include <linux/i2c.h>
32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h>
34#include <linux/err.h>
35#include <linux/mutex.h>
36#include <linux/delay.h>
37
38/* Addresses to scan */
39static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
40
41enum chips { w83795 };
42
43
44static int reset;
45module_param(reset, bool, 0);
46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
47
48
49#define W83795_REG_BANKSEL 0x00
50#define W83795_REG_VENDORID 0xfd
51#define W83795_REG_CHIPID 0xfe
52#define W83795_REG_DEVICEID 0xfb
53
54#define W83795_REG_I2C_ADDR 0xfc
55#define W83795_REG_CONFIG 0x01
56#define W83795_REG_CONFIG_CONFIG48 0x04
57
58/* Multi-Function Pin Ctrl Registers */
59#define W83795_REG_VOLT_CTRL1 0x02
60#define W83795_REG_VOLT_CTRL2 0x03
61#define W83795_REG_TEMP_CTRL1 0x04
62#define W83795_REG_TEMP_CTRL2 0x05
63#define W83795_REG_FANIN_CTRL1 0x06
64#define W83795_REG_FANIN_CTRL2 0x07
65#define W83795_REG_VMIGB_CTRL 0x08
66
67#define TEMP_CTRL_DISABLE 0
68#define TEMP_CTRL_TD 1
69#define TEMP_CTRL_VSEN 2
70#define TEMP_CTRL_TR 3
71#define TEMP_CTRL_SHIFT 4
72#define TEMP_CTRL_HASIN_SHIFT 5
73/* temp mode may effect VSEN17-12 (in20-15) */
74static u16 W83795_REG_TEMP_CTRL[][6] = {
75 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */
76 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */
77 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */
78 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */
79 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */
80 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */
81 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */
82};
83
84#define TEMP_READ 0
85#define TEMP_CRIT 1
86#define TEMP_CRIT_HYST 2
87#define TEMP_WARN 3
88#define TEMP_WARN_HYST 4
89/* only crit and crit_hyst affect real-time alarm status
90 * current crit crit_hyst warn warn_hyst */
91static u16 W83795_REG_TEMP[][5] = {
92 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
93 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
94 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
95 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
96 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
97 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
98};
99
100#define IN_READ 0
101#define IN_MAX 1
102#define IN_LOW 2
103static const u16 W83795_REG_IN[][3] = {
104 /* Current, HL, LL */
105 {0x10, 0x70, 0x71}, /* VSEN1 */
106 {0x11, 0x72, 0x73}, /* VSEN2 */
107 {0x12, 0x74, 0x75}, /* VSEN3 */
108 {0x13, 0x76, 0x77}, /* VSEN4 */
109 {0x14, 0x78, 0x79}, /* VSEN5 */
110 {0x15, 0x7a, 0x7b}, /* VSEN6 */
111 {0x16, 0x7c, 0x7d}, /* VSEN7 */
112 {0x17, 0x7e, 0x7f}, /* VSEN8 */
113 {0x18, 0x80, 0x81}, /* VSEN9 */
114 {0x19, 0x82, 0x83}, /* VSEN10 */
115 {0x1A, 0x84, 0x85}, /* VSEN11 */
116 {0x1B, 0x86, 0x87}, /* VTT */
117 {0x1C, 0x88, 0x89}, /* 3VDD */
118 {0x1D, 0x8a, 0x8b}, /* 3VSB */
119 {0x1E, 0x8c, 0x8d}, /* VBAT */
120 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
121 {0x20, 0xaa, 0xab}, /* VSEN13 */
122 {0x21, 0x96, 0x97}, /* VSEN14 */
123 {0x22, 0x9a, 0x9b}, /* VSEN15 */
124 {0x23, 0x9e, 0x9f}, /* VSEN16 */
125 {0x24, 0xa2, 0xa3}, /* VSEN17 */
126};
127#define W83795_REG_VRLSB 0x3C
128#define VRLSB_SHIFT 6
129
130static const u8 W83795_REG_IN_HL_LSB[] = {
131 0x8e, /* VSEN1-4 */
132 0x90, /* VSEN5-8 */
133 0x92, /* VSEN9-11 */
134 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
135 0xa8, /* VSEN12 */
136 0xac, /* VSEN13 */
137 0x98, /* VSEN14 */
138 0x9c, /* VSEN15 */
139 0xa0, /* VSEN16 */
140 0xa4, /* VSEN17 */
141};
142
143#define IN_LSB_REG(index, type) \
144 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
145 : (W83795_REG_IN_HL_LSB[(index)] + 1))
146
147#define IN_LSB_REG_NUM 10
148
149#define IN_LSB_SHIFT 0
150#define IN_LSB_IDX 1
151static const u8 IN_LSB_SHIFT_IDX[][2] = {
152 /* High/Low LSB shift, LSB No. */
153 {0x00, 0x00}, /* VSEN1 */
154 {0x02, 0x00}, /* VSEN2 */
155 {0x04, 0x00}, /* VSEN3 */
156 {0x06, 0x00}, /* VSEN4 */
157 {0x00, 0x01}, /* VSEN5 */
158 {0x02, 0x01}, /* VSEN6 */
159 {0x04, 0x01}, /* VSEN7 */
160 {0x06, 0x01}, /* VSEN8 */
161 {0x00, 0x02}, /* VSEN9 */
162 {0x02, 0x02}, /* VSEN10 */
163 {0x04, 0x02}, /* VSEN11 */
164 {0x00, 0x03}, /* VTT */
165 {0x02, 0x03}, /* 3VDD */
166 {0x04, 0x03}, /* 3VSB */
167 {0x06, 0x03}, /* VBAT */
168 {0x06, 0x04}, /* VSEN12 */
169 {0x06, 0x05}, /* VSEN13 */
170 {0x06, 0x06}, /* VSEN14 */
171 {0x06, 0x07}, /* VSEN15 */
172 {0x06, 0x08}, /* VSEN16 */
173 {0x06, 0x09}, /* VSEN17 */
174};
175
176
177/* 3VDD, 3VSB, VBAT * 0.006 */
178#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */
179#define REST_VLT_END 14 /* the 13th volt to 15th */
180
181#define W83795_REG_FAN(index) (0x2E + (index))
182#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
183#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
184#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
185 (((index) % 1) ? 4 : 0)
792d376b
WS		 186
187#define W83795_REG_VID_CTRL 0x6A
188
189#define ALARM_BEEP_REG_NUM 6
190#define W83795_REG_ALARM(index) (0x41 + (index))
191#define W83795_REG_BEEP(index) (0x50 + (index))
192
193#define W83795_REG_CLR_CHASSIS 0x4D
194
195
196#define W83795_REG_TEMP_NUM 6
197#define W83795_REG_FCMS1 0x201
198#define W83795_REG_FCMS2 0x208
199#define W83795_REG_TFMR(index) (0x202 + (index))
200#define W83795_REG_FOMC 0x20F
201#define W83795_REG_FOPFP(index) (0x218 + (index))
202
203#define W83795_REG_TSS(index) (0x209 + (index))
204
205#define PWM_OUTPUT 0
206#define PWM_START 1
207#define PWM_NONSTOP 2
208#define PWM_STOP_TIME 3
209#define PWM_DIV 4
210#define W83795_REG_PWM(index, nr) \
211 (((nr) == 0 ? 0x210 : \
212 (nr) == 1 ? 0x220 : \
213 (nr) == 2 ? 0x228 : \
214 (nr) == 3 ? 0x230 : 0x218) + (index))
215
216#define W83795_REG_FOPFP_DIV(index) \
217 (((index) < 8) ? ((index) + 1) : \
218 ((index) == 8) ? 12 : \
219 (16 << ((index) - 9)))
220
221#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
222#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
223#define W83795_REG_TFTS 0x250
224
225#define TEMP_PWM_TTTI 0
226#define TEMP_PWM_CTFS 1
227#define TEMP_PWM_HCT 2
228#define TEMP_PWM_HOT 3
229#define W83795_REG_TTTI(index) (0x260 + (index))
230#define W83795_REG_CTFS(index) (0x268 + (index))
231#define W83795_REG_HT(index) (0x270 + (index))
232
233#define SF4_TEMP 0
234#define SF4_PWM 1
235#define W83795_REG_SF4_TEMP(temp_num, index) \
236 (0x280 + 0x10 * (temp_num) + (index))
237#define W83795_REG_SF4_PWM(temp_num, index) \
238 (0x288 + 0x10 * (temp_num) + (index))
239
240#define W83795_REG_DTSC 0x301
241#define W83795_REG_DTSE 0x302
242#define W83795_REG_DTS(index) (0x26 + (index))
243
244#define DTS_CRIT 0
245#define DTS_CRIT_HYST 1
246#define DTS_WARN 2
247#define DTS_WARN_HYST 3
248#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
249
250#define SETUP_PWM_DEFAULT 0
251#define SETUP_PWM_UPTIME 1
252#define SETUP_PWM_DOWNTIME 2
253#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
254
255static inline u16 in_from_reg(u8 index, u16 val)
256{
257 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
258 return val * 6;
259 else
260 return val * 2;
261}
262
263static inline u16 in_to_reg(u8 index, u16 val)
264{
265 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
266 return val / 6;
267 else
268 return val / 2;
269}
270
271static inline unsigned long fan_from_reg(u16 val)
272{
273 if ((val >= 0xff0) || (val == 0))
274 return 0;
275 return 1350000UL / val;
276}
277
278static inline u16 fan_to_reg(long rpm)
279{
280 if (rpm <= 0)
281 return 0x0fff;
282 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
283}
284
285static inline unsigned long time_from_reg(u8 reg)
286{
287 return reg * 100;
288}
289
290static inline u8 time_to_reg(unsigned long val)
291{
292 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
293}
294
295static inline long temp_from_reg(s8 reg)
296{
297 return reg * 1000;
298}
299
300static inline s8 temp_to_reg(long val, s8 min, s8 max)
301{
302 return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max);
303}
304
305
306enum chip_types {w83795g, w83795adg};
307
308struct w83795_data {
309 struct device *hwmon_dev;
310 struct mutex update_lock;
311 unsigned long last_updated; /* In jiffies */
312 enum chip_types chip_type;
313
314 u8 bank;
315
316 u32 has_in; /* Enable monitor VIN or not */
317 u16 in[21][3]; /* Register value, read/high/low */
318 u8 in_lsb[10][3]; /* LSB Register value, high/low */
319 u8 has_gain; /* has gain: in17-20 * 8 */
320
321 u16 has_fan; /* Enable fan14-1 or not */
322 u16 fan[14]; /* Register value combine */
323 u16 fan_min[14]; /* Register value combine */
324
325 u8 has_temp; /* Enable monitor temp6-1 or not */
326 u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
327 u8 temp_read_vrlsb[6];
328 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */
329 u8 temp_src[3]; /* Register value */
330
331 u8 enable_dts; /* Enable PECI and SB-TSI,
332 * bit 0: =1 enable, =0 disable,
333 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
334 u8 has_dts; /* Enable monitor DTS temp */
335 u8 dts[8]; /* Register value */
336 u8 dts_read_vrlsb[8]; /* Register value */
337 u8 dts_ext[4]; /* Register value */
338
339 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
340 * no config register, only affected by chip
341 * type */
342 u8 pwm[8][5]; /* Register value, output, start, non stop, stop
343 * time, div */
344 u8 pwm_fcms[2]; /* Register value */
345 u8 pwm_tfmr[6]; /* Register value */
346 u8 pwm_fomc; /* Register value */
347
348 u16 target_speed[8]; /* Register value, target speed for speed
349 * cruise */
350 u8 tol_speed; /* tolerance of target speed */
351 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
352 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
353
354 u8 setup_pwm[3]; /* Register value */
355
356 u8 alarms[6]; /* Register value */
357 u8 beeps[6]; /* Register value */
358 u8 beep_enable;
359
360 char valid;
361};
362
363/*
364 * Hardware access
365 */
366
367/* Ignore the possibility that somebody change bank outside the driver
368 * Must be called with data->update_lock held, except during initialization */
369static u8 w83795_read(struct i2c_client *client, u16 reg)
370{
371 struct w83795_data *data = i2c_get_clientdata(client);
372 u8 res = 0xff;
373 u8 new_bank = reg >> 8;
374
375 new_bank |= data->bank & 0xfc;
376 if (data->bank != new_bank) {
377 if (i2c_smbus_write_byte_data
378 (client, W83795_REG_BANKSEL, new_bank) >= 0)
379 data->bank = new_bank;
380 else {
381 dev_err(&client->dev,
382 "set bank to %d failed, fall back "
383 "to bank %d, read reg 0x%x error\n",
384 new_bank, data->bank, reg);
385 res = 0x0; /* read 0x0 from the chip */
386 goto END;
387 }
388 }
389 res = i2c_smbus_read_byte_data(client, reg & 0xff);
390END:
391 return res;
392}
393
394/* Must be called with data->update_lock held, except during initialization */
395static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
396{
397 struct w83795_data *data = i2c_get_clientdata(client);
398 int res;
399 u8 new_bank = reg >> 8;
400
401 new_bank |= data->bank & 0xfc;
402 if (data->bank != new_bank) {
403 res = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
404 new_bank);
405 if (res >= 0)
406 data->bank = new_bank;
407 else {
408 dev_err(&client->dev,
409 "set bank to %d failed, fall back "
410 "to bank %d, write reg 0x%x error\n",
411 new_bank, data->bank, reg);
412 goto END;
413 }
414 }
415
416 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
417END:
418 return res;
419}
420
421static struct w83795_data *w83795_update_device(struct device *dev)
422{
423 struct i2c_client *client = to_i2c_client(dev);
424 struct w83795_data *data = i2c_get_clientdata(client);
425 u16 tmp;
426 int i;
427
428 mutex_lock(&data->update_lock);
429
430 if (!(time_after(jiffies, data->last_updated + HZ * 2)
431 || !data->valid))
432 goto END;
433
434 /* Update the voltages value */
435 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
436 if (!(data->has_in & (1 << i)))
437 continue;
438 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
439 tmp |= (w83795_read(client, W83795_REG_VRLSB)
440 >> VRLSB_SHIFT) & 0x03;
441 data->in[i][IN_READ] = tmp;
442 }
443
444 /* Update fan */
445 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
446 if (!(data->has_fan & (1 << i)))
447 continue;
448 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
449 data->fan[i] |=
450 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
451 }
452
453 /* Update temperature */
454 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
455 /* even stop monitor, register still keep value, just read out
456 * it */
457 if (!(data->has_temp & (1 << i))) {
458 data->temp[i][TEMP_READ] = 0;
459 data->temp_read_vrlsb[i] = 0;
460 continue;
461 }
462 data->temp[i][TEMP_READ] =
463 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
464 data->temp_read_vrlsb[i] =
465 w83795_read(client, W83795_REG_VRLSB);
466 }
467
468 /* Update dts temperature */
469 if (data->enable_dts != 0) {
470 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
471 if (!(data->has_dts & (1 << i)))
472 continue;
473 data->dts[i] =
474 w83795_read(client, W83795_REG_DTS(i));
475 data->dts_read_vrlsb[i] =
476 w83795_read(client, W83795_REG_VRLSB);
477 }
478 }
479
480 /* Update pwm output */
481 for (i = 0; i < data->has_pwm; i++) {
482 data->pwm[i][PWM_OUTPUT] =
483 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
484 }
485
486 /* update alarm */
487 for (i = 0; i < ALARM_BEEP_REG_NUM; i++)
488 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
489
490 data->last_updated = jiffies;
491 data->valid = 1;
492
493END:
494 mutex_unlock(&data->update_lock);
495 return data;
496}
497
498/*
499 * Sysfs attributes
500 */
501
502#define ALARM_STATUS 0
503#define BEEP_ENABLE 1
504static ssize_t
505show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
506{
507 struct w83795_data *data = w83795_update_device(dev);
508 struct sensor_device_attribute_2 *sensor_attr =
509 to_sensor_dev_attr_2(attr);
510 int nr = sensor_attr->nr;
511 int index = sensor_attr->index >> 3;
512 int bit = sensor_attr->index & 0x07;
513 u8 val;
514
515 if (ALARM_STATUS == nr) {
516 val = (data->alarms[index] >> (bit)) & 1;
517 } else { /* BEEP_ENABLE */
518 val = (data->beeps[index] >> (bit)) & 1;
519 }
520
521 return sprintf(buf, "%u\n", val);
522}
523
524static ssize_t
525store_beep(struct device *dev, struct device_attribute *attr,
526 const char *buf, size_t count)
527{
528 struct i2c_client *client = to_i2c_client(dev);
529 struct w83795_data *data = i2c_get_clientdata(client);
530 struct sensor_device_attribute_2 *sensor_attr =
531 to_sensor_dev_attr_2(attr);
532 int index = sensor_attr->index >> 3;
533 int shift = sensor_attr->index & 0x07;
534 u8 beep_bit = 1 << shift;
535 unsigned long val;
536
537 if (strict_strtoul(buf, 10, &val) < 0)
538 return -EINVAL;
539 if (val != 0 && val != 1)
540 return -EINVAL;
541
542 mutex_lock(&data->update_lock);
543 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
544 data->beeps[index] &= ~beep_bit;
545 data->beeps[index] |= val << shift;
546 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
547 mutex_unlock(&data->update_lock);
548
549 return count;
550}
551
552static ssize_t
553show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
554{
555 struct i2c_client *client = to_i2c_client(dev);
556 struct w83795_data *data = i2c_get_clientdata(client);
557 return sprintf(buf, "%u\n", data->beep_enable);
558}
559
560static ssize_t
561store_beep_enable(struct device *dev, struct device_attribute *attr,
562 const char *buf, size_t count)
563{
564 struct i2c_client *client = to_i2c_client(dev);
565 struct w83795_data *data = i2c_get_clientdata(client);
566 unsigned long val;
567 u8 tmp;
568
569 if (strict_strtoul(buf, 10, &val) < 0)
570 return -EINVAL;
571 if (val != 0 && val != 1)
572 return -EINVAL;
573
574 mutex_lock(&data->update_lock);
575 data->beep_enable = val;
576 tmp = w83795_read(client, W83795_REG_BEEP(5));
577 tmp &= 0x7f;
578 tmp |= val << 7;
579 w83795_write(client, W83795_REG_BEEP(5), tmp);
580 mutex_unlock(&data->update_lock);
581
582 return count;
583}
584
585/* Write any value to clear chassis alarm */
586static ssize_t
587store_chassis_clear(struct device *dev,
588 struct device_attribute *attr, const char *buf,
589 size_t count)
590{
591 struct i2c_client *client = to_i2c_client(dev);
592 struct w83795_data *data = i2c_get_clientdata(client);
593 u8 val;
594
595 mutex_lock(&data->update_lock);
596 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
597 val |= 0x80;
598 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
599 mutex_unlock(&data->update_lock);
600 return count;
601}
602
603#define FAN_INPUT 0
604#define FAN_MIN 1
605static ssize_t
606show_fan(struct device *dev, struct device_attribute *attr, char *buf)
607{
608 struct sensor_device_attribute_2 *sensor_attr =
609 to_sensor_dev_attr_2(attr);
610 int nr = sensor_attr->nr;
611 int index = sensor_attr->index;
612 struct w83795_data *data = w83795_update_device(dev);
613 u16 val;
614
615 if (FAN_INPUT == nr)
616 val = data->fan[index] & 0x0fff;
617 else
618 val = data->fan_min[index] & 0x0fff;
619
620 return sprintf(buf, "%lu\n", fan_from_reg(val));
621}
622
623static ssize_t
624store_fan_min(struct device *dev, struct device_attribute *attr,
625 const char *buf, size_t count)
626{
627 struct sensor_device_attribute_2 *sensor_attr =
628 to_sensor_dev_attr_2(attr);
629 int index = sensor_attr->index;
630 struct i2c_client *client = to_i2c_client(dev);
631 struct w83795_data *data = i2c_get_clientdata(client);
632 unsigned long val;
633
634 if (strict_strtoul(buf, 10, &val))
635 return -EINVAL;
636 val = fan_to_reg(val);
637
638 mutex_lock(&data->update_lock);
639 data->fan_min[index] = val;
640 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
641 val &= 0x0f;
642 if (index % 1) {
643 val <<= 4;
644 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
645 & 0x0f;
646 } else {
647 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
648 & 0xf0;
649 }
650 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
651 mutex_unlock(&data->update_lock);
652
653 return count;
654}
655
656static ssize_t
657show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
658{
659 struct w83795_data *data = w83795_update_device(dev);
660 struct sensor_device_attribute_2 *sensor_attr =
661 to_sensor_dev_attr_2(attr);
662 int nr = sensor_attr->nr;
663 int index = sensor_attr->index;
664 u16 val;
665
666 switch (nr) {
667 case PWM_STOP_TIME:
668 val = time_from_reg(data->pwm[index][nr]);
669 break;
670 case PWM_DIV:
671 val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f);
672 break;
673 default:
674 val = data->pwm[index][nr];
675 break;
676 }
677
678 return sprintf(buf, "%u\n", val);
679}
680
681static ssize_t
682store_pwm(struct device *dev, struct device_attribute *attr,
683 const char *buf, size_t count)
684{
685 struct i2c_client *client = to_i2c_client(dev);
686 struct w83795_data *data = i2c_get_clientdata(client);
687 struct sensor_device_attribute_2 *sensor_attr =
688 to_sensor_dev_attr_2(attr);
689 int nr = sensor_attr->nr;
690 int index = sensor_attr->index;
691 unsigned long val;
692 int i;
693
694 if (strict_strtoul(buf, 10, &val) < 0)
695 return -EINVAL;
696
697 mutex_lock(&data->update_lock);
698 switch (nr) {
699 case PWM_STOP_TIME:
700 val = time_to_reg(val);
701 break;
702 case PWM_DIV:
703 for (i = 0; i < 16; i++) {
704 if (W83795_REG_FOPFP_DIV(i) == val) {
705 val = i;
706 break;
707 }
708 }
709 if (i >= 16)
710 goto err_end;
711 val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80;
712 break;
713 default:
714 val = SENSORS_LIMIT(val, 0, 0xff);
715 break;
716 }
717 w83795_write(client, W83795_REG_PWM(index, nr), val);
718 data->pwm[index][nr] = val & 0xff;
719 mutex_unlock(&data->update_lock);
720 return count;
721err_end:
722 mutex_unlock(&data->update_lock);
723 return -EINVAL;
724}
725
726static ssize_t
727show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
728{
729 struct sensor_device_attribute_2 *sensor_attr =
730 to_sensor_dev_attr_2(attr);
731 struct i2c_client *client = to_i2c_client(dev);
732 struct w83795_data *data = i2c_get_clientdata(client);
733 int index = sensor_attr->index;
734 u8 tmp;
735
736 if (1 == (data->pwm_fcms[0] & (1 << index))) {
737 tmp = 2;
738 goto out;
739 }
740 for (tmp = 0; tmp < 6; tmp++) {
741 if (data->pwm_tfmr[tmp] & (1 << index)) {
742 tmp = 3;
743 goto out;
744 }
745 }
746 if (data->pwm_fomc & (1 << index))
747 tmp = 0;
748 else
749 tmp = 1;
750
751out:
752 return sprintf(buf, "%u\n", tmp);
753}
754
755static ssize_t
756store_pwm_enable(struct device *dev, struct device_attribute *attr,
757 const char *buf, size_t count)
758{
759 struct i2c_client *client = to_i2c_client(dev);
760 struct w83795_data *data = i2c_get_clientdata(client);
761 struct sensor_device_attribute_2 *sensor_attr =
762 to_sensor_dev_attr_2(attr);
763 int index = sensor_attr->index;
764 unsigned long val;
765 int i;
766
767 if (strict_strtoul(buf, 10, &val) < 0)
768 return -EINVAL;
769 if (val > 2)
770 return -EINVAL;
771
772 mutex_lock(&data->update_lock);
773 switch (val) {
774 case 0:
775 case 1:
776 data->pwm_fcms[0] &= ~(1 << index);
777 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
778 for (i = 0; i < 6; i++) {
779 data->pwm_tfmr[i] &= ~(1 << index);
780 w83795_write(client, W83795_REG_TFMR(i),
781 data->pwm_tfmr[i]);
782 }
783 data->pwm_fomc |= 1 << index;
784 data->pwm_fomc ^= val << index;
785 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
786 break;
787 case 2:
788 data->pwm_fcms[0] |= (1 << index);
789 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
790 break;
791 }
792 mutex_unlock(&data->update_lock);
793 return count;
792d376b
WS		 794}
795
796static ssize_t
797show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
798{
799 struct sensor_device_attribute_2 *sensor_attr =
800 to_sensor_dev_attr_2(attr);
801 struct i2c_client *client = to_i2c_client(dev);
802 struct w83795_data *data = i2c_get_clientdata(client);
803 int index = sensor_attr->index;
804 u8 val = index / 2;
805 u8 tmp = data->temp_src[val];
806
807 if (index % 1)
808 val = 4;
809 else
810 val = 0;
811 tmp >>= val;
812 tmp &= 0x0f;
813
814 return sprintf(buf, "%u\n", tmp);
815}
816
817static ssize_t
818store_temp_src(struct device *dev, struct device_attribute *attr,
819 const char *buf, size_t count)
820{
821 struct i2c_client *client = to_i2c_client(dev);
822 struct w83795_data *data = i2c_get_clientdata(client);
823 struct sensor_device_attribute_2 *sensor_attr =
824 to_sensor_dev_attr_2(attr);
825 int index = sensor_attr->index;
826 unsigned long tmp;
827 u8 val = index / 2;
828
829 if (strict_strtoul(buf, 10, &tmp) < 0)
830 return -EINVAL;
831 tmp = SENSORS_LIMIT(tmp, 0, 15);
832
833 mutex_lock(&data->update_lock);
834 if (index % 1) {
835 tmp <<= 4;
836 data->temp_src[val] &= 0x0f;
837 } else {
838 data->temp_src[val] &= 0xf0;
839 }
840 data->temp_src[val] |= tmp;
841 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
842 mutex_unlock(&data->update_lock);
843
844 return count;
845}
846
847#define TEMP_PWM_ENABLE 0
848#define TEMP_PWM_FAN_MAP 1
849static ssize_t
850show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
851 char *buf)
852{
853 struct i2c_client *client = to_i2c_client(dev);
854 struct w83795_data *data = i2c_get_clientdata(client);
855 struct sensor_device_attribute_2 *sensor_attr =
856 to_sensor_dev_attr_2(attr);
857 int nr = sensor_attr->nr;
858 int index = sensor_attr->index;
859 u8 tmp = 0xff;
860
861 switch (nr) {
862 case TEMP_PWM_ENABLE:
863 tmp = (data->pwm_fcms[1] >> index) & 1;
864 if (tmp)
865 tmp = 4;
866 else
867 tmp = 3;
868 break;
869 case TEMP_PWM_FAN_MAP:
870 tmp = data->pwm_tfmr[index];
871 break;
872 }
873
874 return sprintf(buf, "%u\n", tmp);
875}
876
877static ssize_t
878store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
879 const char *buf, size_t count)
880{
881 struct i2c_client *client = to_i2c_client(dev);
882 struct w83795_data *data = i2c_get_clientdata(client);
883 struct sensor_device_attribute_2 *sensor_attr =
884 to_sensor_dev_attr_2(attr);
885 int nr = sensor_attr->nr;
886 int index = sensor_attr->index;
887 unsigned long tmp;
888
889 if (strict_strtoul(buf, 10, &tmp) < 0)
890 return -EINVAL;
891
892 switch (nr) {
893 case TEMP_PWM_ENABLE:
894 if ((tmp != 3) && (tmp != 4))
895 return -EINVAL;
896 tmp -= 3;
897 mutex_lock(&data->update_lock);
898 data->pwm_fcms[1] &= ~(1 << index);
899 data->pwm_fcms[1] |= tmp << index;
900 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
901 mutex_unlock(&data->update_lock);
902 break;
903 case TEMP_PWM_FAN_MAP:
904 mutex_lock(&data->update_lock);
905 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
906 w83795_write(client, W83795_REG_TFMR(index), tmp);
907 data->pwm_tfmr[index] = tmp;
908 mutex_unlock(&data->update_lock);
909 break;
910 }
911 return count;
912}
913
914#define FANIN_TARGET 0
915#define FANIN_TOL 1
916static ssize_t
917show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
918{
919 struct i2c_client *client = to_i2c_client(dev);
920 struct w83795_data *data = i2c_get_clientdata(client);
921 struct sensor_device_attribute_2 *sensor_attr =
922 to_sensor_dev_attr_2(attr);
923 int nr = sensor_attr->nr;
924 int index = sensor_attr->index;
925 u16 tmp = 0;
926
927 switch (nr) {
928 case FANIN_TARGET:
929 tmp = fan_from_reg(data->target_speed[index]);
930 break;
931 case FANIN_TOL:
932 tmp = data->tol_speed;
933 break;
934 }
935
936 return sprintf(buf, "%u\n", tmp);
937}
938
939static ssize_t
940store_fanin(struct device *dev, struct device_attribute *attr,
941 const char *buf, size_t count)
942{
943 struct i2c_client *client = to_i2c_client(dev);
944 struct w83795_data *data = i2c_get_clientdata(client);
945 struct sensor_device_attribute_2 *sensor_attr =
946 to_sensor_dev_attr_2(attr);
947 int nr = sensor_attr->nr;
948 int index = sensor_attr->index;
949 unsigned long val;
950
951 if (strict_strtoul(buf, 10, &val) < 0)
952 return -EINVAL;
953
954 mutex_lock(&data->update_lock);
955 switch (nr) {
956 case FANIN_TARGET:
957 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
958 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
959 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
960 data->target_speed[index] = val;
961 break;
962 case FANIN_TOL:
963 val = SENSORS_LIMIT(val, 0, 0x3f);
964 w83795_write(client, W83795_REG_TFTS, val);
965 data->tol_speed = val;
966 break;
967 }
968 mutex_unlock(&data->update_lock);
969
970 return count;
971}
972
973
974static ssize_t
975show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
976{
977 struct i2c_client *client = to_i2c_client(dev);
978 struct w83795_data *data = i2c_get_clientdata(client);
979 struct sensor_device_attribute_2 *sensor_attr =
980 to_sensor_dev_attr_2(attr);
981 int nr = sensor_attr->nr;
982 int index = sensor_attr->index;
983 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
984
985 return sprintf(buf, "%ld\n", tmp);
986}
987
988static ssize_t
989store_temp_pwm(struct device *dev, struct device_attribute *attr,
990 const char *buf, size_t count)
991{
992 struct i2c_client *client = to_i2c_client(dev);
993 struct w83795_data *data = i2c_get_clientdata(client);
994 struct sensor_device_attribute_2 *sensor_attr =
995 to_sensor_dev_attr_2(attr);
996 int nr = sensor_attr->nr;
997 int index = sensor_attr->index;
998 unsigned long val;
999 u8 tmp;
1000
1001 if (strict_strtoul(buf, 10, &val) < 0)
1002 return -EINVAL;
1003 val /= 1000;
1004
1005 mutex_lock(&data->update_lock);
1006 switch (nr) {
1007 case TEMP_PWM_TTTI:
1008 val = SENSORS_LIMIT(val, 0, 0x7f);
1009 w83795_write(client, W83795_REG_TTTI(index), val);
1010 break;
1011 case TEMP_PWM_CTFS:
1012 val = SENSORS_LIMIT(val, 0, 0x7f);
1013 w83795_write(client, W83795_REG_CTFS(index), val);
1014 break;
1015 case TEMP_PWM_HCT:
1016 val = SENSORS_LIMIT(val, 0, 0x0f);
1017 tmp = w83795_read(client, W83795_REG_HT(index));
1018 tmp &= 0x0f;
1019 tmp |= (val << 4) & 0xf0;
1020 w83795_write(client, W83795_REG_HT(index), tmp);
1021 break;
1022 case TEMP_PWM_HOT:
1023 val = SENSORS_LIMIT(val, 0, 0x0f);
1024 tmp = w83795_read(client, W83795_REG_HT(index));
1025 tmp &= 0xf0;
1026 tmp |= val & 0x0f;
1027 w83795_write(client, W83795_REG_HT(index), tmp);
1028 break;
1029 }
1030 data->pwm_temp[index][nr] = val;
1031 mutex_unlock(&data->update_lock);
1032
1033 return count;
1034}
1035
1036static ssize_t
1037show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1038{
1039 struct i2c_client *client = to_i2c_client(dev);
1040 struct w83795_data *data = i2c_get_clientdata(client);
1041 struct sensor_device_attribute_2 *sensor_attr =
1042 to_sensor_dev_attr_2(attr);
1043 int nr = sensor_attr->nr;
1044 int index = sensor_attr->index;
1045
1046 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1047}
1048
1049static ssize_t
1050store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1051 const char *buf, size_t count)
1052{
1053 struct i2c_client *client = to_i2c_client(dev);
1054 struct w83795_data *data = i2c_get_clientdata(client);
1055 struct sensor_device_attribute_2 *sensor_attr =
1056 to_sensor_dev_attr_2(attr);
1057 int nr = sensor_attr->nr;
1058 int index = sensor_attr->index;
1059 unsigned long val;
1060
1061 if (strict_strtoul(buf, 10, &val) < 0)
1062 return -EINVAL;
1063
1064 mutex_lock(&data->update_lock);
1065 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1066 data->sf4_reg[index][SF4_PWM][nr] = val;
1067 mutex_unlock(&data->update_lock);
1068
1069 return count;
1070}
1071
1072static ssize_t
1073show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1074{
1075 struct i2c_client *client = to_i2c_client(dev);
1076 struct w83795_data *data = i2c_get_clientdata(client);
1077 struct sensor_device_attribute_2 *sensor_attr =
1078 to_sensor_dev_attr_2(attr);
1079 int nr = sensor_attr->nr;
1080 int index = sensor_attr->index;
1081
1082 return sprintf(buf, "%u\n",
1083 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1084}
1085
1086static ssize_t
1087store_sf4_temp(struct device *dev, struct device_attribute *attr,
1088 const char *buf, size_t count)
1089{
1090 struct i2c_client *client = to_i2c_client(dev);
1091 struct w83795_data *data = i2c_get_clientdata(client);
1092 struct sensor_device_attribute_2 *sensor_attr =
1093 to_sensor_dev_attr_2(attr);
1094 int nr = sensor_attr->nr;
1095 int index = sensor_attr->index;
1096 unsigned long val;
1097
1098 if (strict_strtoul(buf, 10, &val) < 0)
1099 return -EINVAL;
1100 val /= 1000;
1101
1102 mutex_lock(&data->update_lock);
1103 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1104 data->sf4_reg[index][SF4_TEMP][nr] = val;
1105 mutex_unlock(&data->update_lock);
1106
1107 return count;
1108}
1109
1110
1111static ssize_t
1112show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1113{
1114 struct sensor_device_attribute_2 *sensor_attr =
1115 to_sensor_dev_attr_2(attr);
1116 int nr = sensor_attr->nr;
1117 int index = sensor_attr->index;
1118 struct w83795_data *data = w83795_update_device(dev);
1119 long temp = temp_from_reg(data->temp[index][nr] & 0x7f);
1120
1121 if (TEMP_READ == nr)
1122 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03)
1123 * 250;
1124 if (data->temp[index][nr] & 0x80)
1125 temp = -temp;
1126 return sprintf(buf, "%ld\n", temp);
1127}
1128
1129static ssize_t
1130store_temp(struct device *dev, struct device_attribute *attr,
1131 const char *buf, size_t count)
1132{
1133 struct sensor_device_attribute_2 *sensor_attr =
1134 to_sensor_dev_attr_2(attr);
1135 int nr = sensor_attr->nr;
1136 int index = sensor_attr->index;
1137 struct i2c_client *client = to_i2c_client(dev);
1138 struct w83795_data *data = i2c_get_clientdata(client);
1139 long tmp;
1140
1141 if (strict_strtol(buf, 10, &tmp) < 0)
1142 return -EINVAL;
1143
1144 mutex_lock(&data->update_lock);
1145 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1146 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1147 mutex_unlock(&data->update_lock);
1148 return count;
1149}
1150
1151
1152static ssize_t
1153show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1154{
1155 struct i2c_client *client = to_i2c_client(dev);
1156 struct w83795_data *data = i2c_get_clientdata(client);
1157 struct sensor_device_attribute_2 *sensor_attr =
1158 to_sensor_dev_attr_2(attr);
1159 int index = sensor_attr->index;
1160 u8 tmp;
1161
1162 if (data->enable_dts == 0)
1163 return sprintf(buf, "%d\n", 0);
1164
1165 if ((data->has_dts >> index) & 0x01) {
1166 if (data->enable_dts & 2)
1167 tmp = 5;
1168 else
1169 tmp = 6;
1170 } else {
1171 tmp = 0;
1172 }
1173
1174 return sprintf(buf, "%d\n", tmp);
1175}
1176
1177static ssize_t
1178show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1179{
1180 struct sensor_device_attribute_2 *sensor_attr =
1181 to_sensor_dev_attr_2(attr);
1182 int index = sensor_attr->index;
1183 struct w83795_data *data = w83795_update_device(dev);
1184 long temp = temp_from_reg(data->dts[index] & 0x7f);
1185
1186 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250;
1187 if (data->dts[index] & 0x80)
1188 temp = -temp;
1189 return sprintf(buf, "%ld\n", temp);
1190}
1191
1192static ssize_t
1193show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1194{
1195 struct sensor_device_attribute_2 *sensor_attr =
1196 to_sensor_dev_attr_2(attr);
1197 int nr = sensor_attr->nr;
1198 struct i2c_client *client = to_i2c_client(dev);
1199 struct w83795_data *data = i2c_get_clientdata(client);
1200 long temp = temp_from_reg(data->dts_ext[nr] & 0x7f);
1201
1202 if (data->dts_ext[nr] & 0x80)
1203 temp = -temp;
1204 return sprintf(buf, "%ld\n", temp);
1205}
1206
1207static ssize_t
1208store_dts_ext(struct device *dev, struct device_attribute *attr,
1209 const char *buf, size_t count)
1210{
1211 struct sensor_device_attribute_2 *sensor_attr =
1212 to_sensor_dev_attr_2(attr);
1213 int nr = sensor_attr->nr;
1214 struct i2c_client *client = to_i2c_client(dev);
1215 struct w83795_data *data = i2c_get_clientdata(client);
1216 long tmp;
1217
1218 if (strict_strtol(buf, 10, &tmp) < 0)
1219 return -EINVAL;
1220
1221 mutex_lock(&data->update_lock);
1222 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1223 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1224 mutex_unlock(&data->update_lock);
1225 return count;
1226}
1227
1228
1229/*
1230 Type 3: Thermal diode
1231 Type 4: Thermistor
1232
1233 Temp5-6, default TR
1234 Temp1-4, default TD
1235*/
1236
1237static ssize_t
1238show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1239{
1240 struct i2c_client *client = to_i2c_client(dev);
1241 struct w83795_data *data = i2c_get_clientdata(client);
1242 struct sensor_device_attribute_2 *sensor_attr =
1243 to_sensor_dev_attr_2(attr);
1244 int index = sensor_attr->index;
1245 u8 tmp;
1246
1247 if (data->has_temp >> index & 0x01) {
1248 if (data->temp_mode >> index & 0x01)
1249 tmp = 3;
1250 else
1251 tmp = 4;
1252 } else {
1253 tmp = 0;
1254 }
1255
1256 return sprintf(buf, "%d\n", tmp);
1257}
1258
1259static ssize_t
1260store_temp_mode(struct device *dev, struct device_attribute *attr,
1261 const char *buf, size_t count)
1262{
1263 struct i2c_client *client = to_i2c_client(dev);
1264 struct w83795_data *data = i2c_get_clientdata(client);
1265 struct sensor_device_attribute_2 *sensor_attr =
1266 to_sensor_dev_attr_2(attr);
1267 int index = sensor_attr->index;
1268 unsigned long val;
1269 u8 tmp;
1270 u32 mask;
1271
1272 if (strict_strtoul(buf, 10, &val) < 0)
1273 return -EINVAL;
1274 if ((val != 4) && (val != 3))
1275 return -EINVAL;
1276 if ((index > 3) && (val == 3))
1277 return -EINVAL;
1278
1279 mutex_lock(&data->update_lock);
1280 if (val == 3) {
1281 val = TEMP_CTRL_TD;
1282 data->has_temp |= 1 << index;
1283 data->temp_mode |= 1 << index;
1284 } else if (val == 4) {
1285 val = TEMP_CTRL_TR;
1286 data->has_temp |= 1 << index;
1287 tmp = 1 << index;
1288 data->temp_mode &= ~tmp;
1289 }
1290
1291 if (index > 3)
1292 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1293 else
1294 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1295
1296 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT];
1297 tmp &= ~mask;
1298 tmp |= W83795_REG_TEMP_CTRL[index][val];
1299
1300 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT];
1301 data->has_in &= ~mask;
1302
1303 if (index > 3)
1304 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp);
1305 else
1306 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1307
1308 mutex_unlock(&data->update_lock);
1309 return count;
1310}
1311
1312
1313/* show/store VIN */
1314static ssize_t
1315show_in(struct device *dev, struct device_attribute *attr, char *buf)
1316{
1317 struct sensor_device_attribute_2 *sensor_attr =
1318 to_sensor_dev_attr_2(attr);
1319 int nr = sensor_attr->nr;
1320 int index = sensor_attr->index;
1321 struct w83795_data *data = w83795_update_device(dev);
1322 u16 val = data->in[index][nr];
1323 u8 lsb_idx;
1324
1325 switch (nr) {
1326 case IN_READ:
1327 /* calculate this value again by sensors as sensors3.conf */
1328 if ((index >= 17) &&
1329 ((data->has_gain >> (index - 17)) & 1))
1330 val *= 8;
1331 break;
1332 case IN_MAX:
1333 case IN_LOW:
1334 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1335 val <<= 2;
1336 val |= (data->in_lsb[lsb_idx][nr] >>
1337 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1338 if ((index >= 17) &&
1339 ((data->has_gain >> (index - 17)) & 1))
1340 val *= 8;
1341 break;
1342 }
1343 val = in_from_reg(index, val);
1344
1345 return sprintf(buf, "%d\n", val);
1346}
1347
1348static ssize_t
1349store_in(struct device *dev, struct device_attribute *attr,
1350 const char *buf, size_t count)
1351{
1352 struct sensor_device_attribute_2 *sensor_attr =
1353 to_sensor_dev_attr_2(attr);
1354 int nr = sensor_attr->nr;
1355 int index = sensor_attr->index;
1356 struct i2c_client *client = to_i2c_client(dev);
1357 struct w83795_data *data = i2c_get_clientdata(client);
1358 unsigned long val;
1359 u8 tmp;
1360 u8 lsb_idx;
1361
1362 if (strict_strtoul(buf, 10, &val) < 0)
1363 return -EINVAL;
1364 val = in_to_reg(index, val);
1365
1366 if ((index >= 17) &&
1367 ((data->has_gain >> (index - 17)) & 1))
1368 val /= 8;
1369 val = SENSORS_LIMIT(val, 0, 0x3FF);
1370 mutex_lock(&data->update_lock);
1371
1372 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1373 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1374 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1375 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1376 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1377 data->in_lsb[lsb_idx][nr] = tmp;
1378
1379 tmp = (val >> 2) & 0xff;
1380 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1381 data->in[index][nr] = tmp;
1382
1383 mutex_unlock(&data->update_lock);
1384 return count;
1385}
1386
1387
1388static ssize_t
1389show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1390{
1391 struct sensor_device_attribute_2 *sensor_attr =
1392 to_sensor_dev_attr_2(attr);
1393 int nr = sensor_attr->nr;
1394 struct i2c_client *client = to_i2c_client(dev);
1395 struct w83795_data *data = i2c_get_clientdata(client);
1396 u16 val = data->setup_pwm[nr];
1397
1398 switch (nr) {
1399 case SETUP_PWM_UPTIME:
1400 case SETUP_PWM_DOWNTIME:
1401 val = time_from_reg(val);
1402 break;
1403 }
1404
1405 return sprintf(buf, "%d\n", val);
1406}
1407
1408static ssize_t
1409store_sf_setup(struct device *dev, struct device_attribute *attr,
1410 const char *buf, size_t count)
1411{
1412 struct sensor_device_attribute_2 *sensor_attr =
1413 to_sensor_dev_attr_2(attr);
1414 int nr = sensor_attr->nr;
1415 struct i2c_client *client = to_i2c_client(dev);
1416 struct w83795_data *data = i2c_get_clientdata(client);
1417 unsigned long val;
1418
1419 if (strict_strtoul(buf, 10, &val) < 0)
1420 return -EINVAL;
1421
1422 switch (nr) {
1423 case SETUP_PWM_DEFAULT:
1424 val = SENSORS_LIMIT(val, 0, 0xff);
1425 break;
1426 case SETUP_PWM_UPTIME:
1427 case SETUP_PWM_DOWNTIME:
1428 val = time_to_reg(val);
1429 if (val == 0)
1430 return -EINVAL;
1431 break;
1432 }
1433
1434 mutex_lock(&data->update_lock);
1435 data->setup_pwm[nr] = val;
1436 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1437 mutex_unlock(&data->update_lock);
1438 return count;
1439}
1440
1441
1442#define NOT_USED -1
1443
1444#define SENSOR_ATTR_IN(index) \
1445 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1446 IN_READ, index), \
1447 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1448 store_in, IN_MAX, index), \
1449 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1450 store_in, IN_LOW, index), \
1451 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1452 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1453 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1454 show_alarm_beep, store_beep, BEEP_ENABLE, \
1455 index + ((index > 14) ? 1 : 0))
1456
1457#define SENSOR_ATTR_FAN(index) \
1458 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1459 NULL, FAN_INPUT, index - 1), \
1460 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1461 show_fan, store_fan_min, FAN_MIN, index - 1), \
1462 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1463 NULL, ALARM_STATUS, index + 31), \
1464 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1465 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31)
1466
1467#define SENSOR_ATTR_PWM(index) \
1468 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1469 store_pwm, PWM_OUTPUT, index - 1), \
1470 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1471 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1472 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1473 show_pwm, store_pwm, PWM_START, index - 1), \
1474 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1475 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
1476 SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \
1477 show_pwm, store_pwm, PWM_DIV, index - 1), \
1478 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
1479 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1)
1480
1481#define SENSOR_ATTR_FANIN_TARGET(index) \
1482 SENSOR_ATTR_2(speed_cruise##index##_target, S_IWUSR | S_IRUGO, \
1483 show_fanin, store_fanin, FANIN_TARGET, index - 1)
1484
1485#define SENSOR_ATTR_DTS(index) \
1486 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1487 show_dts_mode, NULL, NOT_USED, index - 7), \
1488 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1489 NULL, NOT_USED, index - 7), \
1490 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
1491 store_dts_ext, DTS_CRIT, NOT_USED), \
1492 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1493 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
1494 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_dts_ext, \
1495 store_dts_ext, DTS_WARN, NOT_USED), \
1496 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1497 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1498 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1499 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1500 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1501 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17)
1502
1503#define SENSOR_ATTR_TEMP(index) \
1504 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1505 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1506 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1507 NULL, TEMP_READ, index - 1), \
1508 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1509 store_temp, TEMP_CRIT, index - 1), \
1510 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1511 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1512 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1513 store_temp, TEMP_WARN, index - 1), \
1514 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1515 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1516 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1517 show_alarm_beep, NULL, ALARM_STATUS, \
1518 index + (index > 4 ? 11 : 17)), \
1519 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1520 show_alarm_beep, store_beep, BEEP_ENABLE, \
1521 index + (index > 4 ? 11 : 17)), \
1522 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1523 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1524 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1525 show_temp_pwm_enable, store_temp_pwm_enable, \
1526 TEMP_PWM_ENABLE, index - 1), \
1527 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1528 show_temp_pwm_enable, store_temp_pwm_enable, \
1529 TEMP_PWM_FAN_MAP, index - 1), \
1530 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1531 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
1532 SENSOR_ATTR_2(temp##index##_crit, S_IWUSR | S_IRUGO, \
1533 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
1534 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IWUSR | S_IRUGO, \
1535 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1536 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1537 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1538 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1539 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1540 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1541 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1542 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1543 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1544 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1545 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1546 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1547 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1548 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1549 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1550 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1551 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1552 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1553 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1554 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1555 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1556 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1557 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1558 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1559 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1560 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1561 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1562 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1563 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1564 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1565 show_sf4_temp, store_sf4_temp, 6, index - 1)
1566
1567
1568static struct sensor_device_attribute_2 w83795_in[] = {
1569 SENSOR_ATTR_IN(0),
1570 SENSOR_ATTR_IN(1),
1571 SENSOR_ATTR_IN(2),
1572 SENSOR_ATTR_IN(3),
1573 SENSOR_ATTR_IN(4),
1574 SENSOR_ATTR_IN(5),
1575 SENSOR_ATTR_IN(6),
1576 SENSOR_ATTR_IN(7),
1577 SENSOR_ATTR_IN(8),
1578 SENSOR_ATTR_IN(9),
1579 SENSOR_ATTR_IN(10),
1580 SENSOR_ATTR_IN(11),
1581 SENSOR_ATTR_IN(12),
1582 SENSOR_ATTR_IN(13),
1583 SENSOR_ATTR_IN(14),
1584 SENSOR_ATTR_IN(15),
1585 SENSOR_ATTR_IN(16),
1586 SENSOR_ATTR_IN(17),
1587 SENSOR_ATTR_IN(18),
1588 SENSOR_ATTR_IN(19),
1589 SENSOR_ATTR_IN(20),
1590};
1591
1592static struct sensor_device_attribute_2 w83795_fan[] = {
1593 SENSOR_ATTR_FAN(1),
1594 SENSOR_ATTR_FAN(2),
1595 SENSOR_ATTR_FAN(3),
1596 SENSOR_ATTR_FAN(4),
1597 SENSOR_ATTR_FAN(5),
1598 SENSOR_ATTR_FAN(6),
1599 SENSOR_ATTR_FAN(7),
1600 SENSOR_ATTR_FAN(8),
1601 SENSOR_ATTR_FAN(9),
1602 SENSOR_ATTR_FAN(10),
1603 SENSOR_ATTR_FAN(11),
1604 SENSOR_ATTR_FAN(12),
1605 SENSOR_ATTR_FAN(13),
1606 SENSOR_ATTR_FAN(14),
1607};
1608
1609static struct sensor_device_attribute_2 w83795_temp[] = {
1610 SENSOR_ATTR_TEMP(1),
1611 SENSOR_ATTR_TEMP(2),
1612 SENSOR_ATTR_TEMP(3),
1613 SENSOR_ATTR_TEMP(4),
1614 SENSOR_ATTR_TEMP(5),
1615 SENSOR_ATTR_TEMP(6),
1616};
1617
1618static struct sensor_device_attribute_2 w83795_dts[] = {
1619 SENSOR_ATTR_DTS(7),
1620 SENSOR_ATTR_DTS(8),
1621 SENSOR_ATTR_DTS(9),
1622 SENSOR_ATTR_DTS(10),
1623 SENSOR_ATTR_DTS(11),
1624 SENSOR_ATTR_DTS(12),
1625 SENSOR_ATTR_DTS(13),
1626 SENSOR_ATTR_DTS(14),
1627};
1628
1629static struct sensor_device_attribute_2 w83795_static[] = {
1630 SENSOR_ATTR_FANIN_TARGET(1),
1631 SENSOR_ATTR_FANIN_TARGET(2),
1632 SENSOR_ATTR_FANIN_TARGET(3),
1633 SENSOR_ATTR_FANIN_TARGET(4),
1634 SENSOR_ATTR_FANIN_TARGET(5),
1635 SENSOR_ATTR_FANIN_TARGET(6),
1636 SENSOR_ATTR_FANIN_TARGET(7),
1637 SENSOR_ATTR_FANIN_TARGET(8),
1638 SENSOR_ATTR_PWM(1),
1639 SENSOR_ATTR_PWM(2),
1640};
1641
1642/* all registers existed in 795g than 795adg,
1643 * like PWM3 - PWM8 */
1644static struct sensor_device_attribute_2 w83795_left_reg[] = {
1645 SENSOR_ATTR_PWM(3),
1646 SENSOR_ATTR_PWM(4),
1647 SENSOR_ATTR_PWM(5),
1648 SENSOR_ATTR_PWM(6),
1649 SENSOR_ATTR_PWM(7),
1650 SENSOR_ATTR_PWM(8),
1651};
1652
1653static struct sensor_device_attribute_2 sda_single_files[] = {
1654 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1655 store_chassis_clear, ALARM_STATUS, 46),
1656 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1657 store_beep_enable, NOT_USED, NOT_USED),
1658 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1659 store_fanin, FANIN_TOL, NOT_USED),
1660 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1661 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1662 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1663 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1664 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1665 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1666};
1667
1668/*
1669 * Driver interface
1670 */
1671
1672static void w83795_init_client(struct i2c_client *client)
1673{
1674 if (reset)
1675 w83795_write(client, W83795_REG_CONFIG, 0x80);
1676
1677 /* Start monitoring */
1678 w83795_write(client, W83795_REG_CONFIG,
1679 w83795_read(client, W83795_REG_CONFIG) | 0x01);
1680}
1681
1682/* Return 0 if detection is successful, -ENODEV otherwise */
1683static int w83795_detect(struct i2c_client *client,
1684 struct i2c_board_info *info)
1685{
1686 u8 tmp, bank;
1687 struct i2c_adapter *adapter = client->adapter;
1688 unsigned short address = client->addr;
1689
1690 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1691 return -ENODEV;
1692 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1693
1694 tmp = bank & 0x80 ? 0x5c : 0xa3;
1695 /* Check Nuvoton vendor ID */
1696 if (tmp != i2c_smbus_read_byte_data(client,
1697 W83795_REG_VENDORID)) {
1698 pr_debug("w83795: Detection failed at check "
1699 "vendor id\n");
1700 return -ENODEV;
1701 }
1702
1703 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1704 should match */
1705 if ((bank & 0x07) == 0
1706 && (i2c_smbus_read_byte_data(client, W83795_REG_I2C_ADDR) & 0x7f) !=
1707 address) {
1708 pr_debug("w83795: Detection failed at check "
1709 "i2c addr\n");
1710 return -ENODEV;
1711 }
1712
1713 /* Determine the chip type now */
1714 if (0x79 != i2c_smbus_read_byte_data(client,
1715 W83795_REG_CHIPID)) {
1716 pr_debug("w83795: Detection failed at check "
1717 "chip id\n");
1718 return -ENODEV;
1719 }
1720
1721#if 0
1722 /* Check 795 chip type: 795G or 795ADG */
1723 if (W83795_REG_CONFIG_CONFIG48 &
1724 w83795_read(client, W83795_REG_CONFIG)) {
1725 data->chip_type = w83795adg;
1726 } else {
1727 data->chip_type = w83795g;
1728 }
1729#endif
1730
1731 /* Fill in the remaining client fields and put into the global list */
1732 strlcpy(info->type, "w83795", I2C_NAME_SIZE);
1733
1734 return 0;
1735}
1736
1737static int w83795_probe(struct i2c_client *client,
1738 const struct i2c_device_id *id)
1739{
1740 int i;
1741 u8 tmp;
1742 struct device *dev = &client->dev;
1743 struct w83795_data *data;
1744 int err = 0;
1745
1746 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1747 if (!data) {
1748 err = -ENOMEM;
1749 goto exit;
1750 }
1751
1752 i2c_set_clientdata(client, data);
1753 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1754 mutex_init(&data->update_lock);
1755
1756 /* Initialize the chip */
1757 w83795_init_client(client);
1758
1759 /* Check 795 chip type: 795G or 795ADG */
1760 if (W83795_REG_CONFIG_CONFIG48 &
1761 w83795_read(client, W83795_REG_CONFIG)) {
1762 data->chip_type = w83795adg;
1763 } else {
1764 data->chip_type = w83795g;
1765 }
1766
1767 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1);
1768 data->has_in |= w83795_read(client, W83795_REG_VOLT_CTRL2) << 8;
1769 /* VSEN11-9 not for 795adg */
1770 if (data->chip_type == w83795adg)
1771 data->has_in &= 0xf8ff;
1772 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1);
1773 data->has_fan |= w83795_read(client, W83795_REG_FANIN_CTRL2) << 8;
1774
1775 /* VDSEN12-17 and TR1-6, TD1-4 use same register */
1776 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1777 if (tmp & 0x20)
1778 data->enable_dts = 1;
1779 else
1780 data->enable_dts = 0;
1781 data->has_temp = 0;
1782 data->temp_mode = 0;
1783 if (tmp & 0x08) {
1784 if (tmp & 0x04)
1785 data->has_temp |= 0x20;
1786 else
1787 data->has_in |= 0x10000;
1788 }
1789 if (tmp & 0x02) {
1790 if (tmp & 0x01)
1791 data->has_temp |= 0x10;
1792 else
1793 data->has_in |= 0x8000;
1794 }
1795 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1796 if (tmp & 0x40) {
1797 data->has_temp |= 0x08;
1798 if (!(tmp & 0x80))
1799 data->temp_mode |= 0x08;
1800 } else if (tmp & 0x80) {
1801 data->has_in |= 0x100000;
1802 }
1803 if (tmp & 0x10) {
1804 data->has_temp |= 0x04;
1805 if (!(tmp & 0x20))
1806 data->temp_mode |= 0x04;
1807 } else if (tmp & 0x20) {
1808 data->has_in |= 0x80000;
1809 }
1810 if (tmp & 0x04) {
1811 data->has_temp |= 0x02;
1812 if (!(tmp & 0x08))
1813 data->temp_mode |= 0x02;
1814 } else if (tmp & 0x08) {
1815 data->has_in |= 0x40000;
1816 }
1817 if (tmp & 0x01) {
1818 data->has_temp |= 0x01;
1819 if (!(tmp & 0x02))
1820 data->temp_mode |= 0x01;
1821 } else if (tmp & 0x02) {
1822 data->has_in |= 0x20000;
1823 }
1824
1825 /* Check DTS enable status */
1826 if (data->enable_dts == 0) {
1827 data->has_dts = 0;
1828 } else {
1829 if (1 & w83795_read(client, W83795_REG_DTSC))
1830 data->enable_dts |= 2;
1831 data->has_dts = w83795_read(client, W83795_REG_DTSE);
1832 }
1833
1834 /* First update the voltages measured value and limits */
1835 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
1836 if (!(data->has_in & (1 << i)))
1837 continue;
1838 data->in[i][IN_MAX] =
1839 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
1840 data->in[i][IN_LOW] =
1841 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
1842 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
1843 tmp |= (w83795_read(client, W83795_REG_VRLSB)
1844 >> VRLSB_SHIFT) & 0x03;
1845 data->in[i][IN_READ] = tmp;
1846 }
1847 for (i = 0; i < IN_LSB_REG_NUM; i++) {
1848 data->in_lsb[i][IN_MAX] =
1849 w83795_read(client, IN_LSB_REG(i, IN_MAX));
1850 data->in_lsb[i][IN_LOW] =
1851 w83795_read(client, IN_LSB_REG(i, IN_LOW));
1852 }
1853 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
1854
1855 /* First update fan and limits */
1856 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
1857 if (!(data->has_fan & (1 << i)))
1858 continue;
1859 data->fan_min[i] =
1860 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
1861 data->fan_min[i] |=
1862 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i) >>
1863 W83795_REG_FAN_MIN_LSB_SHIFT(i))) & 0x0F;
1864 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
1865 data->fan[i] |=
1866 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
1867 }
1868
1869 /* temperature and limits */
1870 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
1871 if (!(data->has_temp & (1 << i)))
1872 continue;
1873 data->temp[i][TEMP_CRIT] =
1874 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
1875 data->temp[i][TEMP_CRIT_HYST] =
1876 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
1877 data->temp[i][TEMP_WARN] =
1878 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
1879 data->temp[i][TEMP_WARN_HYST] =
1880 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
1881 data->temp[i][TEMP_READ] =
1882 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
1883 data->temp_read_vrlsb[i] =
1884 w83795_read(client, W83795_REG_VRLSB);
1885 }
1886
1887 /* dts temperature and limits */
1888 if (data->enable_dts != 0) {
1889 data->dts_ext[DTS_CRIT] =
1890 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
1891 data->dts_ext[DTS_CRIT_HYST] =
1892 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
1893 data->dts_ext[DTS_WARN] =
1894 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
1895 data->dts_ext[DTS_WARN_HYST] =
1896 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
1897 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
1898 if (!(data->has_dts & (1 << i)))
1899 continue;
1900 data->dts[i] = w83795_read(client, W83795_REG_DTS(i));
1901 data->dts_read_vrlsb[i] =
1902 w83795_read(client, W83795_REG_VRLSB);
1903 }
1904 }
1905
1906 /* First update temp source selction */
1907 for (i = 0; i < 3; i++)
1908 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
1909
1910 /* pwm and smart fan */
1911 if (data->chip_type == w83795g)
1912 data->has_pwm = 8;
1913 else
1914 data->has_pwm = 2;
1915 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
1916 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
1917 /* w83795adg only support pwm2-0 */
1918 for (i = 0; i < W83795_REG_TEMP_NUM; i++)
1919 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
1920 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
1921 for (i = 0; i < data->has_pwm; i++) {
1922 for (tmp = 0; tmp < 5; tmp++) {
1923 data->pwm[i][tmp] =
1924 w83795_read(client, W83795_REG_PWM(i, tmp));
1925 }
1926 }
1927 for (i = 0; i < 8; i++) {
1928 data->target_speed[i] =
1929 w83795_read(client, W83795_REG_FTSH(i)) << 4;
1930 data->target_speed[i] |=
1931 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
1932 }
1933 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
1934
1935 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
1936 data->pwm_temp[i][TEMP_PWM_TTTI] =
1937 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
1938 data->pwm_temp[i][TEMP_PWM_CTFS] =
1939 w83795_read(client, W83795_REG_CTFS(i));
1940 tmp = w83795_read(client, W83795_REG_HT(i));
1941 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
1942 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
1943 }
1944 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
1945 for (tmp = 0; tmp < 7; tmp++) {
1946 data->sf4_reg[i][SF4_TEMP][tmp] =
1947 w83795_read(client,
1948 W83795_REG_SF4_TEMP(i, tmp));
1949 data->sf4_reg[i][SF4_PWM][tmp] =
1950 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
1951 }
1952 }
1953
1954 /* Setup PWM Register */
1955 for (i = 0; i < 3; i++) {
1956 data->setup_pwm[i] =
1957 w83795_read(client, W83795_REG_SETUP_PWM(i));
1958 }
1959
1960 /* alarm and beep */
1961 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) {
1962 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
1963 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
1964 }
1965 data->beep_enable =
1966 (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01;
1967
1968 /* Register sysfs hooks */
1969 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
1970 if (!(data->has_in & (1 << (i / 6))))
1971 continue;
1972 err = device_create_file(dev, &w83795_in[i].dev_attr);
1973 if (err)
1974 goto exit_remove;
1975 }
1976
1977 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
1978 if (!(data->has_fan & (1 << (i / 5))))
1979 continue;
1980 err = device_create_file(dev, &w83795_fan[i].dev_attr);
1981 if (err)
1982 goto exit_remove;
1983 }
1984
1985 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1986 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1987 if (err)
1988 goto exit_remove;
1989 }
1990
1991 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
1992 if (!(data->has_temp & (1 << (i / 29))))
1993 continue;
1994 err = device_create_file(dev, &w83795_temp[i].dev_attr);
1995 if (err)
1996 goto exit_remove;
1997 }
1998
1999 if (data->enable_dts != 0) {
2000 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
2001 if (!(data->has_dts & (1 << (i / 8))))
2002 continue;
2003 err = device_create_file(dev, &w83795_dts[i].dev_attr);
2004 if (err)
2005 goto exit_remove;
2006 }
2007 }
2008
2009 if (data->chip_type == w83795g) {
2010 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++) {
2011 err = device_create_file(dev,
2012 &w83795_left_reg[i].dev_attr);
2013 if (err)
2014 goto exit_remove;
2015 }
2016 }
2017
2018 for (i = 0; i < ARRAY_SIZE(w83795_static); i++) {
2019 err = device_create_file(dev, &w83795_static[i].dev_attr);
2020 if (err)
2021 goto exit_remove;
2022 }
2023
2024 data->hwmon_dev = hwmon_device_register(dev);
2025 if (IS_ERR(data->hwmon_dev)) {
2026 err = PTR_ERR(data->hwmon_dev);
2027 goto exit_remove;
2028 }
2029
2030 return 0;
2031
2032 /* Unregister sysfs hooks */
2033exit_remove:
2034 for (i = 0; i < ARRAY_SIZE(w83795_in); i++)
2035 device_remove_file(dev, &w83795_in[i].dev_attr);
2036
2037 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++)
2038 device_remove_file(dev, &w83795_fan[i].dev_attr);
2039
2040 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
2041 device_remove_file(dev, &sda_single_files[i].dev_attr);
2042
2043 if (data->chip_type == w83795g) {
2044 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++)
2045 device_remove_file(dev, &w83795_left_reg[i].dev_attr);
2046 }
2047
2048 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++)
2049 device_remove_file(dev, &w83795_temp[i].dev_attr);
2050
2051 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++)
2052 device_remove_file(dev, &w83795_dts[i].dev_attr);
2053
2054 for (i = 0; i < ARRAY_SIZE(w83795_static); i++)
2055 device_remove_file(dev, &w83795_static[i].dev_attr);
2056
2057 kfree(data);
2058exit:
2059 return err;
2060}
2061
2062static int w83795_remove(struct i2c_client *client)
2063{
2064 struct w83795_data *data = i2c_get_clientdata(client);
2065 struct device *dev = &client->dev;
2066 int i;
2067
2068 hwmon_device_unregister(data->hwmon_dev);
2069
2070 for (i = 0; i < ARRAY_SIZE(w83795_in); i++)
2071 device_remove_file(dev, &w83795_in[i].dev_attr);
2072
2073 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++)
2074 device_remove_file(dev, &w83795_fan[i].dev_attr);
2075
2076 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
2077 device_remove_file(dev, &sda_single_files[i].dev_attr);
2078
2079 if (data->chip_type == w83795g) {
2080 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++)
2081 device_remove_file(dev, &w83795_left_reg[i].dev_attr);
2082 }
2083
2084 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++)
2085 device_remove_file(dev, &w83795_temp[i].dev_attr);
2086
2087 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++)
2088 device_remove_file(dev, &w83795_dts[i].dev_attr);
2089
2090 for (i = 0; i < ARRAY_SIZE(w83795_static); i++)
2091 device_remove_file(dev, &w83795_static[i].dev_attr);
2092
2093 kfree(data);
2094
2095 return 0;
2096}
2097
2098
2099static const struct i2c_device_id w83795_id[] = {
2100 { "w83795", w83795 },
2101 { }
2102};
2103MODULE_DEVICE_TABLE(i2c, w83795_id);
2104
2105static struct i2c_driver w83795_driver = {
2106 .driver = {
2107 .name = "w83795",
2108 },
2109 .probe = w83795_probe,
2110 .remove = w83795_remove,
2111 .id_table = w83795_id,
2112
2113 .class = I2C_CLASS_HWMON,
2114 .detect = w83795_detect,
2115 .address_list = normal_i2c,
2116};
2117
2118static int __init sensors_w83795_init(void)
2119{
2120 return i2c_add_driver(&w83795_driver);
2121}
2122
2123static void __exit sensors_w83795_exit(void)
2124{
2125 i2c_del_driver(&w83795_driver);
2126}
2127
2128MODULE_AUTHOR("Wei Song");
315bacfd 2129MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
792d376b
WS		 2130MODULE_LICENSE("GPL");
2131
2132module_init(sensors_w83795_init);
2133module_exit(sensors_w83795_exit);
Linux 6.x block layer and io_uring tree(s)