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ff7924b0 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
792d376b WS |
2 | /* |
3 | * w83795.c - Linux kernel driver for hardware monitoring | |
4 | * Copyright (C) 2008 Nuvoton Technology Corp. | |
5 | * Wei Song | |
7c81c60f | 6 | * Copyright (C) 2010 Jean Delvare <jdelvare@suse.de> |
792d376b | 7 | * |
792d376b WS |
8 | * Supports following chips: |
9 | * | |
10 | * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA | |
11 | * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no | |
12 | * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/hwmon.h> | |
21 | #include <linux/hwmon-sysfs.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/mutex.h> | |
dcd8f392 | 24 | #include <linux/jiffies.h> |
cdb1dc3f | 25 | #include <linux/util_macros.h> |
792d376b WS |
26 | |
27 | /* Addresses to scan */ | |
86ef4d2f JD |
28 | static const unsigned short normal_i2c[] = { |
29 | 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END | |
30 | }; | |
792d376b | 31 | |
792d376b | 32 | |
90ab5ee9 | 33 | static bool reset; |
792d376b WS |
34 | module_param(reset, bool, 0); |
35 | MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); | |
36 | ||
37 | ||
38 | #define W83795_REG_BANKSEL 0x00 | |
39 | #define W83795_REG_VENDORID 0xfd | |
40 | #define W83795_REG_CHIPID 0xfe | |
41 | #define W83795_REG_DEVICEID 0xfb | |
2be381de | 42 | #define W83795_REG_DEVICEID_A 0xff |
792d376b WS |
43 | |
44 | #define W83795_REG_I2C_ADDR 0xfc | |
45 | #define W83795_REG_CONFIG 0x01 | |
46 | #define W83795_REG_CONFIG_CONFIG48 0x04 | |
80646b95 | 47 | #define W83795_REG_CONFIG_START 0x01 |
792d376b WS |
48 | |
49 | /* Multi-Function Pin Ctrl Registers */ | |
50 | #define W83795_REG_VOLT_CTRL1 0x02 | |
51 | #define W83795_REG_VOLT_CTRL2 0x03 | |
52 | #define W83795_REG_TEMP_CTRL1 0x04 | |
53 | #define W83795_REG_TEMP_CTRL2 0x05 | |
54 | #define W83795_REG_FANIN_CTRL1 0x06 | |
55 | #define W83795_REG_FANIN_CTRL2 0x07 | |
56 | #define W83795_REG_VMIGB_CTRL 0x08 | |
57 | ||
792d376b WS |
58 | #define TEMP_READ 0 |
59 | #define TEMP_CRIT 1 | |
60 | #define TEMP_CRIT_HYST 2 | |
61 | #define TEMP_WARN 3 | |
62 | #define TEMP_WARN_HYST 4 | |
c10b3ee8 GR |
63 | /* |
64 | * only crit and crit_hyst affect real-time alarm status | |
65 | * current crit crit_hyst warn warn_hyst | |
66 | */ | |
86ef4d2f | 67 | static const u16 W83795_REG_TEMP[][5] = { |
792d376b WS |
68 | {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ |
69 | {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ | |
70 | {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ | |
71 | {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ | |
72 | {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ | |
73 | {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ | |
74 | }; | |
75 | ||
76 | #define IN_READ 0 | |
77 | #define IN_MAX 1 | |
78 | #define IN_LOW 2 | |
79 | static const u16 W83795_REG_IN[][3] = { | |
80 | /* Current, HL, LL */ | |
81 | {0x10, 0x70, 0x71}, /* VSEN1 */ | |
82 | {0x11, 0x72, 0x73}, /* VSEN2 */ | |
83 | {0x12, 0x74, 0x75}, /* VSEN3 */ | |
84 | {0x13, 0x76, 0x77}, /* VSEN4 */ | |
85 | {0x14, 0x78, 0x79}, /* VSEN5 */ | |
86 | {0x15, 0x7a, 0x7b}, /* VSEN6 */ | |
87 | {0x16, 0x7c, 0x7d}, /* VSEN7 */ | |
88 | {0x17, 0x7e, 0x7f}, /* VSEN8 */ | |
89 | {0x18, 0x80, 0x81}, /* VSEN9 */ | |
90 | {0x19, 0x82, 0x83}, /* VSEN10 */ | |
91 | {0x1A, 0x84, 0x85}, /* VSEN11 */ | |
92 | {0x1B, 0x86, 0x87}, /* VTT */ | |
93 | {0x1C, 0x88, 0x89}, /* 3VDD */ | |
94 | {0x1D, 0x8a, 0x8b}, /* 3VSB */ | |
95 | {0x1E, 0x8c, 0x8d}, /* VBAT */ | |
96 | {0x1F, 0xa6, 0xa7}, /* VSEN12 */ | |
97 | {0x20, 0xaa, 0xab}, /* VSEN13 */ | |
98 | {0x21, 0x96, 0x97}, /* VSEN14 */ | |
99 | {0x22, 0x9a, 0x9b}, /* VSEN15 */ | |
100 | {0x23, 0x9e, 0x9f}, /* VSEN16 */ | |
101 | {0x24, 0xa2, 0xa3}, /* VSEN17 */ | |
102 | }; | |
103 | #define W83795_REG_VRLSB 0x3C | |
792d376b WS |
104 | |
105 | static const u8 W83795_REG_IN_HL_LSB[] = { | |
106 | 0x8e, /* VSEN1-4 */ | |
107 | 0x90, /* VSEN5-8 */ | |
108 | 0x92, /* VSEN9-11 */ | |
109 | 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ | |
110 | 0xa8, /* VSEN12 */ | |
111 | 0xac, /* VSEN13 */ | |
112 | 0x98, /* VSEN14 */ | |
113 | 0x9c, /* VSEN15 */ | |
114 | 0xa0, /* VSEN16 */ | |
115 | 0xa4, /* VSEN17 */ | |
116 | }; | |
117 | ||
118 | #define IN_LSB_REG(index, type) \ | |
119 | (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ | |
120 | : (W83795_REG_IN_HL_LSB[(index)] + 1)) | |
121 | ||
792d376b WS |
122 | #define IN_LSB_SHIFT 0 |
123 | #define IN_LSB_IDX 1 | |
124 | static const u8 IN_LSB_SHIFT_IDX[][2] = { | |
125 | /* High/Low LSB shift, LSB No. */ | |
126 | {0x00, 0x00}, /* VSEN1 */ | |
127 | {0x02, 0x00}, /* VSEN2 */ | |
128 | {0x04, 0x00}, /* VSEN3 */ | |
129 | {0x06, 0x00}, /* VSEN4 */ | |
130 | {0x00, 0x01}, /* VSEN5 */ | |
131 | {0x02, 0x01}, /* VSEN6 */ | |
132 | {0x04, 0x01}, /* VSEN7 */ | |
133 | {0x06, 0x01}, /* VSEN8 */ | |
134 | {0x00, 0x02}, /* VSEN9 */ | |
135 | {0x02, 0x02}, /* VSEN10 */ | |
136 | {0x04, 0x02}, /* VSEN11 */ | |
137 | {0x00, 0x03}, /* VTT */ | |
138 | {0x02, 0x03}, /* 3VDD */ | |
139 | {0x04, 0x03}, /* 3VSB */ | |
140 | {0x06, 0x03}, /* VBAT */ | |
141 | {0x06, 0x04}, /* VSEN12 */ | |
142 | {0x06, 0x05}, /* VSEN13 */ | |
143 | {0x06, 0x06}, /* VSEN14 */ | |
144 | {0x06, 0x07}, /* VSEN15 */ | |
145 | {0x06, 0x08}, /* VSEN16 */ | |
146 | {0x06, 0x09}, /* VSEN17 */ | |
147 | }; | |
148 | ||
149 | ||
792d376b WS |
150 | #define W83795_REG_FAN(index) (0x2E + (index)) |
151 | #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) | |
152 | #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) | |
153 | #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ | |
7eb8d508 | 154 | (((index) & 1) ? 4 : 0) |
792d376b WS |
155 | |
156 | #define W83795_REG_VID_CTRL 0x6A | |
157 | ||
cf6b9ea6 JD |
158 | #define W83795_REG_ALARM_CTRL 0x40 |
159 | #define ALARM_CTRL_RTSACS (1 << 7) | |
792d376b | 160 | #define W83795_REG_ALARM(index) (0x41 + (index)) |
792d376b | 161 | #define W83795_REG_CLR_CHASSIS 0x4D |
cf6b9ea6 | 162 | #define W83795_REG_BEEP(index) (0x50 + (index)) |
792d376b | 163 | |
52d159ee JD |
164 | #define W83795_REG_OVT_CFG 0x58 |
165 | #define OVT_CFG_SEL (1 << 7) | |
166 | ||
792d376b | 167 | |
792d376b WS |
168 | #define W83795_REG_FCMS1 0x201 |
169 | #define W83795_REG_FCMS2 0x208 | |
170 | #define W83795_REG_TFMR(index) (0x202 + (index)) | |
171 | #define W83795_REG_FOMC 0x20F | |
792d376b WS |
172 | |
173 | #define W83795_REG_TSS(index) (0x209 + (index)) | |
174 | ||
edff2f8d JD |
175 | #define TSS_MAP_RESERVED 0xff |
176 | static const u8 tss_map[4][6] = { | |
177 | { 0, 1, 2, 3, 4, 5}, | |
178 | { 6, 7, 8, 9, 0, 1}, | |
179 | {10, 11, 12, 13, 2, 3}, | |
180 | { 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED}, | |
181 | }; | |
182 | ||
792d376b | 183 | #define PWM_OUTPUT 0 |
fd7f82b8 JD |
184 | #define PWM_FREQ 1 |
185 | #define PWM_START 2 | |
186 | #define PWM_NONSTOP 3 | |
187 | #define PWM_STOP_TIME 4 | |
188 | #define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index)) | |
792d376b | 189 | |
792d376b WS |
190 | #define W83795_REG_FTSH(index) (0x240 + (index) * 2) |
191 | #define W83795_REG_FTSL(index) (0x241 + (index) * 2) | |
192 | #define W83795_REG_TFTS 0x250 | |
193 | ||
194 | #define TEMP_PWM_TTTI 0 | |
195 | #define TEMP_PWM_CTFS 1 | |
196 | #define TEMP_PWM_HCT 2 | |
197 | #define TEMP_PWM_HOT 3 | |
198 | #define W83795_REG_TTTI(index) (0x260 + (index)) | |
199 | #define W83795_REG_CTFS(index) (0x268 + (index)) | |
200 | #define W83795_REG_HT(index) (0x270 + (index)) | |
201 | ||
202 | #define SF4_TEMP 0 | |
203 | #define SF4_PWM 1 | |
204 | #define W83795_REG_SF4_TEMP(temp_num, index) \ | |
205 | (0x280 + 0x10 * (temp_num) + (index)) | |
206 | #define W83795_REG_SF4_PWM(temp_num, index) \ | |
207 | (0x288 + 0x10 * (temp_num) + (index)) | |
208 | ||
209 | #define W83795_REG_DTSC 0x301 | |
210 | #define W83795_REG_DTSE 0x302 | |
211 | #define W83795_REG_DTS(index) (0x26 + (index)) | |
54891a3c | 212 | #define W83795_REG_PECI_TBASE(index) (0x320 + (index)) |
792d376b WS |
213 | |
214 | #define DTS_CRIT 0 | |
215 | #define DTS_CRIT_HYST 1 | |
216 | #define DTS_WARN 2 | |
217 | #define DTS_WARN_HYST 3 | |
218 | #define W83795_REG_DTS_EXT(index) (0xB2 + (index)) | |
219 | ||
220 | #define SETUP_PWM_DEFAULT 0 | |
221 | #define SETUP_PWM_UPTIME 1 | |
222 | #define SETUP_PWM_DOWNTIME 2 | |
223 | #define W83795_REG_SETUP_PWM(index) (0x20C + (index)) | |
224 | ||
225 | static inline u16 in_from_reg(u8 index, u16 val) | |
226 | { | |
49c7347a JD |
227 | /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */ |
228 | if (index >= 12 && index <= 14) | |
792d376b WS |
229 | return val * 6; |
230 | else | |
231 | return val * 2; | |
232 | } | |
233 | ||
234 | static inline u16 in_to_reg(u8 index, u16 val) | |
235 | { | |
49c7347a | 236 | if (index >= 12 && index <= 14) |
792d376b WS |
237 | return val / 6; |
238 | else | |
239 | return val / 2; | |
240 | } | |
241 | ||
242 | static inline unsigned long fan_from_reg(u16 val) | |
243 | { | |
6c82b2f3 | 244 | if ((val == 0xfff) || (val == 0)) |
792d376b WS |
245 | return 0; |
246 | return 1350000UL / val; | |
247 | } | |
248 | ||
249 | static inline u16 fan_to_reg(long rpm) | |
250 | { | |
251 | if (rpm <= 0) | |
252 | return 0x0fff; | |
2a844c14 | 253 | return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); |
792d376b WS |
254 | } |
255 | ||
256 | static inline unsigned long time_from_reg(u8 reg) | |
257 | { | |
258 | return reg * 100; | |
259 | } | |
260 | ||
261 | static inline u8 time_to_reg(unsigned long val) | |
262 | { | |
2a844c14 | 263 | return clamp_val((val + 50) / 100, 0, 0xff); |
792d376b WS |
264 | } |
265 | ||
266 | static inline long temp_from_reg(s8 reg) | |
267 | { | |
268 | return reg * 1000; | |
269 | } | |
270 | ||
271 | static inline s8 temp_to_reg(long val, s8 min, s8 max) | |
272 | { | |
2a844c14 | 273 | return clamp_val(val / 1000, min, max); |
792d376b WS |
274 | } |
275 | ||
01879a85 JD |
276 | static const u16 pwm_freq_cksel0[16] = { |
277 | 1024, 512, 341, 256, 205, 171, 146, 128, | |
278 | 85, 64, 32, 16, 8, 4, 2, 1 | |
279 | }; | |
280 | ||
281 | static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin) | |
282 | { | |
283 | unsigned long base_clock; | |
284 | ||
285 | if (reg & 0x80) { | |
286 | base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); | |
287 | return base_clock / ((reg & 0x7f) + 1); | |
288 | } else | |
289 | return pwm_freq_cksel0[reg & 0x0f]; | |
290 | } | |
291 | ||
292 | static u8 pwm_freq_to_reg(unsigned long val, u16 clkin) | |
293 | { | |
294 | unsigned long base_clock; | |
295 | u8 reg0, reg1; | |
296 | unsigned long best0, best1; | |
297 | ||
298 | /* Best fit for cksel = 0 */ | |
cdb1dc3f BG |
299 | reg0 = find_closest_descending(val, pwm_freq_cksel0, |
300 | ARRAY_SIZE(pwm_freq_cksel0)); | |
01879a85 JD |
301 | if (val < 375) /* cksel = 1 can't beat this */ |
302 | return reg0; | |
303 | best0 = pwm_freq_cksel0[reg0]; | |
304 | ||
305 | /* Best fit for cksel = 1 */ | |
306 | base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); | |
2a844c14 | 307 | reg1 = clamp_val(DIV_ROUND_CLOSEST(base_clock, val), 1, 128); |
01879a85 JD |
308 | best1 = base_clock / reg1; |
309 | reg1 = 0x80 | (reg1 - 1); | |
310 | ||
311 | /* Choose the closest one */ | |
312 | if (abs(val - best0) > abs(val - best1)) | |
313 | return reg1; | |
314 | else | |
315 | return reg0; | |
316 | } | |
792d376b WS |
317 | |
318 | enum chip_types {w83795g, w83795adg}; | |
319 | ||
320 | struct w83795_data { | |
321 | struct device *hwmon_dev; | |
322 | struct mutex update_lock; | |
323 | unsigned long last_updated; /* In jiffies */ | |
324 | enum chip_types chip_type; | |
325 | ||
326 | u8 bank; | |
327 | ||
328 | u32 has_in; /* Enable monitor VIN or not */ | |
0e256018 | 329 | u8 has_dyn_in; /* Only in2-0 can have this */ |
792d376b WS |
330 | u16 in[21][3]; /* Register value, read/high/low */ |
331 | u8 in_lsb[10][3]; /* LSB Register value, high/low */ | |
332 | u8 has_gain; /* has gain: in17-20 * 8 */ | |
333 | ||
334 | u16 has_fan; /* Enable fan14-1 or not */ | |
335 | u16 fan[14]; /* Register value combine */ | |
336 | u16 fan_min[14]; /* Register value combine */ | |
337 | ||
338 | u8 has_temp; /* Enable monitor temp6-1 or not */ | |
dd127f5c | 339 | s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ |
792d376b | 340 | u8 temp_read_vrlsb[6]; |
39deb699 | 341 | u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */ |
792d376b WS |
342 | u8 temp_src[3]; /* Register value */ |
343 | ||
c10b3ee8 GR |
344 | u8 enable_dts; /* |
345 | * Enable PECI and SB-TSI, | |
792d376b | 346 | * bit 0: =1 enable, =0 disable, |
c10b3ee8 GR |
347 | * bit 1: =1 AMD SB-TSI, =0 Intel PECI |
348 | */ | |
792d376b | 349 | u8 has_dts; /* Enable monitor DTS temp */ |
dd127f5c | 350 | s8 dts[8]; /* Register value */ |
792d376b | 351 | u8 dts_read_vrlsb[8]; /* Register value */ |
dd127f5c | 352 | s8 dts_ext[4]; /* Register value */ |
792d376b | 353 | |
c10b3ee8 GR |
354 | u8 has_pwm; /* |
355 | * 795g supports 8 pwm, 795adg only supports 2, | |
792d376b | 356 | * no config register, only affected by chip |
c10b3ee8 GR |
357 | * type |
358 | */ | |
359 | u8 pwm[8][5]; /* | |
360 | * Register value, output, freq, start, | |
361 | * non stop, stop time | |
362 | */ | |
01879a85 | 363 | u16 clkin; /* CLKIN frequency in kHz */ |
792d376b WS |
364 | u8 pwm_fcms[2]; /* Register value */ |
365 | u8 pwm_tfmr[6]; /* Register value */ | |
366 | u8 pwm_fomc; /* Register value */ | |
367 | ||
c10b3ee8 GR |
368 | u16 target_speed[8]; /* |
369 | * Register value, target speed for speed | |
370 | * cruise | |
371 | */ | |
792d376b WS |
372 | u8 tol_speed; /* tolerance of target speed */ |
373 | u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ | |
374 | u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ | |
375 | ||
376 | u8 setup_pwm[3]; /* Register value */ | |
377 | ||
378 | u8 alarms[6]; /* Register value */ | |
52d159ee | 379 | u8 enable_beep; |
792d376b | 380 | u8 beeps[6]; /* Register value */ |
792d376b | 381 | |
952a11ca | 382 | bool valid; |
2ae61de9 | 383 | char valid_limits; |
1bb3450c | 384 | char valid_pwm_config; |
792d376b WS |
385 | }; |
386 | ||
387 | /* | |
388 | * Hardware access | |
b2469f42 | 389 | * We assume that nobdody can change the bank outside the driver. |
792d376b WS |
390 | */ |
391 | ||
b2469f42 JD |
392 | /* Must be called with data->update_lock held, except during initialization */ |
393 | static int w83795_set_bank(struct i2c_client *client, u8 bank) | |
792d376b WS |
394 | { |
395 | struct w83795_data *data = i2c_get_clientdata(client); | |
b2469f42 JD |
396 | int err; |
397 | ||
398 | /* If the same bank is already set, nothing to do */ | |
399 | if ((data->bank & 0x07) == bank) | |
400 | return 0; | |
401 | ||
402 | /* Change to new bank, preserve all other bits */ | |
403 | bank |= data->bank & ~0x07; | |
404 | err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); | |
405 | if (err < 0) { | |
406 | dev_err(&client->dev, | |
407 | "Failed to set bank to %d, err %d\n", | |
408 | (int)bank, err); | |
409 | return err; | |
792d376b | 410 | } |
b2469f42 JD |
411 | data->bank = bank; |
412 | ||
413 | return 0; | |
792d376b WS |
414 | } |
415 | ||
416 | /* Must be called with data->update_lock held, except during initialization */ | |
b2469f42 | 417 | static u8 w83795_read(struct i2c_client *client, u16 reg) |
792d376b | 418 | { |
b2469f42 JD |
419 | int err; |
420 | ||
421 | err = w83795_set_bank(client, reg >> 8); | |
422 | if (err < 0) | |
423 | return 0x00; /* Arbitrary */ | |
424 | ||
425 | err = i2c_smbus_read_byte_data(client, reg & 0xff); | |
426 | if (err < 0) { | |
427 | dev_err(&client->dev, | |
428 | "Failed to read from register 0x%03x, err %d\n", | |
429 | (int)reg, err); | |
430 | return 0x00; /* Arbitrary */ | |
792d376b | 431 | } |
b2469f42 JD |
432 | return err; |
433 | } | |
792d376b | 434 | |
b2469f42 JD |
435 | /* Must be called with data->update_lock held, except during initialization */ |
436 | static int w83795_write(struct i2c_client *client, u16 reg, u8 value) | |
437 | { | |
438 | int err; | |
439 | ||
440 | err = w83795_set_bank(client, reg >> 8); | |
441 | if (err < 0) | |
442 | return err; | |
443 | ||
444 | err = i2c_smbus_write_byte_data(client, reg & 0xff, value); | |
445 | if (err < 0) | |
446 | dev_err(&client->dev, | |
447 | "Failed to write to register 0x%03x, err %d\n", | |
448 | (int)reg, err); | |
449 | return err; | |
792d376b WS |
450 | } |
451 | ||
0d7237bf JD |
452 | static void w83795_update_limits(struct i2c_client *client) |
453 | { | |
454 | struct w83795_data *data = i2c_get_clientdata(client); | |
455 | int i, limit; | |
014bcd28 | 456 | u8 lsb; |
0d7237bf JD |
457 | |
458 | /* Read the voltage limits */ | |
459 | for (i = 0; i < ARRAY_SIZE(data->in); i++) { | |
460 | if (!(data->has_in & (1 << i))) | |
461 | continue; | |
462 | data->in[i][IN_MAX] = | |
463 | w83795_read(client, W83795_REG_IN[i][IN_MAX]); | |
464 | data->in[i][IN_LOW] = | |
465 | w83795_read(client, W83795_REG_IN[i][IN_LOW]); | |
466 | } | |
467 | for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) { | |
468 | if ((i == 2 && data->chip_type == w83795adg) || | |
469 | (i >= 4 && !(data->has_in & (1 << (i + 11))))) | |
470 | continue; | |
471 | data->in_lsb[i][IN_MAX] = | |
472 | w83795_read(client, IN_LSB_REG(i, IN_MAX)); | |
473 | data->in_lsb[i][IN_LOW] = | |
474 | w83795_read(client, IN_LSB_REG(i, IN_LOW)); | |
475 | } | |
476 | ||
477 | /* Read the fan limits */ | |
014bcd28 | 478 | lsb = 0; /* Silent false gcc warning */ |
0d7237bf | 479 | for (i = 0; i < ARRAY_SIZE(data->fan); i++) { |
c10b3ee8 GR |
480 | /* |
481 | * Each register contains LSB for 2 fans, but we want to | |
482 | * read it only once to save time | |
483 | */ | |
0d7237bf JD |
484 | if ((i & 1) == 0 && (data->has_fan & (3 << i))) |
485 | lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i)); | |
486 | ||
487 | if (!(data->has_fan & (1 << i))) | |
488 | continue; | |
489 | data->fan_min[i] = | |
490 | w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; | |
491 | data->fan_min[i] |= | |
492 | (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F; | |
493 | } | |
494 | ||
495 | /* Read the temperature limits */ | |
496 | for (i = 0; i < ARRAY_SIZE(data->temp); i++) { | |
497 | if (!(data->has_temp & (1 << i))) | |
498 | continue; | |
499 | for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++) | |
500 | data->temp[i][limit] = | |
501 | w83795_read(client, W83795_REG_TEMP[i][limit]); | |
502 | } | |
503 | ||
504 | /* Read the DTS limits */ | |
eb02755a | 505 | if (data->enable_dts) { |
0d7237bf JD |
506 | for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++) |
507 | data->dts_ext[limit] = | |
508 | w83795_read(client, W83795_REG_DTS_EXT(limit)); | |
509 | } | |
510 | ||
511 | /* Read beep settings */ | |
52d159ee JD |
512 | if (data->enable_beep) { |
513 | for (i = 0; i < ARRAY_SIZE(data->beeps); i++) | |
514 | data->beeps[i] = | |
515 | w83795_read(client, W83795_REG_BEEP(i)); | |
516 | } | |
2ae61de9 JD |
517 | |
518 | data->valid_limits = 1; | |
0d7237bf JD |
519 | } |
520 | ||
1bb3450c | 521 | static struct w83795_data *w83795_update_pwm_config(struct device *dev) |
0d7237bf | 522 | { |
1bb3450c | 523 | struct i2c_client *client = to_i2c_client(dev); |
0d7237bf JD |
524 | struct w83795_data *data = i2c_get_clientdata(client); |
525 | int i, tmp; | |
526 | ||
1bb3450c JD |
527 | mutex_lock(&data->update_lock); |
528 | ||
529 | if (data->valid_pwm_config) | |
530 | goto END; | |
531 | ||
0d7237bf JD |
532 | /* Read temperature source selection */ |
533 | for (i = 0; i < ARRAY_SIZE(data->temp_src); i++) | |
534 | data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); | |
535 | ||
536 | /* Read automatic fan speed control settings */ | |
537 | data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); | |
538 | data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); | |
539 | for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++) | |
540 | data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); | |
541 | data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); | |
542 | for (i = 0; i < data->has_pwm; i++) { | |
543 | for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++) | |
544 | data->pwm[i][tmp] = | |
545 | w83795_read(client, W83795_REG_PWM(i, tmp)); | |
546 | } | |
547 | for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) { | |
548 | data->target_speed[i] = | |
549 | w83795_read(client, W83795_REG_FTSH(i)) << 4; | |
550 | data->target_speed[i] |= | |
551 | w83795_read(client, W83795_REG_FTSL(i)) >> 4; | |
552 | } | |
553 | data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; | |
554 | ||
555 | for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) { | |
556 | data->pwm_temp[i][TEMP_PWM_TTTI] = | |
557 | w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; | |
558 | data->pwm_temp[i][TEMP_PWM_CTFS] = | |
559 | w83795_read(client, W83795_REG_CTFS(i)); | |
560 | tmp = w83795_read(client, W83795_REG_HT(i)); | |
eb02755a | 561 | data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4; |
0d7237bf JD |
562 | data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; |
563 | } | |
564 | ||
565 | /* Read SmartFanIV trip points */ | |
566 | for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) { | |
567 | for (tmp = 0; tmp < 7; tmp++) { | |
568 | data->sf4_reg[i][SF4_TEMP][tmp] = | |
569 | w83795_read(client, | |
570 | W83795_REG_SF4_TEMP(i, tmp)); | |
571 | data->sf4_reg[i][SF4_PWM][tmp] = | |
572 | w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); | |
573 | } | |
574 | } | |
575 | ||
576 | /* Read setup PWM */ | |
577 | for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++) | |
578 | data->setup_pwm[i] = | |
579 | w83795_read(client, W83795_REG_SETUP_PWM(i)); | |
1bb3450c JD |
580 | |
581 | data->valid_pwm_config = 1; | |
582 | ||
583 | END: | |
584 | mutex_unlock(&data->update_lock); | |
585 | return data; | |
0d7237bf JD |
586 | } |
587 | ||
792d376b WS |
588 | static struct w83795_data *w83795_update_device(struct device *dev) |
589 | { | |
590 | struct i2c_client *client = to_i2c_client(dev); | |
591 | struct w83795_data *data = i2c_get_clientdata(client); | |
592 | u16 tmp; | |
cf6b9ea6 | 593 | u8 intrusion; |
792d376b WS |
594 | int i; |
595 | ||
596 | mutex_lock(&data->update_lock); | |
597 | ||
2ae61de9 JD |
598 | if (!data->valid_limits) |
599 | w83795_update_limits(client); | |
600 | ||
792d376b WS |
601 | if (!(time_after(jiffies, data->last_updated + HZ * 2) |
602 | || !data->valid)) | |
603 | goto END; | |
604 | ||
605 | /* Update the voltages value */ | |
606 | for (i = 0; i < ARRAY_SIZE(data->in); i++) { | |
607 | if (!(data->has_in & (1 << i))) | |
608 | continue; | |
609 | tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; | |
a654b9d4 | 610 | tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6; |
792d376b WS |
611 | data->in[i][IN_READ] = tmp; |
612 | } | |
613 | ||
0e256018 JD |
614 | /* in0-2 can have dynamic limits (W83795G only) */ |
615 | if (data->has_dyn_in) { | |
616 | u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX)); | |
617 | u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW)); | |
618 | ||
619 | for (i = 0; i < 3; i++) { | |
620 | if (!(data->has_dyn_in & (1 << i))) | |
621 | continue; | |
622 | data->in[i][IN_MAX] = | |
623 | w83795_read(client, W83795_REG_IN[i][IN_MAX]); | |
624 | data->in[i][IN_LOW] = | |
625 | w83795_read(client, W83795_REG_IN[i][IN_LOW]); | |
626 | data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03; | |
627 | data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03; | |
628 | } | |
629 | } | |
630 | ||
792d376b WS |
631 | /* Update fan */ |
632 | for (i = 0; i < ARRAY_SIZE(data->fan); i++) { | |
633 | if (!(data->has_fan & (1 << i))) | |
634 | continue; | |
635 | data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; | |
eb02755a | 636 | data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4; |
792d376b WS |
637 | } |
638 | ||
639 | /* Update temperature */ | |
640 | for (i = 0; i < ARRAY_SIZE(data->temp); i++) { | |
792d376b WS |
641 | data->temp[i][TEMP_READ] = |
642 | w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); | |
643 | data->temp_read_vrlsb[i] = | |
644 | w83795_read(client, W83795_REG_VRLSB); | |
645 | } | |
646 | ||
647 | /* Update dts temperature */ | |
eb02755a | 648 | if (data->enable_dts) { |
792d376b WS |
649 | for (i = 0; i < ARRAY_SIZE(data->dts); i++) { |
650 | if (!(data->has_dts & (1 << i))) | |
651 | continue; | |
652 | data->dts[i] = | |
653 | w83795_read(client, W83795_REG_DTS(i)); | |
654 | data->dts_read_vrlsb[i] = | |
655 | w83795_read(client, W83795_REG_VRLSB); | |
656 | } | |
657 | } | |
658 | ||
659 | /* Update pwm output */ | |
660 | for (i = 0; i < data->has_pwm; i++) { | |
661 | data->pwm[i][PWM_OUTPUT] = | |
662 | w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); | |
663 | } | |
664 | ||
c10b3ee8 GR |
665 | /* |
666 | * Update intrusion and alarms | |
cf6b9ea6 | 667 | * It is important to read intrusion first, because reading from |
c10b3ee8 GR |
668 | * register SMI STS6 clears the interrupt status temporarily. |
669 | */ | |
cf6b9ea6 JD |
670 | tmp = w83795_read(client, W83795_REG_ALARM_CTRL); |
671 | /* Switch to interrupt status for intrusion if needed */ | |
672 | if (tmp & ALARM_CTRL_RTSACS) | |
673 | w83795_write(client, W83795_REG_ALARM_CTRL, | |
674 | tmp & ~ALARM_CTRL_RTSACS); | |
675 | intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6); | |
676 | /* Switch to real-time alarms */ | |
677 | w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS); | |
cd316df5 | 678 | for (i = 0; i < ARRAY_SIZE(data->alarms); i++) |
792d376b | 679 | data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); |
cf6b9ea6 JD |
680 | data->alarms[5] |= intrusion; |
681 | /* Restore original configuration if needed */ | |
682 | if (!(tmp & ALARM_CTRL_RTSACS)) | |
683 | w83795_write(client, W83795_REG_ALARM_CTRL, | |
684 | tmp & ~ALARM_CTRL_RTSACS); | |
792d376b WS |
685 | |
686 | data->last_updated = jiffies; | |
952a11ca | 687 | data->valid = true; |
792d376b WS |
688 | |
689 | END: | |
690 | mutex_unlock(&data->update_lock); | |
691 | return data; | |
692 | } | |
693 | ||
694 | /* | |
695 | * Sysfs attributes | |
696 | */ | |
697 | ||
698 | #define ALARM_STATUS 0 | |
699 | #define BEEP_ENABLE 1 | |
700 | static ssize_t | |
701 | show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) | |
702 | { | |
703 | struct w83795_data *data = w83795_update_device(dev); | |
704 | struct sensor_device_attribute_2 *sensor_attr = | |
705 | to_sensor_dev_attr_2(attr); | |
706 | int nr = sensor_attr->nr; | |
707 | int index = sensor_attr->index >> 3; | |
708 | int bit = sensor_attr->index & 0x07; | |
709 | u8 val; | |
710 | ||
eb02755a JD |
711 | if (nr == ALARM_STATUS) |
712 | val = (data->alarms[index] >> bit) & 1; | |
713 | else /* BEEP_ENABLE */ | |
714 | val = (data->beeps[index] >> bit) & 1; | |
792d376b WS |
715 | |
716 | return sprintf(buf, "%u\n", val); | |
717 | } | |
718 | ||
719 | static ssize_t | |
720 | store_beep(struct device *dev, struct device_attribute *attr, | |
721 | const char *buf, size_t count) | |
722 | { | |
723 | struct i2c_client *client = to_i2c_client(dev); | |
724 | struct w83795_data *data = i2c_get_clientdata(client); | |
725 | struct sensor_device_attribute_2 *sensor_attr = | |
726 | to_sensor_dev_attr_2(attr); | |
727 | int index = sensor_attr->index >> 3; | |
728 | int shift = sensor_attr->index & 0x07; | |
729 | u8 beep_bit = 1 << shift; | |
730 | unsigned long val; | |
731 | ||
179c4fdb | 732 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b WS |
733 | return -EINVAL; |
734 | if (val != 0 && val != 1) | |
735 | return -EINVAL; | |
736 | ||
737 | mutex_lock(&data->update_lock); | |
738 | data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); | |
739 | data->beeps[index] &= ~beep_bit; | |
740 | data->beeps[index] |= val << shift; | |
741 | w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); | |
742 | mutex_unlock(&data->update_lock); | |
743 | ||
744 | return count; | |
745 | } | |
746 | ||
24377101 | 747 | /* Write 0 to clear chassis alarm */ |
792d376b WS |
748 | static ssize_t |
749 | store_chassis_clear(struct device *dev, | |
750 | struct device_attribute *attr, const char *buf, | |
751 | size_t count) | |
752 | { | |
753 | struct i2c_client *client = to_i2c_client(dev); | |
754 | struct w83795_data *data = i2c_get_clientdata(client); | |
24377101 JD |
755 | unsigned long val; |
756 | ||
179c4fdb | 757 | if (kstrtoul(buf, 10, &val) < 0 || val != 0) |
24377101 | 758 | return -EINVAL; |
792d376b WS |
759 | |
760 | mutex_lock(&data->update_lock); | |
761 | val = w83795_read(client, W83795_REG_CLR_CHASSIS); | |
762 | val |= 0x80; | |
763 | w83795_write(client, W83795_REG_CLR_CHASSIS, val); | |
793c51d5 JD |
764 | |
765 | /* Clear status and force cache refresh */ | |
766 | w83795_read(client, W83795_REG_ALARM(5)); | |
952a11ca | 767 | data->valid = false; |
792d376b WS |
768 | mutex_unlock(&data->update_lock); |
769 | return count; | |
770 | } | |
771 | ||
772 | #define FAN_INPUT 0 | |
773 | #define FAN_MIN 1 | |
774 | static ssize_t | |
775 | show_fan(struct device *dev, struct device_attribute *attr, char *buf) | |
776 | { | |
777 | struct sensor_device_attribute_2 *sensor_attr = | |
778 | to_sensor_dev_attr_2(attr); | |
779 | int nr = sensor_attr->nr; | |
780 | int index = sensor_attr->index; | |
781 | struct w83795_data *data = w83795_update_device(dev); | |
782 | u16 val; | |
783 | ||
eb02755a | 784 | if (nr == FAN_INPUT) |
792d376b WS |
785 | val = data->fan[index] & 0x0fff; |
786 | else | |
787 | val = data->fan_min[index] & 0x0fff; | |
788 | ||
789 | return sprintf(buf, "%lu\n", fan_from_reg(val)); | |
790 | } | |
791 | ||
792 | static ssize_t | |
793 | store_fan_min(struct device *dev, struct device_attribute *attr, | |
794 | const char *buf, size_t count) | |
795 | { | |
796 | struct sensor_device_attribute_2 *sensor_attr = | |
797 | to_sensor_dev_attr_2(attr); | |
798 | int index = sensor_attr->index; | |
799 | struct i2c_client *client = to_i2c_client(dev); | |
800 | struct w83795_data *data = i2c_get_clientdata(client); | |
801 | unsigned long val; | |
802 | ||
179c4fdb | 803 | if (kstrtoul(buf, 10, &val)) |
792d376b WS |
804 | return -EINVAL; |
805 | val = fan_to_reg(val); | |
806 | ||
807 | mutex_lock(&data->update_lock); | |
808 | data->fan_min[index] = val; | |
809 | w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); | |
810 | val &= 0x0f; | |
7eb8d508 | 811 | if (index & 1) { |
792d376b WS |
812 | val <<= 4; |
813 | val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) | |
814 | & 0x0f; | |
815 | } else { | |
816 | val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) | |
817 | & 0xf0; | |
818 | } | |
819 | w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); | |
820 | mutex_unlock(&data->update_lock); | |
821 | ||
822 | return count; | |
823 | } | |
824 | ||
825 | static ssize_t | |
826 | show_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
827 | { | |
1bb3450c | 828 | struct w83795_data *data; |
792d376b WS |
829 | struct sensor_device_attribute_2 *sensor_attr = |
830 | to_sensor_dev_attr_2(attr); | |
831 | int nr = sensor_attr->nr; | |
832 | int index = sensor_attr->index; | |
01879a85 | 833 | unsigned int val; |
792d376b | 834 | |
1bb3450c JD |
835 | data = nr == PWM_OUTPUT ? w83795_update_device(dev) |
836 | : w83795_update_pwm_config(dev); | |
837 | ||
792d376b WS |
838 | switch (nr) { |
839 | case PWM_STOP_TIME: | |
840 | val = time_from_reg(data->pwm[index][nr]); | |
841 | break; | |
01879a85 JD |
842 | case PWM_FREQ: |
843 | val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin); | |
792d376b WS |
844 | break; |
845 | default: | |
846 | val = data->pwm[index][nr]; | |
847 | break; | |
848 | } | |
849 | ||
850 | return sprintf(buf, "%u\n", val); | |
851 | } | |
852 | ||
853 | static ssize_t | |
854 | store_pwm(struct device *dev, struct device_attribute *attr, | |
855 | const char *buf, size_t count) | |
856 | { | |
857 | struct i2c_client *client = to_i2c_client(dev); | |
858 | struct w83795_data *data = i2c_get_clientdata(client); | |
859 | struct sensor_device_attribute_2 *sensor_attr = | |
860 | to_sensor_dev_attr_2(attr); | |
861 | int nr = sensor_attr->nr; | |
862 | int index = sensor_attr->index; | |
863 | unsigned long val; | |
792d376b | 864 | |
179c4fdb | 865 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b WS |
866 | return -EINVAL; |
867 | ||
868 | mutex_lock(&data->update_lock); | |
869 | switch (nr) { | |
870 | case PWM_STOP_TIME: | |
871 | val = time_to_reg(val); | |
872 | break; | |
01879a85 JD |
873 | case PWM_FREQ: |
874 | val = pwm_freq_to_reg(val, data->clkin); | |
792d376b WS |
875 | break; |
876 | default: | |
2a844c14 | 877 | val = clamp_val(val, 0, 0xff); |
792d376b WS |
878 | break; |
879 | } | |
880 | w83795_write(client, W83795_REG_PWM(index, nr), val); | |
01879a85 | 881 | data->pwm[index][nr] = val; |
792d376b WS |
882 | mutex_unlock(&data->update_lock); |
883 | return count; | |
792d376b WS |
884 | } |
885 | ||
886 | static ssize_t | |
887 | show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) | |
888 | { | |
889 | struct sensor_device_attribute_2 *sensor_attr = | |
890 | to_sensor_dev_attr_2(attr); | |
1bb3450c | 891 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
892 | int index = sensor_attr->index; |
893 | u8 tmp; | |
894 | ||
ae51cd9b JD |
895 | /* Speed cruise mode */ |
896 | if (data->pwm_fcms[0] & (1 << index)) { | |
792d376b WS |
897 | tmp = 2; |
898 | goto out; | |
899 | } | |
ae51cd9b | 900 | /* Thermal cruise or SmartFan IV mode */ |
792d376b WS |
901 | for (tmp = 0; tmp < 6; tmp++) { |
902 | if (data->pwm_tfmr[tmp] & (1 << index)) { | |
903 | tmp = 3; | |
904 | goto out; | |
905 | } | |
906 | } | |
ae51cd9b JD |
907 | /* Manual mode */ |
908 | tmp = 1; | |
792d376b WS |
909 | |
910 | out: | |
911 | return sprintf(buf, "%u\n", tmp); | |
912 | } | |
913 | ||
914 | static ssize_t | |
915 | store_pwm_enable(struct device *dev, struct device_attribute *attr, | |
916 | const char *buf, size_t count) | |
917 | { | |
918 | struct i2c_client *client = to_i2c_client(dev); | |
1bb3450c | 919 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
920 | struct sensor_device_attribute_2 *sensor_attr = |
921 | to_sensor_dev_attr_2(attr); | |
922 | int index = sensor_attr->index; | |
923 | unsigned long val; | |
924 | int i; | |
925 | ||
179c4fdb | 926 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b | 927 | return -EINVAL; |
ae51cd9b | 928 | if (val < 1 || val > 2) |
792d376b WS |
929 | return -EINVAL; |
930 | ||
72fea694 JD |
931 | #ifndef CONFIG_SENSORS_W83795_FANCTRL |
932 | if (val > 1) { | |
933 | dev_warn(dev, "Automatic fan speed control support disabled\n"); | |
934 | dev_warn(dev, "Build with CONFIG_SENSORS_W83795_FANCTRL=y if you want it\n"); | |
935 | return -EOPNOTSUPP; | |
936 | } | |
937 | #endif | |
938 | ||
792d376b WS |
939 | mutex_lock(&data->update_lock); |
940 | switch (val) { | |
792d376b | 941 | case 1: |
ae51cd9b | 942 | /* Clear speed cruise mode bits */ |
792d376b WS |
943 | data->pwm_fcms[0] &= ~(1 << index); |
944 | w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); | |
ae51cd9b | 945 | /* Clear thermal cruise mode bits */ |
792d376b WS |
946 | for (i = 0; i < 6; i++) { |
947 | data->pwm_tfmr[i] &= ~(1 << index); | |
948 | w83795_write(client, W83795_REG_TFMR(i), | |
949 | data->pwm_tfmr[i]); | |
950 | } | |
792d376b WS |
951 | break; |
952 | case 2: | |
953 | data->pwm_fcms[0] |= (1 << index); | |
954 | w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); | |
955 | break; | |
956 | } | |
957 | mutex_unlock(&data->update_lock); | |
958 | return count; | |
792d376b WS |
959 | } |
960 | ||
d5ab845a JD |
961 | static ssize_t |
962 | show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) | |
963 | { | |
964 | struct w83795_data *data = w83795_update_pwm_config(dev); | |
965 | int index = to_sensor_dev_attr_2(attr)->index; | |
966 | unsigned int mode; | |
967 | ||
968 | if (data->pwm_fomc & (1 << index)) | |
969 | mode = 0; /* DC */ | |
970 | else | |
971 | mode = 1; /* PWM */ | |
972 | ||
973 | return sprintf(buf, "%u\n", mode); | |
974 | } | |
975 | ||
edff2f8d JD |
976 | /* |
977 | * Check whether a given temperature source can ever be useful. | |
978 | * Returns the number of selectable temperature channels which are | |
979 | * enabled. | |
980 | */ | |
981 | static int w83795_tss_useful(const struct w83795_data *data, int tsrc) | |
982 | { | |
983 | int useful = 0, i; | |
984 | ||
985 | for (i = 0; i < 4; i++) { | |
986 | if (tss_map[i][tsrc] == TSS_MAP_RESERVED) | |
987 | continue; | |
988 | if (tss_map[i][tsrc] < 6) /* Analog */ | |
989 | useful += (data->has_temp >> tss_map[i][tsrc]) & 1; | |
990 | else /* Digital */ | |
991 | useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1; | |
992 | } | |
993 | ||
994 | return useful; | |
995 | } | |
996 | ||
792d376b WS |
997 | static ssize_t |
998 | show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) | |
999 | { | |
1000 | struct sensor_device_attribute_2 *sensor_attr = | |
1001 | to_sensor_dev_attr_2(attr); | |
1bb3450c | 1002 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b | 1003 | int index = sensor_attr->index; |
2a2d27da | 1004 | u8 tmp = data->temp_src[index / 2]; |
792d376b | 1005 | |
7eb8d508 | 1006 | if (index & 1) |
2a2d27da | 1007 | tmp >>= 4; /* Pick high nibble */ |
792d376b | 1008 | else |
2a2d27da | 1009 | tmp &= 0x0f; /* Pick low nibble */ |
792d376b | 1010 | |
2a2d27da JD |
1011 | /* Look-up the actual temperature channel number */ |
1012 | if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED) | |
1013 | return -EINVAL; /* Shouldn't happen */ | |
1014 | ||
1015 | return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1); | |
792d376b WS |
1016 | } |
1017 | ||
1018 | static ssize_t | |
1019 | store_temp_src(struct device *dev, struct device_attribute *attr, | |
1020 | const char *buf, size_t count) | |
1021 | { | |
1022 | struct i2c_client *client = to_i2c_client(dev); | |
1bb3450c | 1023 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1024 | struct sensor_device_attribute_2 *sensor_attr = |
1025 | to_sensor_dev_attr_2(attr); | |
1026 | int index = sensor_attr->index; | |
2a2d27da JD |
1027 | int tmp; |
1028 | unsigned long channel; | |
792d376b WS |
1029 | u8 val = index / 2; |
1030 | ||
179c4fdb | 1031 | if (kstrtoul(buf, 10, &channel) < 0 || |
2a2d27da JD |
1032 | channel < 1 || channel > 14) |
1033 | return -EINVAL; | |
1034 | ||
1035 | /* Check if request can be fulfilled */ | |
1036 | for (tmp = 0; tmp < 4; tmp++) { | |
1037 | if (tss_map[tmp][index] == channel - 1) | |
1038 | break; | |
1039 | } | |
1040 | if (tmp == 4) /* No match */ | |
792d376b | 1041 | return -EINVAL; |
792d376b WS |
1042 | |
1043 | mutex_lock(&data->update_lock); | |
7eb8d508 | 1044 | if (index & 1) { |
792d376b WS |
1045 | tmp <<= 4; |
1046 | data->temp_src[val] &= 0x0f; | |
1047 | } else { | |
1048 | data->temp_src[val] &= 0xf0; | |
1049 | } | |
1050 | data->temp_src[val] |= tmp; | |
1051 | w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); | |
1052 | mutex_unlock(&data->update_lock); | |
1053 | ||
1054 | return count; | |
1055 | } | |
1056 | ||
1057 | #define TEMP_PWM_ENABLE 0 | |
1058 | #define TEMP_PWM_FAN_MAP 1 | |
1059 | static ssize_t | |
1060 | show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, | |
1061 | char *buf) | |
1062 | { | |
1bb3450c | 1063 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1064 | struct sensor_device_attribute_2 *sensor_attr = |
1065 | to_sensor_dev_attr_2(attr); | |
1066 | int nr = sensor_attr->nr; | |
1067 | int index = sensor_attr->index; | |
1068 | u8 tmp = 0xff; | |
1069 | ||
1070 | switch (nr) { | |
1071 | case TEMP_PWM_ENABLE: | |
1072 | tmp = (data->pwm_fcms[1] >> index) & 1; | |
1073 | if (tmp) | |
1074 | tmp = 4; | |
1075 | else | |
1076 | tmp = 3; | |
1077 | break; | |
1078 | case TEMP_PWM_FAN_MAP: | |
1079 | tmp = data->pwm_tfmr[index]; | |
1080 | break; | |
1081 | } | |
1082 | ||
1083 | return sprintf(buf, "%u\n", tmp); | |
1084 | } | |
1085 | ||
1086 | static ssize_t | |
1087 | store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, | |
1088 | const char *buf, size_t count) | |
1089 | { | |
1090 | struct i2c_client *client = to_i2c_client(dev); | |
1bb3450c | 1091 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1092 | struct sensor_device_attribute_2 *sensor_attr = |
1093 | to_sensor_dev_attr_2(attr); | |
1094 | int nr = sensor_attr->nr; | |
1095 | int index = sensor_attr->index; | |
1096 | unsigned long tmp; | |
1097 | ||
179c4fdb | 1098 | if (kstrtoul(buf, 10, &tmp) < 0) |
792d376b WS |
1099 | return -EINVAL; |
1100 | ||
1101 | switch (nr) { | |
1102 | case TEMP_PWM_ENABLE: | |
eb02755a | 1103 | if (tmp != 3 && tmp != 4) |
792d376b WS |
1104 | return -EINVAL; |
1105 | tmp -= 3; | |
1106 | mutex_lock(&data->update_lock); | |
1107 | data->pwm_fcms[1] &= ~(1 << index); | |
1108 | data->pwm_fcms[1] |= tmp << index; | |
1109 | w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); | |
1110 | mutex_unlock(&data->update_lock); | |
1111 | break; | |
1112 | case TEMP_PWM_FAN_MAP: | |
1113 | mutex_lock(&data->update_lock); | |
2a844c14 | 1114 | tmp = clamp_val(tmp, 0, 0xff); |
792d376b WS |
1115 | w83795_write(client, W83795_REG_TFMR(index), tmp); |
1116 | data->pwm_tfmr[index] = tmp; | |
1117 | mutex_unlock(&data->update_lock); | |
1118 | break; | |
1119 | } | |
1120 | return count; | |
1121 | } | |
1122 | ||
1123 | #define FANIN_TARGET 0 | |
1124 | #define FANIN_TOL 1 | |
1125 | static ssize_t | |
1126 | show_fanin(struct device *dev, struct device_attribute *attr, char *buf) | |
1127 | { | |
1bb3450c | 1128 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1129 | struct sensor_device_attribute_2 *sensor_attr = |
1130 | to_sensor_dev_attr_2(attr); | |
1131 | int nr = sensor_attr->nr; | |
1132 | int index = sensor_attr->index; | |
1133 | u16 tmp = 0; | |
1134 | ||
1135 | switch (nr) { | |
1136 | case FANIN_TARGET: | |
1137 | tmp = fan_from_reg(data->target_speed[index]); | |
1138 | break; | |
1139 | case FANIN_TOL: | |
1140 | tmp = data->tol_speed; | |
1141 | break; | |
1142 | } | |
1143 | ||
1144 | return sprintf(buf, "%u\n", tmp); | |
1145 | } | |
1146 | ||
1147 | static ssize_t | |
1148 | store_fanin(struct device *dev, struct device_attribute *attr, | |
1149 | const char *buf, size_t count) | |
1150 | { | |
1151 | struct i2c_client *client = to_i2c_client(dev); | |
1152 | struct w83795_data *data = i2c_get_clientdata(client); | |
1153 | struct sensor_device_attribute_2 *sensor_attr = | |
1154 | to_sensor_dev_attr_2(attr); | |
1155 | int nr = sensor_attr->nr; | |
1156 | int index = sensor_attr->index; | |
1157 | unsigned long val; | |
1158 | ||
179c4fdb | 1159 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b WS |
1160 | return -EINVAL; |
1161 | ||
1162 | mutex_lock(&data->update_lock); | |
1163 | switch (nr) { | |
1164 | case FANIN_TARGET: | |
2a844c14 | 1165 | val = fan_to_reg(clamp_val(val, 0, 0xfff)); |
eb02755a | 1166 | w83795_write(client, W83795_REG_FTSH(index), val >> 4); |
792d376b WS |
1167 | w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); |
1168 | data->target_speed[index] = val; | |
1169 | break; | |
1170 | case FANIN_TOL: | |
2a844c14 | 1171 | val = clamp_val(val, 0, 0x3f); |
792d376b WS |
1172 | w83795_write(client, W83795_REG_TFTS, val); |
1173 | data->tol_speed = val; | |
1174 | break; | |
1175 | } | |
1176 | mutex_unlock(&data->update_lock); | |
1177 | ||
1178 | return count; | |
1179 | } | |
1180 | ||
1181 | ||
1182 | static ssize_t | |
1183 | show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
1184 | { | |
1bb3450c | 1185 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1186 | struct sensor_device_attribute_2 *sensor_attr = |
1187 | to_sensor_dev_attr_2(attr); | |
1188 | int nr = sensor_attr->nr; | |
1189 | int index = sensor_attr->index; | |
1190 | long tmp = temp_from_reg(data->pwm_temp[index][nr]); | |
1191 | ||
1192 | return sprintf(buf, "%ld\n", tmp); | |
1193 | } | |
1194 | ||
1195 | static ssize_t | |
1196 | store_temp_pwm(struct device *dev, struct device_attribute *attr, | |
1197 | const char *buf, size_t count) | |
1198 | { | |
1199 | struct i2c_client *client = to_i2c_client(dev); | |
1200 | struct w83795_data *data = i2c_get_clientdata(client); | |
1201 | struct sensor_device_attribute_2 *sensor_attr = | |
1202 | to_sensor_dev_attr_2(attr); | |
1203 | int nr = sensor_attr->nr; | |
1204 | int index = sensor_attr->index; | |
1205 | unsigned long val; | |
1206 | u8 tmp; | |
1207 | ||
179c4fdb | 1208 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b WS |
1209 | return -EINVAL; |
1210 | val /= 1000; | |
1211 | ||
1212 | mutex_lock(&data->update_lock); | |
1213 | switch (nr) { | |
1214 | case TEMP_PWM_TTTI: | |
2a844c14 | 1215 | val = clamp_val(val, 0, 0x7f); |
792d376b WS |
1216 | w83795_write(client, W83795_REG_TTTI(index), val); |
1217 | break; | |
1218 | case TEMP_PWM_CTFS: | |
2a844c14 | 1219 | val = clamp_val(val, 0, 0x7f); |
792d376b WS |
1220 | w83795_write(client, W83795_REG_CTFS(index), val); |
1221 | break; | |
1222 | case TEMP_PWM_HCT: | |
2a844c14 | 1223 | val = clamp_val(val, 0, 0x0f); |
792d376b WS |
1224 | tmp = w83795_read(client, W83795_REG_HT(index)); |
1225 | tmp &= 0x0f; | |
1226 | tmp |= (val << 4) & 0xf0; | |
1227 | w83795_write(client, W83795_REG_HT(index), tmp); | |
1228 | break; | |
1229 | case TEMP_PWM_HOT: | |
2a844c14 | 1230 | val = clamp_val(val, 0, 0x0f); |
792d376b WS |
1231 | tmp = w83795_read(client, W83795_REG_HT(index)); |
1232 | tmp &= 0xf0; | |
1233 | tmp |= val & 0x0f; | |
1234 | w83795_write(client, W83795_REG_HT(index), tmp); | |
1235 | break; | |
1236 | } | |
1237 | data->pwm_temp[index][nr] = val; | |
1238 | mutex_unlock(&data->update_lock); | |
1239 | ||
1240 | return count; | |
1241 | } | |
1242 | ||
1243 | static ssize_t | |
1244 | show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
1245 | { | |
1bb3450c | 1246 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1247 | struct sensor_device_attribute_2 *sensor_attr = |
1248 | to_sensor_dev_attr_2(attr); | |
1249 | int nr = sensor_attr->nr; | |
1250 | int index = sensor_attr->index; | |
1251 | ||
1252 | return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); | |
1253 | } | |
1254 | ||
1255 | static ssize_t | |
1256 | store_sf4_pwm(struct device *dev, struct device_attribute *attr, | |
1257 | const char *buf, size_t count) | |
1258 | { | |
1259 | struct i2c_client *client = to_i2c_client(dev); | |
1260 | struct w83795_data *data = i2c_get_clientdata(client); | |
1261 | struct sensor_device_attribute_2 *sensor_attr = | |
1262 | to_sensor_dev_attr_2(attr); | |
1263 | int nr = sensor_attr->nr; | |
1264 | int index = sensor_attr->index; | |
1265 | unsigned long val; | |
1266 | ||
179c4fdb | 1267 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b WS |
1268 | return -EINVAL; |
1269 | ||
1270 | mutex_lock(&data->update_lock); | |
1271 | w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); | |
1272 | data->sf4_reg[index][SF4_PWM][nr] = val; | |
1273 | mutex_unlock(&data->update_lock); | |
1274 | ||
1275 | return count; | |
1276 | } | |
1277 | ||
1278 | static ssize_t | |
1279 | show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
1280 | { | |
1bb3450c | 1281 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1282 | struct sensor_device_attribute_2 *sensor_attr = |
1283 | to_sensor_dev_attr_2(attr); | |
1284 | int nr = sensor_attr->nr; | |
1285 | int index = sensor_attr->index; | |
1286 | ||
1287 | return sprintf(buf, "%u\n", | |
1288 | (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); | |
1289 | } | |
1290 | ||
1291 | static ssize_t | |
1292 | store_sf4_temp(struct device *dev, struct device_attribute *attr, | |
1293 | const char *buf, size_t count) | |
1294 | { | |
1295 | struct i2c_client *client = to_i2c_client(dev); | |
1296 | struct w83795_data *data = i2c_get_clientdata(client); | |
1297 | struct sensor_device_attribute_2 *sensor_attr = | |
1298 | to_sensor_dev_attr_2(attr); | |
1299 | int nr = sensor_attr->nr; | |
1300 | int index = sensor_attr->index; | |
1301 | unsigned long val; | |
1302 | ||
179c4fdb | 1303 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b WS |
1304 | return -EINVAL; |
1305 | val /= 1000; | |
1306 | ||
1307 | mutex_lock(&data->update_lock); | |
1308 | w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); | |
1309 | data->sf4_reg[index][SF4_TEMP][nr] = val; | |
1310 | mutex_unlock(&data->update_lock); | |
1311 | ||
1312 | return count; | |
1313 | } | |
1314 | ||
1315 | ||
1316 | static ssize_t | |
1317 | show_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
1318 | { | |
1319 | struct sensor_device_attribute_2 *sensor_attr = | |
1320 | to_sensor_dev_attr_2(attr); | |
1321 | int nr = sensor_attr->nr; | |
1322 | int index = sensor_attr->index; | |
1323 | struct w83795_data *data = w83795_update_device(dev); | |
dd127f5c | 1324 | long temp = temp_from_reg(data->temp[index][nr]); |
792d376b | 1325 | |
eb02755a | 1326 | if (nr == TEMP_READ) |
a654b9d4 | 1327 | temp += (data->temp_read_vrlsb[index] >> 6) * 250; |
792d376b WS |
1328 | return sprintf(buf, "%ld\n", temp); |
1329 | } | |
1330 | ||
1331 | static ssize_t | |
1332 | store_temp(struct device *dev, struct device_attribute *attr, | |
1333 | const char *buf, size_t count) | |
1334 | { | |
1335 | struct sensor_device_attribute_2 *sensor_attr = | |
1336 | to_sensor_dev_attr_2(attr); | |
1337 | int nr = sensor_attr->nr; | |
1338 | int index = sensor_attr->index; | |
1339 | struct i2c_client *client = to_i2c_client(dev); | |
1340 | struct w83795_data *data = i2c_get_clientdata(client); | |
1341 | long tmp; | |
1342 | ||
179c4fdb | 1343 | if (kstrtol(buf, 10, &tmp) < 0) |
792d376b WS |
1344 | return -EINVAL; |
1345 | ||
1346 | mutex_lock(&data->update_lock); | |
1347 | data->temp[index][nr] = temp_to_reg(tmp, -128, 127); | |
1348 | w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); | |
1349 | mutex_unlock(&data->update_lock); | |
1350 | return count; | |
1351 | } | |
1352 | ||
1353 | ||
1354 | static ssize_t | |
1355 | show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) | |
1356 | { | |
21fc9775 | 1357 | struct w83795_data *data = dev_get_drvdata(dev); |
39deb699 | 1358 | int tmp; |
792d376b | 1359 | |
39deb699 JD |
1360 | if (data->enable_dts & 2) |
1361 | tmp = 5; | |
1362 | else | |
1363 | tmp = 6; | |
792d376b WS |
1364 | |
1365 | return sprintf(buf, "%d\n", tmp); | |
1366 | } | |
1367 | ||
1368 | static ssize_t | |
1369 | show_dts(struct device *dev, struct device_attribute *attr, char *buf) | |
1370 | { | |
1371 | struct sensor_device_attribute_2 *sensor_attr = | |
1372 | to_sensor_dev_attr_2(attr); | |
1373 | int index = sensor_attr->index; | |
1374 | struct w83795_data *data = w83795_update_device(dev); | |
dd127f5c | 1375 | long temp = temp_from_reg(data->dts[index]); |
792d376b | 1376 | |
a654b9d4 | 1377 | temp += (data->dts_read_vrlsb[index] >> 6) * 250; |
792d376b WS |
1378 | return sprintf(buf, "%ld\n", temp); |
1379 | } | |
1380 | ||
1381 | static ssize_t | |
1382 | show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) | |
1383 | { | |
1384 | struct sensor_device_attribute_2 *sensor_attr = | |
1385 | to_sensor_dev_attr_2(attr); | |
1386 | int nr = sensor_attr->nr; | |
21fc9775 | 1387 | struct w83795_data *data = dev_get_drvdata(dev); |
dd127f5c | 1388 | long temp = temp_from_reg(data->dts_ext[nr]); |
792d376b | 1389 | |
792d376b WS |
1390 | return sprintf(buf, "%ld\n", temp); |
1391 | } | |
1392 | ||
1393 | static ssize_t | |
1394 | store_dts_ext(struct device *dev, struct device_attribute *attr, | |
1395 | const char *buf, size_t count) | |
1396 | { | |
1397 | struct sensor_device_attribute_2 *sensor_attr = | |
1398 | to_sensor_dev_attr_2(attr); | |
1399 | int nr = sensor_attr->nr; | |
1400 | struct i2c_client *client = to_i2c_client(dev); | |
1401 | struct w83795_data *data = i2c_get_clientdata(client); | |
1402 | long tmp; | |
1403 | ||
179c4fdb | 1404 | if (kstrtol(buf, 10, &tmp) < 0) |
792d376b WS |
1405 | return -EINVAL; |
1406 | ||
1407 | mutex_lock(&data->update_lock); | |
1408 | data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); | |
1409 | w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); | |
1410 | mutex_unlock(&data->update_lock); | |
1411 | return count; | |
1412 | } | |
1413 | ||
1414 | ||
792d376b WS |
1415 | static ssize_t |
1416 | show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) | |
1417 | { | |
21fc9775 | 1418 | struct w83795_data *data = dev_get_drvdata(dev); |
792d376b WS |
1419 | struct sensor_device_attribute_2 *sensor_attr = |
1420 | to_sensor_dev_attr_2(attr); | |
1421 | int index = sensor_attr->index; | |
39deb699 | 1422 | int tmp; |
792d376b | 1423 | |
39deb699 JD |
1424 | if (data->temp_mode & (1 << index)) |
1425 | tmp = 3; /* Thermal diode */ | |
1426 | else | |
1427 | tmp = 4; /* Thermistor */ | |
792d376b WS |
1428 | |
1429 | return sprintf(buf, "%d\n", tmp); | |
1430 | } | |
1431 | ||
39deb699 | 1432 | /* Only for temp1-4 (temp5-6 can only be thermistor) */ |
792d376b WS |
1433 | static ssize_t |
1434 | store_temp_mode(struct device *dev, struct device_attribute *attr, | |
1435 | const char *buf, size_t count) | |
1436 | { | |
1437 | struct i2c_client *client = to_i2c_client(dev); | |
1438 | struct w83795_data *data = i2c_get_clientdata(client); | |
1439 | struct sensor_device_attribute_2 *sensor_attr = | |
1440 | to_sensor_dev_attr_2(attr); | |
1441 | int index = sensor_attr->index; | |
39deb699 | 1442 | int reg_shift; |
792d376b WS |
1443 | unsigned long val; |
1444 | u8 tmp; | |
792d376b | 1445 | |
179c4fdb | 1446 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b WS |
1447 | return -EINVAL; |
1448 | if ((val != 4) && (val != 3)) | |
1449 | return -EINVAL; | |
792d376b WS |
1450 | |
1451 | mutex_lock(&data->update_lock); | |
1452 | if (val == 3) { | |
39deb699 JD |
1453 | /* Thermal diode */ |
1454 | val = 0x01; | |
792d376b WS |
1455 | data->temp_mode |= 1 << index; |
1456 | } else if (val == 4) { | |
39deb699 JD |
1457 | /* Thermistor */ |
1458 | val = 0x03; | |
1459 | data->temp_mode &= ~(1 << index); | |
792d376b WS |
1460 | } |
1461 | ||
39deb699 JD |
1462 | reg_shift = 2 * index; |
1463 | tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); | |
1464 | tmp &= ~(0x03 << reg_shift); | |
1465 | tmp |= val << reg_shift; | |
1466 | w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); | |
792d376b WS |
1467 | |
1468 | mutex_unlock(&data->update_lock); | |
1469 | return count; | |
1470 | } | |
1471 | ||
1472 | ||
1473 | /* show/store VIN */ | |
1474 | static ssize_t | |
1475 | show_in(struct device *dev, struct device_attribute *attr, char *buf) | |
1476 | { | |
1477 | struct sensor_device_attribute_2 *sensor_attr = | |
1478 | to_sensor_dev_attr_2(attr); | |
1479 | int nr = sensor_attr->nr; | |
1480 | int index = sensor_attr->index; | |
1481 | struct w83795_data *data = w83795_update_device(dev); | |
1482 | u16 val = data->in[index][nr]; | |
1483 | u8 lsb_idx; | |
1484 | ||
1485 | switch (nr) { | |
1486 | case IN_READ: | |
1487 | /* calculate this value again by sensors as sensors3.conf */ | |
1488 | if ((index >= 17) && | |
6f9dfd85 | 1489 | !((data->has_gain >> (index - 17)) & 1)) |
792d376b WS |
1490 | val *= 8; |
1491 | break; | |
1492 | case IN_MAX: | |
1493 | case IN_LOW: | |
1494 | lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; | |
1495 | val <<= 2; | |
1496 | val |= (data->in_lsb[lsb_idx][nr] >> | |
5d2cd958 | 1497 | IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03; |
792d376b | 1498 | if ((index >= 17) && |
6f9dfd85 | 1499 | !((data->has_gain >> (index - 17)) & 1)) |
792d376b WS |
1500 | val *= 8; |
1501 | break; | |
1502 | } | |
1503 | val = in_from_reg(index, val); | |
1504 | ||
1505 | return sprintf(buf, "%d\n", val); | |
1506 | } | |
1507 | ||
1508 | static ssize_t | |
1509 | store_in(struct device *dev, struct device_attribute *attr, | |
1510 | const char *buf, size_t count) | |
1511 | { | |
1512 | struct sensor_device_attribute_2 *sensor_attr = | |
1513 | to_sensor_dev_attr_2(attr); | |
1514 | int nr = sensor_attr->nr; | |
1515 | int index = sensor_attr->index; | |
1516 | struct i2c_client *client = to_i2c_client(dev); | |
1517 | struct w83795_data *data = i2c_get_clientdata(client); | |
1518 | unsigned long val; | |
1519 | u8 tmp; | |
1520 | u8 lsb_idx; | |
1521 | ||
179c4fdb | 1522 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b WS |
1523 | return -EINVAL; |
1524 | val = in_to_reg(index, val); | |
1525 | ||
1526 | if ((index >= 17) && | |
6f9dfd85 | 1527 | !((data->has_gain >> (index - 17)) & 1)) |
792d376b | 1528 | val /= 8; |
2a844c14 | 1529 | val = clamp_val(val, 0, 0x3FF); |
792d376b WS |
1530 | mutex_lock(&data->update_lock); |
1531 | ||
1532 | lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; | |
1533 | tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); | |
1534 | tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); | |
1535 | tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; | |
1536 | w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); | |
1537 | data->in_lsb[lsb_idx][nr] = tmp; | |
1538 | ||
1539 | tmp = (val >> 2) & 0xff; | |
1540 | w83795_write(client, W83795_REG_IN[index][nr], tmp); | |
1541 | data->in[index][nr] = tmp; | |
1542 | ||
1543 | mutex_unlock(&data->update_lock); | |
1544 | return count; | |
1545 | } | |
1546 | ||
1547 | ||
00030af2 | 1548 | #ifdef CONFIG_SENSORS_W83795_FANCTRL |
792d376b WS |
1549 | static ssize_t |
1550 | show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) | |
1551 | { | |
1552 | struct sensor_device_attribute_2 *sensor_attr = | |
1553 | to_sensor_dev_attr_2(attr); | |
1554 | int nr = sensor_attr->nr; | |
1bb3450c | 1555 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1556 | u16 val = data->setup_pwm[nr]; |
1557 | ||
1558 | switch (nr) { | |
1559 | case SETUP_PWM_UPTIME: | |
1560 | case SETUP_PWM_DOWNTIME: | |
1561 | val = time_from_reg(val); | |
1562 | break; | |
1563 | } | |
1564 | ||
1565 | return sprintf(buf, "%d\n", val); | |
1566 | } | |
1567 | ||
1568 | static ssize_t | |
1569 | store_sf_setup(struct device *dev, struct device_attribute *attr, | |
1570 | const char *buf, size_t count) | |
1571 | { | |
1572 | struct sensor_device_attribute_2 *sensor_attr = | |
1573 | to_sensor_dev_attr_2(attr); | |
1574 | int nr = sensor_attr->nr; | |
1575 | struct i2c_client *client = to_i2c_client(dev); | |
1576 | struct w83795_data *data = i2c_get_clientdata(client); | |
1577 | unsigned long val; | |
1578 | ||
179c4fdb | 1579 | if (kstrtoul(buf, 10, &val) < 0) |
792d376b WS |
1580 | return -EINVAL; |
1581 | ||
1582 | switch (nr) { | |
1583 | case SETUP_PWM_DEFAULT: | |
2a844c14 | 1584 | val = clamp_val(val, 0, 0xff); |
792d376b WS |
1585 | break; |
1586 | case SETUP_PWM_UPTIME: | |
1587 | case SETUP_PWM_DOWNTIME: | |
1588 | val = time_to_reg(val); | |
1589 | if (val == 0) | |
1590 | return -EINVAL; | |
1591 | break; | |
1592 | } | |
1593 | ||
1594 | mutex_lock(&data->update_lock); | |
1595 | data->setup_pwm[nr] = val; | |
1596 | w83795_write(client, W83795_REG_SETUP_PWM(nr), val); | |
1597 | mutex_unlock(&data->update_lock); | |
1598 | return count; | |
1599 | } | |
00030af2 | 1600 | #endif |
792d376b WS |
1601 | |
1602 | ||
1603 | #define NOT_USED -1 | |
1604 | ||
c10b3ee8 GR |
1605 | /* |
1606 | * Don't change the attribute order, _max, _min and _beep are accessed by index | |
1607 | * somewhere else in the code | |
1608 | */ | |
87df0dad | 1609 | #define SENSOR_ATTR_IN(index) { \ |
792d376b WS |
1610 | SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ |
1611 | IN_READ, index), \ | |
1612 | SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ | |
1613 | store_in, IN_MAX, index), \ | |
1614 | SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ | |
1615 | store_in, IN_LOW, index), \ | |
1616 | SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
1617 | NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ | |
1618 | SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ | |
1619 | show_alarm_beep, store_beep, BEEP_ENABLE, \ | |
87df0dad | 1620 | index + ((index > 14) ? 1 : 0)) } |
792d376b | 1621 | |
c10b3ee8 GR |
1622 | /* |
1623 | * Don't change the attribute order, _beep is accessed by index | |
1624 | * somewhere else in the code | |
1625 | */ | |
87df0dad | 1626 | #define SENSOR_ATTR_FAN(index) { \ |
792d376b WS |
1627 | SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ |
1628 | NULL, FAN_INPUT, index - 1), \ | |
1629 | SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ | |
1630 | show_fan, store_fan_min, FAN_MIN, index - 1), \ | |
1631 | SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
1632 | NULL, ALARM_STATUS, index + 31), \ | |
1633 | SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ | |
87df0dad | 1634 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } |
792d376b | 1635 | |
b5f6a90a | 1636 | #define SENSOR_ATTR_PWM(index) { \ |
792d376b WS |
1637 | SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ |
1638 | store_pwm, PWM_OUTPUT, index - 1), \ | |
72fea694 JD |
1639 | SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ |
1640 | show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ | |
1641 | SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \ | |
1642 | show_pwm_mode, NULL, NOT_USED, index - 1), \ | |
1643 | SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \ | |
1644 | show_pwm, store_pwm, PWM_FREQ, index - 1), \ | |
792d376b WS |
1645 | SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ |
1646 | show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ | |
1647 | SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ | |
1648 | show_pwm, store_pwm, PWM_START, index - 1), \ | |
1649 | SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ | |
1650 | show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ | |
b2cc528e JD |
1651 | SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ |
1652 | show_fanin, store_fanin, FANIN_TARGET, index - 1) } | |
792d376b | 1653 | |
c10b3ee8 GR |
1654 | /* |
1655 | * Don't change the attribute order, _beep is accessed by index | |
1656 | * somewhere else in the code | |
1657 | */ | |
87df0dad | 1658 | #define SENSOR_ATTR_DTS(index) { \ |
792d376b WS |
1659 | SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ |
1660 | show_dts_mode, NULL, NOT_USED, index - 7), \ | |
1661 | SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ | |
1662 | NULL, NOT_USED, index - 7), \ | |
a0ce402f | 1663 | SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \ |
792d376b | 1664 | store_dts_ext, DTS_CRIT, NOT_USED), \ |
a0ce402f | 1665 | SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ |
792d376b | 1666 | show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ |
a0ce402f | 1667 | SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ |
792d376b | 1668 | store_dts_ext, DTS_WARN, NOT_USED), \ |
a0ce402f | 1669 | SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ |
792d376b WS |
1670 | show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ |
1671 | SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ | |
1672 | show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ | |
1673 | SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ | |
87df0dad | 1674 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } |
792d376b | 1675 | |
c10b3ee8 GR |
1676 | /* |
1677 | * Don't change the attribute order, _beep is accessed by index | |
1678 | * somewhere else in the code | |
1679 | */ | |
87df0dad | 1680 | #define SENSOR_ATTR_TEMP(index) { \ |
09aaf681 | 1681 | SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 5 ? S_IWUSR : 0), \ |
792d376b WS |
1682 | show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ |
1683 | SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ | |
1684 | NULL, TEMP_READ, index - 1), \ | |
a0ce402f | 1685 | SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \ |
792d376b | 1686 | store_temp, TEMP_CRIT, index - 1), \ |
a0ce402f | 1687 | SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ |
792d376b | 1688 | show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ |
a0ce402f | 1689 | SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ |
792d376b | 1690 | store_temp, TEMP_WARN, index - 1), \ |
a0ce402f | 1691 | SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ |
792d376b WS |
1692 | show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ |
1693 | SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ | |
1694 | show_alarm_beep, NULL, ALARM_STATUS, \ | |
1695 | index + (index > 4 ? 11 : 17)), \ | |
1696 | SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ | |
1697 | show_alarm_beep, store_beep, BEEP_ENABLE, \ | |
1698 | index + (index > 4 ? 11 : 17)), \ | |
792d376b WS |
1699 | SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ |
1700 | show_temp_pwm_enable, store_temp_pwm_enable, \ | |
1701 | TEMP_PWM_ENABLE, index - 1), \ | |
1702 | SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ | |
1703 | show_temp_pwm_enable, store_temp_pwm_enable, \ | |
1704 | TEMP_PWM_FAN_MAP, index - 1), \ | |
1705 | SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ | |
1706 | show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ | |
a0ce402f | 1707 | SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \ |
792d376b | 1708 | show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ |
a0ce402f | 1709 | SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \ |
792d376b WS |
1710 | show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ |
1711 | SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ | |
1712 | show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ | |
1713 | SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ | |
1714 | show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ | |
1715 | SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ | |
1716 | show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ | |
1717 | SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ | |
1718 | show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ | |
1719 | SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ | |
1720 | show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ | |
1721 | SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ | |
1722 | show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ | |
1723 | SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ | |
1724 | show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ | |
1725 | SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ | |
1726 | show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ | |
1727 | SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ | |
1728 | show_sf4_temp, store_sf4_temp, 0, index - 1), \ | |
1729 | SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ | |
1730 | show_sf4_temp, store_sf4_temp, 1, index - 1), \ | |
1731 | SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ | |
1732 | show_sf4_temp, store_sf4_temp, 2, index - 1), \ | |
1733 | SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ | |
1734 | show_sf4_temp, store_sf4_temp, 3, index - 1), \ | |
1735 | SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ | |
1736 | show_sf4_temp, store_sf4_temp, 4, index - 1), \ | |
1737 | SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ | |
1738 | show_sf4_temp, store_sf4_temp, 5, index - 1), \ | |
1739 | SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ | |
87df0dad | 1740 | show_sf4_temp, store_sf4_temp, 6, index - 1) } |
792d376b WS |
1741 | |
1742 | ||
87df0dad | 1743 | static struct sensor_device_attribute_2 w83795_in[][5] = { |
792d376b WS |
1744 | SENSOR_ATTR_IN(0), |
1745 | SENSOR_ATTR_IN(1), | |
1746 | SENSOR_ATTR_IN(2), | |
1747 | SENSOR_ATTR_IN(3), | |
1748 | SENSOR_ATTR_IN(4), | |
1749 | SENSOR_ATTR_IN(5), | |
1750 | SENSOR_ATTR_IN(6), | |
1751 | SENSOR_ATTR_IN(7), | |
1752 | SENSOR_ATTR_IN(8), | |
1753 | SENSOR_ATTR_IN(9), | |
1754 | SENSOR_ATTR_IN(10), | |
1755 | SENSOR_ATTR_IN(11), | |
1756 | SENSOR_ATTR_IN(12), | |
1757 | SENSOR_ATTR_IN(13), | |
1758 | SENSOR_ATTR_IN(14), | |
1759 | SENSOR_ATTR_IN(15), | |
1760 | SENSOR_ATTR_IN(16), | |
1761 | SENSOR_ATTR_IN(17), | |
1762 | SENSOR_ATTR_IN(18), | |
1763 | SENSOR_ATTR_IN(19), | |
1764 | SENSOR_ATTR_IN(20), | |
1765 | }; | |
1766 | ||
86ef4d2f | 1767 | static const struct sensor_device_attribute_2 w83795_fan[][4] = { |
792d376b WS |
1768 | SENSOR_ATTR_FAN(1), |
1769 | SENSOR_ATTR_FAN(2), | |
1770 | SENSOR_ATTR_FAN(3), | |
1771 | SENSOR_ATTR_FAN(4), | |
1772 | SENSOR_ATTR_FAN(5), | |
1773 | SENSOR_ATTR_FAN(6), | |
1774 | SENSOR_ATTR_FAN(7), | |
1775 | SENSOR_ATTR_FAN(8), | |
1776 | SENSOR_ATTR_FAN(9), | |
1777 | SENSOR_ATTR_FAN(10), | |
1778 | SENSOR_ATTR_FAN(11), | |
1779 | SENSOR_ATTR_FAN(12), | |
1780 | SENSOR_ATTR_FAN(13), | |
1781 | SENSOR_ATTR_FAN(14), | |
1782 | }; | |
1783 | ||
edff2f8d | 1784 | static const struct sensor_device_attribute_2 w83795_temp[][28] = { |
792d376b WS |
1785 | SENSOR_ATTR_TEMP(1), |
1786 | SENSOR_ATTR_TEMP(2), | |
1787 | SENSOR_ATTR_TEMP(3), | |
1788 | SENSOR_ATTR_TEMP(4), | |
1789 | SENSOR_ATTR_TEMP(5), | |
1790 | SENSOR_ATTR_TEMP(6), | |
1791 | }; | |
1792 | ||
86ef4d2f | 1793 | static const struct sensor_device_attribute_2 w83795_dts[][8] = { |
792d376b WS |
1794 | SENSOR_ATTR_DTS(7), |
1795 | SENSOR_ATTR_DTS(8), | |
1796 | SENSOR_ATTR_DTS(9), | |
1797 | SENSOR_ATTR_DTS(10), | |
1798 | SENSOR_ATTR_DTS(11), | |
1799 | SENSOR_ATTR_DTS(12), | |
1800 | SENSOR_ATTR_DTS(13), | |
1801 | SENSOR_ATTR_DTS(14), | |
1802 | }; | |
1803 | ||
d5ab845a | 1804 | static const struct sensor_device_attribute_2 w83795_pwm[][8] = { |
b5f6a90a JD |
1805 | SENSOR_ATTR_PWM(1), |
1806 | SENSOR_ATTR_PWM(2), | |
792d376b WS |
1807 | SENSOR_ATTR_PWM(3), |
1808 | SENSOR_ATTR_PWM(4), | |
1809 | SENSOR_ATTR_PWM(5), | |
1810 | SENSOR_ATTR_PWM(6), | |
1811 | SENSOR_ATTR_PWM(7), | |
1812 | SENSOR_ATTR_PWM(8), | |
1813 | }; | |
1814 | ||
edff2f8d JD |
1815 | static const struct sensor_device_attribute_2 w83795_tss[6] = { |
1816 | SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO, | |
1817 | show_temp_src, store_temp_src, NOT_USED, 0), | |
1818 | SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO, | |
1819 | show_temp_src, store_temp_src, NOT_USED, 1), | |
1820 | SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO, | |
1821 | show_temp_src, store_temp_src, NOT_USED, 2), | |
1822 | SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO, | |
1823 | show_temp_src, store_temp_src, NOT_USED, 3), | |
1824 | SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO, | |
1825 | show_temp_src, store_temp_src, NOT_USED, 4), | |
1826 | SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO, | |
1827 | show_temp_src, store_temp_src, NOT_USED, 5), | |
1828 | }; | |
1829 | ||
86ef4d2f | 1830 | static const struct sensor_device_attribute_2 sda_single_files[] = { |
24377101 | 1831 | SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep, |
792d376b | 1832 | store_chassis_clear, ALARM_STATUS, 46), |
00030af2 | 1833 | #ifdef CONFIG_SENSORS_W83795_FANCTRL |
792d376b WS |
1834 | SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, |
1835 | store_fanin, FANIN_TOL, NOT_USED), | |
1836 | SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, | |
1837 | store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), | |
1838 | SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1839 | store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), | |
1840 | SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1841 | store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), | |
00030af2 | 1842 | #endif |
792d376b WS |
1843 | }; |
1844 | ||
52d159ee JD |
1845 | static const struct sensor_device_attribute_2 sda_beep_files[] = { |
1846 | SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep, | |
1847 | store_beep, BEEP_ENABLE, 46), | |
1848 | SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep, | |
1849 | store_beep, BEEP_ENABLE, 47), | |
1850 | }; | |
1851 | ||
792d376b WS |
1852 | /* |
1853 | * Driver interface | |
1854 | */ | |
1855 | ||
1856 | static void w83795_init_client(struct i2c_client *client) | |
1857 | { | |
01879a85 JD |
1858 | struct w83795_data *data = i2c_get_clientdata(client); |
1859 | static const u16 clkin[4] = { /* in kHz */ | |
1860 | 14318, 24000, 33333, 48000 | |
1861 | }; | |
80646b95 JD |
1862 | u8 config; |
1863 | ||
792d376b WS |
1864 | if (reset) |
1865 | w83795_write(client, W83795_REG_CONFIG, 0x80); | |
1866 | ||
80646b95 JD |
1867 | /* Start monitoring if needed */ |
1868 | config = w83795_read(client, W83795_REG_CONFIG); | |
1869 | if (!(config & W83795_REG_CONFIG_START)) { | |
1870 | dev_info(&client->dev, "Enabling monitoring operations\n"); | |
1871 | w83795_write(client, W83795_REG_CONFIG, | |
1872 | config | W83795_REG_CONFIG_START); | |
1873 | } | |
01879a85 JD |
1874 | |
1875 | data->clkin = clkin[(config >> 3) & 0x3]; | |
1876 | dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin); | |
792d376b WS |
1877 | } |
1878 | ||
2be381de JD |
1879 | static int w83795_get_device_id(struct i2c_client *client) |
1880 | { | |
1881 | int device_id; | |
1882 | ||
1883 | device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); | |
1884 | ||
c10b3ee8 GR |
1885 | /* |
1886 | * Special case for rev. A chips; can't be checked first because later | |
1887 | * revisions emulate this for compatibility | |
1888 | */ | |
2be381de JD |
1889 | if (device_id < 0 || (device_id & 0xf0) != 0x50) { |
1890 | int alt_id; | |
1891 | ||
1892 | alt_id = i2c_smbus_read_byte_data(client, | |
1893 | W83795_REG_DEVICEID_A); | |
1894 | if (alt_id == 0x50) | |
1895 | device_id = alt_id; | |
1896 | } | |
1897 | ||
1898 | return device_id; | |
1899 | } | |
1900 | ||
792d376b WS |
1901 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
1902 | static int w83795_detect(struct i2c_client *client, | |
1903 | struct i2c_board_info *info) | |
1904 | { | |
2be381de | 1905 | int bank, vendor_id, device_id, expected, i2c_addr, config; |
792d376b WS |
1906 | struct i2c_adapter *adapter = client->adapter; |
1907 | unsigned short address = client->addr; | |
093d1a47 | 1908 | const char *chip_name; |
792d376b WS |
1909 | |
1910 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
1911 | return -ENODEV; | |
1912 | bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); | |
2be381de JD |
1913 | if (bank < 0 || (bank & 0x7c)) { |
1914 | dev_dbg(&adapter->dev, | |
1915 | "w83795: Detection failed at addr 0x%02hx, check %s\n", | |
1916 | address, "bank"); | |
1917 | return -ENODEV; | |
1918 | } | |
792d376b | 1919 | |
792d376b | 1920 | /* Check Nuvoton vendor ID */ |
2be381de JD |
1921 | vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); |
1922 | expected = bank & 0x80 ? 0x5c : 0xa3; | |
1923 | if (vendor_id != expected) { | |
1924 | dev_dbg(&adapter->dev, | |
1925 | "w83795: Detection failed at addr 0x%02hx, check %s\n", | |
1926 | address, "vendor id"); | |
792d376b WS |
1927 | return -ENODEV; |
1928 | } | |
1929 | ||
2be381de JD |
1930 | /* Check device ID */ |
1931 | device_id = w83795_get_device_id(client) | | |
1932 | (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); | |
1933 | if ((device_id >> 4) != 0x795) { | |
1934 | dev_dbg(&adapter->dev, | |
1935 | "w83795: Detection failed at addr 0x%02hx, check %s\n", | |
1936 | address, "device id\n"); | |
792d376b WS |
1937 | return -ENODEV; |
1938 | } | |
1939 | ||
c10b3ee8 GR |
1940 | /* |
1941 | * If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR | |
1942 | * should match | |
1943 | */ | |
2be381de JD |
1944 | if ((bank & 0x07) == 0) { |
1945 | i2c_addr = i2c_smbus_read_byte_data(client, | |
1946 | W83795_REG_I2C_ADDR); | |
1947 | if ((i2c_addr & 0x7f) != address) { | |
1948 | dev_dbg(&adapter->dev, | |
1949 | "w83795: Detection failed at addr 0x%02hx, " | |
1950 | "check %s\n", address, "i2c addr"); | |
1951 | return -ENODEV; | |
1952 | } | |
792d376b WS |
1953 | } |
1954 | ||
c10b3ee8 GR |
1955 | /* |
1956 | * Check 795 chip type: 795G or 795ADG | |
1957 | * Usually we don't write to chips during detection, but here we don't | |
1958 | * quite have the choice; hopefully it's OK, we are about to return | |
1959 | * success anyway | |
1960 | */ | |
093d1a47 JD |
1961 | if ((bank & 0x07) != 0) |
1962 | i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, | |
1963 | bank & ~0x07); | |
2be381de JD |
1964 | config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); |
1965 | if (config & W83795_REG_CONFIG_CONFIG48) | |
093d1a47 | 1966 | chip_name = "w83795adg"; |
2be381de | 1967 | else |
093d1a47 | 1968 | chip_name = "w83795g"; |
792d376b | 1969 | |
f2f394db | 1970 | strscpy(info->type, chip_name, I2C_NAME_SIZE); |
2be381de JD |
1971 | dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, |
1972 | 'A' + (device_id & 0xf), address); | |
792d376b WS |
1973 | |
1974 | return 0; | |
1975 | } | |
1976 | ||
72fea694 JD |
1977 | #ifdef CONFIG_SENSORS_W83795_FANCTRL |
1978 | #define NUM_PWM_ATTRIBUTES ARRAY_SIZE(w83795_pwm[0]) | |
1979 | #define NUM_TEMP_ATTRIBUTES ARRAY_SIZE(w83795_temp[0]) | |
1980 | #else | |
1981 | #define NUM_PWM_ATTRIBUTES 4 | |
1982 | #define NUM_TEMP_ATTRIBUTES 8 | |
1983 | #endif | |
1984 | ||
6f3dcde9 JD |
1985 | static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, |
1986 | const struct device_attribute *)) | |
892514a6 JD |
1987 | { |
1988 | struct w83795_data *data = dev_get_drvdata(dev); | |
87df0dad | 1989 | int err, i, j; |
892514a6 JD |
1990 | |
1991 | for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { | |
87df0dad | 1992 | if (!(data->has_in & (1 << i))) |
892514a6 | 1993 | continue; |
87df0dad | 1994 | for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { |
52d159ee JD |
1995 | if (j == 4 && !data->enable_beep) |
1996 | continue; | |
87df0dad JD |
1997 | err = fn(dev, &w83795_in[i][j].dev_attr); |
1998 | if (err) | |
1999 | return err; | |
2000 | } | |
892514a6 JD |
2001 | } |
2002 | ||
2003 | for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { | |
87df0dad | 2004 | if (!(data->has_fan & (1 << i))) |
892514a6 | 2005 | continue; |
87df0dad | 2006 | for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { |
52d159ee JD |
2007 | if (j == 3 && !data->enable_beep) |
2008 | continue; | |
87df0dad JD |
2009 | err = fn(dev, &w83795_fan[i][j].dev_attr); |
2010 | if (err) | |
2011 | return err; | |
2012 | } | |
892514a6 JD |
2013 | } |
2014 | ||
edff2f8d JD |
2015 | for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) { |
2016 | j = w83795_tss_useful(data, i); | |
2017 | if (!j) | |
2018 | continue; | |
2019 | err = fn(dev, &w83795_tss[i].dev_attr); | |
2020 | if (err) | |
2021 | return err; | |
2022 | } | |
2023 | ||
892514a6 | 2024 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { |
6f3dcde9 | 2025 | err = fn(dev, &sda_single_files[i].dev_attr); |
892514a6 JD |
2026 | if (err) |
2027 | return err; | |
2028 | } | |
2029 | ||
52d159ee JD |
2030 | if (data->enable_beep) { |
2031 | for (i = 0; i < ARRAY_SIZE(sda_beep_files); i++) { | |
2032 | err = fn(dev, &sda_beep_files[i].dev_attr); | |
2033 | if (err) | |
2034 | return err; | |
2035 | } | |
2036 | } | |
2037 | ||
b5f6a90a | 2038 | for (i = 0; i < data->has_pwm; i++) { |
72fea694 | 2039 | for (j = 0; j < NUM_PWM_ATTRIBUTES; j++) { |
b5f6a90a | 2040 | err = fn(dev, &w83795_pwm[i][j].dev_attr); |
892514a6 JD |
2041 | if (err) |
2042 | return err; | |
2043 | } | |
2044 | } | |
2045 | ||
2046 | for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { | |
87df0dad | 2047 | if (!(data->has_temp & (1 << i))) |
892514a6 | 2048 | continue; |
72fea694 | 2049 | for (j = 0; j < NUM_TEMP_ATTRIBUTES; j++) { |
52d159ee JD |
2050 | if (j == 7 && !data->enable_beep) |
2051 | continue; | |
87df0dad JD |
2052 | err = fn(dev, &w83795_temp[i][j].dev_attr); |
2053 | if (err) | |
2054 | return err; | |
2055 | } | |
892514a6 JD |
2056 | } |
2057 | ||
eb02755a | 2058 | if (data->enable_dts) { |
892514a6 | 2059 | for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { |
87df0dad | 2060 | if (!(data->has_dts & (1 << i))) |
892514a6 | 2061 | continue; |
87df0dad | 2062 | for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { |
52d159ee JD |
2063 | if (j == 7 && !data->enable_beep) |
2064 | continue; | |
87df0dad JD |
2065 | err = fn(dev, &w83795_dts[i][j].dev_attr); |
2066 | if (err) | |
2067 | return err; | |
2068 | } | |
892514a6 JD |
2069 | } |
2070 | } | |
2071 | ||
892514a6 JD |
2072 | return 0; |
2073 | } | |
2074 | ||
6f3dcde9 JD |
2075 | /* We need a wrapper that fits in w83795_handle_files */ |
2076 | static int device_remove_file_wrapper(struct device *dev, | |
2077 | const struct device_attribute *attr) | |
2fa09878 | 2078 | { |
6f3dcde9 JD |
2079 | device_remove_file(dev, attr); |
2080 | return 0; | |
2fa09878 JD |
2081 | } |
2082 | ||
0e256018 JD |
2083 | static void w83795_check_dynamic_in_limits(struct i2c_client *client) |
2084 | { | |
2085 | struct w83795_data *data = i2c_get_clientdata(client); | |
2086 | u8 vid_ctl; | |
2087 | int i, err_max, err_min; | |
2088 | ||
2089 | vid_ctl = w83795_read(client, W83795_REG_VID_CTRL); | |
2090 | ||
2091 | /* Return immediately if VRM isn't configured */ | |
2092 | if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07) | |
2093 | return; | |
2094 | ||
2095 | data->has_dyn_in = (vid_ctl >> 3) & 0x07; | |
2096 | for (i = 0; i < 2; i++) { | |
2097 | if (!(data->has_dyn_in & (1 << i))) | |
2098 | continue; | |
2099 | ||
2100 | /* Voltage limits in dynamic mode, switch to read-only */ | |
2101 | err_max = sysfs_chmod_file(&client->dev.kobj, | |
2102 | &w83795_in[i][2].dev_attr.attr, | |
2103 | S_IRUGO); | |
2104 | err_min = sysfs_chmod_file(&client->dev.kobj, | |
2105 | &w83795_in[i][3].dev_attr.attr, | |
2106 | S_IRUGO); | |
2107 | if (err_max || err_min) | |
b55f3757 GR |
2108 | dev_warn(&client->dev, |
2109 | "Failed to set in%d limits read-only (%d, %d)\n", | |
2110 | i, err_max, err_min); | |
0e256018 | 2111 | else |
b55f3757 GR |
2112 | dev_info(&client->dev, |
2113 | "in%d limits set dynamically from VID\n", i); | |
0e256018 JD |
2114 | } |
2115 | } | |
2116 | ||
71caf46f JD |
2117 | /* Check pins that can be used for either temperature or voltage monitoring */ |
2118 | static void w83795_apply_temp_config(struct w83795_data *data, u8 config, | |
2119 | int temp_chan, int in_chan) | |
2120 | { | |
2121 | /* config is a 2-bit value */ | |
2122 | switch (config) { | |
2123 | case 0x2: /* Voltage monitoring */ | |
2124 | data->has_in |= 1 << in_chan; | |
2125 | break; | |
2126 | case 0x1: /* Thermal diode */ | |
2127 | if (temp_chan >= 4) | |
2128 | break; | |
2129 | data->temp_mode |= 1 << temp_chan; | |
df561f66 | 2130 | fallthrough; |
71caf46f JD |
2131 | case 0x3: /* Thermistor */ |
2132 | data->has_temp |= 1 << temp_chan; | |
2133 | break; | |
2134 | } | |
2135 | } | |
2136 | ||
673afe46 SK |
2137 | static const struct i2c_device_id w83795_id[]; |
2138 | ||
2139 | static int w83795_probe(struct i2c_client *client) | |
792d376b WS |
2140 | { |
2141 | int i; | |
2142 | u8 tmp; | |
2143 | struct device *dev = &client->dev; | |
2144 | struct w83795_data *data; | |
71caf46f | 2145 | int err; |
792d376b | 2146 | |
4cb14a3a GR |
2147 | data = devm_kzalloc(dev, sizeof(struct w83795_data), GFP_KERNEL); |
2148 | if (!data) | |
2149 | return -ENOMEM; | |
792d376b WS |
2150 | |
2151 | i2c_set_clientdata(client, data); | |
673afe46 | 2152 | data->chip_type = i2c_match_id(w83795_id, client)->driver_data; |
792d376b WS |
2153 | data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); |
2154 | mutex_init(&data->update_lock); | |
2155 | ||
2156 | /* Initialize the chip */ | |
2157 | w83795_init_client(client); | |
2158 | ||
71caf46f JD |
2159 | /* Check which voltages and fans are present */ |
2160 | data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1) | |
2161 | | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8); | |
2162 | data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1) | |
2163 | | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8); | |
792d376b | 2164 | |
71caf46f | 2165 | /* Check which analog temperatures and extra voltages are present */ |
792d376b WS |
2166 | tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); |
2167 | if (tmp & 0x20) | |
2168 | data->enable_dts = 1; | |
71caf46f JD |
2169 | w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16); |
2170 | w83795_apply_temp_config(data, tmp & 0x3, 4, 15); | |
792d376b | 2171 | tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); |
71caf46f JD |
2172 | w83795_apply_temp_config(data, tmp >> 6, 3, 20); |
2173 | w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19); | |
2174 | w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18); | |
2175 | w83795_apply_temp_config(data, tmp & 0x3, 0, 17); | |
792d376b WS |
2176 | |
2177 | /* Check DTS enable status */ | |
71caf46f | 2178 | if (data->enable_dts) { |
792d376b WS |
2179 | if (1 & w83795_read(client, W83795_REG_DTSC)) |
2180 | data->enable_dts |= 2; | |
2181 | data->has_dts = w83795_read(client, W83795_REG_DTSE); | |
2182 | } | |
2183 | ||
54891a3c JD |
2184 | /* Report PECI Tbase values */ |
2185 | if (data->enable_dts == 1) { | |
2186 | for (i = 0; i < 8; i++) { | |
2187 | if (!(data->has_dts & (1 << i))) | |
2188 | continue; | |
2189 | tmp = w83795_read(client, W83795_REG_PECI_TBASE(i)); | |
2190 | dev_info(&client->dev, | |
2191 | "PECI agent %d Tbase temperature: %u\n", | |
2192 | i + 1, (unsigned int)tmp & 0x7f); | |
2193 | } | |
2194 | } | |
2195 | ||
792d376b | 2196 | data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; |
792d376b WS |
2197 | |
2198 | /* pwm and smart fan */ | |
2199 | if (data->chip_type == w83795g) | |
2200 | data->has_pwm = 8; | |
2201 | else | |
2202 | data->has_pwm = 2; | |
792d376b | 2203 | |
52d159ee JD |
2204 | /* Check if BEEP pin is available */ |
2205 | if (data->chip_type == w83795g) { | |
2206 | /* The W83795G has a dedicated BEEP pin */ | |
2207 | data->enable_beep = 1; | |
2208 | } else { | |
c10b3ee8 GR |
2209 | /* |
2210 | * The W83795ADG has a shared pin for OVT# and BEEP, so you | |
2211 | * can't have both | |
2212 | */ | |
52d159ee JD |
2213 | tmp = w83795_read(client, W83795_REG_OVT_CFG); |
2214 | if ((tmp & OVT_CFG_SEL) == 0) | |
2215 | data->enable_beep = 1; | |
2216 | } | |
2217 | ||
6f3dcde9 | 2218 | err = w83795_handle_files(dev, device_create_file); |
892514a6 JD |
2219 | if (err) |
2220 | goto exit_remove; | |
792d376b | 2221 | |
0e256018 JD |
2222 | if (data->chip_type == w83795g) |
2223 | w83795_check_dynamic_in_limits(client); | |
2224 | ||
792d376b WS |
2225 | data->hwmon_dev = hwmon_device_register(dev); |
2226 | if (IS_ERR(data->hwmon_dev)) { | |
2227 | err = PTR_ERR(data->hwmon_dev); | |
2228 | goto exit_remove; | |
2229 | } | |
2230 | ||
2231 | return 0; | |
2232 | ||
792d376b | 2233 | exit_remove: |
6f3dcde9 | 2234 | w83795_handle_files(dev, device_remove_file_wrapper); |
792d376b WS |
2235 | return err; |
2236 | } | |
2237 | ||
ed5c2f5f | 2238 | static void w83795_remove(struct i2c_client *client) |
792d376b WS |
2239 | { |
2240 | struct w83795_data *data = i2c_get_clientdata(client); | |
792d376b WS |
2241 | |
2242 | hwmon_device_unregister(data->hwmon_dev); | |
6f3dcde9 | 2243 | w83795_handle_files(&client->dev, device_remove_file_wrapper); |
792d376b WS |
2244 | } |
2245 | ||
2246 | ||
2247 | static const struct i2c_device_id w83795_id[] = { | |
093d1a47 JD |
2248 | { "w83795g", w83795g }, |
2249 | { "w83795adg", w83795adg }, | |
792d376b WS |
2250 | { } |
2251 | }; | |
2252 | MODULE_DEVICE_TABLE(i2c, w83795_id); | |
2253 | ||
2254 | static struct i2c_driver w83795_driver = { | |
2255 | .driver = { | |
2256 | .name = "w83795", | |
2257 | }, | |
1975d167 | 2258 | .probe = w83795_probe, |
792d376b WS |
2259 | .remove = w83795_remove, |
2260 | .id_table = w83795_id, | |
2261 | ||
2262 | .class = I2C_CLASS_HWMON, | |
2263 | .detect = w83795_detect, | |
2264 | .address_list = normal_i2c, | |
2265 | }; | |
2266 | ||
f0967eea | 2267 | module_i2c_driver(w83795_driver); |
792d376b | 2268 | |
7c81c60f | 2269 | MODULE_AUTHOR("Wei Song, Jean Delvare <jdelvare@suse.de>"); |
315bacfd | 2270 | MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); |
792d376b | 2271 | MODULE_LICENSE("GPL"); |