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[PATCH] i2c: Rename i2c-sis96x documentation file
[linux-block.git] / drivers / hwmon / w83792d.c
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5563e27d
M		 1/*
2 w83792d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (C) 2004, 2005 Winbond Electronics Corp.
5 Chunhao Huang <DZShen@Winbond.com.tw>,
6 Rudolf Marek <r.marek@sh.cvut.cz>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22 Note:
23 1. This driver is only for 2.6 kernel, 2.4 kernel need a different driver.
24 2. This driver is only for Winbond W83792D C version device, there
25 are also some motherboards with B version W83792D device. The
26 calculation method to in6-in7(measured value, limits) is a little
27 different between C and B version. C or B version can be identified
28 by CR[0x49h].
29*/
30
31/*
32 Supports following chips:
33
34 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
35 w83792d 9 7 7 3 0x7a 0x5ca3 yes no
36*/
37
38#include <linux/config.h>
39#include <linux/module.h>
40#include <linux/init.h>
41#include <linux/slab.h>
42#include <linux/i2c.h>
ce785ab4 43#include <linux/hwmon.h>
5563e27d 44#include <linux/hwmon-sysfs.h>
ce785ab4 45#include <linux/err.h>
5563e27d
M		 46
47/* Addresses to scan */
48static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
49
50/* Insmod parameters */
f4b50261 51I2C_CLIENT_INSMOD_1(w83792d);
5563e27d
M		 52I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
53 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
54
55static int init;
56module_param(init, bool, 0);
57MODULE_PARM_DESC(init, "Set to one to force chip initialization");
58
59/* The W83792D registers */
60static const u8 W83792D_REG_IN[9] = {
61 0x20, /* Vcore A in DataSheet */
62 0x21, /* Vcore B in DataSheet */
63 0x22, /* VIN0 in DataSheet */
64 0x23, /* VIN1 in DataSheet */
65 0x24, /* VIN2 in DataSheet */
66 0x25, /* VIN3 in DataSheet */
67 0x26, /* 5VCC in DataSheet */
68 0xB0, /* 5VSB in DataSheet */
69 0xB1 /* VBAT in DataSheet */
70};
71#define W83792D_REG_LOW_BITS1 0x3E /* Low Bits I in DataSheet */
72#define W83792D_REG_LOW_BITS2 0x3F /* Low Bits II in DataSheet */
73static const u8 W83792D_REG_IN_MAX[9] = {
74 0x2B, /* Vcore A High Limit in DataSheet */
75 0x2D, /* Vcore B High Limit in DataSheet */
76 0x2F, /* VIN0 High Limit in DataSheet */
77 0x31, /* VIN1 High Limit in DataSheet */
78 0x33, /* VIN2 High Limit in DataSheet */
79 0x35, /* VIN3 High Limit in DataSheet */
80 0x37, /* 5VCC High Limit in DataSheet */
81 0xB4, /* 5VSB High Limit in DataSheet */
82 0xB6 /* VBAT High Limit in DataSheet */
83};
84static const u8 W83792D_REG_IN_MIN[9] = {
85 0x2C, /* Vcore A Low Limit in DataSheet */
86 0x2E, /* Vcore B Low Limit in DataSheet */
87 0x30, /* VIN0 Low Limit in DataSheet */
88 0x32, /* VIN1 Low Limit in DataSheet */
89 0x34, /* VIN2 Low Limit in DataSheet */
90 0x36, /* VIN3 Low Limit in DataSheet */
91 0x38, /* 5VCC Low Limit in DataSheet */
92 0xB5, /* 5VSB Low Limit in DataSheet */
93 0xB7 /* VBAT Low Limit in DataSheet */
94};
95static const u8 W83792D_REG_FAN[7] = {
96 0x28, /* FAN 1 Count in DataSheet */
97 0x29, /* FAN 2 Count in DataSheet */
98 0x2A, /* FAN 3 Count in DataSheet */
99 0xB8, /* FAN 4 Count in DataSheet */
100 0xB9, /* FAN 5 Count in DataSheet */
101 0xBA, /* FAN 6 Count in DataSheet */
102 0xBE /* FAN 7 Count in DataSheet */
103};
104static const u8 W83792D_REG_FAN_MIN[7] = {
105 0x3B, /* FAN 1 Count Low Limit in DataSheet */
106 0x3C, /* FAN 2 Count Low Limit in DataSheet */
107 0x3D, /* FAN 3 Count Low Limit in DataSheet */
108 0xBB, /* FAN 4 Count Low Limit in DataSheet */
109 0xBC, /* FAN 5 Count Low Limit in DataSheet */
110 0xBD, /* FAN 6 Count Low Limit in DataSheet */
111 0xBF /* FAN 7 Count Low Limit in DataSheet */
112};
113#define W83792D_REG_FAN_CFG 0x84 /* FAN Configuration in DataSheet */
114static const u8 W83792D_REG_FAN_DIV[4] = {
115 0x47, /* contains FAN2 and FAN1 Divisor */
116 0x5B, /* contains FAN4 and FAN3 Divisor */
117 0x5C, /* contains FAN6 and FAN5 Divisor */
118 0x9E /* contains FAN7 Divisor. */
119};
120static const u8 W83792D_REG_PWM[7] = {
121 0x81, /* FAN 1 Duty Cycle, be used to control */
122 0x83, /* FAN 2 Duty Cycle, be used to control */
123 0x94, /* FAN 3 Duty Cycle, be used to control */
124 0xA3, /* FAN 4 Duty Cycle, be used to control */
125 0xA4, /* FAN 5 Duty Cycle, be used to control */
126 0xA5, /* FAN 6 Duty Cycle, be used to control */
127 0xA6 /* FAN 7 Duty Cycle, be used to control */
128};
129#define W83792D_REG_BANK 0x4E
130#define W83792D_REG_TEMP2_CONFIG 0xC2
131#define W83792D_REG_TEMP3_CONFIG 0xCA
132
133static const u8 W83792D_REG_TEMP1[3] = {
134 0x27, /* TEMP 1 in DataSheet */
135 0x39, /* TEMP 1 Over in DataSheet */
136 0x3A, /* TEMP 1 Hyst in DataSheet */
137};
138
139static const u8 W83792D_REG_TEMP_ADD[2][6] = {
140 { 0xC0, /* TEMP 2 in DataSheet */
141 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
142 0xC5, /* TEMP 2 Over High part in DataSheet */
143 0xC6, /* TEMP 2 Over Low part in DataSheet */
144 0xC3, /* TEMP 2 Thyst High part in DataSheet */
145 0xC4 }, /* TEMP 2 Thyst Low part in DataSheet */
146 { 0xC8, /* TEMP 3 in DataSheet */
147 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
148 0xCD, /* TEMP 3 Over High part in DataSheet */
149 0xCE, /* TEMP 3 Over Low part in DataSheet */
150 0xCB, /* TEMP 3 Thyst High part in DataSheet */
151 0xCC } /* TEMP 3 Thyst Low part in DataSheet */
152};
153
154static const u8 W83792D_REG_THERMAL[3] = {
155 0x85, /* SmartFanI: Fan1 target value */
156 0x86, /* SmartFanI: Fan2 target value */
157 0x96 /* SmartFanI: Fan3 target value */
158};
159
160static const u8 W83792D_REG_TOLERANCE[3] = {
161 0x87, /* (bit3-0)SmartFan Fan1 tolerance */
162 0x87, /* (bit7-4)SmartFan Fan2 tolerance */
163 0x97 /* (bit3-0)SmartFan Fan3 tolerance */
164};
165
166static const u8 W83792D_REG_POINTS[3][4] = {
167 { 0x85, /* SmartFanII: Fan1 temp point 1 */
168 0xE3, /* SmartFanII: Fan1 temp point 2 */
169 0xE4, /* SmartFanII: Fan1 temp point 3 */
170 0xE5 }, /* SmartFanII: Fan1 temp point 4 */
171 { 0x86, /* SmartFanII: Fan2 temp point 1 */
172 0xE6, /* SmartFanII: Fan2 temp point 2 */
173 0xE7, /* SmartFanII: Fan2 temp point 3 */
174 0xE8 }, /* SmartFanII: Fan2 temp point 4 */
175 { 0x96, /* SmartFanII: Fan3 temp point 1 */
176 0xE9, /* SmartFanII: Fan3 temp point 2 */
177 0xEA, /* SmartFanII: Fan3 temp point 3 */
178 0xEB } /* SmartFanII: Fan3 temp point 4 */
179};
180
181static const u8 W83792D_REG_LEVELS[3][4] = {
182 { 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
183 0x88, /* (bit7-4) SmartFanII: Fan1 Level 1 */
184 0xE0, /* (bit7-4) SmartFanII: Fan1 Level 2 */
185 0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
186 { 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
187 0x89, /* (bit7-4) SmartFanII: Fan2 Level 1 */
188 0xE1, /* (bit7-4) SmartFanII: Fan2 Level 2 */
189 0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
190 { 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
191 0x98, /* (bit7-4) SmartFanII: Fan3 Level 1 */
192 0xE2, /* (bit7-4) SmartFanII: Fan3 Level 2 */
193 0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
194};
195
96320519 196#define W83792D_REG_GPIO_EN 0x1A
5563e27d
M		 197#define W83792D_REG_CONFIG 0x40
198#define W83792D_REG_VID_FANDIV 0x47
199#define W83792D_REG_CHIPID 0x49
200#define W83792D_REG_WCHIPID 0x58
201#define W83792D_REG_CHIPMAN 0x4F
202#define W83792D_REG_PIN 0x4B
203#define W83792D_REG_I2C_SUBADDR 0x4A
204
205#define W83792D_REG_ALARM1 0xA9 /* realtime status register1 */
206#define W83792D_REG_ALARM2 0xAA /* realtime status register2 */
207#define W83792D_REG_ALARM3 0xAB /* realtime status register3 */
208#define W83792D_REG_CHASSIS 0x42 /* Bit 5: Case Open status bit */
209#define W83792D_REG_CHASSIS_CLR 0x44 /* Bit 7: Case Open CLR_CHS/Reset bit */
210
211/* control in0/in1 's limit modifiability */
212#define W83792D_REG_VID_IN_B 0x17
213
214#define W83792D_REG_VBAT 0x5D
215#define W83792D_REG_I2C_ADDR 0x48
216
217/* Conversions. Rounding and limit checking is only done on the TO_REG
218 variants. Note that you should be a bit careful with which arguments
219 these macros are called: arguments may be evaluated more than once.
220 Fixing this is just not worth it. */
221#define IN_FROM_REG(nr,val) (((nr)<=1)?(val*2): \
222 ((((nr)==6)||((nr)==7))?(val*6):(val*4)))
223#define IN_TO_REG(nr,val) (((nr)<=1)?(val/2): \
224 ((((nr)==6)||((nr)==7))?(val/6):(val/4)))
225
226static inline u8
227FAN_TO_REG(long rpm, int div)
228{
229 if (rpm == 0)
230 return 255;
231 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
232 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
233}
234
235#define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
236 ((val) == 255 ? 0 : \
237 1350000 / ((val) * (div))))
238
239/* for temp1 */
240#define TEMP1_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
241 : (val)) / 1000, 0, 0xff))
242#define TEMP1_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
243/* for temp2 and temp3, because they need addtional resolution */
244#define TEMP_ADD_FROM_REG(val1, val2) \
245 ((((val1) & 0x80 ? (val1)-0x100 \
246 : (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
247#define TEMP_ADD_TO_REG_HIGH(val) \
248 (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
249 : (val)) / 1000, 0, 0xff))
250#define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00)
251
252#define PWM_FROM_REG(val) (val)
253#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
254#define DIV_FROM_REG(val) (1 << (val))
255
256static inline u8
257DIV_TO_REG(long val)
258{
259 int i;
260 val = SENSORS_LIMIT(val, 1, 128) >> 1;
96320519 261 for (i = 0; i < 7; i++) {
5563e27d
M		 262 if (val == 0)
263 break;
264 val >>= 1;
265 }
266 return ((u8) i);
267}
268
269struct w83792d_data {
270 struct i2c_client client;
ce785ab4 271 struct class_device *class_dev;
5563e27d
M		 272 enum chips type;
273
274 struct semaphore update_lock;
275 char valid; /* !=0 if following fields are valid */
276 unsigned long last_updated; /* In jiffies */
277
278 /* array of 2 pointers to subclients */
279 struct i2c_client *lm75[2];
280
281 u8 in[9]; /* Register value */
282 u8 in_max[9]; /* Register value */
283 u8 in_min[9]; /* Register value */
99d85560 284 u16 low_bits; /* Additional resolution to voltage in6-0 */
5563e27d
M		 285 u8 fan[7]; /* Register value */
286 u8 fan_min[7]; /* Register value */
287 u8 temp1[3]; /* current, over, thyst */
288 u8 temp_add[2][6]; /* Register value */
289 u8 fan_div[7]; /* Register encoding, shifted right */
290 u8 pwm[7]; /* We only consider the first 3 set of pwm,
291 although 792 chip has 7 set of pwm. */
292 u8 pwmenable[3];
293 u8 pwm_mode[7]; /* indicates PWM or DC mode: 1->PWM; 0->DC */
294 u32 alarms; /* realtime status register encoding,combined */
295 u8 chassis; /* Chassis status */
296 u8 chassis_clear; /* CLR_CHS, clear chassis intrusion detection */
297 u8 thermal_cruise[3]; /* Smart FanI: Fan1,2,3 target value */
298 u8 tolerance[3]; /* Fan1,2,3 tolerance(Smart Fan I/II) */
299 u8 sf2_points[3][4]; /* Smart FanII: Fan1,2,3 temperature points */
300 u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
301};
302
303static int w83792d_attach_adapter(struct i2c_adapter *adapter);
304static int w83792d_detect(struct i2c_adapter *adapter, int address, int kind);
305static int w83792d_detach_client(struct i2c_client *client);
306
307static int w83792d_read_value(struct i2c_client *client, u8 register);
308static int w83792d_write_value(struct i2c_client *client, u8 register,
309 u8 value);
310static struct w83792d_data *w83792d_update_device(struct device *dev);
311
312#ifdef DEBUG
313static void w83792d_print_debug(struct w83792d_data *data, struct device *dev);
314#endif
315
316static void w83792d_init_client(struct i2c_client *client);
317
318static struct i2c_driver w83792d_driver = {
cdaf7934 319 .driver = {
cdaf7934
LR		 320 .name = "w83792d",
321 },
5563e27d
M		 322 .attach_adapter = w83792d_attach_adapter,
323 .detach_client = w83792d_detach_client,
324};
325
99d85560 326static inline long in_count_from_reg(int nr, struct w83792d_data *data)
5563e27d 327{
99d85560
JD		 328 /* in7 and in8 do not have low bits, but the formula still works */
329 return ((data->in[nr] << 2) | ((data->low_bits >> (2 * nr)) & 0x03));
5563e27d
M		 330}
331
332/* following are the sysfs callback functions */
333static ssize_t show_in(struct device *dev, struct device_attribute *attr,
334 char *buf)
335{
336 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
337 int nr = sensor_attr->index;
338 struct w83792d_data *data = w83792d_update_device(dev);
339 return sprintf(buf,"%ld\n", IN_FROM_REG(nr,(in_count_from_reg(nr, data))));
340}
341
342#define show_in_reg(reg) \
343static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
344 char *buf) \
345{ \
346 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
347 int nr = sensor_attr->index; \
348 struct w83792d_data *data = w83792d_update_device(dev); \
349 return sprintf(buf,"%ld\n", (long)(IN_FROM_REG(nr, (data->reg[nr])*4))); \
350}
351
352show_in_reg(in_min);
353show_in_reg(in_max);
354
355#define store_in_reg(REG, reg) \
356static ssize_t store_in_##reg (struct device *dev, \
357 struct device_attribute *attr, \
358 const char *buf, size_t count) \
359{ \
360 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
361 int nr = sensor_attr->index; \
362 struct i2c_client *client = to_i2c_client(dev); \
363 struct w83792d_data *data = i2c_get_clientdata(client); \
364 u32 val; \
365 \
366 val = simple_strtoul(buf, NULL, 10); \
367 data->in_##reg[nr] = SENSORS_LIMIT(IN_TO_REG(nr, val)/4, 0, 255); \
368 w83792d_write_value(client, W83792D_REG_IN_##REG[nr], data->in_##reg[nr]); \
369 \
370 return count; \
371}
372store_in_reg(MIN, min);
373store_in_reg(MAX, max);
374
375#define sysfs_in_reg(offset) \
376static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, show_in, \
377 NULL, offset); \
378static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
379 show_in_min, store_in_min, offset); \
380static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
381 show_in_max, store_in_max, offset);
382
383sysfs_in_reg(0);
384sysfs_in_reg(1);
385sysfs_in_reg(2);
386sysfs_in_reg(3);
387sysfs_in_reg(4);
388sysfs_in_reg(5);
389sysfs_in_reg(6);
390sysfs_in_reg(7);
391sysfs_in_reg(8);
392
393#define device_create_file_in(client, offset) \
394do { \
395device_create_file(&client->dev, &sensor_dev_attr_in##offset##_input.dev_attr); \
396device_create_file(&client->dev, &sensor_dev_attr_in##offset##_max.dev_attr); \
397device_create_file(&client->dev, &sensor_dev_attr_in##offset##_min.dev_attr); \
398} while (0)
399
400#define show_fan_reg(reg) \
401static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
402 char *buf) \
403{ \
404 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
405 int nr = sensor_attr->index - 1; \
406 struct w83792d_data *data = w83792d_update_device(dev); \
407 return sprintf(buf,"%d\n", \
408 FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
409}
410
411show_fan_reg(fan);
412show_fan_reg(fan_min);
413
414static ssize_t
415store_fan_min(struct device *dev, struct device_attribute *attr,
416 const char *buf, size_t count)
417{
418 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
419 int nr = sensor_attr->index - 1;
420 struct i2c_client *client = to_i2c_client(dev);
421 struct w83792d_data *data = i2c_get_clientdata(client);
422 u32 val;
423
424 val = simple_strtoul(buf, NULL, 10);
425 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
426 w83792d_write_value(client, W83792D_REG_FAN_MIN[nr],
427 data->fan_min[nr]);
428
429 return count;
430}
431
432static ssize_t
433show_fan_div(struct device *dev, struct device_attribute *attr,
434 char *buf)
435{
436 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
437 int nr = sensor_attr->index;
438 struct w83792d_data *data = w83792d_update_device(dev);
439 return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr - 1]));
440}
441
442/* Note: we save and restore the fan minimum here, because its value is
443 determined in part by the fan divisor. This follows the principle of
444 least suprise; the user doesn't expect the fan minimum to change just
445 because the divisor changed. */
446static ssize_t
447store_fan_div(struct device *dev, struct device_attribute *attr,
448 const char *buf, size_t count)
449{
450 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
451 int nr = sensor_attr->index - 1;
452 struct i2c_client *client = to_i2c_client(dev);
453 struct w83792d_data *data = i2c_get_clientdata(client);
454 unsigned long min;
455 /*u8 reg;*/
456 u8 fan_div_reg = 0;
457 u8 tmp_fan_div;
458
459 /* Save fan_min */
460 min = FAN_FROM_REG(data->fan_min[nr],
461 DIV_FROM_REG(data->fan_div[nr]));
462
463 data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10));
464
465 fan_div_reg = w83792d_read_value(client, W83792D_REG_FAN_DIV[nr >> 1]);
466 fan_div_reg &= (nr & 0x01) ? 0x8f : 0xf8;
467 tmp_fan_div = (nr & 0x01) ? (((data->fan_div[nr]) << 4) & 0x70)
468 : ((data->fan_div[nr]) & 0x07);
469 w83792d_write_value(client, W83792D_REG_FAN_DIV[nr >> 1],
470 fan_div_reg | tmp_fan_div);
471
472 /* Restore fan_min */
473 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
474 w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]);
475
476 return count;
477}
478
479#define sysfs_fan(offset) \
480static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_fan, NULL, \
481 offset); \
482static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
483 show_fan_div, store_fan_div, offset); \
484static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
485 show_fan_min, store_fan_min, offset);
486
487sysfs_fan(1);
488sysfs_fan(2);
489sysfs_fan(3);
490sysfs_fan(4);
491sysfs_fan(5);
492sysfs_fan(6);
493sysfs_fan(7);
494
495#define device_create_file_fan(client, offset) \
496do { \
497device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_input.dev_attr); \
498device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_div.dev_attr); \
499device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_min.dev_attr); \
500} while (0)
501
502
503/* read/write the temperature1, includes measured value and limits */
504
505static ssize_t show_temp1(struct device *dev, struct device_attribute *attr,
506 char *buf)
507{
508 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
509 int nr = sensor_attr->index;
510 struct w83792d_data *data = w83792d_update_device(dev);
511 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[nr]));
512}
513
514static ssize_t store_temp1(struct device *dev, struct device_attribute *attr,
515 const char *buf, size_t count)
516{
517 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
518 int nr = sensor_attr->index;
519 struct i2c_client *client = to_i2c_client(dev);
520 struct w83792d_data *data = i2c_get_clientdata(client);
521 s32 val;
522
523 val = simple_strtol(buf, NULL, 10);
524
525 data->temp1[nr] = TEMP1_TO_REG(val);
526 w83792d_write_value(client, W83792D_REG_TEMP1[nr],
527 data->temp1[nr]);
528
529 return count;
530}
531
532
533static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0);
534static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1,
535 store_temp1, 1);
536static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1,
537 store_temp1, 2);
538
539#define device_create_file_temp1(client) \
540do { \
541device_create_file(&client->dev, &sensor_dev_attr_temp1_input.dev_attr); \
542device_create_file(&client->dev, &sensor_dev_attr_temp1_max.dev_attr); \
543device_create_file(&client->dev, &sensor_dev_attr_temp1_max_hyst.dev_attr); \
544} while (0)
545
546
547/* read/write the temperature2-3, includes measured value and limits */
548
549static ssize_t show_temp23(struct device *dev, struct device_attribute *attr,
550 char *buf)
551{
552 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
553 int nr = sensor_attr->nr;
554 int index = sensor_attr->index;
555 struct w83792d_data *data = w83792d_update_device(dev);
556 return sprintf(buf,"%ld\n",
557 (long)TEMP_ADD_FROM_REG(data->temp_add[nr][index],
558 data->temp_add[nr][index+1]));
559}
560
561static ssize_t store_temp23(struct device *dev, struct device_attribute *attr,
562 const char *buf, size_t count)
563{
564 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
565 int nr = sensor_attr->nr;
566 int index = sensor_attr->index;
567 struct i2c_client *client = to_i2c_client(dev);
568 struct w83792d_data *data = i2c_get_clientdata(client);
569 s32 val;
570
571 val = simple_strtol(buf, NULL, 10);
572
573 data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val);
574 data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val);
575 w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index],
576 data->temp_add[nr][index]);
577 w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1],
578 data->temp_add[nr][index+1]);
579
580 return count;
581}
582
583#define sysfs_temp23(name,idx) \
584static SENSOR_DEVICE_ATTR_2(name##_input, S_IRUGO, show_temp23, NULL, \
585 idx, 0); \
586static SENSOR_DEVICE_ATTR_2(name##_max, S_IRUGO | S_IWUSR, \
587 show_temp23, store_temp23, idx, 2); \
588static SENSOR_DEVICE_ATTR_2(name##_max_hyst, S_IRUGO | S_IWUSR, \
589 show_temp23, store_temp23, idx, 4);
590
591sysfs_temp23(temp2,0)
592sysfs_temp23(temp3,1)
593
594#define device_create_file_temp_add(client, offset) \
595do { \
596device_create_file(&client->dev, &sensor_dev_attr_temp##offset##_input.dev_attr); \
597device_create_file(&client->dev, &sensor_dev_attr_temp##offset##_max.dev_attr); \
598device_create_file(&client->dev, \
599&sensor_dev_attr_temp##offset##_max_hyst.dev_attr); \
600} while (0)
601
602
603/* get reatime status of all sensors items: voltage, temp, fan */
604static ssize_t
605show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
606{
607 struct w83792d_data *data = w83792d_update_device(dev);
608 return sprintf(buf, "%d\n", data->alarms);
609}
610
611static
612DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
613#define device_create_file_alarms(client) \
614device_create_file(&client->dev, &dev_attr_alarms);
615
616
617
618static ssize_t
619show_pwm(struct device *dev, struct device_attribute *attr,
620 char *buf)
621{
622 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
623 int nr = sensor_attr->index;
624 struct w83792d_data *data = w83792d_update_device(dev);
625 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr-1]));
626}
627
628static ssize_t
629show_pwmenable(struct device *dev, struct device_attribute *attr,
630 char *buf)
631{
632 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
633 int nr = sensor_attr->index - 1;
634 struct w83792d_data *data = w83792d_update_device(dev);
635 long pwm_enable_tmp = 1;
636
637 switch (data->pwmenable[nr]) {
638 case 0:
639 pwm_enable_tmp = 1; /* manual mode */
640 break;
641 case 1:
642 pwm_enable_tmp = 3; /*thermal cruise/Smart Fan I */
643 break;
644 case 2:
645 pwm_enable_tmp = 2; /* Smart Fan II */
646 break;
647 }
648
649 return sprintf(buf, "%ld\n", pwm_enable_tmp);
650}
651
652static ssize_t
653store_pwm(struct device *dev, struct device_attribute *attr,
654 const char *buf, size_t count)
655{
656 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
657 int nr = sensor_attr->index - 1;
658 struct i2c_client *client = to_i2c_client(dev);
659 struct w83792d_data *data = i2c_get_clientdata(client);
660 u32 val;
661
662 val = simple_strtoul(buf, NULL, 10);
663 data->pwm[nr] = PWM_TO_REG(val);
664 w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
665
666 return count;
667}
668
669static ssize_t
670store_pwmenable(struct device *dev, struct device_attribute *attr,
671 const char *buf, size_t count)
672{
673 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
674 int nr = sensor_attr->index - 1;
675 struct i2c_client *client = to_i2c_client(dev);
676 struct w83792d_data *data = i2c_get_clientdata(client);
677 u32 val;
678 u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp;
679
680 val = simple_strtoul(buf, NULL, 10);
681 switch (val) {
682 case 1:
683 data->pwmenable[nr] = 0; /* manual mode */
684 break;
685 case 2:
686 data->pwmenable[nr] = 2; /* Smart Fan II */
687 break;
688 case 3:
689 data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */
690 break;
691 default:
692 return -EINVAL;
693 }
694 cfg1_tmp = data->pwmenable[0];
695 cfg2_tmp = (data->pwmenable[1]) << 2;
696 cfg3_tmp = (data->pwmenable[2]) << 4;
697 cfg4_tmp = w83792d_read_value(client,W83792D_REG_FAN_CFG) & 0xc0;
698 fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp;
699 w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp);
700
701 return count;
702}
703
704#define sysfs_pwm(offset) \
705static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
706 show_pwm, store_pwm, offset); \
707static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
708 show_pwmenable, store_pwmenable, offset); \
709
710sysfs_pwm(1);
711sysfs_pwm(2);
712sysfs_pwm(3);
713
714
715#define device_create_file_pwm(client, offset) \
716do { \
717device_create_file(&client->dev, &sensor_dev_attr_pwm##offset.dev_attr); \
718} while (0)
719
720#define device_create_file_pwmenable(client, offset) \
721do { \
722device_create_file(&client->dev, &sensor_dev_attr_pwm##offset##_enable.dev_attr); \
723} while (0)
724
725
726static ssize_t
727show_pwm_mode(struct device *dev, struct device_attribute *attr,
728 char *buf)
729{
730 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
731 int nr = sensor_attr->index;
732 struct w83792d_data *data = w83792d_update_device(dev);
733 return sprintf(buf, "%d\n", data->pwm_mode[nr-1]);
734}
735
736static ssize_t
737store_pwm_mode(struct device *dev, struct device_attribute *attr,
738 const char *buf, size_t count)
739{
740 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
741 int nr = sensor_attr->index - 1;
742 struct i2c_client *client = to_i2c_client(dev);
743 struct w83792d_data *data = i2c_get_clientdata(client);
744 u32 val;
745 u8 pwm_mode_mask = 0;
746
747 val = simple_strtoul(buf, NULL, 10);
748 data->pwm_mode[nr] = SENSORS_LIMIT(val, 0, 1);
749 pwm_mode_mask = w83792d_read_value(client,
750 W83792D_REG_PWM[nr]) & 0x7f;
751 w83792d_write_value(client, W83792D_REG_PWM[nr],
752 ((data->pwm_mode[nr]) << 7) | pwm_mode_mask);
753
754 return count;
755}
756
757#define sysfs_pwm_mode(offset) \
758static SENSOR_DEVICE_ATTR(pwm##offset##_mode, S_IRUGO | S_IWUSR, \
759 show_pwm_mode, store_pwm_mode, offset);
760
761sysfs_pwm_mode(1);
762sysfs_pwm_mode(2);
763sysfs_pwm_mode(3);
764
765#define device_create_file_pwm_mode(client, offset) \
766do { \
767device_create_file(&client->dev, &sensor_dev_attr_pwm##offset##_mode.dev_attr); \
768} while (0)
769
770
771static ssize_t
772show_regs_chassis(struct device *dev, struct device_attribute *attr,
773 char *buf)
774{
775 struct w83792d_data *data = w83792d_update_device(dev);
776 return sprintf(buf, "%d\n", data->chassis);
777}
778
779static DEVICE_ATTR(chassis, S_IRUGO, show_regs_chassis, NULL);
780
781#define device_create_file_chassis(client) \
782do { \
783device_create_file(&client->dev, &dev_attr_chassis); \
784} while (0)
785
786
787static ssize_t
788show_chassis_clear(struct device *dev, struct device_attribute *attr, char *buf)
789{
790 struct w83792d_data *data = w83792d_update_device(dev);
791 return sprintf(buf, "%d\n", data->chassis_clear);
792}
793
794static ssize_t
795store_chassis_clear(struct device *dev, struct device_attribute *attr,
796 const char *buf, size_t count)
797{
798 struct i2c_client *client = to_i2c_client(dev);
799 struct w83792d_data *data = i2c_get_clientdata(client);
800 u32 val;
801 u8 temp1 = 0, temp2 = 0;
802
803 val = simple_strtoul(buf, NULL, 10);
804
805 data->chassis_clear = SENSORS_LIMIT(val, 0 ,1);
806 temp1 = ((data->chassis_clear) << 7) & 0x80;
807 temp2 = w83792d_read_value(client,
808 W83792D_REG_CHASSIS_CLR) & 0x7f;
809 w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, temp1 | temp2);
810
811 return count;
812}
813
814static DEVICE_ATTR(chassis_clear, S_IRUGO | S_IWUSR,
815 show_chassis_clear, store_chassis_clear);
816
817#define device_create_file_chassis_clear(client) \
818do { \
819device_create_file(&client->dev, &dev_attr_chassis_clear); \
820} while (0)
821
822
823
824/* For Smart Fan I / Thermal Cruise */
825static ssize_t
826show_thermal_cruise(struct device *dev, struct device_attribute *attr,
827 char *buf)
828{
829 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
830 int nr = sensor_attr->index;
831 struct w83792d_data *data = w83792d_update_device(dev);
832 return sprintf(buf, "%ld\n", (long)data->thermal_cruise[nr-1]);
833}
834
835static ssize_t
836store_thermal_cruise(struct device *dev, struct device_attribute *attr,
837 const char *buf, size_t count)
838{
839 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
840 int nr = sensor_attr->index - 1;
841 struct i2c_client *client = to_i2c_client(dev);
842 struct w83792d_data *data = i2c_get_clientdata(client);
843 u32 val;
844 u8 target_tmp=0, target_mask=0;
845
846 val = simple_strtoul(buf, NULL, 10);
847 target_tmp = val;
848 target_tmp = target_tmp & 0x7f;
849 target_mask = w83792d_read_value(client, W83792D_REG_THERMAL[nr]) & 0x80;
850 data->thermal_cruise[nr] = SENSORS_LIMIT(target_tmp, 0, 255);
851 w83792d_write_value(client, W83792D_REG_THERMAL[nr],
852 (data->thermal_cruise[nr]) | target_mask);
853
854 return count;
855}
856
857#define sysfs_thermal_cruise(offset) \
858static SENSOR_DEVICE_ATTR(thermal_cruise##offset, S_IRUGO | S_IWUSR, \
859 show_thermal_cruise, store_thermal_cruise, offset);
860
861sysfs_thermal_cruise(1);
862sysfs_thermal_cruise(2);
863sysfs_thermal_cruise(3);
864
865#define device_create_file_thermal_cruise(client, offset) \
866do { \
867device_create_file(&client->dev, \
868&sensor_dev_attr_thermal_cruise##offset.dev_attr); \
869} while (0)
870
871
872/* For Smart Fan I/Thermal Cruise and Smart Fan II */
873static ssize_t
874show_tolerance(struct device *dev, struct device_attribute *attr,
875 char *buf)
876{
877 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
878 int nr = sensor_attr->index;
879 struct w83792d_data *data = w83792d_update_device(dev);
880 return sprintf(buf, "%ld\n", (long)data->tolerance[nr-1]);
881}
882
883static ssize_t
884store_tolerance(struct device *dev, struct device_attribute *attr,
885 const char *buf, size_t count)
886{
887 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
888 int nr = sensor_attr->index - 1;
889 struct i2c_client *client = to_i2c_client(dev);
890 struct w83792d_data *data = i2c_get_clientdata(client);
891 u32 val;
892 u8 tol_tmp, tol_mask;
893
894 val = simple_strtoul(buf, NULL, 10);
895 tol_mask = w83792d_read_value(client,
896 W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0);
897 tol_tmp = SENSORS_LIMIT(val, 0, 15);
898 tol_tmp &= 0x0f;
899 data->tolerance[nr] = tol_tmp;
900 if (nr == 1) {
901 tol_tmp <<= 4;
902 }
903 w83792d_write_value(client, W83792D_REG_TOLERANCE[nr],
904 tol_mask | tol_tmp);
905
906 return count;
907}
908
909#define sysfs_tolerance(offset) \
910static SENSOR_DEVICE_ATTR(tolerance##offset, S_IRUGO | S_IWUSR, \
911 show_tolerance, store_tolerance, offset);
912
913sysfs_tolerance(1);
914sysfs_tolerance(2);
915sysfs_tolerance(3);
916
917#define device_create_file_tolerance(client, offset) \
918do { \
919device_create_file(&client->dev, &sensor_dev_attr_tolerance##offset.dev_attr); \
920} while (0)
921
922
923/* For Smart Fan II */
924static ssize_t
925show_sf2_point(struct device *dev, struct device_attribute *attr,
926 char *buf)
927{
928 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
929 int nr = sensor_attr->nr;
930 int index = sensor_attr->index;
931 struct w83792d_data *data = w83792d_update_device(dev);
932 return sprintf(buf, "%ld\n", (long)data->sf2_points[index-1][nr-1]);
933}
934
935static ssize_t
936store_sf2_point(struct device *dev, struct device_attribute *attr,
937 const char *buf, size_t count)
938{
939 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
940 int nr = sensor_attr->nr - 1;
941 int index = sensor_attr->index - 1;
942 struct i2c_client *client = to_i2c_client(dev);
943 struct w83792d_data *data = i2c_get_clientdata(client);
944 u32 val;
945 u8 mask_tmp = 0;
946
947 val = simple_strtoul(buf, NULL, 10);
948 data->sf2_points[index][nr] = SENSORS_LIMIT(val, 0, 127);
949 mask_tmp = w83792d_read_value(client,
950 W83792D_REG_POINTS[index][nr]) & 0x80;
951 w83792d_write_value(client, W83792D_REG_POINTS[index][nr],
952 mask_tmp|data->sf2_points[index][nr]);
953
954 return count;
955}
956
957#define sysfs_sf2_point(offset, index) \
958static SENSOR_DEVICE_ATTR_2(sf2_point##offset##_fan##index, S_IRUGO | S_IWUSR, \
959 show_sf2_point, store_sf2_point, offset, index);
960
961sysfs_sf2_point(1, 1); /* Fan1 */
962sysfs_sf2_point(2, 1); /* Fan1 */
963sysfs_sf2_point(3, 1); /* Fan1 */
964sysfs_sf2_point(4, 1); /* Fan1 */
965sysfs_sf2_point(1, 2); /* Fan2 */
966sysfs_sf2_point(2, 2); /* Fan2 */
967sysfs_sf2_point(3, 2); /* Fan2 */
968sysfs_sf2_point(4, 2); /* Fan2 */
969sysfs_sf2_point(1, 3); /* Fan3 */
970sysfs_sf2_point(2, 3); /* Fan3 */
971sysfs_sf2_point(3, 3); /* Fan3 */
972sysfs_sf2_point(4, 3); /* Fan3 */
973
974#define device_create_file_sf2_point(client, offset, index) \
975do { \
976device_create_file(&client->dev, \
977&sensor_dev_attr_sf2_point##offset##_fan##index.dev_attr); \
978} while (0)
979
980
981static ssize_t
982show_sf2_level(struct device *dev, struct device_attribute *attr,
983 char *buf)
984{
985 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
986 int nr = sensor_attr->nr;
987 int index = sensor_attr->index;
988 struct w83792d_data *data = w83792d_update_device(dev);
989 return sprintf(buf, "%d\n",
990 (((data->sf2_levels[index-1][nr]) * 100) / 15));
991}
992
993static ssize_t
994store_sf2_level(struct device *dev, struct device_attribute *attr,
995 const char *buf, size_t count)
996{
997 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
998 int nr = sensor_attr->nr;
999 int index = sensor_attr->index - 1;
1000 struct i2c_client *client = to_i2c_client(dev);
1001 struct w83792d_data *data = i2c_get_clientdata(client);
1002 u32 val;
1003 u8 mask_tmp=0, level_tmp=0;
1004
1005 val = simple_strtoul(buf, NULL, 10);
1006 data->sf2_levels[index][nr] = SENSORS_LIMIT((val * 15) / 100, 0, 15);
1007 mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr])
1008 & ((nr==3) ? 0xf0 : 0x0f);
1009 if (nr==3) {
1010 level_tmp = data->sf2_levels[index][nr];
1011 } else {
1012 level_tmp = data->sf2_levels[index][nr] << 4;
1013 }
1014 w83792d_write_value(client, W83792D_REG_LEVELS[index][nr], level_tmp | mask_tmp);
1015
1016 return count;
1017}
1018
1019#define sysfs_sf2_level(offset, index) \
1020static SENSOR_DEVICE_ATTR_2(sf2_level##offset##_fan##index, S_IRUGO | S_IWUSR, \
1021 show_sf2_level, store_sf2_level, offset, index);
1022
1023sysfs_sf2_level(1, 1); /* Fan1 */
1024sysfs_sf2_level(2, 1); /* Fan1 */
1025sysfs_sf2_level(3, 1); /* Fan1 */
1026sysfs_sf2_level(1, 2); /* Fan2 */
1027sysfs_sf2_level(2, 2); /* Fan2 */
1028sysfs_sf2_level(3, 2); /* Fan2 */
1029sysfs_sf2_level(1, 3); /* Fan3 */
1030sysfs_sf2_level(2, 3); /* Fan3 */
1031sysfs_sf2_level(3, 3); /* Fan3 */
1032
1033#define device_create_file_sf2_level(client, offset, index) \
1034do { \
1035device_create_file(&client->dev, \
1036&sensor_dev_attr_sf2_level##offset##_fan##index.dev_attr); \
1037} while (0)
1038
1039
1040/* This function is called when:
1041 * w83792d_driver is inserted (when this module is loaded), for each
1042 available adapter
1043 * when a new adapter is inserted (and w83792d_driver is still present) */
1044static int
1045w83792d_attach_adapter(struct i2c_adapter *adapter)
1046{
1047 if (!(adapter->class & I2C_CLASS_HWMON))
1048 return 0;
2ed2dc3c 1049 return i2c_probe(adapter, &addr_data, w83792d_detect);
5563e27d
M		 1050}
1051
1052
1053static int
1054w83792d_create_subclient(struct i2c_adapter *adapter,
1055 struct i2c_client *new_client, int addr,
1056 struct i2c_client **sub_cli)
1057{
1058 int err;
1059 struct i2c_client *sub_client;
1060
ba9c2e8d 1061 (*sub_cli) = sub_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
5563e27d
M		 1062 if (!(sub_client)) {
1063 return -ENOMEM;
1064 }
5563e27d
M		 1065 sub_client->addr = 0x48 + addr;
1066 i2c_set_clientdata(sub_client, NULL);
1067 sub_client->adapter = adapter;
1068 sub_client->driver = &w83792d_driver;
1069 sub_client->flags = 0;
1070 strlcpy(sub_client->name, "w83792d subclient", I2C_NAME_SIZE);
1071 if ((err = i2c_attach_client(sub_client))) {
1072 dev_err(&new_client->dev, "subclient registration "
1073 "at address 0x%x failed\n", sub_client->addr);
1074 kfree(sub_client);
1075 return err;
1076 }
1077 return 0;
1078}
1079
1080
1081static int
1082w83792d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
1083 struct i2c_client *new_client)
1084{
1085 int i, id, err;
1086 u8 val;
1087 struct w83792d_data *data = i2c_get_clientdata(new_client);
1088
1089 id = i2c_adapter_id(adapter);
1090 if (force_subclients[0] == id && force_subclients[1] == address) {
1091 for (i = 2; i <= 3; i++) {
1092 if (force_subclients[i] < 0x48 ||
1093 force_subclients[i] > 0x4f) {
1094 dev_err(&new_client->dev, "invalid subclient "
1095 "address %d; must be 0x48-0x4f\n",
1096 force_subclients[i]);
1097 err = -ENODEV;
1098 goto ERROR_SC_0;
1099 }
1100 }
1101 w83792d_write_value(new_client, W83792D_REG_I2C_SUBADDR,
1102 (force_subclients[2] & 0x07) |
1103 ((force_subclients[3] & 0x07) << 4));
1104 }
1105
1106 val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
1107 if (!(val & 0x08)) {
1108 err = w83792d_create_subclient(adapter, new_client, val & 0x7,
1109 &data->lm75[0]);
1110 if (err < 0)
1111 goto ERROR_SC_0;
1112 }
1113 if (!(val & 0x80)) {
1114 if ((data->lm75[0] != NULL) &&
1115 ((val & 0x7) == ((val >> 4) & 0x7))) {
1116 dev_err(&new_client->dev, "duplicate addresses 0x%x, "
1117 "use force_subclient\n", data->lm75[0]->addr);
1118 err = -ENODEV;
1119 goto ERROR_SC_1;
1120 }
1121 err = w83792d_create_subclient(adapter, new_client,
1122 (val >> 4) & 0x7, &data->lm75[1]);
1123 if (err < 0)
1124 goto ERROR_SC_1;
1125 }
1126
1127 return 0;
1128
1129/* Undo inits in case of errors */
1130
1131ERROR_SC_1:
1132 if (data->lm75[0] != NULL) {
1133 i2c_detach_client(data->lm75[0]);
1134 kfree(data->lm75[0]);
1135 }
1136ERROR_SC_0:
1137 return err;
1138}
1139
1140
1141static int
1142w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
1143{
1144 int i = 0, val1 = 0, val2;
1145 struct i2c_client *new_client;
1146 struct w83792d_data *data;
1147 int err = 0;
1148 const char *client_name = "";
1149
1150 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1151 goto ERROR0;
1152 }
1153
1154 /* OK. For now, we presume we have a valid client. We now create the
1155 client structure, even though we cannot fill it completely yet.
1156 But it allows us to access w83792d_{read,write}_value. */
1157
ba9c2e8d 1158 if (!(data = kzalloc(sizeof(struct w83792d_data), GFP_KERNEL))) {
5563e27d
M		 1159 err = -ENOMEM;
1160 goto ERROR0;
1161 }
5563e27d
M		 1162
1163 new_client = &data->client;
1164 i2c_set_clientdata(new_client, data);
1165 new_client->addr = address;
5563e27d
M		 1166 new_client->adapter = adapter;
1167 new_client->driver = &w83792d_driver;
1168 new_client->flags = 0;
1169
1170 /* Now, we do the remaining detection. */
1171
1172 /* The w83792d may be stuck in some other bank than bank 0. This may
1173 make reading other information impossible. Specify a force=... or
1174 force_*=... parameter, and the Winbond will be reset to the right
1175 bank. */
1176 if (kind < 0) {
1177 if (w83792d_read_value(new_client, W83792D_REG_CONFIG) & 0x80) {
1178 dev_warn(&new_client->dev, "Detection failed at step "
1179 "3\n");
1180 goto ERROR1;
1181 }
1182 val1 = w83792d_read_value(new_client, W83792D_REG_BANK);
1183 val2 = w83792d_read_value(new_client, W83792D_REG_CHIPMAN);
1184 /* Check for Winbond ID if in bank 0 */
1185 if (!(val1 & 0x07)) { /* is Bank0 */
1186 if (((!(val1 & 0x80)) && (val2 != 0xa3)) ||
1187 ((val1 & 0x80) && (val2 != 0x5c))) {
1188 goto ERROR1;
1189 }
1190 }
1191 /* If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
1192 should match */
1193 if (w83792d_read_value(new_client,
1194 W83792D_REG_I2C_ADDR) != address) {
1195 dev_warn(&new_client->dev, "Detection failed "
1196 "at step 5\n");
1197 goto ERROR1;
1198 }
1199 }
1200
1201 /* We have either had a force parameter, or we have already detected the
1202 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1203 w83792d_write_value(new_client,
1204 W83792D_REG_BANK,
1205 (w83792d_read_value(new_client,
1206 W83792D_REG_BANK) & 0x78) | 0x80);
1207
1208 /* Determine the chip type. */
1209 if (kind <= 0) {
1210 /* get vendor ID */
1211 val2 = w83792d_read_value(new_client, W83792D_REG_CHIPMAN);
1212 if (val2 != 0x5c) { /* the vendor is NOT Winbond */
1213 goto ERROR1;
1214 }
1215 val1 = w83792d_read_value(new_client, W83792D_REG_WCHIPID);
c9152dea 1216 if (val1 == 0x7a) {
5563e27d
M		 1217 kind = w83792d;
1218 } else {
1219 if (kind == 0)
1220 dev_warn(&new_client->dev,
1221 "w83792d: Ignoring 'force' parameter for"
1222 " unknown chip at adapter %d, address"
1223 " 0x%02x\n", i2c_adapter_id(adapter),
1224 address);
1225 goto ERROR1;
1226 }
1227 }
1228
1229 if (kind == w83792d) {
1230 client_name = "w83792d";
1231 } else {
1232 dev_err(&new_client->dev, "w83792d: Internal error: unknown"
1233 " kind (%d)?!?", kind);
1234 goto ERROR1;
1235 }
1236
1237 /* Fill in the remaining client fields and put into the global list */
1238 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1239 data->type = kind;
1240
1241 data->valid = 0;
1242 init_MUTEX(&data->update_lock);
1243
1244 /* Tell the I2C layer a new client has arrived */
1245 if ((err = i2c_attach_client(new_client)))
1246 goto ERROR1;
1247
1248 if ((err = w83792d_detect_subclients(adapter, address,
1249 kind, new_client)))
1250 goto ERROR2;
1251
1252 /* Initialize the chip */
1253 w83792d_init_client(new_client);
1254
1255 /* A few vars need to be filled upon startup */
96320519
JD		 1256 for (i = 0; i < 7; i++) {
1257 data->fan_min[i] = w83792d_read_value(new_client,
5563e27d
M		 1258 W83792D_REG_FAN_MIN[i]);
1259 }
1260
1261 /* Register sysfs hooks */
ce785ab4
M		 1262 data->class_dev = hwmon_device_register(&new_client->dev);
1263 if (IS_ERR(data->class_dev)) {
1264 err = PTR_ERR(data->class_dev);
1265 goto ERROR3;
1266 }
5563e27d
M		 1267 device_create_file_in(new_client, 0);
1268 device_create_file_in(new_client, 1);
1269 device_create_file_in(new_client, 2);
1270 device_create_file_in(new_client, 3);
1271 device_create_file_in(new_client, 4);
1272 device_create_file_in(new_client, 5);
1273 device_create_file_in(new_client, 6);
1274 device_create_file_in(new_client, 7);
1275 device_create_file_in(new_client, 8);
1276
1277 device_create_file_fan(new_client, 1);
1278 device_create_file_fan(new_client, 2);
1279 device_create_file_fan(new_client, 3);
96320519
JD		 1280
1281 /* Read GPIO enable register to check if pins for fan 4,5 are used as
1282 GPIO */
1283 val1 = w83792d_read_value(new_client, W83792D_REG_GPIO_EN);
1284 if (!(val1 & 0x40))
1285 device_create_file_fan(new_client, 4);
1286 if (!(val1 & 0x20))
1287 device_create_file_fan(new_client, 5);
1288
1289 val1 = w83792d_read_value(new_client, W83792D_REG_PIN);
1290 if (val1 & 0x40)
1291 device_create_file_fan(new_client, 6);
1292 if (val1 & 0x04)
1293 device_create_file_fan(new_client, 7);
5563e27d
M		 1294
1295 device_create_file_temp1(new_client); /* Temp1 */
1296 device_create_file_temp_add(new_client, 2); /* Temp2 */
1297 device_create_file_temp_add(new_client, 3); /* Temp3 */
1298
1299 device_create_file_alarms(new_client);
1300
1301 device_create_file_pwm(new_client, 1);
1302 device_create_file_pwm(new_client, 2);
1303 device_create_file_pwm(new_client, 3);
1304
1305 device_create_file_pwmenable(new_client, 1);
1306 device_create_file_pwmenable(new_client, 2);
1307 device_create_file_pwmenable(new_client, 3);
1308
1309 device_create_file_pwm_mode(new_client, 1);
1310 device_create_file_pwm_mode(new_client, 2);
1311 device_create_file_pwm_mode(new_client, 3);
1312
1313 device_create_file_chassis(new_client);
1314 device_create_file_chassis_clear(new_client);
1315
1316 device_create_file_thermal_cruise(new_client, 1);
1317 device_create_file_thermal_cruise(new_client, 2);
1318 device_create_file_thermal_cruise(new_client, 3);
1319
1320 device_create_file_tolerance(new_client, 1);
1321 device_create_file_tolerance(new_client, 2);
1322 device_create_file_tolerance(new_client, 3);
1323
1324 device_create_file_sf2_point(new_client, 1, 1); /* Fan1 */
1325 device_create_file_sf2_point(new_client, 2, 1); /* Fan1 */
1326 device_create_file_sf2_point(new_client, 3, 1); /* Fan1 */
1327 device_create_file_sf2_point(new_client, 4, 1); /* Fan1 */
1328 device_create_file_sf2_point(new_client, 1, 2); /* Fan2 */
1329 device_create_file_sf2_point(new_client, 2, 2); /* Fan2 */
1330 device_create_file_sf2_point(new_client, 3, 2); /* Fan2 */
1331 device_create_file_sf2_point(new_client, 4, 2); /* Fan2 */
1332 device_create_file_sf2_point(new_client, 1, 3); /* Fan3 */
1333 device_create_file_sf2_point(new_client, 2, 3); /* Fan3 */
1334 device_create_file_sf2_point(new_client, 3, 3); /* Fan3 */
1335 device_create_file_sf2_point(new_client, 4, 3); /* Fan3 */
1336
1337 device_create_file_sf2_level(new_client, 1, 1); /* Fan1 */
1338 device_create_file_sf2_level(new_client, 2, 1); /* Fan1 */
1339 device_create_file_sf2_level(new_client, 3, 1); /* Fan1 */
1340 device_create_file_sf2_level(new_client, 1, 2); /* Fan2 */
1341 device_create_file_sf2_level(new_client, 2, 2); /* Fan2 */
1342 device_create_file_sf2_level(new_client, 3, 2); /* Fan2 */
1343 device_create_file_sf2_level(new_client, 1, 3); /* Fan3 */
1344 device_create_file_sf2_level(new_client, 2, 3); /* Fan3 */
1345 device_create_file_sf2_level(new_client, 3, 3); /* Fan3 */
1346
1347 return 0;
1348
ce785ab4
M		 1349ERROR3:
1350 if (data->lm75[0] != NULL) {
1351 i2c_detach_client(data->lm75[0]);
1352 kfree(data->lm75[0]);
1353 }
1354 if (data->lm75[1] != NULL) {
1355 i2c_detach_client(data->lm75[1]);
1356 kfree(data->lm75[1]);
1357 }
5563e27d
M		 1358ERROR2:
1359 i2c_detach_client(new_client);
1360ERROR1:
1361 kfree(data);
1362ERROR0:
1363 return err;
1364}
1365
1366static int
1367w83792d_detach_client(struct i2c_client *client)
1368{
ce785ab4 1369 struct w83792d_data *data = i2c_get_clientdata(client);
5563e27d
M		 1370 int err;
1371
ce785ab4
M		 1372 /* main client */
1373 if (data)
1374 hwmon_device_unregister(data->class_dev);
1375
7bef5594 1376 if ((err = i2c_detach_client(client)))
5563e27d 1377 return err;
5563e27d 1378
ce785ab4
M		 1379 /* main client */
1380 if (data)
1381 kfree(data);
1382 /* subclient */
1383 else
5563e27d 1384 kfree(client);
5563e27d
M		 1385
1386 return 0;
1387}
1388
c9152dea
JD		 1389/* The SMBus locks itself. The Winbond W83792D chip has a bank register,
1390 but the driver only accesses registers in bank 0, so we don't have
1391 to switch banks and lock access between switches. */
1392static int w83792d_read_value(struct i2c_client *client, u8 reg)
5563e27d 1393{
c9152dea 1394 return i2c_smbus_read_byte_data(client, reg);
5563e27d
M		 1395}
1396
c9152dea 1397static int w83792d_write_value(struct i2c_client *client, u8 reg, u8 value)
5563e27d 1398{
c9152dea 1399 return i2c_smbus_write_byte_data(client, reg, value);
5563e27d
M		 1400}
1401
5563e27d
M		 1402static void
1403w83792d_init_client(struct i2c_client *client)
1404{
1405 u8 temp2_cfg, temp3_cfg, vid_in_b;
1406
1407 if (init) {
1408 w83792d_write_value(client, W83792D_REG_CONFIG, 0x80);
1409 }
1410 /* Clear the bit6 of W83792D_REG_VID_IN_B(set it into 0):
1411 W83792D_REG_VID_IN_B bit6 = 0: the high/low limit of
1412 vin0/vin1 can be modified by user;
1413 W83792D_REG_VID_IN_B bit6 = 1: the high/low limit of
1414 vin0/vin1 auto-updated, can NOT be modified by user. */
1415 vid_in_b = w83792d_read_value(client, W83792D_REG_VID_IN_B);
1416 w83792d_write_value(client, W83792D_REG_VID_IN_B,
1417 vid_in_b & 0xbf);
1418
1419 temp2_cfg = w83792d_read_value(client, W83792D_REG_TEMP2_CONFIG);
1420 temp3_cfg = w83792d_read_value(client, W83792D_REG_TEMP3_CONFIG);
1421 w83792d_write_value(client, W83792D_REG_TEMP2_CONFIG,
1422 temp2_cfg & 0xe6);
1423 w83792d_write_value(client, W83792D_REG_TEMP3_CONFIG,
1424 temp3_cfg & 0xe6);
1425
1426 /* Start monitoring */
1427 w83792d_write_value(client, W83792D_REG_CONFIG,
1428 (w83792d_read_value(client,
1429 W83792D_REG_CONFIG) & 0xf7)
1430 | 0x01);
1431}
1432
1433static struct w83792d_data *w83792d_update_device(struct device *dev)
1434{
1435 struct i2c_client *client = to_i2c_client(dev);
1436 struct w83792d_data *data = i2c_get_clientdata(client);
1437 int i, j;
1438 u8 reg_array_tmp[4], pwm_array_tmp[7], reg_tmp;
1439
1440 down(&data->update_lock);
1441
1442 if (time_after
1443 (jiffies - data->last_updated, (unsigned long) (HZ * 3))
1444 || time_before(jiffies, data->last_updated) || !data->valid) {
1445 dev_dbg(dev, "Starting device update\n");
1446
1447 /* Update the voltages measured value and limits */
1448 for (i = 0; i < 9; i++) {
1449 data->in[i] = w83792d_read_value(client,
1450 W83792D_REG_IN[i]);
1451 data->in_max[i] = w83792d_read_value(client,
1452 W83792D_REG_IN_MAX[i]);
1453 data->in_min[i] = w83792d_read_value(client,
1454 W83792D_REG_IN_MIN[i]);
1455 }
99d85560
JD		 1456 data->low_bits = w83792d_read_value(client,
1457 W83792D_REG_LOW_BITS1) +
1458 (w83792d_read_value(client,
1459 W83792D_REG_LOW_BITS2) << 8);
5563e27d
M		 1460 for (i = 0; i < 7; i++) {
1461 /* Update the Fan measured value and limits */
1462 data->fan[i] = w83792d_read_value(client,
1463 W83792D_REG_FAN[i]);
1464 data->fan_min[i] = w83792d_read_value(client,
1465 W83792D_REG_FAN_MIN[i]);
1466 /* Update the PWM/DC Value and PWM/DC flag */
1467 pwm_array_tmp[i] = w83792d_read_value(client,
1468 W83792D_REG_PWM[i]);
1469 data->pwm[i] = pwm_array_tmp[i] & 0x0f;
c9152dea 1470 data->pwm_mode[i] = pwm_array_tmp[i] >> 7;
5563e27d
M		 1471 }
1472
1473 reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG);
1474 data->pwmenable[0] = reg_tmp & 0x03;
1475 data->pwmenable[1] = (reg_tmp>>2) & 0x03;
1476 data->pwmenable[2] = (reg_tmp>>4) & 0x03;
1477
1478 for (i = 0; i < 3; i++) {
1479 data->temp1[i] = w83792d_read_value(client,
1480 W83792D_REG_TEMP1[i]);
1481 }
1482 for (i = 0; i < 2; i++) {
1483 for (j = 0; j < 6; j++) {
1484 data->temp_add[i][j] = w83792d_read_value(
1485 client,W83792D_REG_TEMP_ADD[i][j]);
1486 }
1487 }
1488
1489 /* Update the Fan Divisor */
1490 for (i = 0; i < 4; i++) {
1491 reg_array_tmp[i] = w83792d_read_value(client,
1492 W83792D_REG_FAN_DIV[i]);
1493 }
1494 data->fan_div[0] = reg_array_tmp[0] & 0x07;
1495 data->fan_div[1] = (reg_array_tmp[0] >> 4) & 0x07;
1496 data->fan_div[2] = reg_array_tmp[1] & 0x07;
1497 data->fan_div[3] = (reg_array_tmp[1] >> 4) & 0x07;
1498 data->fan_div[4] = reg_array_tmp[2] & 0x07;
1499 data->fan_div[5] = (reg_array_tmp[2] >> 4) & 0x07;
1500 data->fan_div[6] = reg_array_tmp[3] & 0x07;
1501
1502 /* Update the realtime status */
1503 data->alarms = w83792d_read_value(client, W83792D_REG_ALARM1) +
1504 (w83792d_read_value(client, W83792D_REG_ALARM2) << 8) +
1505 (w83792d_read_value(client, W83792D_REG_ALARM3) << 16);
1506
1507 /* Update CaseOpen status and it's CLR_CHS. */
1508 data->chassis = (w83792d_read_value(client,
1509 W83792D_REG_CHASSIS) >> 5) & 0x01;
1510 data->chassis_clear = (w83792d_read_value(client,
1511 W83792D_REG_CHASSIS_CLR) >> 7) & 0x01;
1512
1513 /* Update Thermal Cruise/Smart Fan I target value */
1514 for (i = 0; i < 3; i++) {
1515 data->thermal_cruise[i] =
1516 w83792d_read_value(client,
1517 W83792D_REG_THERMAL[i]) & 0x7f;
1518 }
1519
1520 /* Update Smart Fan I/II tolerance */
1521 reg_tmp = w83792d_read_value(client, W83792D_REG_TOLERANCE[0]);
1522 data->tolerance[0] = reg_tmp & 0x0f;
1523 data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
1524 data->tolerance[2] = w83792d_read_value(client,
1525 W83792D_REG_TOLERANCE[2]) & 0x0f;
1526
1527 /* Update Smart Fan II temperature points */
1528 for (i = 0; i < 3; i++) {
1529 for (j = 0; j < 4; j++) {
1530 data->sf2_points[i][j] = w83792d_read_value(
1531 client,W83792D_REG_POINTS[i][j]) & 0x7f;
1532 }
1533 }
1534
1535 /* Update Smart Fan II duty cycle levels */
1536 for (i = 0; i < 3; i++) {
1537 reg_tmp = w83792d_read_value(client,
1538 W83792D_REG_LEVELS[i][0]);
1539 data->sf2_levels[i][0] = reg_tmp & 0x0f;
1540 data->sf2_levels[i][1] = (reg_tmp >> 4) & 0x0f;
1541 reg_tmp = w83792d_read_value(client,
1542 W83792D_REG_LEVELS[i][2]);
1543 data->sf2_levels[i][2] = (reg_tmp >> 4) & 0x0f;
1544 data->sf2_levels[i][3] = reg_tmp & 0x0f;
1545 }
1546
1547 data->last_updated = jiffies;
1548 data->valid = 1;
1549 }
1550
1551 up(&data->update_lock);
1552
1553#ifdef DEBUG
1554 w83792d_print_debug(data, dev);
1555#endif
1556
1557 return data;
1558}
1559
1560#ifdef DEBUG
1561static void w83792d_print_debug(struct w83792d_data *data, struct device *dev)
1562{
1563 int i=0, j=0;
1564 dev_dbg(dev, "==========The following is the debug message...========\n");
1565 dev_dbg(dev, "9 set of Voltages: =====>\n");
1566 for (i=0; i<9; i++) {
1567 dev_dbg(dev, "vin[%d] is: 0x%x\n", i, data->in[i]);
1568 dev_dbg(dev, "vin[%d] max is: 0x%x\n", i, data->in_max[i]);
1569 dev_dbg(dev, "vin[%d] min is: 0x%x\n", i, data->in_min[i]);
1570 }
99d85560
JD		 1571 dev_dbg(dev, "Low Bit1 is: 0x%x\n", data->low_bits & 0xff);
1572 dev_dbg(dev, "Low Bit2 is: 0x%x\n", data->low_bits >> 8);
5563e27d
M		 1573 dev_dbg(dev, "7 set of Fan Counts and Duty Cycles: =====>\n");
1574 for (i=0; i<7; i++) {
1575 dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]);
1576 dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]);
1577 dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]);
1578 dev_dbg(dev, "pwm_mode[%d] is: 0x%x\n", i, data->pwm_mode[i]);
1579 }
1580 dev_dbg(dev, "3 set of Temperatures: =====>\n");
1581 for (i=0; i<3; i++) {
1582 dev_dbg(dev, "temp1[%d] is: 0x%x\n", i, data->temp1[i]);
1583 }
1584
1585 for (i=0; i<2; i++) {
1586 for (j=0; j<6; j++) {
1587 dev_dbg(dev, "temp_add[%d][%d] is: 0x%x\n", i, j,
1588 data->temp_add[i][j]);
1589 }
1590 }
1591
1592 for (i=0; i<7; i++) {
1593 dev_dbg(dev, "fan_div[%d] is: 0x%x\n", i, data->fan_div[i]);
1594 }
1595 dev_dbg(dev, "==========End of the debug message...==================\n");
1596 dev_dbg(dev, "\n");
1597}
1598#endif
1599
1600static int __init
1601sensors_w83792d_init(void)
1602{
1603 return i2c_add_driver(&w83792d_driver);
1604}
1605
1606static void __exit
1607sensors_w83792d_exit(void)
1608{
1609 i2c_del_driver(&w83792d_driver);
1610}
1611
1612MODULE_AUTHOR("Chunhao Huang @ Winbond <DZShen@Winbond.com.tw>");
1613MODULE_DESCRIPTION("W83792AD/D driver for linux-2.6");
1614MODULE_LICENSE("GPL");
1615
1616module_init(sensors_w83792d_init);
1617module_exit(sensors_w83792d_exit);
1618
Linux 6.x block layer and io_uring tree(s)