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hwmon: (w83791d) convert to use devm_i2c_new_dummy_device
[linux-block.git] / drivers / hwmon / w83791d.c
CommitLineData
74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
9873964d 2/*
ec1c3194
GR		 3 * w83791d.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
5 *
6 * Copyright (C) 2006-2007 Charles Spirakis <bezaur@gmail.com>
ec1c3194 7 */
9873964d
CS		 8
9/*
ec1c3194
GR		 10 * Supports following chips:
11 *
4101ece3 12 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
ec1c3194
GR		 13 * w83791d 10 5 5 3 0x71 0x5ca3 yes no
14 *
15 * The w83791d chip appears to be part way between the 83781d and the
16 * 83792d. Thus, this file is derived from both the w83792d.c and
17 * w83781d.c files.
18 *
19 * The w83791g chip is the same as the w83791d but lead-free.
20 */
9873964d 21
9873964d
CS		 22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/slab.h>
25#include <linux/i2c.h>
26#include <linux/hwmon.h>
27#include <linux/hwmon-vid.h>
28#include <linux/hwmon-sysfs.h>
29#include <linux/err.h>
30#include <linux/mutex.h>
dcd8f392 31#include <linux/jiffies.h>
9873964d
CS		 32
33#define NUMBER_OF_VIN 10
34#define NUMBER_OF_FANIN 5
35#define NUMBER_OF_TEMPIN 3
6495ce18 36#define NUMBER_OF_PWM 5
9873964d
CS		 37
38/* Addresses to scan */
25e9c86d
MH		 39static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
40 I2C_CLIENT_END };
9873964d
CS		 41
42/* Insmod parameters */
3aed198c
JD		 43
44static unsigned short force_subclients[4];
45module_param_array(force_subclients, short, NULL, 0);
b55f3757
GR		 46MODULE_PARM_DESC(force_subclients,
47 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
9873964d 48
90ab5ee9 49static bool reset;
9873964d
CS		 50module_param(reset, bool, 0);
51MODULE_PARM_DESC(reset, "Set to one to force a hardware chip reset");
52
90ab5ee9 53static bool init;
9873964d
CS		 54module_param(init, bool, 0);
55MODULE_PARM_DESC(init, "Set to one to force extra software initialization");
56
57/* The W83791D registers */
58static const u8 W83791D_REG_IN[NUMBER_OF_VIN] = {
59 0x20, /* VCOREA in DataSheet */
60 0x21, /* VINR0 in DataSheet */
61 0x22, /* +3.3VIN in DataSheet */
62 0x23, /* VDD5V in DataSheet */
63 0x24, /* +12VIN in DataSheet */
64 0x25, /* -12VIN in DataSheet */
65 0x26, /* -5VIN in DataSheet */
66 0xB0, /* 5VSB in DataSheet */
67 0xB1, /* VBAT in DataSheet */
68 0xB2 /* VINR1 in DataSheet */
69};
70
71static const u8 W83791D_REG_IN_MAX[NUMBER_OF_VIN] = {
72 0x2B, /* VCOREA High Limit in DataSheet */
73 0x2D, /* VINR0 High Limit in DataSheet */
74 0x2F, /* +3.3VIN High Limit in DataSheet */
75 0x31, /* VDD5V High Limit in DataSheet */
76 0x33, /* +12VIN High Limit in DataSheet */
77 0x35, /* -12VIN High Limit in DataSheet */
78 0x37, /* -5VIN High Limit in DataSheet */
79 0xB4, /* 5VSB High Limit in DataSheet */
80 0xB6, /* VBAT High Limit in DataSheet */
81 0xB8 /* VINR1 High Limit in DataSheet */
82};
83static const u8 W83791D_REG_IN_MIN[NUMBER_OF_VIN] = {
84 0x2C, /* VCOREA Low Limit in DataSheet */
85 0x2E, /* VINR0 Low Limit in DataSheet */
86 0x30, /* +3.3VIN Low Limit in DataSheet */
87 0x32, /* VDD5V Low Limit in DataSheet */
88 0x34, /* +12VIN Low Limit in DataSheet */
89 0x36, /* -12VIN Low Limit in DataSheet */
90 0x38, /* -5VIN Low Limit in DataSheet */
91 0xB5, /* 5VSB Low Limit in DataSheet */
92 0xB7, /* VBAT Low Limit in DataSheet */
93 0xB9 /* VINR1 Low Limit in DataSheet */
94};
95static const u8 W83791D_REG_FAN[NUMBER_OF_FANIN] = {
96 0x28, /* FAN 1 Count in DataSheet */
97 0x29, /* FAN 2 Count in DataSheet */
98 0x2A, /* FAN 3 Count in DataSheet */
99 0xBA, /* FAN 4 Count in DataSheet */
100 0xBB, /* FAN 5 Count in DataSheet */
101};
102static const u8 W83791D_REG_FAN_MIN[NUMBER_OF_FANIN] = {
103 0x3B, /* FAN 1 Count Low Limit in DataSheet */
104 0x3C, /* FAN 2 Count Low Limit in DataSheet */
105 0x3D, /* FAN 3 Count Low Limit in DataSheet */
106 0xBC, /* FAN 4 Count Low Limit in DataSheet */
107 0xBD, /* FAN 5 Count Low Limit in DataSheet */
108};
109
6495ce18
MH		 110static const u8 W83791D_REG_PWM[NUMBER_OF_PWM] = {
111 0x81, /* PWM 1 duty cycle register in DataSheet */
112 0x83, /* PWM 2 duty cycle register in DataSheet */
113 0x94, /* PWM 3 duty cycle register in DataSheet */
114 0xA0, /* PWM 4 duty cycle register in DataSheet */
115 0xA1, /* PWM 5 duty cycle register in DataSheet */
116};
117
a5a4598c
MH		 118static const u8 W83791D_REG_TEMP_TARGET[3] = {
119 0x85, /* PWM 1 target temperature for temp 1 */
120 0x86, /* PWM 2 target temperature for temp 2 */
121 0x96, /* PWM 3 target temperature for temp 3 */
122};
123
124static const u8 W83791D_REG_TEMP_TOL[2] = {
125 0x87, /* PWM 1/2 temperature tolerance */
126 0x97, /* PWM 3 temperature tolerance */
127};
128
9873964d
CS		 129static const u8 W83791D_REG_FAN_CFG[2] = {
130 0x84, /* FAN 1/2 configuration */
131 0x95, /* FAN 3 configuration */
132};
133
134static const u8 W83791D_REG_FAN_DIV[3] = {
135 0x47, /* contains FAN1 and FAN2 Divisor */
136 0x4b, /* contains FAN3 Divisor */
137 0x5C, /* contains FAN4 and FAN5 Divisor */
138};
139
140#define W83791D_REG_BANK 0x4E
141#define W83791D_REG_TEMP2_CONFIG 0xC2
142#define W83791D_REG_TEMP3_CONFIG 0xCA
143
144static const u8 W83791D_REG_TEMP1[3] = {
145 0x27, /* TEMP 1 in DataSheet */
146 0x39, /* TEMP 1 Over in DataSheet */
147 0x3A, /* TEMP 1 Hyst in DataSheet */
148};
149
150static const u8 W83791D_REG_TEMP_ADD[2][6] = {
151 {0xC0, /* TEMP 2 in DataSheet */
152 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
153 0xC5, /* TEMP 2 Over High part in DataSheet */
154 0xC6, /* TEMP 2 Over Low part in DataSheet */
155 0xC3, /* TEMP 2 Thyst High part in DataSheet */
156 0xC4}, /* TEMP 2 Thyst Low part in DataSheet */
157 {0xC8, /* TEMP 3 in DataSheet */
158 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
159 0xCD, /* TEMP 3 Over High part in DataSheet */
160 0xCE, /* TEMP 3 Over Low part in DataSheet */
161 0xCB, /* TEMP 3 Thyst High part in DataSheet */
162 0xCC} /* TEMP 3 Thyst Low part in DataSheet */
163};
164
165#define W83791D_REG_BEEP_CONFIG 0x4D
166
167static const u8 W83791D_REG_BEEP_CTRL[3] = {
168 0x56, /* BEEP Control Register 1 */
169 0x57, /* BEEP Control Register 2 */
170 0xA3, /* BEEP Control Register 3 */
171};
172
6e1ecd9b 173#define W83791D_REG_GPIO 0x15
9873964d
CS		 174#define W83791D_REG_CONFIG 0x40
175#define W83791D_REG_VID_FANDIV 0x47
176#define W83791D_REG_DID_VID4 0x49
177#define W83791D_REG_WCHIPID 0x58
178#define W83791D_REG_CHIPMAN 0x4F
179#define W83791D_REG_PIN 0x4B
180#define W83791D_REG_I2C_SUBADDR 0x4A
181
182#define W83791D_REG_ALARM1 0xA9 /* realtime status register1 */
183#define W83791D_REG_ALARM2 0xAA /* realtime status register2 */
184#define W83791D_REG_ALARM3 0xAB /* realtime status register3 */
185
186#define W83791D_REG_VBAT 0x5D
187#define W83791D_REG_I2C_ADDR 0x48
188
ec1c3194
GR		 189/*
190 * The SMBus locks itself. The Winbond W83791D has a bank select register
191 * (index 0x4e), but the driver only accesses registers in bank 0. Since
192 * we don't switch banks, we don't need any special code to handle
193 * locking access between bank switches
194 */
9873964d
CS		 195static inline int w83791d_read(struct i2c_client *client, u8 reg)
196{
197 return i2c_smbus_read_byte_data(client, reg);
198}
199
200static inline int w83791d_write(struct i2c_client *client, u8 reg, u8 value)
201{
202 return i2c_smbus_write_byte_data(client, reg, value);
203}
204
ec1c3194
GR		 205/*
206 * The analog voltage inputs have 16mV LSB. Since the sysfs output is
207 * in mV as would be measured on the chip input pin, need to just
208 * multiply/divide by 16 to translate from/to register values.
209 */
2a844c14 210#define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
9873964d
CS		 211#define IN_FROM_REG(val) ((val) * 16)
212
213static u8 fan_to_reg(long rpm, int div)
214{
215 if (rpm == 0)
216 return 255;
2a844c14
GR		 217 rpm = clamp_val(rpm, 1, 1000000);
218 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
9873964d
CS		 219}
220
ec1c3194 221#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \
9873964d
CS		 222 ((val) == 255 ? 0 : \
223 1350000 / ((val) * (div))))
224
225/* for temp1 which is 8-bit resolution, LSB = 1 degree Celsius */
226#define TEMP1_FROM_REG(val) ((val) * 1000)
227#define TEMP1_TO_REG(val) ((val) <= -128000 ? -128 : \
228 (val) >= 127000 ? 127 : \
229 (val) < 0 ? ((val) - 500) / 1000 : \
230 ((val) + 500) / 1000)
231
ec1c3194
GR		 232/*
233 * for temp2 and temp3 which are 9-bit resolution, LSB = 0.5 degree Celsius
234 * Assumes the top 8 bits are the integral amount and the bottom 8 bits
235 * are the fractional amount. Since we only have 0.5 degree resolution,
236 * the bottom 7 bits will always be zero
237 */
9873964d 238#define TEMP23_FROM_REG(val) ((val) / 128 * 500)
40ebdb92
GR		 239#define TEMP23_TO_REG(val) (DIV_ROUND_CLOSEST(clamp_val((val), -128000, \
240 127500), 500) * 128)
9873964d 241
a5a4598c 242/* for thermal cruise target temp, 7-bits, LSB = 1 degree Celsius */
40ebdb92
GR		 243#define TARGET_TEMP_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val((val), 0, 127000), \
244 1000)
a5a4598c
MH		 245
246/* for thermal cruise temp tolerance, 4-bits, LSB = 1 degree Celsius */
40ebdb92
GR		 247#define TOL_TEMP_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val((val), 0, 15000), \
248 1000)
9873964d
CS		 249
250#define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
251#define BEEP_MASK_FROM_REG(val) ((val) & 0xffffff)
252
253#define DIV_FROM_REG(val) (1 << (val))
254
255static u8 div_to_reg(int nr, long val)
256{
257 int i;
9873964d 258
ad02ad85 259 /* fan divisors max out at 128 */
2a844c14 260 val = clamp_val(val, 1, 128) >> 1;
9873964d
CS		 261 for (i = 0; i < 7; i++) {
262 if (val == 0)
263 break;
264 val >>= 1;
265 }
266 return (u8) i;
267}
268
269struct w83791d_data {
1beeffe4 270 struct device *hwmon_dev;
9873964d
CS		 271 struct mutex update_lock;
272
273 char valid; /* !=0 if following fields are valid */
274 unsigned long last_updated; /* In jiffies */
275
276 /* array of 2 pointers to subclients */
277 struct i2c_client *lm75[2];
278
279 /* volts */
280 u8 in[NUMBER_OF_VIN]; /* Register value */
281 u8 in_max[NUMBER_OF_VIN]; /* Register value */
282 u8 in_min[NUMBER_OF_VIN]; /* Register value */
283
284 /* fans */
285 u8 fan[NUMBER_OF_FANIN]; /* Register value */
286 u8 fan_min[NUMBER_OF_FANIN]; /* Register value */
287 u8 fan_div[NUMBER_OF_FANIN]; /* Register encoding, shifted right */
288
289 /* Temperature sensors */
290
291 s8 temp1[3]; /* current, over, thyst */
292 s16 temp_add[2][3]; /* fixed point value. Top 8 bits are the
ec1c3194
GR		 293 * integral part, bottom 8 bits are the
294 * fractional part. We only use the top
295 * 9 bits as the resolution is only
296 * to the 0.5 degree C...
297 * two sensors with three values
298 * (cur, over, hyst)
299 */
9873964d 300
6495ce18
MH		 301 /* PWMs */
302 u8 pwm[5]; /* pwm duty cycle */
b5938f8c 303 u8 pwm_enable[3]; /* pwm enable status for fan 1-3
ec1c3194
GR		 304 * (fan 4-5 only support manual mode)
305 */
6495ce18 306
a5a4598c
MH		 307 u8 temp_target[3]; /* pwm 1-3 target temperature */
308 u8 temp_tolerance[3]; /* pwm 1-3 temperature tolerance */
309
9873964d
CS		 310 /* Misc */
311 u32 alarms; /* realtime status register encoding,combined */
312 u8 beep_enable; /* Global beep enable */
313 u32 beep_mask; /* Mask off specific beeps */
314 u8 vid; /* Register encoding, combined */
315 u8 vrm; /* hwmon-vid */
316};
317
cb0c1af3
JD		 318static int w83791d_probe(struct i2c_client *client,
319 const struct i2c_device_id *id);
310ec792 320static int w83791d_detect(struct i2c_client *client,
cb0c1af3
JD		 321 struct i2c_board_info *info);
322static int w83791d_remove(struct i2c_client *client);
9873964d 323
7cbe1cee
CP		 324static int w83791d_read(struct i2c_client *client, u8 reg);
325static int w83791d_write(struct i2c_client *client, u8 reg, u8 value);
9873964d
CS		 326static struct w83791d_data *w83791d_update_device(struct device *dev);
327
328#ifdef DEBUG
329static void w83791d_print_debug(struct w83791d_data *data, struct device *dev);
330#endif
331
332static void w83791d_init_client(struct i2c_client *client);
333
cb0c1af3 334static const struct i2c_device_id w83791d_id[] = {
1f86df49 335 { "w83791d", 0 },
cb0c1af3
JD		 336 { }
337};
338MODULE_DEVICE_TABLE(i2c, w83791d_id);
339
9873964d 340static struct i2c_driver w83791d_driver = {
cb0c1af3 341 .class = I2C_CLASS_HWMON,
9873964d
CS		 342 .driver = {
343 .name = "w83791d",
344 },
cb0c1af3
JD		 345 .probe = w83791d_probe,
346 .remove = w83791d_remove,
347 .id_table = w83791d_id,
348 .detect = w83791d_detect,
c3813d6a 349 .address_list = normal_i2c,
9873964d
CS		 350};
351
352/* following are the sysfs callback functions */
353#define show_in_reg(reg) \
354static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
355 char *buf) \
356{ \
357 struct sensor_device_attribute *sensor_attr = \
358 to_sensor_dev_attr(attr); \
359 struct w83791d_data *data = w83791d_update_device(dev); \
360 int nr = sensor_attr->index; \
ec1c3194 361 return sprintf(buf, "%d\n", IN_FROM_REG(data->reg[nr])); \
9873964d
CS		 362}
363
364show_in_reg(in);
365show_in_reg(in_min);
366show_in_reg(in_max);
367
368#define store_in_reg(REG, reg) \
369static ssize_t store_in_##reg(struct device *dev, \
370 struct device_attribute *attr, \
371 const char *buf, size_t count) \
372{ \
373 struct sensor_device_attribute *sensor_attr = \
374 to_sensor_dev_attr(attr); \
375 struct i2c_client *client = to_i2c_client(dev); \
376 struct w83791d_data *data = i2c_get_clientdata(client); \
9873964d 377 int nr = sensor_attr->index; \
ec1c3194
GR		 378 unsigned long val; \
379 int err = kstrtoul(buf, 10, &val); \
380 if (err) \
381 return err; \
9873964d
CS		 382 mutex_lock(&data->update_lock); \
383 data->in_##reg[nr] = IN_TO_REG(val); \
384 w83791d_write(client, W83791D_REG_IN_##REG[nr], data->in_##reg[nr]); \
385 mutex_unlock(&data->update_lock); \
386 \
387 return count; \
388}
389store_in_reg(MIN, min);
390store_in_reg(MAX, max);
391
392static struct sensor_device_attribute sda_in_input[] = {
393 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
394 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
395 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
396 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
397 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
398 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
399 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
400 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
401 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
402 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
403};
404
405static struct sensor_device_attribute sda_in_min[] = {
406 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
407 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
408 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
409 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
410 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
411 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
412 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
413 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
414 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
415 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
416};
417
418static struct sensor_device_attribute sda_in_max[] = {
419 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
420 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
421 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
422 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
423 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
424 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
425 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
426 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
427 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
428 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
429};
430
64383123
CS		 431
432static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
433 char *buf)
434{
435 struct sensor_device_attribute *sensor_attr =
436 to_sensor_dev_attr(attr);
437 struct w83791d_data *data = w83791d_update_device(dev);
438 int bitnr = sensor_attr->index;
439
440 return sprintf(buf, "%d\n", (data->beep_mask >> bitnr) & 1);
441}
442
443static ssize_t store_beep(struct device *dev, struct device_attribute *attr,
444 const char *buf, size_t count)
445{
446 struct sensor_device_attribute *sensor_attr =
447 to_sensor_dev_attr(attr);
448 struct i2c_client *client = to_i2c_client(dev);
449 struct w83791d_data *data = i2c_get_clientdata(client);
450 int bitnr = sensor_attr->index;
451 int bytenr = bitnr / 8;
ec1c3194
GR		 452 unsigned long val;
453 int err;
454
455 err = kstrtoul(buf, 10, &val);
456 if (err)
457 return err;
458
459 val = val ? 1 : 0;
64383123
CS		 460
461 mutex_lock(&data->update_lock);
462
463 data->beep_mask &= ~(0xff << (bytenr * 8));
464 data->beep_mask |= w83791d_read(client, W83791D_REG_BEEP_CTRL[bytenr])
465 << (bytenr * 8);
466
467 data->beep_mask &= ~(1 << bitnr);
468 data->beep_mask |= val << bitnr;
469
470 w83791d_write(client, W83791D_REG_BEEP_CTRL[bytenr],
471 (data->beep_mask >> (bytenr * 8)) & 0xff);
472
473 mutex_unlock(&data->update_lock);
474
475 return count;
476}
477
478static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
479 char *buf)
480{
481 struct sensor_device_attribute *sensor_attr =
482 to_sensor_dev_attr(attr);
483 struct w83791d_data *data = w83791d_update_device(dev);
484 int bitnr = sensor_attr->index;
485
486 return sprintf(buf, "%d\n", (data->alarms >> bitnr) & 1);
487}
488
ec1c3194
GR		 489/*
490 * Note: The bitmask for the beep enable/disable is different than
491 * the bitmask for the alarm.
492 */
64383123
CS		 493static struct sensor_device_attribute sda_in_beep[] = {
494 SENSOR_ATTR(in0_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 0),
495 SENSOR_ATTR(in1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 13),
496 SENSOR_ATTR(in2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 2),
497 SENSOR_ATTR(in3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 3),
498 SENSOR_ATTR(in4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 8),
499 SENSOR_ATTR(in5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 9),
500 SENSOR_ATTR(in6_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 10),
501 SENSOR_ATTR(in7_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 16),
502 SENSOR_ATTR(in8_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 17),
503 SENSOR_ATTR(in9_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 14),
504};
505
506static struct sensor_device_attribute sda_in_alarm[] = {
507 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
508 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
509 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
510 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
511 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
512 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9),
513 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10),
514 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 19),
515 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 20),
516 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 14),
517};
518
9873964d
CS		 519#define show_fan_reg(reg) \
520static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
521 char *buf) \
522{ \
523 struct sensor_device_attribute *sensor_attr = \
524 to_sensor_dev_attr(attr); \
525 struct w83791d_data *data = w83791d_update_device(dev); \
526 int nr = sensor_attr->index; \
ec1c3194 527 return sprintf(buf, "%d\n", \
9873964d
CS		 528 FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
529}
530
531show_fan_reg(fan);
532show_fan_reg(fan_min);
533
534static ssize_t store_fan_min(struct device *dev, struct device_attribute *attr,
535 const char *buf, size_t count)
536{
537 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
538 struct i2c_client *client = to_i2c_client(dev);
539 struct w83791d_data *data = i2c_get_clientdata(client);
9873964d 540 int nr = sensor_attr->index;
ec1c3194
GR		 541 unsigned long val;
542 int err;
543
544 err = kstrtoul(buf, 10, &val);
545 if (err)
546 return err;
9873964d
CS		 547
548 mutex_lock(&data->update_lock);
549 data->fan_min[nr] = fan_to_reg(val, DIV_FROM_REG(data->fan_div[nr]));
550 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
551 mutex_unlock(&data->update_lock);
552
553 return count;
554}
555
556static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
557 char *buf)
558{
559 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
560 int nr = sensor_attr->index;
561 struct w83791d_data *data = w83791d_update_device(dev);
562 return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr]));
563}
564
ec1c3194
GR		 565/*
566 * Note: we save and restore the fan minimum here, because its value is
567 * determined in part by the fan divisor. This follows the principle of
568 * least surprise; the user doesn't expect the fan minimum to change just
569 * because the divisor changed.
570 */
9873964d
CS		 571static ssize_t store_fan_div(struct device *dev, struct device_attribute *attr,
572 const char *buf, size_t count)
573{
574 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
575 struct i2c_client *client = to_i2c_client(dev);
576 struct w83791d_data *data = i2c_get_clientdata(client);
577 int nr = sensor_attr->index;
578 unsigned long min;
579 u8 tmp_fan_div;
580 u8 fan_div_reg;
ad02ad85 581 u8 vbat_reg;
9873964d
CS		 582 int indx = 0;
583 u8 keep_mask = 0;
584 u8 new_shift = 0;
ec1c3194
GR		 585 unsigned long val;
586 int err;
587
588 err = kstrtoul(buf, 10, &val);
589 if (err)
590 return err;
9873964d
CS		 591
592 /* Save fan_min */
593 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
594
595 mutex_lock(&data->update_lock);
ec1c3194 596 data->fan_div[nr] = div_to_reg(nr, val);
9873964d
CS		 597
598 switch (nr) {
599 case 0:
600 indx = 0;
601 keep_mask = 0xcf;
602 new_shift = 4;
603 break;
604 case 1:
605 indx = 0;
606 keep_mask = 0x3f;
607 new_shift = 6;
608 break;
609 case 2:
610 indx = 1;
611 keep_mask = 0x3f;
612 new_shift = 6;
613 break;
614 case 3:
615 indx = 2;
616 keep_mask = 0xf8;
617 new_shift = 0;
618 break;
619 case 4:
620 indx = 2;
621 keep_mask = 0x8f;
622 new_shift = 4;
623 break;
624#ifdef DEBUG
625 default:
626 dev_warn(dev, "store_fan_div: Unexpected nr seen: %d\n", nr);
627 count = -EINVAL;
628 goto err_exit;
629#endif
630 }
631
632 fan_div_reg = w83791d_read(client, W83791D_REG_FAN_DIV[indx])
633 & keep_mask;
634 tmp_fan_div = (data->fan_div[nr] << new_shift) & ~keep_mask;
635
636 w83791d_write(client, W83791D_REG_FAN_DIV[indx],
637 fan_div_reg | tmp_fan_div);
638
ad02ad85
MH		 639 /* Bit 2 of fans 0-2 is stored in the vbat register (bits 5-7) */
640 if (nr < 3) {
641 keep_mask = ~(1 << (nr + 5));
642 vbat_reg = w83791d_read(client, W83791D_REG_VBAT)
643 & keep_mask;
644 tmp_fan_div = (data->fan_div[nr] << (3 + nr)) & ~keep_mask;
645 w83791d_write(client, W83791D_REG_VBAT,
646 vbat_reg | tmp_fan_div);
647 }
648
9873964d
CS		 649 /* Restore fan_min */
650 data->fan_min[nr] = fan_to_reg(min, DIV_FROM_REG(data->fan_div[nr]));
651 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
652
653#ifdef DEBUG
654err_exit:
655#endif
656 mutex_unlock(&data->update_lock);
657
658 return count;
659}
660
661static struct sensor_device_attribute sda_fan_input[] = {
662 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
663 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
664 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
665 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
666 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
667};
668
669static struct sensor_device_attribute sda_fan_min[] = {
670 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO,
671 show_fan_min, store_fan_min, 0),
672 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO,
673 show_fan_min, store_fan_min, 1),
674 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO,
675 show_fan_min, store_fan_min, 2),
676 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO,
677 show_fan_min, store_fan_min, 3),
678 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO,
679 show_fan_min, store_fan_min, 4),
680};
681
682static struct sensor_device_attribute sda_fan_div[] = {
683 SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO,
684 show_fan_div, store_fan_div, 0),
685 SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO,
686 show_fan_div, store_fan_div, 1),
687 SENSOR_ATTR(fan3_div, S_IWUSR | S_IRUGO,
688 show_fan_div, store_fan_div, 2),
689 SENSOR_ATTR(fan4_div, S_IWUSR | S_IRUGO,
690 show_fan_div, store_fan_div, 3),
691 SENSOR_ATTR(fan5_div, S_IWUSR | S_IRUGO,
692 show_fan_div, store_fan_div, 4),
693};
694
64383123
CS		 695static struct sensor_device_attribute sda_fan_beep[] = {
696 SENSOR_ATTR(fan1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 6),
697 SENSOR_ATTR(fan2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 7),
698 SENSOR_ATTR(fan3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 11),
699 SENSOR_ATTR(fan4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 21),
700 SENSOR_ATTR(fan5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 22),
701};
702
703static struct sensor_device_attribute sda_fan_alarm[] = {
704 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
705 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
706 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
707 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 21),
708 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 22),
709};
710
6495ce18
MH		 711/* read/write PWMs */
712static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
713 char *buf)
714{
715 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
716 int nr = sensor_attr->index;
717 struct w83791d_data *data = w83791d_update_device(dev);
718 return sprintf(buf, "%u\n", data->pwm[nr]);
719}
720
721static ssize_t store_pwm(struct device *dev, struct device_attribute *attr,
722 const char *buf, size_t count)
723{
724 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
725 struct i2c_client *client = to_i2c_client(dev);
726 struct w83791d_data *data = i2c_get_clientdata(client);
727 int nr = sensor_attr->index;
728 unsigned long val;
729
179c4fdb 730 if (kstrtoul(buf, 10, &val))
6495ce18
MH		 731 return -EINVAL;
732
733 mutex_lock(&data->update_lock);
2a844c14 734 data->pwm[nr] = clamp_val(val, 0, 255);
6495ce18
MH		 735 w83791d_write(client, W83791D_REG_PWM[nr], data->pwm[nr]);
736 mutex_unlock(&data->update_lock);
737 return count;
738}
739
740static struct sensor_device_attribute sda_pwm[] = {
741 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO,
742 show_pwm, store_pwm, 0),
743 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO,
744 show_pwm, store_pwm, 1),
745 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO,
746 show_pwm, store_pwm, 2),
747 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO,
748 show_pwm, store_pwm, 3),
749 SENSOR_ATTR(pwm5, S_IWUSR | S_IRUGO,
750 show_pwm, store_pwm, 4),
751};
752
b5938f8c
MH		 753static ssize_t show_pwmenable(struct device *dev, struct device_attribute *attr,
754 char *buf)
755{
756 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
757 int nr = sensor_attr->index;
758 struct w83791d_data *data = w83791d_update_device(dev);
759 return sprintf(buf, "%u\n", data->pwm_enable[nr] + 1);
760}
761
762static ssize_t store_pwmenable(struct device *dev,
763 struct device_attribute *attr, const char *buf, size_t count)
764{
765 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
766 struct i2c_client *client = to_i2c_client(dev);
767 struct w83791d_data *data = i2c_get_clientdata(client);
768 int nr = sensor_attr->index;
769 unsigned long val;
770 u8 reg_cfg_tmp;
771 u8 reg_idx = 0;
772 u8 val_shift = 0;
773 u8 keep_mask = 0;
774
179c4fdb 775 int ret = kstrtoul(buf, 10, &val);
b5938f8c
MH		 776
777 if (ret || val < 1 || val > 3)
778 return -EINVAL;
779
780 mutex_lock(&data->update_lock);
781 data->pwm_enable[nr] = val - 1;
782 switch (nr) {
783 case 0:
784 reg_idx = 0;
785 val_shift = 2;
786 keep_mask = 0xf3;
787 break;
788 case 1:
789 reg_idx = 0;
790 val_shift = 4;
791 keep_mask = 0xcf;
792 break;
793 case 2:
794 reg_idx = 1;
795 val_shift = 2;
796 keep_mask = 0xf3;
797 break;
798 }
799
800 reg_cfg_tmp = w83791d_read(client, W83791D_REG_FAN_CFG[reg_idx]);
801 reg_cfg_tmp = (reg_cfg_tmp & keep_mask) |
802 data->pwm_enable[nr] << val_shift;
803
804 w83791d_write(client, W83791D_REG_FAN_CFG[reg_idx], reg_cfg_tmp);
805 mutex_unlock(&data->update_lock);
806
807 return count;
808}
809static struct sensor_device_attribute sda_pwmenable[] = {
810 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
811 show_pwmenable, store_pwmenable, 0),
812 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
813 show_pwmenable, store_pwmenable, 1),
814 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
815 show_pwmenable, store_pwmenable, 2),
816};
817
a5a4598c
MH		 818/* For Smart Fan I / Thermal Cruise */
819static ssize_t show_temp_target(struct device *dev,
820 struct device_attribute *attr, char *buf)
821{
822 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
823 struct w83791d_data *data = w83791d_update_device(dev);
824 int nr = sensor_attr->index;
825 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_target[nr]));
826}
827
828static ssize_t store_temp_target(struct device *dev,
829 struct device_attribute *attr, const char *buf, size_t count)
830{
831 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
832 struct i2c_client *client = to_i2c_client(dev);
833 struct w83791d_data *data = i2c_get_clientdata(client);
834 int nr = sensor_attr->index;
a9169813 835 long val;
a5a4598c
MH		 836 u8 target_mask;
837
a9169813 838 if (kstrtol(buf, 10, &val))
a5a4598c
MH		 839 return -EINVAL;
840
841 mutex_lock(&data->update_lock);
842 data->temp_target[nr] = TARGET_TEMP_TO_REG(val);
843 target_mask = w83791d_read(client,
844 W83791D_REG_TEMP_TARGET[nr]) & 0x80;
845 w83791d_write(client, W83791D_REG_TEMP_TARGET[nr],
846 data->temp_target[nr] | target_mask);
847 mutex_unlock(&data->update_lock);
848 return count;
849}
850
851static struct sensor_device_attribute sda_temp_target[] = {
852 SENSOR_ATTR(temp1_target, S_IWUSR | S_IRUGO,
853 show_temp_target, store_temp_target, 0),
854 SENSOR_ATTR(temp2_target, S_IWUSR | S_IRUGO,
855 show_temp_target, store_temp_target, 1),
856 SENSOR_ATTR(temp3_target, S_IWUSR | S_IRUGO,
857 show_temp_target, store_temp_target, 2),
858};
859
860static ssize_t show_temp_tolerance(struct device *dev,
861 struct device_attribute *attr, char *buf)
862{
863 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
864 struct w83791d_data *data = w83791d_update_device(dev);
865 int nr = sensor_attr->index;
866 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_tolerance[nr]));
867}
868
869static ssize_t store_temp_tolerance(struct device *dev,
870 struct device_attribute *attr, const char *buf, size_t count)
871{
872 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
873 struct i2c_client *client = to_i2c_client(dev);
874 struct w83791d_data *data = i2c_get_clientdata(client);
875 int nr = sensor_attr->index;
876 unsigned long val;
877 u8 target_mask;
878 u8 reg_idx = 0;
879 u8 val_shift = 0;
880 u8 keep_mask = 0;
881
179c4fdb 882 if (kstrtoul(buf, 10, &val))
a5a4598c
MH		 883 return -EINVAL;
884
885 switch (nr) {
886 case 0:
887 reg_idx = 0;
888 val_shift = 0;
889 keep_mask = 0xf0;
890 break;
891 case 1:
892 reg_idx = 0;
893 val_shift = 4;
894 keep_mask = 0x0f;
895 break;
896 case 2:
897 reg_idx = 1;
898 val_shift = 0;
899 keep_mask = 0xf0;
900 break;
901 }
902
903 mutex_lock(&data->update_lock);
904 data->temp_tolerance[nr] = TOL_TEMP_TO_REG(val);
905 target_mask = w83791d_read(client,
906 W83791D_REG_TEMP_TOL[reg_idx]) & keep_mask;
907 w83791d_write(client, W83791D_REG_TEMP_TOL[reg_idx],
908 (data->temp_tolerance[nr] << val_shift) | target_mask);
909 mutex_unlock(&data->update_lock);
910 return count;
911}
912
913static struct sensor_device_attribute sda_temp_tolerance[] = {
914 SENSOR_ATTR(temp1_tolerance, S_IWUSR | S_IRUGO,
915 show_temp_tolerance, store_temp_tolerance, 0),
916 SENSOR_ATTR(temp2_tolerance, S_IWUSR | S_IRUGO,
917 show_temp_tolerance, store_temp_tolerance, 1),
918 SENSOR_ATTR(temp3_tolerance, S_IWUSR | S_IRUGO,
919 show_temp_tolerance, store_temp_tolerance, 2),
920};
921
9873964d
CS		 922/* read/write the temperature1, includes measured value and limits */
923static ssize_t show_temp1(struct device *dev, struct device_attribute *devattr,
924 char *buf)
925{
926 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
927 struct w83791d_data *data = w83791d_update_device(dev);
928 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[attr->index]));
929}
930
931static ssize_t store_temp1(struct device *dev, struct device_attribute *devattr,
932 const char *buf, size_t count)
933{
934 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
935 struct i2c_client *client = to_i2c_client(dev);
936 struct w83791d_data *data = i2c_get_clientdata(client);
9873964d 937 int nr = attr->index;
ec1c3194
GR		 938 long val;
939 int err;
940
941 err = kstrtol(buf, 10, &val);
942 if (err)
943 return err;
9873964d
CS		 944
945 mutex_lock(&data->update_lock);
946 data->temp1[nr] = TEMP1_TO_REG(val);
947 w83791d_write(client, W83791D_REG_TEMP1[nr], data->temp1[nr]);
948 mutex_unlock(&data->update_lock);
949 return count;
950}
951
952/* read/write temperature2-3, includes measured value and limits */
953static ssize_t show_temp23(struct device *dev, struct device_attribute *devattr,
954 char *buf)
955{
956 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
957 struct w83791d_data *data = w83791d_update_device(dev);
958 int nr = attr->nr;
959 int index = attr->index;
960 return sprintf(buf, "%d\n", TEMP23_FROM_REG(data->temp_add[nr][index]));
961}
962
963static ssize_t store_temp23(struct device *dev,
964 struct device_attribute *devattr,
965 const char *buf, size_t count)
966{
967 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
968 struct i2c_client *client = to_i2c_client(dev);
969 struct w83791d_data *data = i2c_get_clientdata(client);
ec1c3194
GR		 970 long val;
971 int err;
9873964d
CS		 972 int nr = attr->nr;
973 int index = attr->index;
974
ec1c3194
GR		 975 err = kstrtol(buf, 10, &val);
976 if (err)
977 return err;
978
9873964d
CS		 979 mutex_lock(&data->update_lock);
980 data->temp_add[nr][index] = TEMP23_TO_REG(val);
981 w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2],
982 data->temp_add[nr][index] >> 8);
983 w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2 + 1],
984 data->temp_add[nr][index] & 0x80);
985 mutex_unlock(&data->update_lock);
986
987 return count;
988}
989
990static struct sensor_device_attribute_2 sda_temp_input[] = {
991 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0),
992 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0),
993 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0),
994};
995
996static struct sensor_device_attribute_2 sda_temp_max[] = {
997 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR,
998 show_temp1, store_temp1, 0, 1),
999 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR,
1000 show_temp23, store_temp23, 0, 1),
1001 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR,
1002 show_temp23, store_temp23, 1, 1),
1003};
1004
1005static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1006 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR,
1007 show_temp1, store_temp1, 0, 2),
1008 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR,
1009 show_temp23, store_temp23, 0, 2),
1010 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR,
1011 show_temp23, store_temp23, 1, 2),
1012};
1013
ec1c3194
GR		 1014/*
1015 * Note: The bitmask for the beep enable/disable is different than
1016 * the bitmask for the alarm.
1017 */
64383123
CS		 1018static struct sensor_device_attribute sda_temp_beep[] = {
1019 SENSOR_ATTR(temp1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 4),
1020 SENSOR_ATTR(temp2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 5),
1021 SENSOR_ATTR(temp3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 1),
1022};
1023
1024static struct sensor_device_attribute sda_temp_alarm[] = {
1025 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1026 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1027 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1028};
9873964d 1029
84fb029f 1030/* get realtime status of all sensors items: voltage, temp, fan */
8d0ec428
JL		 1031static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1032 char *buf)
9873964d
CS		 1033{
1034 struct w83791d_data *data = w83791d_update_device(dev);
1035 return sprintf(buf, "%u\n", data->alarms);
1036}
1037
8d0ec428 1038static DEVICE_ATTR_RO(alarms);
9873964d
CS		 1039
1040/* Beep control */
1041
1042#define GLOBAL_BEEP_ENABLE_SHIFT 15
1043#define GLOBAL_BEEP_ENABLE_MASK (1 << GLOBAL_BEEP_ENABLE_SHIFT)
1044
1045static ssize_t show_beep_enable(struct device *dev,
1046 struct device_attribute *attr, char *buf)
1047{
1048 struct w83791d_data *data = w83791d_update_device(dev);
1049 return sprintf(buf, "%d\n", data->beep_enable);
1050}
1051
1052static ssize_t show_beep_mask(struct device *dev,
1053 struct device_attribute *attr, char *buf)
1054{
1055 struct w83791d_data *data = w83791d_update_device(dev);
1056 return sprintf(buf, "%d\n", BEEP_MASK_FROM_REG(data->beep_mask));
1057}
1058
1059
1060static ssize_t store_beep_mask(struct device *dev,
1061 struct device_attribute *attr,
1062 const char *buf, size_t count)
1063{
1064 struct i2c_client *client = to_i2c_client(dev);
1065 struct w83791d_data *data = i2c_get_clientdata(client);
9873964d 1066 int i;
ec1c3194
GR		 1067 long val;
1068 int err;
1069
1070 err = kstrtol(buf, 10, &val);
1071 if (err)
1072 return err;
9873964d
CS		 1073
1074 mutex_lock(&data->update_lock);
1075
ec1c3194
GR		 1076 /*
1077 * The beep_enable state overrides any enabling request from
1078 * the masks
1079 */
9873964d
CS		 1080 data->beep_mask = BEEP_MASK_TO_REG(val) & ~GLOBAL_BEEP_ENABLE_MASK;
1081 data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT);
1082
1083 val = data->beep_mask;
1084
1085 for (i = 0; i < 3; i++) {
1086 w83791d_write(client, W83791D_REG_BEEP_CTRL[i], (val & 0xff));
1087 val >>= 8;
1088 }
1089
1090 mutex_unlock(&data->update_lock);
1091
1092 return count;
1093}
1094
1095static ssize_t store_beep_enable(struct device *dev,
1096 struct device_attribute *attr,
1097 const char *buf, size_t count)
1098{
1099 struct i2c_client *client = to_i2c_client(dev);
1100 struct w83791d_data *data = i2c_get_clientdata(client);
ec1c3194
GR		 1101 long val;
1102 int err;
1103
1104 err = kstrtol(buf, 10, &val);
1105 if (err)
1106 return err;
9873964d
CS		 1107
1108 mutex_lock(&data->update_lock);
1109
1110 data->beep_enable = val ? 1 : 0;
1111
1112 /* Keep the full mask value in sync with the current enable */
1113 data->beep_mask &= ~GLOBAL_BEEP_ENABLE_MASK;
1114 data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT);
1115
ec1c3194
GR		 1116 /*
1117 * The global control is in the second beep control register
1118 * so only need to update that register
1119 */
9873964d
CS		 1120 val = (data->beep_mask >> 8) & 0xff;
1121
1122 w83791d_write(client, W83791D_REG_BEEP_CTRL[1], val);
1123
1124 mutex_unlock(&data->update_lock);
1125
1126 return count;
1127}
1128
1129static struct sensor_device_attribute sda_beep_ctrl[] = {
1130 SENSOR_ATTR(beep_enable, S_IRUGO | S_IWUSR,
1131 show_beep_enable, store_beep_enable, 0),
1132 SENSOR_ATTR(beep_mask, S_IRUGO | S_IWUSR,
1133 show_beep_mask, store_beep_mask, 1)
1134};
1135
1136/* cpu voltage regulation information */
8d0ec428
JL		 1137static ssize_t cpu0_vid_show(struct device *dev,
1138 struct device_attribute *attr, char *buf)
9873964d
CS		 1139{
1140 struct w83791d_data *data = w83791d_update_device(dev);
1141 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1142}
1143
8d0ec428 1144static DEVICE_ATTR_RO(cpu0_vid);
9873964d 1145
8d0ec428
JL		 1146static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1147 char *buf)
9873964d 1148{
90d6619a 1149 struct w83791d_data *data = dev_get_drvdata(dev);
9873964d
CS		 1150 return sprintf(buf, "%d\n", data->vrm);
1151}
1152
8d0ec428
JL		 1153static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1154 const char *buf, size_t count)
9873964d 1155{
8f74efe8 1156 struct w83791d_data *data = dev_get_drvdata(dev);
ec1c3194
GR		 1157 unsigned long val;
1158 int err;
9873964d 1159
ec1c3194
GR		 1160 /*
1161 * No lock needed as vrm is internal to the driver
1162 * (not read from a chip register) and so is not
1163 * updated in w83791d_update_device()
1164 */
9873964d 1165
ec1c3194
GR		 1166 err = kstrtoul(buf, 10, &val);
1167 if (err)
1168 return err;
1169
fe04f24b
AL		 1170 if (val > 255)
1171 return -EINVAL;
1172
ec1c3194 1173 data->vrm = val;
9873964d
CS		 1174 return count;
1175}
1176
8d0ec428 1177static DEVICE_ATTR_RW(vrm);
9873964d 1178
34fc921a 1179#define IN_UNIT_ATTRS(X) \
ec1c3194
GR		 1180 &sda_in_input[X].dev_attr.attr, \
1181 &sda_in_min[X].dev_attr.attr, \
1182 &sda_in_max[X].dev_attr.attr, \
1183 &sda_in_beep[X].dev_attr.attr, \
64383123 1184 &sda_in_alarm[X].dev_attr.attr
34fc921a
JC		 1185
1186#define FAN_UNIT_ATTRS(X) \
ec1c3194
GR		 1187 &sda_fan_input[X].dev_attr.attr, \
1188 &sda_fan_min[X].dev_attr.attr, \
1189 &sda_fan_div[X].dev_attr.attr, \
1190 &sda_fan_beep[X].dev_attr.attr, \
64383123 1191 &sda_fan_alarm[X].dev_attr.attr
34fc921a
JC		 1192
1193#define TEMP_UNIT_ATTRS(X) \
ec1c3194
GR		 1194 &sda_temp_input[X].dev_attr.attr, \
1195 &sda_temp_max[X].dev_attr.attr, \
1196 &sda_temp_max_hyst[X].dev_attr.attr, \
1197 &sda_temp_beep[X].dev_attr.attr, \
64383123 1198 &sda_temp_alarm[X].dev_attr.attr
34fc921a
JC		 1199
1200static struct attribute *w83791d_attributes[] = {
1201 IN_UNIT_ATTRS(0),
1202 IN_UNIT_ATTRS(1),
1203 IN_UNIT_ATTRS(2),
1204 IN_UNIT_ATTRS(3),
1205 IN_UNIT_ATTRS(4),
1206 IN_UNIT_ATTRS(5),
1207 IN_UNIT_ATTRS(6),
1208 IN_UNIT_ATTRS(7),
1209 IN_UNIT_ATTRS(8),
1210 IN_UNIT_ATTRS(9),
1211 FAN_UNIT_ATTRS(0),
1212 FAN_UNIT_ATTRS(1),
1213 FAN_UNIT_ATTRS(2),
34fc921a
JC		 1214 TEMP_UNIT_ATTRS(0),
1215 TEMP_UNIT_ATTRS(1),
1216 TEMP_UNIT_ATTRS(2),
1217 &dev_attr_alarms.attr,
1218 &sda_beep_ctrl[0].dev_attr.attr,
1219 &sda_beep_ctrl[1].dev_attr.attr,
1220 &dev_attr_cpu0_vid.attr,
1221 &dev_attr_vrm.attr,
6495ce18
MH		 1222 &sda_pwm[0].dev_attr.attr,
1223 &sda_pwm[1].dev_attr.attr,
1224 &sda_pwm[2].dev_attr.attr,
b5938f8c
MH		 1225 &sda_pwmenable[0].dev_attr.attr,
1226 &sda_pwmenable[1].dev_attr.attr,
1227 &sda_pwmenable[2].dev_attr.attr,
a5a4598c
MH		 1228 &sda_temp_target[0].dev_attr.attr,
1229 &sda_temp_target[1].dev_attr.attr,
1230 &sda_temp_target[2].dev_attr.attr,
1231 &sda_temp_tolerance[0].dev_attr.attr,
1232 &sda_temp_tolerance[1].dev_attr.attr,
1233 &sda_temp_tolerance[2].dev_attr.attr,
34fc921a
JC		 1234 NULL
1235};
1236
1237static const struct attribute_group w83791d_group = {
1238 .attrs = w83791d_attributes,
1239};
1240
ec1c3194
GR		 1241/*
1242 * Separate group of attributes for fan/pwm 4-5. Their pins can also be
1243 * in use for GPIO in which case their sysfs-interface should not be made
1244 * available
1245 */
6e1ecd9b
MH		 1246static struct attribute *w83791d_attributes_fanpwm45[] = {
1247 FAN_UNIT_ATTRS(3),
1248 FAN_UNIT_ATTRS(4),
6495ce18
MH		 1249 &sda_pwm[3].dev_attr.attr,
1250 &sda_pwm[4].dev_attr.attr,
6e1ecd9b
MH		 1251 NULL
1252};
1253
1254static const struct attribute_group w83791d_group_fanpwm45 = {
1255 .attrs = w83791d_attributes_fanpwm45,
1256};
9873964d 1257
cb0c1af3 1258static int w83791d_detect_subclients(struct i2c_client *client)
9873964d 1259{
cb0c1af3 1260 struct i2c_adapter *adapter = client->adapter;
9873964d 1261 struct w83791d_data *data = i2c_get_clientdata(client);
cb0c1af3 1262 int address = client->addr;
358d2071 1263 int i, id;
9873964d
CS		 1264 u8 val;
1265
1266 id = i2c_adapter_id(adapter);
1267 if (force_subclients[0] == id && force_subclients[1] == address) {
1268 for (i = 2; i <= 3; i++) {
1269 if (force_subclients[i] < 0x48 ||
1270 force_subclients[i] > 0x4f) {
1271 dev_err(&client->dev,
1272 "invalid subclient "
1273 "address %d; must be 0x48-0x4f\n",
1274 force_subclients[i]);
358d2071 1275 return -ENODEV;
9873964d
CS		 1276 }
1277 }
1278 w83791d_write(client, W83791D_REG_I2C_SUBADDR,
1279 (force_subclients[2] & 0x07) |
1280 ((force_subclients[3] & 0x07) << 4));
1281 }
1282
1283 val = w83791d_read(client, W83791D_REG_I2C_SUBADDR);
ec1c3194 1284 if (!(val & 0x08))
358d2071
WS		 1285 data->lm75[0] = devm_i2c_new_dummy_device(&client->dev, adapter,
1286 0x48 + (val & 0x7));
9873964d 1287 if (!(val & 0x80)) {
358d2071 1288 if (!IS_ERR(data->lm75[0]) &&
9873964d
CS		 1289 ((val & 0x7) == ((val >> 4) & 0x7))) {
1290 dev_err(&client->dev,
1291 "duplicate addresses 0x%x, "
1292 "use force_subclient\n",
1293 data->lm75[0]->addr);
358d2071 1294 return -ENODEV;
9873964d 1295 }
358d2071
WS		 1296 data->lm75[1] = devm_i2c_new_dummy_device(&client->dev, adapter,
1297 0x48 + ((val >> 4) & 0x7));
9873964d
CS		 1298 }
1299
1300 return 0;
9873964d
CS		 1301}
1302
1303
cb0c1af3 1304/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1305static int w83791d_detect(struct i2c_client *client,
cb0c1af3 1306 struct i2c_board_info *info)
9873964d 1307{
cb0c1af3
JD		 1308 struct i2c_adapter *adapter = client->adapter;
1309 int val1, val2;
1310 unsigned short address = client->addr;
9873964d 1311
ec1c3194 1312 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
cb0c1af3 1313 return -ENODEV;
9873964d 1314
3f8b8459
JD		 1315 if (w83791d_read(client, W83791D_REG_CONFIG) & 0x80)
1316 return -ENODEV;
1317
1318 val1 = w83791d_read(client, W83791D_REG_BANK);
1319 val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
1320 /* Check for Winbond ID if in bank 0 */
1321 if (!(val1 & 0x07)) {
1322 if ((!(val1 & 0x80) && val2 != 0xa3) ||
ec1c3194 1323 ((val1 & 0x80) && val2 != 0x5c)) {
cb0c1af3 1324 return -ENODEV;
9873964d
CS		 1325 }
1326 }
ec1c3194
GR		 1327 /*
1328 * If Winbond chip, address of chip and W83791D_REG_I2C_ADDR
1329 * should match
1330 */
3f8b8459
JD		 1331 if (w83791d_read(client, W83791D_REG_I2C_ADDR) != address)
1332 return -ENODEV;
9873964d 1333
3f8b8459 1334 /* We want bank 0 and Vendor ID high byte */
9873964d
CS		 1335 val1 = w83791d_read(client, W83791D_REG_BANK) & 0x78;
1336 w83791d_write(client, W83791D_REG_BANK, val1 | 0x80);
1337
1338 /* Verify it is a Winbond w83791d */
3f8b8459
JD		 1339 val1 = w83791d_read(client, W83791D_REG_WCHIPID);
1340 val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
1341 if (val1 != 0x71 || val2 != 0x5c)
1342 return -ENODEV;
9873964d 1343
cb0c1af3
JD		 1344 strlcpy(info->type, "w83791d", I2C_NAME_SIZE);
1345
1346 return 0;
1347}
1348
1349static int w83791d_probe(struct i2c_client *client,
1350 const struct i2c_device_id *id)
1351{
1352 struct w83791d_data *data;
1353 struct device *dev = &client->dev;
16a515fd 1354 int i, err;
6e1ecd9b 1355 u8 has_fanpwm45;
9873964d
CS		 1356
1357#ifdef DEBUG
16a515fd 1358 int val1;
9873964d
CS		 1359 val1 = w83791d_read(client, W83791D_REG_DID_VID4);
1360 dev_dbg(dev, "Device ID version: %d.%d (0x%02x)\n",
1361 (val1 >> 5) & 0x07, (val1 >> 1) & 0x0f, val1);
1362#endif
1363
6e13bb06
GR		 1364 data = devm_kzalloc(&client->dev, sizeof(struct w83791d_data),
1365 GFP_KERNEL);
1366 if (!data)
1367 return -ENOMEM;
9873964d 1368
cb0c1af3
JD		 1369 i2c_set_clientdata(client, data);
1370 mutex_init(&data->update_lock);
9873964d 1371
cb0c1af3
JD		 1372 err = w83791d_detect_subclients(client);
1373 if (err)
6e13bb06 1374 return err;
9873964d
CS		 1375
1376 /* Initialize the chip */
1377 w83791d_init_client(client);
1378
ec1c3194
GR		 1379 /*
1380 * If the fan_div is changed, make sure there is a rational
1381 * fan_min in place
1382 */
1383 for (i = 0; i < NUMBER_OF_FANIN; i++)
9873964d 1384 data->fan_min[i] = w83791d_read(client, W83791D_REG_FAN_MIN[i]);
9873964d
CS		 1385
1386 /* Register sysfs hooks */
ec1c3194
GR		 1387 err = sysfs_create_group(&client->dev.kobj, &w83791d_group);
1388 if (err)
358d2071 1389 return err;
34fc921a 1390
6e1ecd9b
MH		 1391 /* Check if pins of fan/pwm 4-5 are in use as GPIO */
1392 has_fanpwm45 = w83791d_read(client, W83791D_REG_GPIO) & 0x10;
1393 if (has_fanpwm45) {
1394 err = sysfs_create_group(&client->dev.kobj,
1395 &w83791d_group_fanpwm45);
1396 if (err)
1397 goto error4;
1398 }
1399
34fc921a 1400 /* Everything is ready, now register the working device */
1beeffe4
TJ		 1401 data->hwmon_dev = hwmon_device_register(dev);
1402 if (IS_ERR(data->hwmon_dev)) {
1403 err = PTR_ERR(data->hwmon_dev);
6e1ecd9b 1404 goto error5;
9873964d
CS		 1405 }
1406
9873964d
CS		 1407 return 0;
1408
6e1ecd9b
MH		 1409error5:
1410 if (has_fanpwm45)
1411 sysfs_remove_group(&client->dev.kobj, &w83791d_group_fanpwm45);
34fc921a
JC		 1412error4:
1413 sysfs_remove_group(&client->dev.kobj, &w83791d_group);
9873964d
CS		 1414 return err;
1415}
1416
cb0c1af3 1417static int w83791d_remove(struct i2c_client *client)
9873964d
CS		 1418{
1419 struct w83791d_data *data = i2c_get_clientdata(client);
9873964d 1420
cb0c1af3
JD		 1421 hwmon_device_unregister(data->hwmon_dev);
1422 sysfs_remove_group(&client->dev.kobj, &w83791d_group);
9873964d 1423
9873964d
CS		 1424 return 0;
1425}
1426
1427static void w83791d_init_client(struct i2c_client *client)
1428{
1429 struct w83791d_data *data = i2c_get_clientdata(client);
1430 u8 tmp;
1431 u8 old_beep;
1432
ec1c3194
GR		 1433 /*
1434 * The difference between reset and init is that reset
1435 * does a hard reset of the chip via index 0x40, bit 7,
1436 * but init simply forces certain registers to have "sane"
1437 * values. The hope is that the BIOS has done the right
1438 * thing (which is why the default is reset=0, init=0),
1439 * but if not, reset is the hard hammer and init
1440 * is the soft mallet both of which are trying to whack
1441 * things into place...
1442 * NOTE: The data sheet makes a distinction between
1443 * "power on defaults" and "reset by MR". As far as I can tell,
1444 * the hard reset puts everything into a power-on state so I'm
1445 * not sure what "reset by MR" means or how it can happen.
1446 */
9873964d
CS		 1447 if (reset || init) {
1448 /* keep some BIOS settings when we... */
1449 old_beep = w83791d_read(client, W83791D_REG_BEEP_CONFIG);
1450
1451 if (reset) {
1452 /* ... reset the chip and ... */
1453 w83791d_write(client, W83791D_REG_CONFIG, 0x80);
1454 }
1455
1456 /* ... disable power-on abnormal beep */
1457 w83791d_write(client, W83791D_REG_BEEP_CONFIG, old_beep | 0x80);
1458
1459 /* disable the global beep (not done by hard reset) */
1460 tmp = w83791d_read(client, W83791D_REG_BEEP_CTRL[1]);
1461 w83791d_write(client, W83791D_REG_BEEP_CTRL[1], tmp & 0xef);
1462
1463 if (init) {
1464 /* Make sure monitoring is turned on for add-ons */
1465 tmp = w83791d_read(client, W83791D_REG_TEMP2_CONFIG);
1466 if (tmp & 1) {
1467 w83791d_write(client, W83791D_REG_TEMP2_CONFIG,
1468 tmp & 0xfe);
1469 }
1470
1471 tmp = w83791d_read(client, W83791D_REG_TEMP3_CONFIG);
1472 if (tmp & 1) {
1473 w83791d_write(client, W83791D_REG_TEMP3_CONFIG,
1474 tmp & 0xfe);
1475 }
1476
1477 /* Start monitoring */
1478 tmp = w83791d_read(client, W83791D_REG_CONFIG) & 0xf7;
1479 w83791d_write(client, W83791D_REG_CONFIG, tmp | 0x01);
1480 }
1481 }
1482
1483 data->vrm = vid_which_vrm();
1484}
1485
1486static struct w83791d_data *w83791d_update_device(struct device *dev)
1487{
1488 struct i2c_client *client = to_i2c_client(dev);
1489 struct w83791d_data *data = i2c_get_clientdata(client);
1490 int i, j;
1491 u8 reg_array_tmp[3];
ad02ad85 1492 u8 vbat_reg;
9873964d
CS		 1493
1494 mutex_lock(&data->update_lock);
1495
1496 if (time_after(jiffies, data->last_updated + (HZ * 3))
1497 || !data->valid) {
1498 dev_dbg(dev, "Starting w83791d device update\n");
1499
1500 /* Update the voltages measured value and limits */
1501 for (i = 0; i < NUMBER_OF_VIN; i++) {
1502 data->in[i] = w83791d_read(client,
1503 W83791D_REG_IN[i]);
1504 data->in_max[i] = w83791d_read(client,
1505 W83791D_REG_IN_MAX[i]);
1506 data->in_min[i] = w83791d_read(client,
1507 W83791D_REG_IN_MIN[i]);
1508 }
1509
1510 /* Update the fan counts and limits */
1511 for (i = 0; i < NUMBER_OF_FANIN; i++) {
1512 /* Update the Fan measured value and limits */
1513 data->fan[i] = w83791d_read(client,
1514 W83791D_REG_FAN[i]);
1515 data->fan_min[i] = w83791d_read(client,
1516 W83791D_REG_FAN_MIN[i]);
1517 }
1518
1519 /* Update the fan divisor */
1520 for (i = 0; i < 3; i++) {
1521 reg_array_tmp[i] = w83791d_read(client,
1522 W83791D_REG_FAN_DIV[i]);
1523 }
1524 data->fan_div[0] = (reg_array_tmp[0] >> 4) & 0x03;
1525 data->fan_div[1] = (reg_array_tmp[0] >> 6) & 0x03;
1526 data->fan_div[2] = (reg_array_tmp[1] >> 6) & 0x03;
1527 data->fan_div[3] = reg_array_tmp[2] & 0x07;
1528 data->fan_div[4] = (reg_array_tmp[2] >> 4) & 0x07;
1529
ec1c3194
GR		 1530 /*
1531 * The fan divisor for fans 0-2 get bit 2 from
1532 * bits 5-7 respectively of vbat register
1533 */
ad02ad85
MH		 1534 vbat_reg = w83791d_read(client, W83791D_REG_VBAT);
1535 for (i = 0; i < 3; i++)
1536 data->fan_div[i] |= (vbat_reg >> (3 + i)) & 0x04;
1537
6495ce18
MH		 1538 /* Update PWM duty cycle */
1539 for (i = 0; i < NUMBER_OF_PWM; i++) {
1540 data->pwm[i] = w83791d_read(client,
1541 W83791D_REG_PWM[i]);
1542 }
1543
b5938f8c
MH		 1544 /* Update PWM enable status */
1545 for (i = 0; i < 2; i++) {
1546 reg_array_tmp[i] = w83791d_read(client,
1547 W83791D_REG_FAN_CFG[i]);
1548 }
1549 data->pwm_enable[0] = (reg_array_tmp[0] >> 2) & 0x03;
1550 data->pwm_enable[1] = (reg_array_tmp[0] >> 4) & 0x03;
1551 data->pwm_enable[2] = (reg_array_tmp[1] >> 2) & 0x03;
1552
a5a4598c
MH		 1553 /* Update PWM target temperature */
1554 for (i = 0; i < 3; i++) {
1555 data->temp_target[i] = w83791d_read(client,
1556 W83791D_REG_TEMP_TARGET[i]) & 0x7f;
1557 }
1558
1559 /* Update PWM temperature tolerance */
1560 for (i = 0; i < 2; i++) {
1561 reg_array_tmp[i] = w83791d_read(client,
1562 W83791D_REG_TEMP_TOL[i]);
1563 }
1564 data->temp_tolerance[0] = reg_array_tmp[0] & 0x0f;
1565 data->temp_tolerance[1] = (reg_array_tmp[0] >> 4) & 0x0f;
1566 data->temp_tolerance[2] = reg_array_tmp[1] & 0x0f;
1567
9873964d
CS		 1568 /* Update the first temperature sensor */
1569 for (i = 0; i < 3; i++) {
1570 data->temp1[i] = w83791d_read(client,
1571 W83791D_REG_TEMP1[i]);
1572 }
1573
1574 /* Update the rest of the temperature sensors */
1575 for (i = 0; i < 2; i++) {
1576 for (j = 0; j < 3; j++) {
1577 data->temp_add[i][j] =
1578 (w83791d_read(client,
1579 W83791D_REG_TEMP_ADD[i][j * 2]) << 8) |
1580 w83791d_read(client,
1581 W83791D_REG_TEMP_ADD[i][j * 2 + 1]);
1582 }
1583 }
1584
1585 /* Update the realtime status */
1586 data->alarms =
1587 w83791d_read(client, W83791D_REG_ALARM1) +
1588 (w83791d_read(client, W83791D_REG_ALARM2) << 8) +
1589 (w83791d_read(client, W83791D_REG_ALARM3) << 16);
1590
1591 /* Update the beep configuration information */
1592 data->beep_mask =
1593 w83791d_read(client, W83791D_REG_BEEP_CTRL[0]) +
1594 (w83791d_read(client, W83791D_REG_BEEP_CTRL[1]) << 8) +
1595 (w83791d_read(client, W83791D_REG_BEEP_CTRL[2]) << 16);
1596
125751cb 1597 /* Extract global beep enable flag */
9873964d
CS		 1598 data->beep_enable =
1599 (data->beep_mask >> GLOBAL_BEEP_ENABLE_SHIFT) & 0x01;
1600
1601 /* Update the cpu voltage information */
1602 i = w83791d_read(client, W83791D_REG_VID_FANDIV);
1603 data->vid = i & 0x0f;
1604 data->vid |= (w83791d_read(client, W83791D_REG_DID_VID4) & 0x01)
1605 << 4;
1606
1607 data->last_updated = jiffies;
1608 data->valid = 1;
1609 }
1610
1611 mutex_unlock(&data->update_lock);
1612
1613#ifdef DEBUG
1614 w83791d_print_debug(data, dev);
1615#endif
1616
1617 return data;
1618}
1619
1620#ifdef DEBUG
1621static void w83791d_print_debug(struct w83791d_data *data, struct device *dev)
1622{
1623 int i = 0, j = 0;
1624
1625 dev_dbg(dev, "======Start of w83791d debug values======\n");
1626 dev_dbg(dev, "%d set of Voltages: ===>\n", NUMBER_OF_VIN);
1627 for (i = 0; i < NUMBER_OF_VIN; i++) {
1628 dev_dbg(dev, "vin[%d] is: 0x%02x\n", i, data->in[i]);
1629 dev_dbg(dev, "vin[%d] min is: 0x%02x\n", i, data->in_min[i]);
1630 dev_dbg(dev, "vin[%d] max is: 0x%02x\n", i, data->in_max[i]);
1631 }
1632 dev_dbg(dev, "%d set of Fan Counts/Divisors: ===>\n", NUMBER_OF_FANIN);
1633 for (i = 0; i < NUMBER_OF_FANIN; i++) {
1634 dev_dbg(dev, "fan[%d] is: 0x%02x\n", i, data->fan[i]);
1635 dev_dbg(dev, "fan[%d] min is: 0x%02x\n", i, data->fan_min[i]);
1636 dev_dbg(dev, "fan_div[%d] is: 0x%02x\n", i, data->fan_div[i]);
1637 }
1638
ec1c3194
GR		 1639 /*
1640 * temperature math is signed, but only print out the
1641 * bits that matter
1642 */
9873964d 1643 dev_dbg(dev, "%d set of Temperatures: ===>\n", NUMBER_OF_TEMPIN);
ec1c3194 1644 for (i = 0; i < 3; i++)
9873964d 1645 dev_dbg(dev, "temp1[%d] is: 0x%02x\n", i, (u8) data->temp1[i]);
9873964d
CS		 1646 for (i = 0; i < 2; i++) {
1647 for (j = 0; j < 3; j++) {
1648 dev_dbg(dev, "temp_add[%d][%d] is: 0x%04x\n", i, j,
1649 (u16) data->temp_add[i][j]);
1650 }
1651 }
1652
1653 dev_dbg(dev, "Misc Information: ===>\n");
1654 dev_dbg(dev, "alarm is: 0x%08x\n", data->alarms);
1655 dev_dbg(dev, "beep_mask is: 0x%08x\n", data->beep_mask);
1656 dev_dbg(dev, "beep_enable is: %d\n", data->beep_enable);
1657 dev_dbg(dev, "vid is: 0x%02x\n", data->vid);
1658 dev_dbg(dev, "vrm is: 0x%02x\n", data->vrm);
1659 dev_dbg(dev, "=======End of w83791d debug values========\n");
1660 dev_dbg(dev, "\n");
1661}
1662#endif
1663
f0967eea 1664module_i2c_driver(w83791d_driver);
9873964d
CS		 1665
1666MODULE_AUTHOR("Charles Spirakis <bezaur@gmail.com>");
1667MODULE_DESCRIPTION("W83791D driver");
1668MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)