MAINTAINERS: update hwmon subsystem git trees
[linux-2.6-block.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT
1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
7666c13c
JD
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
1da177e4
LT
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
1da177e4
LT
32 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
33 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
LT
34
35*/
36
1da177e4
LT
37#include <linux/module.h>
38#include <linux/init.h>
39#include <linux/slab.h>
40#include <linux/jiffies.h>
41#include <linux/i2c.h>
7666c13c
JD
42#include <linux/platform_device.h>
43#include <linux/ioport.h>
943b0830 44#include <linux/hwmon.h>
303760b4 45#include <linux/hwmon-vid.h>
34875337 46#include <linux/hwmon-sysfs.h>
311ce2ef 47#include <linux/sysfs.h>
943b0830 48#include <linux/err.h>
9a61bf63 49#include <linux/mutex.h>
1da177e4
LT
50#include <asm/io.h>
51#include "lm75.h"
52
7666c13c
JD
53/* ISA device, if found */
54static struct platform_device *pdev;
55
1da177e4
LT
56/* Addresses to scan */
57static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
58 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
59 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
2d8672c5 60static unsigned short isa_address = 0x290;
1da177e4
LT
61
62/* Insmod parameters */
f4b50261 63I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
1da177e4
LT
64I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
65 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
66
fabddcd4
JD
67static int reset;
68module_param(reset, bool, 0);
69MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
70
1da177e4
LT
71static int init = 1;
72module_param(init, bool, 0);
73MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
74
75/* Constants specified below */
76
77/* Length of ISA address segment */
78#define W83781D_EXTENT 8
79
80/* Where are the ISA address/data registers relative to the base address */
81#define W83781D_ADDR_REG_OFFSET 5
82#define W83781D_DATA_REG_OFFSET 6
83
34875337
JD
84/* The device registers */
85/* in nr from 0 to 8 */
1da177e4
LT
86#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
87 (0x554 + (((nr) - 7) * 2)))
88#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
89 (0x555 + (((nr) - 7) * 2)))
90#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
91 (0x550 + (nr) - 7))
92
34875337
JD
93/* fan nr from 0 to 2 */
94#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
95#define W83781D_REG_FAN(nr) (0x28 + (nr))
1da177e4
LT
96
97#define W83781D_REG_BANK 0x4E
98#define W83781D_REG_TEMP2_CONFIG 0x152
99#define W83781D_REG_TEMP3_CONFIG 0x252
34875337 100/* temp nr from 1 to 3 */
1da177e4
LT
101#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
102 ((nr == 2) ? (0x0150) : \
103 (0x27)))
104#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
105 ((nr == 2) ? (0x153) : \
106 (0x3A)))
107#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
108 ((nr == 2) ? (0x155) : \
109 (0x39)))
110
111#define W83781D_REG_CONFIG 0x40
c7f5d7ed
JD
112
113/* Interrupt status (W83781D, AS99127F) */
1da177e4
LT
114#define W83781D_REG_ALARM1 0x41
115#define W83781D_REG_ALARM2 0x42
1da177e4 116
c7f5d7ed
JD
117/* Real-time status (W83782D, W83783S, W83627HF) */
118#define W83782D_REG_ALARM1 0x459
119#define W83782D_REG_ALARM2 0x45A
120#define W83782D_REG_ALARM3 0x45B
121
1da177e4
LT
122#define W83781D_REG_BEEP_CONFIG 0x4D
123#define W83781D_REG_BEEP_INTS1 0x56
124#define W83781D_REG_BEEP_INTS2 0x57
125#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
126
127#define W83781D_REG_VID_FANDIV 0x47
128
129#define W83781D_REG_CHIPID 0x49
130#define W83781D_REG_WCHIPID 0x58
131#define W83781D_REG_CHIPMAN 0x4F
132#define W83781D_REG_PIN 0x4B
133
134/* 782D/783S only */
135#define W83781D_REG_VBAT 0x5D
136
137/* PWM 782D (1-4) and 783S (1-2) only */
34875337 138static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
1da177e4
LT
139#define W83781D_REG_PWMCLK12 0x5C
140#define W83781D_REG_PWMCLK34 0x45C
1da177e4
LT
141
142#define W83781D_REG_I2C_ADDR 0x48
143#define W83781D_REG_I2C_SUBADDR 0x4A
144
145/* The following are undocumented in the data sheets however we
146 received the information in an email from Winbond tech support */
147/* Sensor selection - not on 781d */
148#define W83781D_REG_SCFG1 0x5D
149static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
150
151#define W83781D_REG_SCFG2 0x59
152static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
153
154#define W83781D_DEFAULT_BETA 3435
155
156/* RT Table registers */
157#define W83781D_REG_RT_IDX 0x50
158#define W83781D_REG_RT_VAL 0x51
159
474d00a8
JD
160/* Conversions */
161#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
162#define IN_FROM_REG(val) ((val) * 16)
1da177e4
LT
163
164static inline u8
165FAN_TO_REG(long rpm, int div)
166{
167 if (rpm == 0)
168 return 255;
169 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
170 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
171}
172
474d00a8
JD
173static inline long
174FAN_FROM_REG(u8 val, int div)
175{
176 if (val == 0)
177 return -1;
178 if (val == 255)
179 return 0;
180 return 1350000 / (val * div);
181}
1da177e4 182
474d00a8
JD
183#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
184#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 185
1da177e4
LT
186#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
187 (val) ^ 0x7fff : (val))
188#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
189 (~(val)) & 0x7fff : (val) & 0xffffff)
190
1da177e4
LT
191#define DIV_FROM_REG(val) (1 << (val))
192
193static inline u8
194DIV_TO_REG(long val, enum chips type)
195{
196 int i;
197 val = SENSORS_LIMIT(val, 1,
198 ((type == w83781d
199 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 200 for (i = 0; i < 7; i++) {
1da177e4
LT
201 if (val == 0)
202 break;
203 val >>= 1;
204 }
474d00a8 205 return i;
1da177e4
LT
206}
207
208/* There are some complications in a module like this. First off, W83781D chips
209 may be both present on the SMBus and the ISA bus, and we have to handle
210 those cases separately at some places. Second, there might be several
211 W83781D chips available (well, actually, that is probably never done; but
212 it is a clean illustration of how to handle a case like that). Finally,
213 a specific chip may be attached to *both* ISA and SMBus, and we would
214 not like to detect it double. Fortunately, in the case of the W83781D at
215 least, a register tells us what SMBus address we are on, so that helps
216 a bit - except if there could be more than one SMBus. Groan. No solution
217 for this yet. */
218
7666c13c
JD
219/* For ISA chips, we abuse the i2c_client addr and name fields. We also use
220 the driver field to differentiate between I2C and ISA chips. */
1da177e4
LT
221struct w83781d_data {
222 struct i2c_client client;
1beeffe4 223 struct device *hwmon_dev;
9a61bf63 224 struct mutex lock;
1da177e4
LT
225 enum chips type;
226
9a61bf63 227 struct mutex update_lock;
1da177e4
LT
228 char valid; /* !=0 if following fields are valid */
229 unsigned long last_updated; /* In jiffies */
230
231 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
232 /* array of 2 pointers to subclients */
233
234 u8 in[9]; /* Register value - 8 & 9 for 782D only */
235 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
236 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
237 u8 fan[3]; /* Register value */
238 u8 fan_min[3]; /* Register value */
474d00a8
JD
239 s8 temp; /* Register value */
240 s8 temp_max; /* Register value */
241 s8 temp_max_hyst; /* Register value */
1da177e4
LT
242 u16 temp_add[2]; /* Register value */
243 u16 temp_max_add[2]; /* Register value */
244 u16 temp_max_hyst_add[2]; /* Register value */
245 u8 fan_div[3]; /* Register encoding, shifted right */
246 u8 vid; /* Register encoding, combined */
247 u32 alarms; /* Register encoding, combined */
248 u32 beep_mask; /* Register encoding, combined */
249 u8 beep_enable; /* Boolean */
250 u8 pwm[4]; /* Register value */
34875337 251 u8 pwm2_enable; /* Boolean */
1da177e4
LT
252 u16 sens[3]; /* 782D/783S only.
253 1 = pentium diode; 2 = 3904 diode;
b26f9330 254 4 = thermistor */
1da177e4
LT
255 u8 vrm;
256};
257
258static int w83781d_attach_adapter(struct i2c_adapter *adapter);
259static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
260static int w83781d_detach_client(struct i2c_client *client);
261
7666c13c
JD
262static int __devinit w83781d_isa_probe(struct platform_device *pdev);
263static int __devexit w83781d_isa_remove(struct platform_device *pdev);
264
31b8dc4d
JD
265static int w83781d_read_value(struct w83781d_data *data, u16 reg);
266static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
1da177e4 267static struct w83781d_data *w83781d_update_device(struct device *dev);
7666c13c 268static void w83781d_init_device(struct device *dev);
1da177e4
LT
269
270static struct i2c_driver w83781d_driver = {
cdaf7934 271 .driver = {
cdaf7934
LR
272 .name = "w83781d",
273 },
1da177e4 274 .id = I2C_DRIVERID_W83781D,
1da177e4
LT
275 .attach_adapter = w83781d_attach_adapter,
276 .detach_client = w83781d_detach_client,
277};
278
7666c13c 279static struct platform_driver w83781d_isa_driver = {
cdaf7934 280 .driver = {
87218842 281 .owner = THIS_MODULE,
7666c13c 282 .name = "w83781d",
cdaf7934 283 },
7666c13c
JD
284 .probe = w83781d_isa_probe,
285 .remove = w83781d_isa_remove,
fde09509
JD
286};
287
288
1da177e4
LT
289/* following are the sysfs callback functions */
290#define show_in_reg(reg) \
34875337
JD
291static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
292 char *buf) \
1da177e4 293{ \
34875337 294 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 295 struct w83781d_data *data = w83781d_update_device(dev); \
34875337
JD
296 return sprintf(buf, "%ld\n", \
297 (long)IN_FROM_REG(data->reg[attr->index])); \
1da177e4
LT
298}
299show_in_reg(in);
300show_in_reg(in_min);
301show_in_reg(in_max);
302
303#define store_in_reg(REG, reg) \
34875337
JD
304static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
305 *da, const char *buf, size_t count) \
1da177e4 306{ \
34875337 307 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 308 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 309 int nr = attr->index; \
1da177e4
LT
310 u32 val; \
311 \
474d00a8 312 val = simple_strtoul(buf, NULL, 10); \
1da177e4 313 \
9a61bf63 314 mutex_lock(&data->update_lock); \
1da177e4 315 data->in_##reg[nr] = IN_TO_REG(val); \
31b8dc4d 316 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
1da177e4 317 \
9a61bf63 318 mutex_unlock(&data->update_lock); \
1da177e4
LT
319 return count; \
320}
321store_in_reg(MIN, min);
322store_in_reg(MAX, max);
323
1da177e4 324#define sysfs_in_offsets(offset) \
34875337
JD
325static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
326 show_in, NULL, offset); \
327static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
328 show_in_min, store_in_min, offset); \
329static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
330 show_in_max, store_in_max, offset)
1da177e4
LT
331
332sysfs_in_offsets(0);
333sysfs_in_offsets(1);
334sysfs_in_offsets(2);
335sysfs_in_offsets(3);
336sysfs_in_offsets(4);
337sysfs_in_offsets(5);
338sysfs_in_offsets(6);
339sysfs_in_offsets(7);
340sysfs_in_offsets(8);
341
1da177e4 342#define show_fan_reg(reg) \
34875337
JD
343static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
344 char *buf) \
1da177e4 345{ \
34875337 346 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4
LT
347 struct w83781d_data *data = w83781d_update_device(dev); \
348 return sprintf(buf,"%ld\n", \
34875337
JD
349 FAN_FROM_REG(data->reg[attr->index], \
350 DIV_FROM_REG(data->fan_div[attr->index]))); \
1da177e4
LT
351}
352show_fan_reg(fan);
353show_fan_reg(fan_min);
354
355static ssize_t
34875337
JD
356store_fan_min(struct device *dev, struct device_attribute *da,
357 const char *buf, size_t count)
1da177e4 358{
34875337 359 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 360 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 361 int nr = attr->index;
1da177e4
LT
362 u32 val;
363
364 val = simple_strtoul(buf, NULL, 10);
365
9a61bf63 366 mutex_lock(&data->update_lock);
34875337
JD
367 data->fan_min[nr] =
368 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
31b8dc4d 369 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
34875337 370 data->fan_min[nr]);
1da177e4 371
9a61bf63 372 mutex_unlock(&data->update_lock);
1da177e4
LT
373 return count;
374}
375
34875337
JD
376static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
377static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
378 show_fan_min, store_fan_min, 0);
379static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
380static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
381 show_fan_min, store_fan_min, 1);
382static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
383static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
384 show_fan_min, store_fan_min, 2);
1da177e4 385
1da177e4 386#define show_temp_reg(reg) \
34875337
JD
387static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
388 char *buf) \
1da177e4 389{ \
34875337 390 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 391 struct w83781d_data *data = w83781d_update_device(dev); \
34875337 392 int nr = attr->index; \
1da177e4
LT
393 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
394 return sprintf(buf,"%d\n", \
395 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
396 } else { /* TEMP1 */ \
397 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
398 } \
399}
400show_temp_reg(temp);
401show_temp_reg(temp_max);
402show_temp_reg(temp_max_hyst);
403
404#define store_temp_reg(REG, reg) \
34875337
JD
405static ssize_t store_temp_##reg (struct device *dev, \
406 struct device_attribute *da, const char *buf, size_t count) \
1da177e4 407{ \
34875337 408 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 409 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 410 int nr = attr->index; \
5bfedac0 411 long val; \
1da177e4
LT
412 \
413 val = simple_strtol(buf, NULL, 10); \
414 \
9a61bf63 415 mutex_lock(&data->update_lock); \
1da177e4
LT
416 \
417 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
418 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
31b8dc4d 419 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT
420 data->temp_##reg##_add[nr-2]); \
421 } else { /* TEMP1 */ \
422 data->temp_##reg = TEMP_TO_REG(val); \
31b8dc4d 423 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT
424 data->temp_##reg); \
425 } \
426 \
9a61bf63 427 mutex_unlock(&data->update_lock); \
1da177e4
LT
428 return count; \
429}
430store_temp_reg(OVER, max);
431store_temp_reg(HYST, max_hyst);
432
1da177e4 433#define sysfs_temp_offsets(offset) \
34875337
JD
434static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
435 show_temp, NULL, offset); \
436static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
437 show_temp_max, store_temp_max, offset); \
438static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
439 show_temp_max_hyst, store_temp_max_hyst, offset);
1da177e4
LT
440
441sysfs_temp_offsets(1);
442sysfs_temp_offsets(2);
443sysfs_temp_offsets(3);
444
1da177e4 445static ssize_t
e404e274 446show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
447{
448 struct w83781d_data *data = w83781d_update_device(dev);
449 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
450}
451
311ce2ef
JC
452static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
453
1da177e4 454static ssize_t
e404e274 455show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
456{
457 struct w83781d_data *data = w83781d_update_device(dev);
458 return sprintf(buf, "%ld\n", (long) data->vrm);
459}
460
461static ssize_t
e404e274 462store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 463{
7666c13c 464 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
465 u32 val;
466
467 val = simple_strtoul(buf, NULL, 10);
468 data->vrm = val;
469
470 return count;
471}
472
311ce2ef
JC
473static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
474
1da177e4 475static ssize_t
e404e274 476show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
477{
478 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 479 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT
480}
481
311ce2ef
JC
482static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
483
e404e274 484static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
485{
486 struct w83781d_data *data = w83781d_update_device(dev);
487 return sprintf(buf, "%ld\n",
488 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
489}
e404e274 490static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
491{
492 struct w83781d_data *data = w83781d_update_device(dev);
474d00a8 493 return sprintf(buf, "%ld\n", (long)data->beep_enable);
1da177e4
LT
494}
495
1da177e4 496static ssize_t
34875337
JD
497store_beep_mask(struct device *dev, struct device_attribute *attr,
498 const char *buf, size_t count)
1da177e4 499{
7666c13c 500 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 501 u32 val;
1da177e4
LT
502
503 val = simple_strtoul(buf, NULL, 10);
504
9a61bf63 505 mutex_lock(&data->update_lock);
34875337
JD
506 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
507 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
508 data->beep_mask & 0xff);
509 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
510 ((data->beep_mask >> 8) & 0x7f)
511 | data->beep_enable << 7);
512 if (data->type != w83781d && data->type != as99127f) {
513 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
514 ((data->beep_mask) >> 16) & 0xff);
515 }
516 mutex_unlock(&data->update_lock);
1da177e4 517
34875337
JD
518 return count;
519}
1da177e4 520
34875337
JD
521static ssize_t
522store_beep_enable(struct device *dev, struct device_attribute *attr,
523 const char *buf, size_t count)
524{
525 struct w83781d_data *data = dev_get_drvdata(dev);
526 u32 val;
1da177e4 527
34875337
JD
528 val = simple_strtoul(buf, NULL, 10);
529 if (val != 0 && val != 1)
530 return -EINVAL;
1da177e4 531
34875337
JD
532 mutex_lock(&data->update_lock);
533 data->beep_enable = val;
534 val = w83781d_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
535 val |= data->beep_enable << 7;
536 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, val);
9a61bf63 537 mutex_unlock(&data->update_lock);
34875337 538
1da177e4
LT
539 return count;
540}
541
34875337
JD
542static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
543 show_beep_mask, store_beep_mask);
544static DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
545 show_beep_enable, store_beep_enable);
1da177e4 546
1da177e4 547static ssize_t
34875337 548show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 549{
34875337 550 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4
LT
551 struct w83781d_data *data = w83781d_update_device(dev);
552 return sprintf(buf, "%ld\n",
34875337 553 (long) DIV_FROM_REG(data->fan_div[attr->index]));
1da177e4
LT
554}
555
556/* Note: we save and restore the fan minimum here, because its value is
557 determined in part by the fan divisor. This follows the principle of
d6e05edc 558 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT
559 because the divisor changed. */
560static ssize_t
34875337
JD
561store_fan_div(struct device *dev, struct device_attribute *da,
562 const char *buf, size_t count)
1da177e4 563{
34875337 564 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 565 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4 566 unsigned long min;
34875337 567 int nr = attr->index;
1da177e4
LT
568 u8 reg;
569 unsigned long val = simple_strtoul(buf, NULL, 10);
570
9a61bf63 571 mutex_lock(&data->update_lock);
1da177e4
LT
572
573 /* Save fan_min */
574 min = FAN_FROM_REG(data->fan_min[nr],
575 DIV_FROM_REG(data->fan_div[nr]));
576
577 data->fan_div[nr] = DIV_TO_REG(val, data->type);
578
31b8dc4d 579 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT
580 & (nr==0 ? 0xcf : 0x3f))
581 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
31b8dc4d 582 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4
LT
583
584 /* w83781d and as99127f don't have extended divisor bits */
585 if (data->type != w83781d && data->type != as99127f) {
31b8dc4d 586 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
1da177e4
LT
587 & ~(1 << (5 + nr)))
588 | ((data->fan_div[nr] & 0x04) << (3 + nr));
31b8dc4d 589 w83781d_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT
590 }
591
592 /* Restore fan_min */
593 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
34875337 594 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 595
9a61bf63 596 mutex_unlock(&data->update_lock);
1da177e4
LT
597 return count;
598}
599
34875337
JD
600static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
601 show_fan_div, store_fan_div, 0);
602static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
603 show_fan_div, store_fan_div, 1);
604static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
605 show_fan_div, store_fan_div, 2);
1da177e4 606
1da177e4 607static ssize_t
34875337 608show_pwm(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 609{
34875337 610 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 611 struct w83781d_data *data = w83781d_update_device(dev);
34875337 612 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
1da177e4
LT
613}
614
615static ssize_t
34875337 616show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
1da177e4
LT
617{
618 struct w83781d_data *data = w83781d_update_device(dev);
34875337 619 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
1da177e4
LT
620}
621
622static ssize_t
34875337
JD
623store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
624 size_t count)
1da177e4 625{
34875337 626 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 627 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 628 int nr = attr->index;
1da177e4
LT
629 u32 val;
630
631 val = simple_strtoul(buf, NULL, 10);
632
9a61bf63 633 mutex_lock(&data->update_lock);
34875337
JD
634 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
635 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
9a61bf63 636 mutex_unlock(&data->update_lock);
1da177e4
LT
637 return count;
638}
639
640static ssize_t
34875337
JD
641store_pwm2_enable(struct device *dev, struct device_attribute *da,
642 const char *buf, size_t count)
1da177e4 643{
7666c13c 644 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
645 u32 val, reg;
646
647 val = simple_strtoul(buf, NULL, 10);
648
9a61bf63 649 mutex_lock(&data->update_lock);
1da177e4
LT
650
651 switch (val) {
652 case 0:
653 case 1:
31b8dc4d
JD
654 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
655 w83781d_write_value(data, W83781D_REG_PWMCLK12,
1da177e4
LT
656 (reg & 0xf7) | (val << 3));
657
31b8dc4d
JD
658 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
659 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
1da177e4
LT
660 (reg & 0xef) | (!val << 4));
661
34875337 662 data->pwm2_enable = val;
1da177e4
LT
663 break;
664
665 default:
9a61bf63 666 mutex_unlock(&data->update_lock);
1da177e4
LT
667 return -EINVAL;
668 }
669
9a61bf63 670 mutex_unlock(&data->update_lock);
1da177e4
LT
671 return count;
672}
673
34875337
JD
674static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
675static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
676static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
677static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
678/* only PWM2 can be enabled/disabled */
679static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
680 show_pwm2_enable, store_pwm2_enable);
1da177e4 681
1da177e4 682static ssize_t
34875337 683show_sensor(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 684{
34875337 685 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 686 struct w83781d_data *data = w83781d_update_device(dev);
34875337 687 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
1da177e4
LT
688}
689
690static ssize_t
34875337
JD
691store_sensor(struct device *dev, struct device_attribute *da,
692 const char *buf, size_t count)
1da177e4 693{
34875337 694 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 695 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 696 int nr = attr->index;
1da177e4
LT
697 u32 val, tmp;
698
699 val = simple_strtoul(buf, NULL, 10);
700
9a61bf63 701 mutex_lock(&data->update_lock);
1da177e4
LT
702
703 switch (val) {
704 case 1: /* PII/Celeron diode */
31b8dc4d
JD
705 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
706 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 707 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD
708 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
709 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD
710 tmp | BIT_SCFG2[nr]);
711 data->sens[nr] = val;
1da177e4
LT
712 break;
713 case 2: /* 3904 */
31b8dc4d
JD
714 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
715 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 716 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD
717 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
718 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD
719 tmp & ~BIT_SCFG2[nr]);
720 data->sens[nr] = val;
1da177e4 721 break;
b26f9330
JD
722 case W83781D_DEFAULT_BETA:
723 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
724 "instead\n", W83781D_DEFAULT_BETA);
725 /* fall through */
726 case 4: /* thermistor */
31b8dc4d
JD
727 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
728 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337
JD
729 tmp & ~BIT_SCFG1[nr]);
730 data->sens[nr] = val;
1da177e4
LT
731 break;
732 default:
b26f9330
JD
733 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
734 (long) val);
1da177e4
LT
735 break;
736 }
737
9a61bf63 738 mutex_unlock(&data->update_lock);
1da177e4
LT
739 return count;
740}
741
34875337
JD
742static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
743 show_sensor, store_sensor, 0);
744static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
393cdad6 745 show_sensor, store_sensor, 1);
34875337 746static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
393cdad6 747 show_sensor, store_sensor, 2);
1da177e4 748
7666c13c
JD
749/* I2C devices get this name attribute automatically, but for ISA devices
750 we must create it by ourselves. */
751static ssize_t
752show_name(struct device *dev, struct device_attribute *devattr, char *buf)
753{
754 struct w83781d_data *data = dev_get_drvdata(dev);
755 return sprintf(buf, "%s\n", data->client.name);
756}
757static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
758
1da177e4
LT
759/* This function is called when:
760 * w83781d_driver is inserted (when this module is loaded), for each
761 available adapter
762 * when a new adapter is inserted (and w83781d_driver is still present) */
763static int
764w83781d_attach_adapter(struct i2c_adapter *adapter)
765{
766 if (!(adapter->class & I2C_CLASS_HWMON))
767 return 0;
2ed2dc3c 768 return i2c_probe(adapter, &addr_data, w83781d_detect);
1da177e4
LT
769}
770
771/* Assumes that adapter is of I2C, not ISA variety.
772 * OTHERWISE DON'T CALL THIS
773 */
774static int
775w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
776 struct i2c_client *new_client)
777{
778 int i, val1 = 0, id;
779 int err;
780 const char *client_name = "";
781 struct w83781d_data *data = i2c_get_clientdata(new_client);
782
ba9c2e8d 783 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
784 if (!(data->lm75[0])) {
785 err = -ENOMEM;
786 goto ERROR_SC_0;
787 }
1da177e4
LT
788
789 id = i2c_adapter_id(adapter);
790
791 if (force_subclients[0] == id && force_subclients[1] == address) {
792 for (i = 2; i <= 3; i++) {
793 if (force_subclients[i] < 0x48 ||
794 force_subclients[i] > 0x4f) {
795 dev_err(&new_client->dev, "Invalid subclient "
796 "address %d; must be 0x48-0x4f\n",
797 force_subclients[i]);
798 err = -EINVAL;
799 goto ERROR_SC_1;
800 }
801 }
31b8dc4d 802 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
1da177e4
LT
803 (force_subclients[2] & 0x07) |
804 ((force_subclients[3] & 0x07) << 4));
805 data->lm75[0]->addr = force_subclients[2];
806 } else {
31b8dc4d 807 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
1da177e4
LT
808 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
809 }
810
811 if (kind != w83783s) {
ba9c2e8d 812 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
813 if (!(data->lm75[1])) {
814 err = -ENOMEM;
815 goto ERROR_SC_1;
816 }
1da177e4
LT
817
818 if (force_subclients[0] == id &&
819 force_subclients[1] == address) {
820 data->lm75[1]->addr = force_subclients[3];
821 } else {
822 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
823 }
824 if (data->lm75[0]->addr == data->lm75[1]->addr) {
825 dev_err(&new_client->dev,
826 "Duplicate addresses 0x%x for subclients.\n",
827 data->lm75[0]->addr);
828 err = -EBUSY;
829 goto ERROR_SC_2;
830 }
831 }
832
833 if (kind == w83781d)
834 client_name = "w83781d subclient";
835 else if (kind == w83782d)
836 client_name = "w83782d subclient";
837 else if (kind == w83783s)
838 client_name = "w83783s subclient";
839 else if (kind == w83627hf)
840 client_name = "w83627hf subclient";
841 else if (kind == as99127f)
842 client_name = "as99127f subclient";
843
844 for (i = 0; i <= 1; i++) {
845 /* store all data in w83781d */
846 i2c_set_clientdata(data->lm75[i], NULL);
847 data->lm75[i]->adapter = adapter;
848 data->lm75[i]->driver = &w83781d_driver;
849 data->lm75[i]->flags = 0;
850 strlcpy(data->lm75[i]->name, client_name,
851 I2C_NAME_SIZE);
852 if ((err = i2c_attach_client(data->lm75[i]))) {
853 dev_err(&new_client->dev, "Subclient %d "
854 "registration at address 0x%x "
855 "failed.\n", i, data->lm75[i]->addr);
856 if (i == 1)
857 goto ERROR_SC_3;
858 goto ERROR_SC_2;
859 }
860 if (kind == w83783s)
861 break;
862 }
863
864 return 0;
865
866/* Undo inits in case of errors */
867ERROR_SC_3:
868 i2c_detach_client(data->lm75[0]);
869ERROR_SC_2:
6044ec88 870 kfree(data->lm75[1]);
1da177e4 871ERROR_SC_1:
6044ec88 872 kfree(data->lm75[0]);
1da177e4
LT
873ERROR_SC_0:
874 return err;
875}
876
34875337
JD
877#define IN_UNIT_ATTRS(X) \
878 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
879 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
880 &sensor_dev_attr_in##X##_max.dev_attr.attr
311ce2ef 881
34875337
JD
882#define FAN_UNIT_ATTRS(X) \
883 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
884 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
885 &sensor_dev_attr_fan##X##_div.dev_attr.attr
311ce2ef 886
34875337
JD
887#define TEMP_UNIT_ATTRS(X) \
888 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
889 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
890 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr
311ce2ef
JC
891
892static struct attribute* w83781d_attributes[] = {
893 IN_UNIT_ATTRS(0),
894 IN_UNIT_ATTRS(2),
895 IN_UNIT_ATTRS(3),
896 IN_UNIT_ATTRS(4),
897 IN_UNIT_ATTRS(5),
898 IN_UNIT_ATTRS(6),
899 FAN_UNIT_ATTRS(1),
900 FAN_UNIT_ATTRS(2),
901 FAN_UNIT_ATTRS(3),
902 TEMP_UNIT_ATTRS(1),
903 TEMP_UNIT_ATTRS(2),
904 &dev_attr_cpu0_vid.attr,
905 &dev_attr_vrm.attr,
906 &dev_attr_alarms.attr,
907 &dev_attr_beep_mask.attr,
908 &dev_attr_beep_enable.attr,
909 NULL
910};
911static const struct attribute_group w83781d_group = {
912 .attrs = w83781d_attributes,
913};
914
915static struct attribute *w83781d_attributes_opt[] = {
916 IN_UNIT_ATTRS(1),
917 IN_UNIT_ATTRS(7),
918 IN_UNIT_ATTRS(8),
919 TEMP_UNIT_ATTRS(3),
34875337
JD
920 &sensor_dev_attr_pwm1.dev_attr.attr,
921 &sensor_dev_attr_pwm2.dev_attr.attr,
922 &sensor_dev_attr_pwm3.dev_attr.attr,
923 &sensor_dev_attr_pwm4.dev_attr.attr,
311ce2ef 924 &dev_attr_pwm2_enable.attr,
34875337
JD
925 &sensor_dev_attr_temp1_type.dev_attr.attr,
926 &sensor_dev_attr_temp2_type.dev_attr.attr,
927 &sensor_dev_attr_temp3_type.dev_attr.attr,
311ce2ef
JC
928 NULL
929};
930static const struct attribute_group w83781d_group_opt = {
931 .attrs = w83781d_attributes_opt,
932};
933
7666c13c 934/* No clean up is done on error, it's up to the caller */
1da177e4 935static int
7666c13c 936w83781d_create_files(struct device *dev, int kind, int is_isa)
1da177e4 937{
1da177e4 938 int err;
1da177e4 939
7666c13c
JD
940 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
941 return err;
942
943 if (kind != w83783s) {
34875337
JD
944 if ((err = device_create_file(dev,
945 &sensor_dev_attr_in1_input.dev_attr))
946 || (err = device_create_file(dev,
947 &sensor_dev_attr_in1_min.dev_attr))
948 || (err = device_create_file(dev,
949 &sensor_dev_attr_in1_max.dev_attr)))
7666c13c
JD
950 return err;
951 }
952 if (kind != as99127f && kind != w83781d && kind != w83783s) {
34875337
JD
953 if ((err = device_create_file(dev,
954 &sensor_dev_attr_in7_input.dev_attr))
955 || (err = device_create_file(dev,
956 &sensor_dev_attr_in7_min.dev_attr))
957 || (err = device_create_file(dev,
958 &sensor_dev_attr_in7_max.dev_attr))
959 || (err = device_create_file(dev,
960 &sensor_dev_attr_in8_input.dev_attr))
961 || (err = device_create_file(dev,
962 &sensor_dev_attr_in8_min.dev_attr))
963 || (err = device_create_file(dev,
964 &sensor_dev_attr_in8_max.dev_attr)))
7666c13c
JD
965 return err;
966 }
967 if (kind != w83783s) {
34875337
JD
968 if ((err = device_create_file(dev,
969 &sensor_dev_attr_temp3_input.dev_attr))
970 || (err = device_create_file(dev,
971 &sensor_dev_attr_temp3_max.dev_attr))
7666c13c 972 || (err = device_create_file(dev,
34875337 973 &sensor_dev_attr_temp3_max_hyst.dev_attr)))
7666c13c 974 return err;
1da177e4
LT
975 }
976
7666c13c 977 if (kind != w83781d && kind != as99127f) {
34875337
JD
978 if ((err = device_create_file(dev,
979 &sensor_dev_attr_pwm1.dev_attr))
980 || (err = device_create_file(dev,
981 &sensor_dev_attr_pwm2.dev_attr))
7666c13c
JD
982 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
983 return err;
1da177e4 984 }
7666c13c 985 if (kind == w83782d && !is_isa) {
34875337
JD
986 if ((err = device_create_file(dev,
987 &sensor_dev_attr_pwm3.dev_attr))
988 || (err = device_create_file(dev,
989 &sensor_dev_attr_pwm4.dev_attr)))
7666c13c
JD
990 return err;
991 }
992
993 if (kind != as99127f && kind != w83781d) {
34875337
JD
994 if ((err = device_create_file(dev,
995 &sensor_dev_attr_temp1_type.dev_attr))
7666c13c 996 || (err = device_create_file(dev,
34875337 997 &sensor_dev_attr_temp2_type.dev_attr)))
7666c13c
JD
998 return err;
999 if (kind != w83783s) {
1000 if ((err = device_create_file(dev,
34875337 1001 &sensor_dev_attr_temp3_type.dev_attr)))
7666c13c 1002 return err;
1da177e4 1003 }
7666c13c 1004 }
1da177e4 1005
7666c13c
JD
1006 if (is_isa) {
1007 err = device_create_file(&pdev->dev, &dev_attr_name);
1008 if (err)
1009 return err;
1010 }
1da177e4 1011
7666c13c
JD
1012 return 0;
1013}
1da177e4 1014
7666c13c
JD
1015static int
1016w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1017{
1018 int val1 = 0, val2;
1019 struct i2c_client *client;
1020 struct device *dev;
1021 struct w83781d_data *data;
1022 int err;
1023 const char *client_name = "";
1024 enum vendor { winbond, asus } vendid;
1025
1026 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1027 err = -EINVAL;
1028 goto ERROR1;
1da177e4
LT
1029 }
1030
1031 /* OK. For now, we presume we have a valid client. We now create the
1032 client structure, even though we cannot fill it completely yet.
1033 But it allows us to access w83781d_{read,write}_value. */
1034
ba9c2e8d 1035 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1da177e4
LT
1036 err = -ENOMEM;
1037 goto ERROR1;
1038 }
1da177e4 1039
311ce2ef
JC
1040 client = &data->client;
1041 i2c_set_clientdata(client, data);
1042 client->addr = address;
9a61bf63 1043 mutex_init(&data->lock);
311ce2ef 1044 client->adapter = adapter;
7666c13c 1045 client->driver = &w83781d_driver;
311ce2ef 1046 dev = &client->dev;
1da177e4
LT
1047
1048 /* Now, we do the remaining detection. */
1049
1050 /* The w8378?d may be stuck in some other bank than bank 0. This may
1051 make reading other information impossible. Specify a force=... or
1052 force_*=... parameter, and the Winbond will be reset to the right
1053 bank. */
1054 if (kind < 0) {
31b8dc4d 1055 if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) {
bd452e6f
JD
1056 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1057 "failed at step 3\n");
1da177e4
LT
1058 err = -ENODEV;
1059 goto ERROR2;
1060 }
31b8dc4d
JD
1061 val1 = w83781d_read_value(data, W83781D_REG_BANK);
1062 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1da177e4
LT
1063 /* Check for Winbond or Asus ID if in bank 0 */
1064 if ((!(val1 & 0x07)) &&
1065 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1066 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
bd452e6f
JD
1067 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1068 "failed at step 4\n");
1da177e4
LT
1069 err = -ENODEV;
1070 goto ERROR2;
1071 }
1072 /* If Winbond SMBus, check address at 0x48.
1073 Asus doesn't support, except for as99127f rev.2 */
7666c13c
JD
1074 if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1075 ((val1 & 0x80) && (val2 == 0x5c))) {
1da177e4 1076 if (w83781d_read_value
31b8dc4d 1077 (data, W83781D_REG_I2C_ADDR) != address) {
bd452e6f
JD
1078 dev_dbg(&adapter->dev, "Detection of w83781d "
1079 "chip failed at step 5\n");
1da177e4
LT
1080 err = -ENODEV;
1081 goto ERROR2;
1082 }
1083 }
1084 }
1085
1086 /* We have either had a force parameter, or we have already detected the
1087 Winbond. Put it now into bank 0 and Vendor ID High Byte */
31b8dc4d
JD
1088 w83781d_write_value(data, W83781D_REG_BANK,
1089 (w83781d_read_value(data, W83781D_REG_BANK)
311ce2ef 1090 & 0x78) | 0x80);
1da177e4
LT
1091
1092 /* Determine the chip type. */
1093 if (kind <= 0) {
1094 /* get vendor ID */
31b8dc4d 1095 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1da177e4
LT
1096 if (val2 == 0x5c)
1097 vendid = winbond;
1098 else if (val2 == 0x12)
1099 vendid = asus;
1100 else {
bd452e6f
JD
1101 dev_dbg(&adapter->dev, "w83781d chip vendor is "
1102 "neither Winbond nor Asus\n");
1da177e4
LT
1103 err = -ENODEV;
1104 goto ERROR2;
1105 }
1106
31b8dc4d 1107 val1 = w83781d_read_value(data, W83781D_REG_WCHIPID);
1da177e4
LT
1108 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1109 kind = w83781d;
1110 else if (val1 == 0x30 && vendid == winbond)
1111 kind = w83782d;
7666c13c 1112 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1da177e4 1113 kind = w83783s;
7c7a5304 1114 else if (val1 == 0x21 && vendid == winbond)
1da177e4 1115 kind = w83627hf;
7666c13c 1116 else if (val1 == 0x31 && address >= 0x28)
1da177e4 1117 kind = as99127f;
1da177e4
LT
1118 else {
1119 if (kind == 0)
bd452e6f 1120 dev_warn(&adapter->dev, "Ignoring 'force' "
1da177e4 1121 "parameter for unknown chip at "
bd452e6f 1122 "address 0x%02x\n", address);
1da177e4
LT
1123 err = -EINVAL;
1124 goto ERROR2;
1125 }
1126 }
1127
1128 if (kind == w83781d) {
1129 client_name = "w83781d";
1130 } else if (kind == w83782d) {
1131 client_name = "w83782d";
1132 } else if (kind == w83783s) {
1133 client_name = "w83783s";
1134 } else if (kind == w83627hf) {
7c7a5304 1135 client_name = "w83627hf";
1da177e4
LT
1136 } else if (kind == as99127f) {
1137 client_name = "as99127f";
1da177e4
LT
1138 }
1139
1140 /* Fill in the remaining client fields and put into the global list */
311ce2ef 1141 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1da177e4
LT
1142 data->type = kind;
1143
1da177e4 1144 /* Tell the I2C layer a new client has arrived */
311ce2ef 1145 if ((err = i2c_attach_client(client)))
1da177e4
LT
1146 goto ERROR2;
1147
1148 /* attach secondary i2c lm75-like clients */
7666c13c
JD
1149 if ((err = w83781d_detect_subclients(adapter, address,
1150 kind, client)))
1151 goto ERROR3;
1da177e4
LT
1152
1153 /* Initialize the chip */
7666c13c 1154 w83781d_init_device(dev);
1da177e4
LT
1155
1156 /* Register sysfs hooks */
7666c13c
JD
1157 err = w83781d_create_files(dev, kind, 0);
1158 if (err)
943b0830 1159 goto ERROR4;
943b0830 1160
1beeffe4
TJ
1161 data->hwmon_dev = hwmon_device_register(dev);
1162 if (IS_ERR(data->hwmon_dev)) {
1163 err = PTR_ERR(data->hwmon_dev);
311ce2ef 1164 goto ERROR4;
1da177e4
LT
1165 }
1166
1167 return 0;
1168
943b0830 1169ERROR4:
311ce2ef
JC
1170 sysfs_remove_group(&dev->kobj, &w83781d_group);
1171 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1172
943b0830
MH
1173 if (data->lm75[1]) {
1174 i2c_detach_client(data->lm75[1]);
1175 kfree(data->lm75[1]);
1176 }
1177 if (data->lm75[0]) {
1178 i2c_detach_client(data->lm75[0]);
1179 kfree(data->lm75[0]);
1180 }
1da177e4 1181ERROR3:
311ce2ef 1182 i2c_detach_client(client);
1da177e4
LT
1183ERROR2:
1184 kfree(data);
1185ERROR1:
1da177e4
LT
1186 return err;
1187}
1188
1189static int
1190w83781d_detach_client(struct i2c_client *client)
1191{
943b0830 1192 struct w83781d_data *data = i2c_get_clientdata(client);
1da177e4
LT
1193 int err;
1194
943b0830 1195 /* main client */
311ce2ef 1196 if (data) {
1beeffe4 1197 hwmon_device_unregister(data->hwmon_dev);
311ce2ef
JC
1198 sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1199 sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1200 }
1da177e4 1201
7bef5594 1202 if ((err = i2c_detach_client(client)))
1da177e4 1203 return err;
1da177e4 1204
943b0830
MH
1205 /* main client */
1206 if (data)
1207 kfree(data);
1208
1209 /* subclient */
1210 else
1da177e4 1211 kfree(client);
1da177e4
LT
1212
1213 return 0;
1214}
1215
7666c13c
JD
1216static int __devinit
1217w83781d_isa_probe(struct platform_device *pdev)
1218{
1219 int err, reg;
1220 struct w83781d_data *data;
1221 struct resource *res;
1222 const char *name;
1223
1224 /* Reserve the ISA region */
1225 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1226 if (!request_region(res->start, W83781D_EXTENT, "w83781d")) {
1227 err = -EBUSY;
1228 goto exit;
1229 }
1230
1231 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1232 err = -ENOMEM;
1233 goto exit_release_region;
1234 }
1235 mutex_init(&data->lock);
1236 data->client.addr = res->start;
1237 i2c_set_clientdata(&data->client, data);
1238 platform_set_drvdata(pdev, data);
1239
31b8dc4d 1240 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
7666c13c
JD
1241 switch (reg) {
1242 case 0x21:
1243 data->type = w83627hf;
1244 name = "w83627hf";
1245 break;
1246 case 0x30:
1247 data->type = w83782d;
1248 name = "w83782d";
1249 break;
1250 default:
1251 data->type = w83781d;
1252 name = "w83781d";
1253 }
1254 strlcpy(data->client.name, name, I2C_NAME_SIZE);
1255
1256 /* Initialize the W83781D chip */
1257 w83781d_init_device(&pdev->dev);
1258
1259 /* Register sysfs hooks */
1260 err = w83781d_create_files(&pdev->dev, data->type, 1);
1261 if (err)
1262 goto exit_remove_files;
1263
1beeffe4
TJ
1264 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1265 if (IS_ERR(data->hwmon_dev)) {
1266 err = PTR_ERR(data->hwmon_dev);
7666c13c
JD
1267 goto exit_remove_files;
1268 }
1269
1270 return 0;
1271
1272 exit_remove_files:
1273 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1274 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1275 device_remove_file(&pdev->dev, &dev_attr_name);
1276 kfree(data);
1277 exit_release_region:
1278 release_region(res->start, W83781D_EXTENT);
1279 exit:
1280 return err;
1281}
1282
1283static int __devexit
1284w83781d_isa_remove(struct platform_device *pdev)
1285{
1286 struct w83781d_data *data = platform_get_drvdata(pdev);
1287
1beeffe4 1288 hwmon_device_unregister(data->hwmon_dev);
7666c13c
JD
1289 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1290 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1291 device_remove_file(&pdev->dev, &dev_attr_name);
1292 release_region(data->client.addr, W83781D_EXTENT);
1293 kfree(data);
1294
1295 return 0;
1296}
1297
1da177e4
LT
1298/* The SMBus locks itself, usually, but nothing may access the Winbond between
1299 bank switches. ISA access must always be locked explicitly!
1300 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1301 would slow down the W83781D access and should not be necessary.
1302 There are some ugly typecasts here, but the good news is - they should
1303 nowhere else be necessary! */
1304static int
31b8dc4d 1305w83781d_read_value(struct w83781d_data *data, u16 reg)
1da177e4 1306{
31b8dc4d 1307 struct i2c_client *client = &data->client;
1da177e4
LT
1308 int res, word_sized, bank;
1309 struct i2c_client *cl;
1310
9a61bf63 1311 mutex_lock(&data->lock);
7666c13c 1312 if (!client->driver) { /* ISA device */
1da177e4
LT
1313 word_sized = (((reg & 0xff00) == 0x100)
1314 || ((reg & 0xff00) == 0x200))
1315 && (((reg & 0x00ff) == 0x50)
1316 || ((reg & 0x00ff) == 0x53)
1317 || ((reg & 0x00ff) == 0x55));
1318 if (reg & 0xff00) {
1319 outb_p(W83781D_REG_BANK,
1320 client->addr + W83781D_ADDR_REG_OFFSET);
1321 outb_p(reg >> 8,
1322 client->addr + W83781D_DATA_REG_OFFSET);
1323 }
1324 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1325 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1326 if (word_sized) {
1327 outb_p((reg & 0xff) + 1,
1328 client->addr + W83781D_ADDR_REG_OFFSET);
1329 res =
1330 (res << 8) + inb_p(client->addr +
1331 W83781D_DATA_REG_OFFSET);
1332 }
1333 if (reg & 0xff00) {
1334 outb_p(W83781D_REG_BANK,
1335 client->addr + W83781D_ADDR_REG_OFFSET);
1336 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1337 }
1338 } else {
1339 bank = (reg >> 8) & 0x0f;
1340 if (bank > 2)
1341 /* switch banks */
1342 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1343 bank);
1344 if (bank == 0 || bank > 2) {
1345 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1346 } else {
1347 /* switch to subclient */
1348 cl = data->lm75[bank - 1];
1349 /* convert from ISA to LM75 I2C addresses */
1350 switch (reg & 0xff) {
1351 case 0x50: /* TEMP */
1352 res = swab16(i2c_smbus_read_word_data(cl, 0));
1353 break;
1354 case 0x52: /* CONFIG */
1355 res = i2c_smbus_read_byte_data(cl, 1);
1356 break;
1357 case 0x53: /* HYST */
1358 res = swab16(i2c_smbus_read_word_data(cl, 2));
1359 break;
1360 case 0x55: /* OVER */
1361 default:
1362 res = swab16(i2c_smbus_read_word_data(cl, 3));
1363 break;
1364 }
1365 }
1366 if (bank > 2)
1367 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1368 }
9a61bf63 1369 mutex_unlock(&data->lock);
1da177e4
LT
1370 return res;
1371}
1372
1373static int
31b8dc4d 1374w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1da177e4 1375{
31b8dc4d 1376 struct i2c_client *client = &data->client;
1da177e4
LT
1377 int word_sized, bank;
1378 struct i2c_client *cl;
1379
9a61bf63 1380 mutex_lock(&data->lock);
7666c13c 1381 if (!client->driver) { /* ISA device */
1da177e4
LT
1382 word_sized = (((reg & 0xff00) == 0x100)
1383 || ((reg & 0xff00) == 0x200))
1384 && (((reg & 0x00ff) == 0x53)
1385 || ((reg & 0x00ff) == 0x55));
1386 if (reg & 0xff00) {
1387 outb_p(W83781D_REG_BANK,
1388 client->addr + W83781D_ADDR_REG_OFFSET);
1389 outb_p(reg >> 8,
1390 client->addr + W83781D_DATA_REG_OFFSET);
1391 }
1392 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1393 if (word_sized) {
1394 outb_p(value >> 8,
1395 client->addr + W83781D_DATA_REG_OFFSET);
1396 outb_p((reg & 0xff) + 1,
1397 client->addr + W83781D_ADDR_REG_OFFSET);
1398 }
1399 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1400 if (reg & 0xff00) {
1401 outb_p(W83781D_REG_BANK,
1402 client->addr + W83781D_ADDR_REG_OFFSET);
1403 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1404 }
1405 } else {
1406 bank = (reg >> 8) & 0x0f;
1407 if (bank > 2)
1408 /* switch banks */
1409 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1410 bank);
1411 if (bank == 0 || bank > 2) {
1412 i2c_smbus_write_byte_data(client, reg & 0xff,
1413 value & 0xff);
1414 } else {
1415 /* switch to subclient */
1416 cl = data->lm75[bank - 1];
1417 /* convert from ISA to LM75 I2C addresses */
1418 switch (reg & 0xff) {
1419 case 0x52: /* CONFIG */
1420 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1421 break;
1422 case 0x53: /* HYST */
1423 i2c_smbus_write_word_data(cl, 2, swab16(value));
1424 break;
1425 case 0x55: /* OVER */
1426 i2c_smbus_write_word_data(cl, 3, swab16(value));
1427 break;
1428 }
1429 }
1430 if (bank > 2)
1431 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1432 }
9a61bf63 1433 mutex_unlock(&data->lock);
1da177e4
LT
1434 return 0;
1435}
1436
1da177e4 1437static void
7666c13c 1438w83781d_init_device(struct device *dev)
1da177e4 1439{
7666c13c 1440 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
1441 int i, p;
1442 int type = data->type;
1443 u8 tmp;
1444
f5f8d38b
JD
1445 if (type == w83627hf)
1446 dev_info(dev, "The W83627HF chip is better supported by the "
1447 "w83627hf driver, support will be dropped from the "
1448 "w83781d driver soon\n");
1449
fabddcd4 1450 if (reset && type != as99127f) { /* this resets registers we don't have
1da177e4 1451 documentation for on the as99127f */
fabddcd4
JD
1452 /* Resetting the chip has been the default for a long time,
1453 but it causes the BIOS initializations (fan clock dividers,
1454 thermal sensor types...) to be lost, so it is now optional.
1455 It might even go away if nobody reports it as being useful,
1456 as I see very little reason why this would be needed at
1457 all. */
7666c13c 1458 dev_info(dev, "If reset=1 solved a problem you were "
fabddcd4
JD
1459 "having, please report!\n");
1460
1da177e4 1461 /* save these registers */
31b8dc4d
JD
1462 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1463 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1da177e4
LT
1464 /* Reset all except Watchdog values and last conversion values
1465 This sets fan-divs to 2, among others */
31b8dc4d 1466 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1da177e4
LT
1467 /* Restore the registers and disable power-on abnormal beep.
1468 This saves FAN 1/2/3 input/output values set by BIOS. */
31b8dc4d
JD
1469 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1470 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1da177e4
LT
1471 /* Disable master beep-enable (reset turns it on).
1472 Individual beep_mask should be reset to off but for some reason
1473 disabling this bit helps some people not get beeped */
31b8dc4d 1474 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1da177e4
LT
1475 }
1476
fabddcd4
JD
1477 /* Disable power-on abnormal beep, as advised by the datasheet.
1478 Already done if reset=1. */
1479 if (init && !reset && type != as99127f) {
31b8dc4d
JD
1480 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1481 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
fabddcd4
JD
1482 }
1483
303760b4 1484 data->vrm = vid_which_vrm();
1da177e4
LT
1485
1486 if ((type != w83781d) && (type != as99127f)) {
31b8dc4d 1487 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT
1488 for (i = 1; i <= 3; i++) {
1489 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1490 data->sens[i - 1] = 4;
1da177e4
LT
1491 } else {
1492 if (w83781d_read_value
31b8dc4d 1493 (data,
1da177e4
LT
1494 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1495 data->sens[i - 1] = 1;
1496 else
1497 data->sens[i - 1] = 2;
1498 }
7c7a5304 1499 if (type == w83783s && i == 2)
1da177e4
LT
1500 break;
1501 }
1502 }
1503
1504 if (init && type != as99127f) {
1505 /* Enable temp2 */
31b8dc4d 1506 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1da177e4 1507 if (tmp & 0x01) {
7666c13c 1508 dev_warn(dev, "Enabling temp2, readings "
1da177e4 1509 "might not make sense\n");
31b8dc4d 1510 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1da177e4
LT
1511 tmp & 0xfe);
1512 }
1513
1514 /* Enable temp3 */
7c7a5304 1515 if (type != w83783s) {
31b8dc4d 1516 tmp = w83781d_read_value(data,
1da177e4
LT
1517 W83781D_REG_TEMP3_CONFIG);
1518 if (tmp & 0x01) {
7666c13c 1519 dev_warn(dev, "Enabling temp3, "
1da177e4 1520 "readings might not make sense\n");
31b8dc4d 1521 w83781d_write_value(data,
1da177e4
LT
1522 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1523 }
1524 }
1da177e4
LT
1525 }
1526
1527 /* Start monitoring */
31b8dc4d
JD
1528 w83781d_write_value(data, W83781D_REG_CONFIG,
1529 (w83781d_read_value(data,
1da177e4
LT
1530 W83781D_REG_CONFIG) & 0xf7)
1531 | 0x01);
7666c13c
JD
1532
1533 /* A few vars need to be filled upon startup */
34875337
JD
1534 for (i = 0; i < 3; i++) {
1535 data->fan_min[i] = w83781d_read_value(data,
7666c13c
JD
1536 W83781D_REG_FAN_MIN(i));
1537 }
7666c13c
JD
1538
1539 mutex_init(&data->update_lock);
1da177e4
LT
1540}
1541
1542static struct w83781d_data *w83781d_update_device(struct device *dev)
1543{
7666c13c
JD
1544 struct w83781d_data *data = dev_get_drvdata(dev);
1545 struct i2c_client *client = &data->client;
1da177e4
LT
1546 int i;
1547
9a61bf63 1548 mutex_lock(&data->update_lock);
1da177e4
LT
1549
1550 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1551 || !data->valid) {
1552 dev_dbg(dev, "Starting device update\n");
1553
1554 for (i = 0; i <= 8; i++) {
7c7a5304 1555 if (data->type == w83783s && i == 1)
1da177e4
LT
1556 continue; /* 783S has no in1 */
1557 data->in[i] =
31b8dc4d 1558 w83781d_read_value(data, W83781D_REG_IN(i));
1da177e4 1559 data->in_min[i] =
31b8dc4d 1560 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1da177e4 1561 data->in_max[i] =
31b8dc4d 1562 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
7c7a5304 1563 if ((data->type != w83782d)
1da177e4
LT
1564 && (data->type != w83627hf) && (i == 6))
1565 break;
1566 }
34875337
JD
1567 for (i = 0; i < 3; i++) {
1568 data->fan[i] =
31b8dc4d 1569 w83781d_read_value(data, W83781D_REG_FAN(i));
34875337 1570 data->fan_min[i] =
31b8dc4d 1571 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1da177e4
LT
1572 }
1573 if (data->type != w83781d && data->type != as99127f) {
34875337
JD
1574 for (i = 0; i < 4; i++) {
1575 data->pwm[i] =
31b8dc4d 1576 w83781d_read_value(data,
34875337 1577 W83781D_REG_PWM[i]);
7666c13c 1578 if ((data->type != w83782d || !client->driver)
34875337 1579 && i == 1)
1da177e4
LT
1580 break;
1581 }
1582 /* Only PWM2 can be disabled */
34875337 1583 data->pwm2_enable = (w83781d_read_value(data,
1da177e4
LT
1584 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1585 }
1586
31b8dc4d 1587 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1da177e4 1588 data->temp_max =
31b8dc4d 1589 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1da177e4 1590 data->temp_max_hyst =
31b8dc4d 1591 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1da177e4 1592 data->temp_add[0] =
31b8dc4d 1593 w83781d_read_value(data, W83781D_REG_TEMP(2));
1da177e4 1594 data->temp_max_add[0] =
31b8dc4d 1595 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1da177e4 1596 data->temp_max_hyst_add[0] =
31b8dc4d 1597 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
7c7a5304 1598 if (data->type != w83783s) {
1da177e4 1599 data->temp_add[1] =
31b8dc4d 1600 w83781d_read_value(data, W83781D_REG_TEMP(3));
1da177e4 1601 data->temp_max_add[1] =
31b8dc4d 1602 w83781d_read_value(data,
1da177e4
LT
1603 W83781D_REG_TEMP_OVER(3));
1604 data->temp_max_hyst_add[1] =
31b8dc4d 1605 w83781d_read_value(data,
1da177e4
LT
1606 W83781D_REG_TEMP_HYST(3));
1607 }
31b8dc4d 1608 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
7c7a5304 1609 data->vid = i & 0x0f;
31b8dc4d 1610 data->vid |= (w83781d_read_value(data,
7c7a5304 1611 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT
1612 data->fan_div[0] = (i >> 4) & 0x03;
1613 data->fan_div[1] = (i >> 6) & 0x03;
31b8dc4d 1614 data->fan_div[2] = (w83781d_read_value(data,
7c7a5304 1615 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4 1616 if ((data->type != w83781d) && (data->type != as99127f)) {
31b8dc4d 1617 i = w83781d_read_value(data, W83781D_REG_VBAT);
1da177e4
LT
1618 data->fan_div[0] |= (i >> 3) & 0x04;
1619 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1620 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4 1621 }
1da177e4 1622 if ((data->type == w83782d) || (data->type == w83627hf)) {
31b8dc4d 1623 data->alarms = w83781d_read_value(data,
c7f5d7ed 1624 W83782D_REG_ALARM1)
31b8dc4d 1625 | (w83781d_read_value(data,
c7f5d7ed 1626 W83782D_REG_ALARM2) << 8)
31b8dc4d 1627 | (w83781d_read_value(data,
c7f5d7ed
JD
1628 W83782D_REG_ALARM3) << 16);
1629 } else if (data->type == w83783s) {
31b8dc4d 1630 data->alarms = w83781d_read_value(data,
c7f5d7ed 1631 W83782D_REG_ALARM1)
31b8dc4d 1632 | (w83781d_read_value(data,
c7f5d7ed
JD
1633 W83782D_REG_ALARM2) << 8);
1634 } else {
1635 /* No real-time status registers, fall back to
1636 interrupt status registers */
31b8dc4d 1637 data->alarms = w83781d_read_value(data,
c7f5d7ed 1638 W83781D_REG_ALARM1)
31b8dc4d 1639 | (w83781d_read_value(data,
c7f5d7ed 1640 W83781D_REG_ALARM2) << 8);
1da177e4 1641 }
31b8dc4d 1642 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1da177e4
LT
1643 data->beep_enable = i >> 7;
1644 data->beep_mask = ((i & 0x7f) << 8) +
31b8dc4d 1645 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1da177e4
LT
1646 if ((data->type != w83781d) && (data->type != as99127f)) {
1647 data->beep_mask |=
31b8dc4d 1648 w83781d_read_value(data,
1da177e4
LT
1649 W83781D_REG_BEEP_INTS3) << 16;
1650 }
1651 data->last_updated = jiffies;
1652 data->valid = 1;
1653 }
1654
9a61bf63 1655 mutex_unlock(&data->update_lock);
1da177e4
LT
1656
1657 return data;
1658}
1659
7666c13c
JD
1660/* return 1 if a supported chip is found, 0 otherwise */
1661static int __init
1662w83781d_isa_found(unsigned short address)
1663{
1664 int val, save, found = 0;
1665
1666 if (!request_region(address, W83781D_EXTENT, "w83781d"))
1667 return 0;
1668
1669#define REALLY_SLOW_IO
1670 /* We need the timeouts for at least some W83781D-like
1671 chips. But only if we read 'undefined' registers. */
1672 val = inb_p(address + 1);
1673 if (inb_p(address + 2) != val
1674 || inb_p(address + 3) != val
1675 || inb_p(address + 7) != val) {
1676 pr_debug("w83781d: Detection failed at step 1\n");
1677 goto release;
1678 }
1679#undef REALLY_SLOW_IO
1680
1681 /* We should be able to change the 7 LSB of the address port. The
1682 MSB (busy flag) should be clear initially, set after the write. */
1683 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1684 if (save & 0x80) {
1685 pr_debug("w83781d: Detection failed at step 2\n");
1686 goto release;
1687 }
1688 val = ~save & 0x7f;
1689 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1690 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1691 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1692 pr_debug("w83781d: Detection failed at step 3\n");
1693 goto release;
1694 }
1695
1696 /* We found a device, now see if it could be a W83781D */
1697 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1698 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1699 if (val & 0x80) {
1700 pr_debug("w83781d: Detection failed at step 4\n");
1701 goto release;
1702 }
1703 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1704 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1705 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1706 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1707 if ((!(save & 0x80) && (val != 0xa3))
1708 || ((save & 0x80) && (val != 0x5c))) {
1709 pr_debug("w83781d: Detection failed at step 5\n");
1710 goto release;
1711 }
1712 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1713 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1714 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1715 pr_debug("w83781d: Detection failed at step 6\n");
1716 goto release;
1717 }
1718
1719 /* The busy flag should be clear again */
1720 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1721 pr_debug("w83781d: Detection failed at step 7\n");
1722 goto release;
1723 }
1724
1725 /* Determine the chip type */
1726 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1727 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1728 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1729 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1730 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1731 if ((val & 0xfe) == 0x10 /* W83781D */
1732 || val == 0x30 /* W83782D */
1733 || val == 0x21) /* W83627HF */
1734 found = 1;
1735
1736 if (found)
1737 pr_info("w83781d: Found a %s chip at %#x\n",
1738 val == 0x21 ? "W83627HF" :
1739 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1740
1741 release:
1742 release_region(address, W83781D_EXTENT);
1743 return found;
1744}
1745
1746static int __init
1747w83781d_isa_device_add(unsigned short address)
1748{
1749 struct resource res = {
1750 .start = address,
15bde2f1 1751 .end = address + W83781D_EXTENT - 1,
7666c13c
JD
1752 .name = "w83781d",
1753 .flags = IORESOURCE_IO,
1754 };
1755 int err;
1756
1757 pdev = platform_device_alloc("w83781d", address);
1758 if (!pdev) {
1759 err = -ENOMEM;
1760 printk(KERN_ERR "w83781d: Device allocation failed\n");
1761 goto exit;
1762 }
1763
1764 err = platform_device_add_resources(pdev, &res, 1);
1765 if (err) {
1766 printk(KERN_ERR "w83781d: Device resource addition failed "
1767 "(%d)\n", err);
1768 goto exit_device_put;
1769 }
1770
1771 err = platform_device_add(pdev);
1772 if (err) {
1773 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1774 err);
1775 goto exit_device_put;
1776 }
1777
1778 return 0;
1779
1780 exit_device_put:
1781 platform_device_put(pdev);
1782 exit:
1783 pdev = NULL;
1784 return err;
1785}
1786
1da177e4
LT
1787static int __init
1788sensors_w83781d_init(void)
1789{
fde09509
JD
1790 int res;
1791
1792 res = i2c_add_driver(&w83781d_driver);
1793 if (res)
7666c13c
JD
1794 goto exit;
1795
1796 if (w83781d_isa_found(isa_address)) {
1797 res = platform_driver_register(&w83781d_isa_driver);
1798 if (res)
1799 goto exit_unreg_i2c_driver;
fde09509 1800
7666c13c
JD
1801 /* Sets global pdev as a side effect */
1802 res = w83781d_isa_device_add(isa_address);
1803 if (res)
1804 goto exit_unreg_isa_driver;
1805 }
fde09509
JD
1806
1807 return 0;
7666c13c
JD
1808
1809 exit_unreg_isa_driver:
1810 platform_driver_unregister(&w83781d_isa_driver);
1811 exit_unreg_i2c_driver:
1812 i2c_del_driver(&w83781d_driver);
1813 exit:
1814 return res;
1da177e4
LT
1815}
1816
1817static void __exit
1818sensors_w83781d_exit(void)
1819{
7666c13c
JD
1820 if (pdev) {
1821 platform_device_unregister(pdev);
1822 platform_driver_unregister(&w83781d_isa_driver);
1823 }
1da177e4
LT
1824 i2c_del_driver(&w83781d_driver);
1825}
1826
1827MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1828 "Philip Edelbrock <phil@netroedge.com>, "
1829 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1830MODULE_DESCRIPTION("W83781D driver");
1831MODULE_LICENSE("GPL");
1832
1833module_init(sensors_w83781d_init);
1834module_exit(sensors_w83781d_exit);