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module_param: make bool parameters really bool (arch)
[linux-2.6-block.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT		 1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
7666c13c
JD		 5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
360782dd 7 Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org>
1da177e4
LT		 8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
1da177e4
LT		 31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
LT		 33
34*/
35
1ca28218
JP		 36#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
37
1da177e4
LT		 38#include <linux/module.h>
39#include <linux/init.h>
40#include <linux/slab.h>
41#include <linux/jiffies.h>
42#include <linux/i2c.h>
943b0830 43#include <linux/hwmon.h>
303760b4 44#include <linux/hwmon-vid.h>
34875337 45#include <linux/hwmon-sysfs.h>
311ce2ef 46#include <linux/sysfs.h>
943b0830 47#include <linux/err.h>
9a61bf63 48#include <linux/mutex.h>
443850ce
WG		 49
50#ifdef CONFIG_ISA
51#include <linux/platform_device.h>
52#include <linux/ioport.h>
6055fae8 53#include <linux/io.h>
443850ce 54#endif
1da177e4 55
443850ce 56#include "lm75.h"
7666c13c 57
1da177e4 58/* Addresses to scan */
25e9c86d
MH		 59static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
60 0x2e, 0x2f, I2C_CLIENT_END };
3aed198c 61
e5e9f44c
JD		 62enum chips { w83781d, w83782d, w83783s, as99127f };
63
64/* Insmod parameters */
3aed198c
JD		 65static unsigned short force_subclients[4];
66module_param_array(force_subclients, short, NULL, 0);
67MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
1da177e4
LT		 68 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
69
fabddcd4
JD		 70static int reset;
71module_param(reset, bool, 0);
72MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
73
1da177e4
LT		 74static int init = 1;
75module_param(init, bool, 0);
76MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
78/* Constants specified below */
79
80/* Length of ISA address segment */
81#define W83781D_EXTENT 8
82
83/* Where are the ISA address/data registers relative to the base address */
84#define W83781D_ADDR_REG_OFFSET 5
85#define W83781D_DATA_REG_OFFSET 6
86
34875337
JD		 87/* The device registers */
88/* in nr from 0 to 8 */
1da177e4
LT		 89#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
90 (0x554 + (((nr) - 7) * 2)))
91#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
92 (0x555 + (((nr) - 7) * 2)))
93#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
94 (0x550 + (nr) - 7))
95
34875337
JD		 96/* fan nr from 0 to 2 */
97#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
98#define W83781D_REG_FAN(nr) (0x28 + (nr))
1da177e4
LT		 99
100#define W83781D_REG_BANK 0x4E
101#define W83781D_REG_TEMP2_CONFIG 0x152
102#define W83781D_REG_TEMP3_CONFIG 0x252
34875337 103/* temp nr from 1 to 3 */
1da177e4
LT		 104#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
105 ((nr == 2) ? (0x0150) : \
106 (0x27)))
107#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
108 ((nr == 2) ? (0x153) : \
109 (0x3A)))
110#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
111 ((nr == 2) ? (0x155) : \
112 (0x39)))
113
114#define W83781D_REG_CONFIG 0x40
c7f5d7ed
JD		 115
116/* Interrupt status (W83781D, AS99127F) */
1da177e4
LT		 117#define W83781D_REG_ALARM1 0x41
118#define W83781D_REG_ALARM2 0x42
1da177e4 119
05663368 120/* Real-time status (W83782D, W83783S) */
c7f5d7ed
JD		 121#define W83782D_REG_ALARM1 0x459
122#define W83782D_REG_ALARM2 0x45A
123#define W83782D_REG_ALARM3 0x45B
124
1da177e4
LT		 125#define W83781D_REG_BEEP_CONFIG 0x4D
126#define W83781D_REG_BEEP_INTS1 0x56
127#define W83781D_REG_BEEP_INTS2 0x57
128#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
129
130#define W83781D_REG_VID_FANDIV 0x47
131
132#define W83781D_REG_CHIPID 0x49
133#define W83781D_REG_WCHIPID 0x58
134#define W83781D_REG_CHIPMAN 0x4F
135#define W83781D_REG_PIN 0x4B
136
137/* 782D/783S only */
138#define W83781D_REG_VBAT 0x5D
139
140/* PWM 782D (1-4) and 783S (1-2) only */
34875337 141static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
1da177e4
LT		 142#define W83781D_REG_PWMCLK12 0x5C
143#define W83781D_REG_PWMCLK34 0x45C
1da177e4
LT		 144
145#define W83781D_REG_I2C_ADDR 0x48
146#define W83781D_REG_I2C_SUBADDR 0x4A
147
148/* The following are undocumented in the data sheets however we
149 received the information in an email from Winbond tech support */
150/* Sensor selection - not on 781d */
151#define W83781D_REG_SCFG1 0x5D
152static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
153
154#define W83781D_REG_SCFG2 0x59
155static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
156
157#define W83781D_DEFAULT_BETA 3435
158
474d00a8
JD		 159/* Conversions */
160#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
161#define IN_FROM_REG(val) ((val) * 16)
1da177e4
LT		 162
163static inline u8
164FAN_TO_REG(long rpm, int div)
165{
166 if (rpm == 0)
167 return 255;
168 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
169 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
170}
171
474d00a8
JD		 172static inline long
173FAN_FROM_REG(u8 val, int div)
174{
175 if (val == 0)
176 return -1;
177 if (val == 255)
178 return 0;
179 return 1350000 / (val * div);
180}
1da177e4 181
474d00a8
JD		 182#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
183#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 184
1da177e4 185#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
2fbbbf14 186 (~(val)) & 0x7fff : (val) & 0xff7fff)
1da177e4 187#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
2fbbbf14 188 (~(val)) & 0x7fff : (val) & 0xff7fff)
1da177e4 189
1da177e4
LT		 190#define DIV_FROM_REG(val) (1 << (val))
191
192static inline u8
193DIV_TO_REG(long val, enum chips type)
194{
195 int i;
196 val = SENSORS_LIMIT(val, 1,
197 ((type == w83781d
198 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 199 for (i = 0; i < 7; i++) {
1da177e4
LT		 200 if (val == 0)
201 break;
202 val >>= 1;
203 }
474d00a8 204 return i;
1da177e4
LT		 205}
206
1da177e4 207struct w83781d_data {
0217eae3 208 struct i2c_client *client;
1beeffe4 209 struct device *hwmon_dev;
9a61bf63 210 struct mutex lock;
1da177e4
LT		 211 enum chips type;
212
360782dd
JD		 213 /* For ISA device only */
214 const char *name;
215 int isa_addr;
216
9a61bf63 217 struct mutex update_lock;
1da177e4
LT		 218 char valid; /* !=0 if following fields are valid */
219 unsigned long last_updated; /* In jiffies */
220
221 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
222 /* array of 2 pointers to subclients */
223
224 u8 in[9]; /* Register value - 8 & 9 for 782D only */
225 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
226 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
227 u8 fan[3]; /* Register value */
228 u8 fan_min[3]; /* Register value */
474d00a8
JD		 229 s8 temp; /* Register value */
230 s8 temp_max; /* Register value */
231 s8 temp_max_hyst; /* Register value */
1da177e4
LT		 232 u16 temp_add[2]; /* Register value */
233 u16 temp_max_add[2]; /* Register value */
234 u16 temp_max_hyst_add[2]; /* Register value */
235 u8 fan_div[3]; /* Register encoding, shifted right */
236 u8 vid; /* Register encoding, combined */
237 u32 alarms; /* Register encoding, combined */
238 u32 beep_mask; /* Register encoding, combined */
1da177e4 239 u8 pwm[4]; /* Register value */
34875337 240 u8 pwm2_enable; /* Boolean */
1da177e4
LT		 241 u16 sens[3]; /* 782D/783S only.
242 1 = pentium diode; 2 = 3904 diode;
b26f9330 243 4 = thermistor */
1da177e4
LT		 244 u8 vrm;
245};
246
443850ce
WG		 247static struct w83781d_data *w83781d_data_if_isa(void);
248static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
249
31b8dc4d
JD		 250static int w83781d_read_value(struct w83781d_data *data, u16 reg);
251static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
1da177e4 252static struct w83781d_data *w83781d_update_device(struct device *dev);
7666c13c 253static void w83781d_init_device(struct device *dev);
1da177e4 254
1da177e4
LT		 255/* following are the sysfs callback functions */
256#define show_in_reg(reg) \
34875337
JD		 257static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
258 char *buf) \
1da177e4 259{ \
34875337 260 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 261 struct w83781d_data *data = w83781d_update_device(dev); \
34875337
JD		 262 return sprintf(buf, "%ld\n", \
263 (long)IN_FROM_REG(data->reg[attr->index])); \
1da177e4
LT		 264}
265show_in_reg(in);
266show_in_reg(in_min);
267show_in_reg(in_max);
268
269#define store_in_reg(REG, reg) \
34875337
JD		 270static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
271 *da, const char *buf, size_t count) \
1da177e4 272{ \
34875337 273 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 274 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 275 int nr = attr->index; \
1da177e4
LT		 276 u32 val; \
277 \
474d00a8 278 val = simple_strtoul(buf, NULL, 10); \
1da177e4 279 \
9a61bf63 280 mutex_lock(&data->update_lock); \
1da177e4 281 data->in_##reg[nr] = IN_TO_REG(val); \
31b8dc4d 282 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
1da177e4 283 \
9a61bf63 284 mutex_unlock(&data->update_lock); \
1da177e4
LT		 285 return count; \
286}
287store_in_reg(MIN, min);
288store_in_reg(MAX, max);
289
1da177e4 290#define sysfs_in_offsets(offset) \
34875337
JD		 291static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
292 show_in, NULL, offset); \
293static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
294 show_in_min, store_in_min, offset); \
295static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
296 show_in_max, store_in_max, offset)
1da177e4
LT		 297
298sysfs_in_offsets(0);
299sysfs_in_offsets(1);
300sysfs_in_offsets(2);
301sysfs_in_offsets(3);
302sysfs_in_offsets(4);
303sysfs_in_offsets(5);
304sysfs_in_offsets(6);
305sysfs_in_offsets(7);
306sysfs_in_offsets(8);
307
1da177e4 308#define show_fan_reg(reg) \
34875337
JD		 309static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
310 char *buf) \
1da177e4 311{ \
34875337 312 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4
LT		 313 struct w83781d_data *data = w83781d_update_device(dev); \
314 return sprintf(buf,"%ld\n", \
34875337
JD		 315 FAN_FROM_REG(data->reg[attr->index], \
316 DIV_FROM_REG(data->fan_div[attr->index]))); \
1da177e4
LT		 317}
318show_fan_reg(fan);
319show_fan_reg(fan_min);
320
321static ssize_t
34875337
JD		 322store_fan_min(struct device *dev, struct device_attribute *da,
323 const char *buf, size_t count)
1da177e4 324{
34875337 325 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 326 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 327 int nr = attr->index;
1da177e4
LT		 328 u32 val;
329
330 val = simple_strtoul(buf, NULL, 10);
331
9a61bf63 332 mutex_lock(&data->update_lock);
34875337
JD		 333 data->fan_min[nr] =
334 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
31b8dc4d 335 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
34875337 336 data->fan_min[nr]);
1da177e4 337
9a61bf63 338 mutex_unlock(&data->update_lock);
1da177e4
LT		 339 return count;
340}
341
34875337
JD		 342static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
343static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
344 show_fan_min, store_fan_min, 0);
345static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
346static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
347 show_fan_min, store_fan_min, 1);
348static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
349static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
350 show_fan_min, store_fan_min, 2);
1da177e4 351
1da177e4 352#define show_temp_reg(reg) \
34875337
JD		 353static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
354 char *buf) \
1da177e4 355{ \
34875337 356 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 357 struct w83781d_data *data = w83781d_update_device(dev); \
34875337 358 int nr = attr->index; \
1da177e4
LT		 359 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
360 return sprintf(buf,"%d\n", \
361 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
362 } else { /* TEMP1 */ \
363 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
364 } \
365}
366show_temp_reg(temp);
367show_temp_reg(temp_max);
368show_temp_reg(temp_max_hyst);
369
370#define store_temp_reg(REG, reg) \
34875337
JD		 371static ssize_t store_temp_##reg (struct device *dev, \
372 struct device_attribute *da, const char *buf, size_t count) \
1da177e4 373{ \
34875337 374 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 375 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 376 int nr = attr->index; \
5bfedac0 377 long val; \
1da177e4
LT		 378 \
379 val = simple_strtol(buf, NULL, 10); \
380 \
9a61bf63 381 mutex_lock(&data->update_lock); \
1da177e4
LT		 382 \
383 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
384 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
31b8dc4d 385 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT		 386 data->temp_##reg##_add[nr-2]); \
387 } else { /* TEMP1 */ \
388 data->temp_##reg = TEMP_TO_REG(val); \
31b8dc4d 389 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT		 390 data->temp_##reg); \
391 } \
392 \
9a61bf63 393 mutex_unlock(&data->update_lock); \
1da177e4
LT		 394 return count; \
395}
396store_temp_reg(OVER, max);
397store_temp_reg(HYST, max_hyst);
398
1da177e4 399#define sysfs_temp_offsets(offset) \
34875337
JD		 400static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
401 show_temp, NULL, offset); \
402static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
403 show_temp_max, store_temp_max, offset); \
404static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
405 show_temp_max_hyst, store_temp_max_hyst, offset);
1da177e4
LT		 406
407sysfs_temp_offsets(1);
408sysfs_temp_offsets(2);
409sysfs_temp_offsets(3);
410
1da177e4 411static ssize_t
e404e274 412show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 413{
414 struct w83781d_data *data = w83781d_update_device(dev);
415 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
416}
417
311ce2ef
JC		 418static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
419
1da177e4 420static ssize_t
e404e274 421show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 422{
90d6619a 423 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 424 return sprintf(buf, "%ld\n", (long) data->vrm);
425}
426
427static ssize_t
e404e274 428store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 429{
7666c13c 430 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 431 u32 val;
432
433 val = simple_strtoul(buf, NULL, 10);
434 data->vrm = val;
435
436 return count;
437}
438
311ce2ef
JC		 439static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
440
1da177e4 441static ssize_t
e404e274 442show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 443{
444 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 445 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT		 446}
447
311ce2ef
JC		 448static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
449
7d4a1374
JD		 450static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
451 char *buf)
452{
453 struct w83781d_data *data = w83781d_update_device(dev);
454 int bitnr = to_sensor_dev_attr(attr)->index;
455 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
456}
457
458/* The W83781D has a single alarm bit for temp2 and temp3 */
459static ssize_t show_temp3_alarm(struct device *dev,
460 struct device_attribute *attr, char *buf)
461{
462 struct w83781d_data *data = w83781d_update_device(dev);
463 int bitnr = (data->type == w83781d) ? 5 : 13;
464 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
465}
466
467static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
468static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
469static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
470static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
471static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
472static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
473static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
474static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
475static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
476static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
477static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
478static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
479static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
480static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
481static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
482
e404e274 483static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 484{
485 struct w83781d_data *data = w83781d_update_device(dev);
486 return sprintf(buf, "%ld\n",
487 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
488}
1da177e4 489
1da177e4 490static ssize_t
34875337
JD		 491store_beep_mask(struct device *dev, struct device_attribute *attr,
492 const char *buf, size_t count)
1da177e4 493{
7666c13c 494 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 495 u32 val;
1da177e4
LT		 496
497 val = simple_strtoul(buf, NULL, 10);
498
9a61bf63 499 mutex_lock(&data->update_lock);
2fbbbf14
JD		 500 data->beep_mask &= 0x8000; /* preserve beep enable */
501 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
34875337
JD		 502 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
503 data->beep_mask & 0xff);
504 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
2fbbbf14 505 (data->beep_mask >> 8) & 0xff);
34875337
JD		 506 if (data->type != w83781d && data->type != as99127f) {
507 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
508 ((data->beep_mask) >> 16) & 0xff);
509 }
510 mutex_unlock(&data->update_lock);
1da177e4 511
34875337
JD		 512 return count;
513}
1da177e4 514
34875337
JD		 515static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
516 show_beep_mask, store_beep_mask);
1da177e4 517
7d4a1374
JD		 518static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
519 char *buf)
520{
521 struct w83781d_data *data = w83781d_update_device(dev);
522 int bitnr = to_sensor_dev_attr(attr)->index;
523 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
524}
525
526static ssize_t
527store_beep(struct device *dev, struct device_attribute *attr,
528 const char *buf, size_t count)
529{
530 struct w83781d_data *data = dev_get_drvdata(dev);
531 int bitnr = to_sensor_dev_attr(attr)->index;
532 unsigned long bit;
533 u8 reg;
534
535 bit = simple_strtoul(buf, NULL, 10);
536 if (bit & ~1)
537 return -EINVAL;
538
539 mutex_lock(&data->update_lock);
540 if (bit)
541 data->beep_mask |= (1 << bitnr);
542 else
543 data->beep_mask &= ~(1 << bitnr);
544
545 if (bitnr < 8) {
546 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
547 if (bit)
548 reg |= (1 << bitnr);
549 else
550 reg &= ~(1 << bitnr);
551 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
552 } else if (bitnr < 16) {
553 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
554 if (bit)
555 reg |= (1 << (bitnr - 8));
556 else
557 reg &= ~(1 << (bitnr - 8));
558 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
559 } else {
560 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
561 if (bit)
562 reg |= (1 << (bitnr - 16));
563 else
564 reg &= ~(1 << (bitnr - 16));
565 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
566 }
567 mutex_unlock(&data->update_lock);
568
569 return count;
570}
571
572/* The W83781D has a single beep bit for temp2 and temp3 */
573static ssize_t show_temp3_beep(struct device *dev,
574 struct device_attribute *attr, char *buf)
575{
576 struct w83781d_data *data = w83781d_update_device(dev);
577 int bitnr = (data->type == w83781d) ? 5 : 13;
578 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
579}
580
581static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
582 show_beep, store_beep, 0);
583static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
584 show_beep, store_beep, 1);
585static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
586 show_beep, store_beep, 2);
587static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
588 show_beep, store_beep, 3);
589static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
590 show_beep, store_beep, 8);
591static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
592 show_beep, store_beep, 9);
593static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
594 show_beep, store_beep, 10);
595static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
596 show_beep, store_beep, 16);
597static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
598 show_beep, store_beep, 17);
599static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
600 show_beep, store_beep, 6);
601static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
602 show_beep, store_beep, 7);
603static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
604 show_beep, store_beep, 11);
605static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
606 show_beep, store_beep, 4);
607static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
608 show_beep, store_beep, 5);
609static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
610 show_temp3_beep, store_beep, 13);
2fbbbf14
JD		 611static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
612 show_beep, store_beep, 15);
7d4a1374 613
1da177e4 614static ssize_t
34875337 615show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 616{
34875337 617 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4
LT		 618 struct w83781d_data *data = w83781d_update_device(dev);
619 return sprintf(buf, "%ld\n",
34875337 620 (long) DIV_FROM_REG(data->fan_div[attr->index]));
1da177e4
LT		 621}
622
623/* Note: we save and restore the fan minimum here, because its value is
624 determined in part by the fan divisor. This follows the principle of
d6e05edc 625 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT		 626 because the divisor changed. */
627static ssize_t
34875337
JD		 628store_fan_div(struct device *dev, struct device_attribute *da,
629 const char *buf, size_t count)
1da177e4 630{
34875337 631 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 632 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4 633 unsigned long min;
34875337 634 int nr = attr->index;
1da177e4
LT		 635 u8 reg;
636 unsigned long val = simple_strtoul(buf, NULL, 10);
637
9a61bf63 638 mutex_lock(&data->update_lock);
293c0997 639
1da177e4
LT		 640 /* Save fan_min */
641 min = FAN_FROM_REG(data->fan_min[nr],
642 DIV_FROM_REG(data->fan_div[nr]));
643
644 data->fan_div[nr] = DIV_TO_REG(val, data->type);
645
31b8dc4d 646 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT		 647 & (nr==0 ? 0xcf : 0x3f))
648 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
31b8dc4d 649 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4
LT		 650
651 /* w83781d and as99127f don't have extended divisor bits */
652 if (data->type != w83781d && data->type != as99127f) {
31b8dc4d 653 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
1da177e4
LT		 654 & ~(1 << (5 + nr)))
655 | ((data->fan_div[nr] & 0x04) << (3 + nr));
31b8dc4d 656 w83781d_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT		 657 }
658
659 /* Restore fan_min */
660 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
34875337 661 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 662
9a61bf63 663 mutex_unlock(&data->update_lock);
1da177e4
LT		 664 return count;
665}
666
34875337
JD		 667static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
668 show_fan_div, store_fan_div, 0);
669static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
670 show_fan_div, store_fan_div, 1);
671static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
672 show_fan_div, store_fan_div, 2);
1da177e4 673
1da177e4 674static ssize_t
34875337 675show_pwm(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 676{
34875337 677 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 678 struct w83781d_data *data = w83781d_update_device(dev);
34875337 679 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
1da177e4
LT		 680}
681
682static ssize_t
34875337 683show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
1da177e4
LT		 684{
685 struct w83781d_data *data = w83781d_update_device(dev);
34875337 686 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
1da177e4
LT		 687}
688
689static ssize_t
34875337
JD		 690store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
691 size_t count)
1da177e4 692{
34875337 693 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 694 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 695 int nr = attr->index;
1da177e4
LT		 696 u32 val;
697
698 val = simple_strtoul(buf, NULL, 10);
699
9a61bf63 700 mutex_lock(&data->update_lock);
34875337
JD		 701 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
702 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
9a61bf63 703 mutex_unlock(&data->update_lock);
1da177e4
LT		 704 return count;
705}
706
707static ssize_t
34875337
JD		 708store_pwm2_enable(struct device *dev, struct device_attribute *da,
709 const char *buf, size_t count)
1da177e4 710{
7666c13c 711 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 712 u32 val, reg;
713
714 val = simple_strtoul(buf, NULL, 10);
715
9a61bf63 716 mutex_lock(&data->update_lock);
1da177e4
LT		 717
718 switch (val) {
719 case 0:
720 case 1:
31b8dc4d
JD		 721 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
722 w83781d_write_value(data, W83781D_REG_PWMCLK12,
1da177e4
LT		 723 (reg & 0xf7) | (val << 3));
724
31b8dc4d
JD		 725 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
726 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
1da177e4
LT		 727 (reg & 0xef) | (!val << 4));
728
34875337 729 data->pwm2_enable = val;
1da177e4
LT		 730 break;
731
732 default:
9a61bf63 733 mutex_unlock(&data->update_lock);
1da177e4
LT		 734 return -EINVAL;
735 }
736
9a61bf63 737 mutex_unlock(&data->update_lock);
1da177e4
LT		 738 return count;
739}
740
34875337
JD		 741static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
742static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
743static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
744static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
745/* only PWM2 can be enabled/disabled */
746static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
747 show_pwm2_enable, store_pwm2_enable);
1da177e4 748
1da177e4 749static ssize_t
34875337 750show_sensor(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 751{
34875337 752 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 753 struct w83781d_data *data = w83781d_update_device(dev);
34875337 754 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
1da177e4
LT		 755}
756
757static ssize_t
34875337
JD		 758store_sensor(struct device *dev, struct device_attribute *da,
759 const char *buf, size_t count)
1da177e4 760{
34875337 761 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 762 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 763 int nr = attr->index;
1da177e4
LT		 764 u32 val, tmp;
765
766 val = simple_strtoul(buf, NULL, 10);
767
9a61bf63 768 mutex_lock(&data->update_lock);
1da177e4
LT		 769
770 switch (val) {
771 case 1: /* PII/Celeron diode */
31b8dc4d
JD		 772 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
773 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 774 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD		 775 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
776 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD		 777 tmp | BIT_SCFG2[nr]);
778 data->sens[nr] = val;
1da177e4
LT		 779 break;
780 case 2: /* 3904 */
31b8dc4d
JD		 781 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
782 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 783 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD		 784 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
785 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD		 786 tmp & ~BIT_SCFG2[nr]);
787 data->sens[nr] = val;
1da177e4 788 break;
b26f9330
JD		 789 case W83781D_DEFAULT_BETA:
790 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
791 "instead\n", W83781D_DEFAULT_BETA);
792 /* fall through */
793 case 4: /* thermistor */
31b8dc4d
JD		 794 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
795 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337
JD		 796 tmp & ~BIT_SCFG1[nr]);
797 data->sens[nr] = val;
1da177e4
LT		 798 break;
799 default:
b26f9330
JD		 800 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
801 (long) val);
1da177e4
LT		 802 break;
803 }
804
9a61bf63 805 mutex_unlock(&data->update_lock);
1da177e4
LT		 806 return count;
807}
808
34875337
JD		 809static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
810 show_sensor, store_sensor, 0);
811static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
393cdad6 812 show_sensor, store_sensor, 1);
34875337 813static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
393cdad6 814 show_sensor, store_sensor, 2);
1da177e4 815
1da177e4
LT		 816/* Assumes that adapter is of I2C, not ISA variety.
817 * OTHERWISE DON'T CALL THIS
818 */
819static int
0217eae3 820w83781d_detect_subclients(struct i2c_client *new_client)
1da177e4
LT		 821{
822 int i, val1 = 0, id;
823 int err;
0217eae3
WG		 824 int address = new_client->addr;
825 unsigned short sc_addr[2];
826 struct i2c_adapter *adapter = new_client->adapter;
1da177e4 827 struct w83781d_data *data = i2c_get_clientdata(new_client);
0217eae3 828 enum chips kind = data->type;
1da177e4
LT		 829
830 id = i2c_adapter_id(adapter);
831
832 if (force_subclients[0] == id && force_subclients[1] == address) {
833 for (i = 2; i <= 3; i++) {
834 if (force_subclients[i] < 0x48 ||
835 force_subclients[i] > 0x4f) {
836 dev_err(&new_client->dev, "Invalid subclient "
837 "address %d; must be 0x48-0x4f\n",
838 force_subclients[i]);
839 err = -EINVAL;
840 goto ERROR_SC_1;
841 }
842 }
31b8dc4d 843 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
1da177e4
LT		 844 (force_subclients[2] & 0x07) |
845 ((force_subclients[3] & 0x07) << 4));
0217eae3 846 sc_addr[0] = force_subclients[2];
1da177e4 847 } else {
31b8dc4d 848 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
0217eae3 849 sc_addr[0] = 0x48 + (val1 & 0x07);
1da177e4
LT		 850 }
851
852 if (kind != w83783s) {
1da177e4
LT		 853 if (force_subclients[0] == id &&
854 force_subclients[1] == address) {
0217eae3 855 sc_addr[1] = force_subclients[3];
1da177e4 856 } else {
0217eae3 857 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
1da177e4 858 }
0217eae3 859 if (sc_addr[0] == sc_addr[1]) {
1da177e4
LT		 860 dev_err(&new_client->dev,
861 "Duplicate addresses 0x%x for subclients.\n",
0217eae3 862 sc_addr[0]);
1da177e4
LT		 863 err = -EBUSY;
864 goto ERROR_SC_2;
865 }
866 }
867
1da177e4 868 for (i = 0; i <= 1; i++) {
0217eae3
WG		 869 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
870 if (!data->lm75[i]) {
1da177e4
LT		 871 dev_err(&new_client->dev, "Subclient %d "
872 "registration at address 0x%x "
0217eae3
WG		 873 "failed.\n", i, sc_addr[i]);
874 err = -ENOMEM;
1da177e4
LT		 875 if (i == 1)
876 goto ERROR_SC_3;
877 goto ERROR_SC_2;
878 }
879 if (kind == w83783s)
880 break;
881 }
882
883 return 0;
884
885/* Undo inits in case of errors */
886ERROR_SC_3:
0217eae3 887 i2c_unregister_device(data->lm75[0]);
1da177e4 888ERROR_SC_2:
1da177e4 889ERROR_SC_1:
1da177e4
LT		 890 return err;
891}
892
34875337
JD		 893#define IN_UNIT_ATTRS(X) \
894 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
895 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
293c0997 896 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
7d4a1374
JD		 897 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
898 &sensor_dev_attr_in##X##_beep.dev_attr.attr
311ce2ef 899
34875337
JD		 900#define FAN_UNIT_ATTRS(X) \
901 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
902 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
7d4a1374
JD		 903 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
904 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
905 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
311ce2ef 906
34875337
JD		 907#define TEMP_UNIT_ATTRS(X) \
908 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
909 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
7d4a1374
JD		 910 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
911 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
912 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
311ce2ef
JC		 913
914static struct attribute* w83781d_attributes[] = {
915 IN_UNIT_ATTRS(0),
916 IN_UNIT_ATTRS(2),
917 IN_UNIT_ATTRS(3),
918 IN_UNIT_ATTRS(4),
919 IN_UNIT_ATTRS(5),
920 IN_UNIT_ATTRS(6),
921 FAN_UNIT_ATTRS(1),
922 FAN_UNIT_ATTRS(2),
923 FAN_UNIT_ATTRS(3),
924 TEMP_UNIT_ATTRS(1),
925 TEMP_UNIT_ATTRS(2),
926 &dev_attr_cpu0_vid.attr,
927 &dev_attr_vrm.attr,
928 &dev_attr_alarms.attr,
929 &dev_attr_beep_mask.attr,
2fbbbf14 930 &sensor_dev_attr_beep_enable.dev_attr.attr,
311ce2ef
JC		 931 NULL
932};
933static const struct attribute_group w83781d_group = {
934 .attrs = w83781d_attributes,
935};
936
937static struct attribute *w83781d_attributes_opt[] = {
938 IN_UNIT_ATTRS(1),
939 IN_UNIT_ATTRS(7),
940 IN_UNIT_ATTRS(8),
941 TEMP_UNIT_ATTRS(3),
34875337
JD		 942 &sensor_dev_attr_pwm1.dev_attr.attr,
943 &sensor_dev_attr_pwm2.dev_attr.attr,
944 &sensor_dev_attr_pwm3.dev_attr.attr,
945 &sensor_dev_attr_pwm4.dev_attr.attr,
311ce2ef 946 &dev_attr_pwm2_enable.attr,
34875337
JD		 947 &sensor_dev_attr_temp1_type.dev_attr.attr,
948 &sensor_dev_attr_temp2_type.dev_attr.attr,
949 &sensor_dev_attr_temp3_type.dev_attr.attr,
311ce2ef
JC		 950 NULL
951};
952static const struct attribute_group w83781d_group_opt = {
953 .attrs = w83781d_attributes_opt,
954};
955
7666c13c 956/* No clean up is done on error, it's up to the caller */
1da177e4 957static int
7666c13c 958w83781d_create_files(struct device *dev, int kind, int is_isa)
1da177e4 959{
1da177e4 960 int err;
1da177e4 961
7666c13c
JD		 962 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
963 return err;
964
965 if (kind != w83783s) {
34875337
JD		 966 if ((err = device_create_file(dev,
967 &sensor_dev_attr_in1_input.dev_attr))
968 || (err = device_create_file(dev,
969 &sensor_dev_attr_in1_min.dev_attr))
970 || (err = device_create_file(dev,
7d4a1374
JD		 971 &sensor_dev_attr_in1_max.dev_attr))
972 || (err = device_create_file(dev,
973 &sensor_dev_attr_in1_alarm.dev_attr))
974 || (err = device_create_file(dev,
975 &sensor_dev_attr_in1_beep.dev_attr)))
7666c13c
JD		 976 return err;
977 }
978 if (kind != as99127f && kind != w83781d && kind != w83783s) {
34875337
JD		 979 if ((err = device_create_file(dev,
980 &sensor_dev_attr_in7_input.dev_attr))
981 || (err = device_create_file(dev,
982 &sensor_dev_attr_in7_min.dev_attr))
983 || (err = device_create_file(dev,
984 &sensor_dev_attr_in7_max.dev_attr))
7d4a1374
JD		 985 || (err = device_create_file(dev,
986 &sensor_dev_attr_in7_alarm.dev_attr))
987 || (err = device_create_file(dev,
988 &sensor_dev_attr_in7_beep.dev_attr))
34875337
JD		 989 || (err = device_create_file(dev,
990 &sensor_dev_attr_in8_input.dev_attr))
991 || (err = device_create_file(dev,
992 &sensor_dev_attr_in8_min.dev_attr))
993 || (err = device_create_file(dev,
7d4a1374
JD		 994 &sensor_dev_attr_in8_max.dev_attr))
995 || (err = device_create_file(dev,
996 &sensor_dev_attr_in8_alarm.dev_attr))
997 || (err = device_create_file(dev,
998 &sensor_dev_attr_in8_beep.dev_attr)))
7666c13c
JD		 999 return err;
1000 }
1001 if (kind != w83783s) {
34875337
JD		 1002 if ((err = device_create_file(dev,
1003 &sensor_dev_attr_temp3_input.dev_attr))
1004 || (err = device_create_file(dev,
1005 &sensor_dev_attr_temp3_max.dev_attr))
7666c13c 1006 || (err = device_create_file(dev,
7d4a1374
JD		 1007 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1008 || (err = device_create_file(dev,
1009 &sensor_dev_attr_temp3_alarm.dev_attr))
1010 || (err = device_create_file(dev,
1011 &sensor_dev_attr_temp3_beep.dev_attr)))
7666c13c 1012 return err;
7d4a1374 1013
7768aa76 1014 if (kind != w83781d) {
7d4a1374
JD		 1015 err = sysfs_chmod_file(&dev->kobj,
1016 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1017 S_IRUGO | S_IWUSR);
1018 if (err)
1019 return err;
7768aa76 1020 }
1da177e4
LT		 1021 }
1022
7666c13c 1023 if (kind != w83781d && kind != as99127f) {
34875337
JD		 1024 if ((err = device_create_file(dev,
1025 &sensor_dev_attr_pwm1.dev_attr))
1026 || (err = device_create_file(dev,
1027 &sensor_dev_attr_pwm2.dev_attr))
7666c13c
JD		 1028 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1029 return err;
1da177e4 1030 }
7666c13c 1031 if (kind == w83782d && !is_isa) {
34875337
JD		 1032 if ((err = device_create_file(dev,
1033 &sensor_dev_attr_pwm3.dev_attr))
1034 || (err = device_create_file(dev,
1035 &sensor_dev_attr_pwm4.dev_attr)))
7666c13c
JD		 1036 return err;
1037 }
1038
1039 if (kind != as99127f && kind != w83781d) {
34875337
JD		 1040 if ((err = device_create_file(dev,
1041 &sensor_dev_attr_temp1_type.dev_attr))
7666c13c 1042 || (err = device_create_file(dev,
34875337 1043 &sensor_dev_attr_temp2_type.dev_attr)))
7666c13c
JD		 1044 return err;
1045 if (kind != w83783s) {
1046 if ((err = device_create_file(dev,
34875337 1047 &sensor_dev_attr_temp3_type.dev_attr)))
7666c13c 1048 return err;
1da177e4 1049 }
7666c13c 1050 }
1da177e4 1051
7666c13c
JD		 1052 return 0;
1053}
1da177e4 1054
0217eae3 1055/* Return 0 if detection is successful, -ENODEV otherwise */
7666c13c 1056static int
310ec792 1057w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
7666c13c 1058{
bab2bf44 1059 int val1, val2;
0217eae3
WG		 1060 struct w83781d_data *isa = w83781d_data_if_isa();
1061 struct i2c_adapter *adapter = client->adapter;
1062 int address = client->addr;
bab2bf44 1063 const char *client_name;
7666c13c
JD		 1064 enum vendor { winbond, asus } vendid;
1065
0217eae3
WG		 1066 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1067 return -ENODEV;
1da177e4 1068
0217eae3
WG		 1069 /* We block updates of the ISA device to minimize the risk of
1070 concurrent access to the same W83781D chip through different
1071 interfaces. */
1072 if (isa)
1073 mutex_lock(&isa->update_lock);
1da177e4 1074
bab2bf44
JD		 1075 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
1076 dev_dbg(&adapter->dev,
1077 "Detection of w83781d chip failed at step 3\n");
1078 goto err_nodev;
1079 }
1080
1081 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1082 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1083 /* Check for Winbond or Asus ID if in bank 0 */
1084 if (!(val1 & 0x07) &&
1085 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
1086 ( (val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
1087 dev_dbg(&adapter->dev,
1088 "Detection of w83781d chip failed at step 4\n");
1089 goto err_nodev;
1090 }
1091 /* If Winbond SMBus, check address at 0x48.
1092 Asus doesn't support, except for as99127f rev.2 */
1093 if ((!(val1 & 0x80) && val2 == 0xa3) ||
1094 ( (val1 & 0x80) && val2 == 0x5c)) {
1095 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
1096 != address) {
1097 dev_dbg(&adapter->dev,
1098 "Detection of w83781d chip failed at step 5\n");
0217eae3 1099 goto err_nodev;
1da177e4 1100 }
1da177e4
LT		 1101 }
1102
bab2bf44 1103 /* Put it now into bank 0 and Vendor ID High Byte */
0217eae3
WG		 1104 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1105 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1106 & 0x78) | 0x80);
1da177e4 1107
bab2bf44
JD		 1108 /* Get the vendor ID */
1109 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1110 if (val2 == 0x5c)
1111 vendid = winbond;
1112 else if (val2 == 0x12)
1113 vendid = asus;
1114 else {
1115 dev_dbg(&adapter->dev,
1116 "w83781d chip vendor is neither Winbond nor Asus\n");
1117 goto err_nodev;
1da177e4
LT		 1118 }
1119
bab2bf44
JD		 1120 /* Determine the chip type. */
1121 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1122 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1da177e4 1123 client_name = "w83781d";
bab2bf44 1124 else if (val1 == 0x30 && vendid == winbond)
1da177e4 1125 client_name = "w83782d";
bab2bf44 1126 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1da177e4 1127 client_name = "w83783s";
bab2bf44 1128 else if (val1 == 0x31)
1da177e4 1129 client_name = "as99127f";
bab2bf44
JD		 1130 else
1131 goto err_nodev;
1132
1133 if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
1134 dev_dbg(&adapter->dev, "Device at 0x%02x appears to "
1135 "be the same as ISA device\n", address);
1136 goto err_nodev;
1da177e4
LT		 1137 }
1138
bab2bf44
JD		 1139 if (isa)
1140 mutex_unlock(&isa->update_lock);
1141
0217eae3
WG		 1142 strlcpy(info->type, client_name, I2C_NAME_SIZE);
1143
1144 return 0;
1145
1146 err_nodev:
1147 if (isa)
1148 mutex_unlock(&isa->update_lock);
1149 return -ENODEV;
1150}
1151
1152static int
1153w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
1154{
1155 struct device *dev = &client->dev;
1156 struct w83781d_data *data;
1157 int err;
1158
1159 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1160 if (!data) {
1161 err = -ENOMEM;
1162 goto ERROR1;
1163 }
1164
1165 i2c_set_clientdata(client, data);
1166 mutex_init(&data->lock);
1167 mutex_init(&data->update_lock);
1da177e4 1168
0217eae3
WG		 1169 data->type = id->driver_data;
1170 data->client = client;
1da177e4
LT		 1171
1172 /* attach secondary i2c lm75-like clients */
0217eae3
WG		 1173 err = w83781d_detect_subclients(client);
1174 if (err)
7666c13c 1175 goto ERROR3;
1da177e4
LT		 1176
1177 /* Initialize the chip */
7666c13c 1178 w83781d_init_device(dev);
1da177e4
LT		 1179
1180 /* Register sysfs hooks */
0217eae3 1181 err = w83781d_create_files(dev, data->type, 0);
7666c13c 1182 if (err)
943b0830 1183 goto ERROR4;
943b0830 1184
1beeffe4
TJ		 1185 data->hwmon_dev = hwmon_device_register(dev);
1186 if (IS_ERR(data->hwmon_dev)) {
1187 err = PTR_ERR(data->hwmon_dev);
311ce2ef 1188 goto ERROR4;
1da177e4
LT		 1189 }
1190
1191 return 0;
1192
943b0830 1193ERROR4:
311ce2ef
JC		 1194 sysfs_remove_group(&dev->kobj, &w83781d_group);
1195 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1196
0217eae3
WG		 1197 if (data->lm75[0])
1198 i2c_unregister_device(data->lm75[0]);
1199 if (data->lm75[1])
1200 i2c_unregister_device(data->lm75[1]);
1da177e4 1201ERROR3:
1da177e4
LT		 1202 kfree(data);
1203ERROR1:
1da177e4
LT		 1204 return err;
1205}
1206
1207static int
0217eae3 1208w83781d_remove(struct i2c_client *client)
1da177e4 1209{
943b0830 1210 struct w83781d_data *data = i2c_get_clientdata(client);
0217eae3 1211 struct device *dev = &client->dev;
1da177e4 1212
0217eae3 1213 hwmon_device_unregister(data->hwmon_dev);
1da177e4 1214
0217eae3
WG		 1215 sysfs_remove_group(&dev->kobj, &w83781d_group);
1216 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1da177e4 1217
0217eae3
WG		 1218 if (data->lm75[0])
1219 i2c_unregister_device(data->lm75[0]);
1220 if (data->lm75[1])
1221 i2c_unregister_device(data->lm75[1]);
943b0830 1222
0217eae3 1223 kfree(data);
1da177e4
LT		 1224
1225 return 0;
1226}
1227
1da177e4 1228static int
443850ce 1229w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1da177e4 1230{
0217eae3 1231 struct i2c_client *client = data->client;
443850ce 1232 int res, bank;
1da177e4
LT		 1233 struct i2c_client *cl;
1234
443850ce
WG		 1235 bank = (reg >> 8) & 0x0f;
1236 if (bank > 2)
1237 /* switch banks */
1238 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1239 bank);
1240 if (bank == 0 || bank > 2) {
1241 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1da177e4 1242 } else {
443850ce
WG		 1243 /* switch to subclient */
1244 cl = data->lm75[bank - 1];
1245 /* convert from ISA to LM75 I2C addresses */
1246 switch (reg & 0xff) {
1247 case 0x50: /* TEMP */
90f4102c 1248 res = i2c_smbus_read_word_swapped(cl, 0);
443850ce
WG		 1249 break;
1250 case 0x52: /* CONFIG */
1251 res = i2c_smbus_read_byte_data(cl, 1);
1252 break;
1253 case 0x53: /* HYST */
90f4102c 1254 res = i2c_smbus_read_word_swapped(cl, 2);
443850ce
WG		 1255 break;
1256 case 0x55: /* OVER */
1257 default:
90f4102c 1258 res = i2c_smbus_read_word_swapped(cl, 3);
443850ce 1259 break;
1da177e4 1260 }
1da177e4 1261 }
443850ce
WG		 1262 if (bank > 2)
1263 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1264
1da177e4
LT		 1265 return res;
1266}
1267
1268static int
443850ce 1269w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1da177e4 1270{
0217eae3 1271 struct i2c_client *client = data->client;
443850ce 1272 int bank;
1da177e4
LT		 1273 struct i2c_client *cl;
1274
443850ce
WG		 1275 bank = (reg >> 8) & 0x0f;
1276 if (bank > 2)
1277 /* switch banks */
1278 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1279 bank);
1280 if (bank == 0 || bank > 2) {
1281 i2c_smbus_write_byte_data(client, reg & 0xff,
1282 value & 0xff);
1da177e4 1283 } else {
443850ce
WG		 1284 /* switch to subclient */
1285 cl = data->lm75[bank - 1];
1286 /* convert from ISA to LM75 I2C addresses */
1287 switch (reg & 0xff) {
1288 case 0x52: /* CONFIG */
1289 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1290 break;
1291 case 0x53: /* HYST */
90f4102c 1292 i2c_smbus_write_word_swapped(cl, 2, value);
443850ce
WG		 1293 break;
1294 case 0x55: /* OVER */
90f4102c 1295 i2c_smbus_write_word_swapped(cl, 3, value);
443850ce 1296 break;
1da177e4 1297 }
1da177e4 1298 }
443850ce
WG		 1299 if (bank > 2)
1300 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1301
1da177e4
LT		 1302 return 0;
1303}
1304
1da177e4 1305static void
7666c13c 1306w83781d_init_device(struct device *dev)
1da177e4 1307{
7666c13c 1308 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1309 int i, p;
1310 int type = data->type;
1311 u8 tmp;
1312
fabddcd4 1313 if (reset && type != as99127f) { /* this resets registers we don't have
1da177e4 1314 documentation for on the as99127f */
fabddcd4
JD		 1315 /* Resetting the chip has been the default for a long time,
1316 but it causes the BIOS initializations (fan clock dividers,
1317 thermal sensor types...) to be lost, so it is now optional.
1318 It might even go away if nobody reports it as being useful,
1319 as I see very little reason why this would be needed at
1320 all. */
7666c13c 1321 dev_info(dev, "If reset=1 solved a problem you were "
fabddcd4
JD		 1322 "having, please report!\n");
1323
1da177e4 1324 /* save these registers */
31b8dc4d
JD		 1325 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1326 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1da177e4
LT		 1327 /* Reset all except Watchdog values and last conversion values
1328 This sets fan-divs to 2, among others */
31b8dc4d 1329 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1da177e4
LT		 1330 /* Restore the registers and disable power-on abnormal beep.
1331 This saves FAN 1/2/3 input/output values set by BIOS. */
31b8dc4d
JD		 1332 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1333 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1da177e4
LT		 1334 /* Disable master beep-enable (reset turns it on).
1335 Individual beep_mask should be reset to off but for some reason
1336 disabling this bit helps some people not get beeped */
31b8dc4d 1337 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1da177e4
LT		 1338 }
1339
fabddcd4
JD		 1340 /* Disable power-on abnormal beep, as advised by the datasheet.
1341 Already done if reset=1. */
1342 if (init && !reset && type != as99127f) {
31b8dc4d
JD		 1343 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1344 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
fabddcd4
JD		 1345 }
1346
303760b4 1347 data->vrm = vid_which_vrm();
1da177e4
LT		 1348
1349 if ((type != w83781d) && (type != as99127f)) {
31b8dc4d 1350 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT		 1351 for (i = 1; i <= 3; i++) {
1352 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1353 data->sens[i - 1] = 4;
1da177e4
LT		 1354 } else {
1355 if (w83781d_read_value
31b8dc4d 1356 (data,
1da177e4
LT		 1357 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1358 data->sens[i - 1] = 1;
1359 else
1360 data->sens[i - 1] = 2;
1361 }
7c7a5304 1362 if (type == w83783s && i == 2)
1da177e4
LT		 1363 break;
1364 }
1365 }
1366
1367 if (init && type != as99127f) {
1368 /* Enable temp2 */
31b8dc4d 1369 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1da177e4 1370 if (tmp & 0x01) {
7666c13c 1371 dev_warn(dev, "Enabling temp2, readings "
1da177e4 1372 "might not make sense\n");
31b8dc4d 1373 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1da177e4
LT		 1374 tmp & 0xfe);
1375 }
1376
1377 /* Enable temp3 */
7c7a5304 1378 if (type != w83783s) {
31b8dc4d 1379 tmp = w83781d_read_value(data,
1da177e4
LT		 1380 W83781D_REG_TEMP3_CONFIG);
1381 if (tmp & 0x01) {
7666c13c 1382 dev_warn(dev, "Enabling temp3, "
1da177e4 1383 "readings might not make sense\n");
31b8dc4d 1384 w83781d_write_value(data,
1da177e4
LT		 1385 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1386 }
1387 }
1da177e4
LT		 1388 }
1389
1390 /* Start monitoring */
31b8dc4d
JD		 1391 w83781d_write_value(data, W83781D_REG_CONFIG,
1392 (w83781d_read_value(data,
1da177e4
LT		 1393 W83781D_REG_CONFIG) & 0xf7)
1394 | 0x01);
7666c13c
JD		 1395
1396 /* A few vars need to be filled upon startup */
34875337
JD		 1397 for (i = 0; i < 3; i++) {
1398 data->fan_min[i] = w83781d_read_value(data,
7666c13c
JD		 1399 W83781D_REG_FAN_MIN(i));
1400 }
7666c13c
JD		 1401
1402 mutex_init(&data->update_lock);
1da177e4
LT		 1403}
1404
1405static struct w83781d_data *w83781d_update_device(struct device *dev)
1406{
7666c13c 1407 struct w83781d_data *data = dev_get_drvdata(dev);
0217eae3 1408 struct i2c_client *client = data->client;
1da177e4
LT		 1409 int i;
1410
9a61bf63 1411 mutex_lock(&data->update_lock);
1da177e4
LT		 1412
1413 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1414 || !data->valid) {
1415 dev_dbg(dev, "Starting device update\n");
1416
1417 for (i = 0; i <= 8; i++) {
7c7a5304 1418 if (data->type == w83783s && i == 1)
1da177e4
LT		 1419 continue; /* 783S has no in1 */
1420 data->in[i] =
31b8dc4d 1421 w83781d_read_value(data, W83781D_REG_IN(i));
1da177e4 1422 data->in_min[i] =
31b8dc4d 1423 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1da177e4 1424 data->in_max[i] =
31b8dc4d 1425 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
05663368 1426 if ((data->type != w83782d) && (i == 6))
1da177e4
LT		 1427 break;
1428 }
34875337
JD		 1429 for (i = 0; i < 3; i++) {
1430 data->fan[i] =
31b8dc4d 1431 w83781d_read_value(data, W83781D_REG_FAN(i));
34875337 1432 data->fan_min[i] =
31b8dc4d 1433 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1da177e4
LT		 1434 }
1435 if (data->type != w83781d && data->type != as99127f) {
34875337
JD		 1436 for (i = 0; i < 4; i++) {
1437 data->pwm[i] =
31b8dc4d 1438 w83781d_read_value(data,
34875337 1439 W83781D_REG_PWM[i]);
848ddf11
JD		 1440 /* Only W83782D on SMBus has PWM3 and PWM4 */
1441 if ((data->type != w83782d || !client)
34875337 1442 && i == 1)
1da177e4
LT		 1443 break;
1444 }
1445 /* Only PWM2 can be disabled */
34875337 1446 data->pwm2_enable = (w83781d_read_value(data,
1da177e4
LT		 1447 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1448 }
1449
31b8dc4d 1450 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1da177e4 1451 data->temp_max =
31b8dc4d 1452 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1da177e4 1453 data->temp_max_hyst =
31b8dc4d 1454 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1da177e4 1455 data->temp_add[0] =
31b8dc4d 1456 w83781d_read_value(data, W83781D_REG_TEMP(2));
1da177e4 1457 data->temp_max_add[0] =
31b8dc4d 1458 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1da177e4 1459 data->temp_max_hyst_add[0] =
31b8dc4d 1460 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
7c7a5304 1461 if (data->type != w83783s) {
1da177e4 1462 data->temp_add[1] =
31b8dc4d 1463 w83781d_read_value(data, W83781D_REG_TEMP(3));
1da177e4 1464 data->temp_max_add[1] =
31b8dc4d 1465 w83781d_read_value(data,
1da177e4
LT		 1466 W83781D_REG_TEMP_OVER(3));
1467 data->temp_max_hyst_add[1] =
31b8dc4d 1468 w83781d_read_value(data,
1da177e4
LT		 1469 W83781D_REG_TEMP_HYST(3));
1470 }
31b8dc4d 1471 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
7c7a5304 1472 data->vid = i & 0x0f;
31b8dc4d 1473 data->vid |= (w83781d_read_value(data,
7c7a5304 1474 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT		 1475 data->fan_div[0] = (i >> 4) & 0x03;
1476 data->fan_div[1] = (i >> 6) & 0x03;
31b8dc4d 1477 data->fan_div[2] = (w83781d_read_value(data,
7c7a5304 1478 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4 1479 if ((data->type != w83781d) && (data->type != as99127f)) {
31b8dc4d 1480 i = w83781d_read_value(data, W83781D_REG_VBAT);
1da177e4
LT		 1481 data->fan_div[0] |= (i >> 3) & 0x04;
1482 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1483 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4 1484 }
05663368 1485 if (data->type == w83782d) {
31b8dc4d 1486 data->alarms = w83781d_read_value(data,
c7f5d7ed 1487 W83782D_REG_ALARM1)
31b8dc4d 1488 | (w83781d_read_value(data,
c7f5d7ed 1489 W83782D_REG_ALARM2) << 8)
31b8dc4d 1490 | (w83781d_read_value(data,
c7f5d7ed
JD		 1491 W83782D_REG_ALARM3) << 16);
1492 } else if (data->type == w83783s) {
31b8dc4d 1493 data->alarms = w83781d_read_value(data,
c7f5d7ed 1494 W83782D_REG_ALARM1)
31b8dc4d 1495 | (w83781d_read_value(data,
c7f5d7ed
JD		 1496 W83782D_REG_ALARM2) << 8);
1497 } else {
1498 /* No real-time status registers, fall back to
1499 interrupt status registers */
31b8dc4d 1500 data->alarms = w83781d_read_value(data,
c7f5d7ed 1501 W83781D_REG_ALARM1)
31b8dc4d 1502 | (w83781d_read_value(data,
c7f5d7ed 1503 W83781D_REG_ALARM2) << 8);
1da177e4 1504 }
31b8dc4d 1505 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
2fbbbf14 1506 data->beep_mask = (i << 8) +
31b8dc4d 1507 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1da177e4
LT		 1508 if ((data->type != w83781d) && (data->type != as99127f)) {
1509 data->beep_mask |=
31b8dc4d 1510 w83781d_read_value(data,
1da177e4
LT		 1511 W83781D_REG_BEEP_INTS3) << 16;
1512 }
1513 data->last_updated = jiffies;
1514 data->valid = 1;
1515 }
1516
9a61bf63 1517 mutex_unlock(&data->update_lock);
1da177e4
LT		 1518
1519 return data;
1520}
1521
0217eae3
WG		 1522static const struct i2c_device_id w83781d_ids[] = {
1523 { "w83781d", w83781d, },
1524 { "w83782d", w83782d, },
1525 { "w83783s", w83783s, },
1526 { "as99127f", as99127f },
1527 { /* LIST END */ }
1528};
1529MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1530
1531static struct i2c_driver w83781d_driver = {
1532 .class = I2C_CLASS_HWMON,
1533 .driver = {
1534 .name = "w83781d",
1535 },
1536 .probe = w83781d_probe,
1537 .remove = w83781d_remove,
1538 .id_table = w83781d_ids,
1539 .detect = w83781d_detect,
c3813d6a 1540 .address_list = normal_i2c,
0217eae3
WG		 1541};
1542
1543/*
1544 * ISA related code
1545 */
443850ce
WG		 1546#ifdef CONFIG_ISA
1547
1548/* ISA device, if found */
1549static struct platform_device *pdev;
1550
1551static unsigned short isa_address = 0x290;
1552
1553/* I2C devices get this name attribute automatically, but for ISA devices
1554 we must create it by ourselves. */
1555static ssize_t
1556show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1557{
1558 struct w83781d_data *data = dev_get_drvdata(dev);
360782dd 1559 return sprintf(buf, "%s\n", data->name);
443850ce
WG		 1560}
1561static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1562
1563static struct w83781d_data *w83781d_data_if_isa(void)
1564{
1565 return pdev ? platform_get_drvdata(pdev) : NULL;
1566}
1567
1568/* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1569static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1570{
0217eae3 1571 struct w83781d_data *isa;
443850ce
WG		 1572 int i;
1573
1574 if (!pdev) /* No ISA chip */
1575 return 0;
1576
443850ce
WG		 1577 isa = platform_get_drvdata(pdev);
1578
1579 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1580 return 0; /* Address doesn't match */
1581 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1582 return 0; /* Chip type doesn't match */
1583
1584 /* We compare all the limit registers, the config register and the
1585 * interrupt mask registers */
1586 for (i = 0x2b; i <= 0x3d; i++) {
0217eae3
WG		 1587 if (w83781d_read_value(isa, i) !=
1588 i2c_smbus_read_byte_data(client, i))
443850ce
WG		 1589 return 0;
1590 }
1591 if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
0217eae3 1592 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
443850ce
WG		 1593 return 0;
1594 for (i = 0x43; i <= 0x46; i++) {
0217eae3
WG		 1595 if (w83781d_read_value(isa, i) !=
1596 i2c_smbus_read_byte_data(client, i))
443850ce
WG		 1597 return 0;
1598 }
1599
1600 return 1;
1601}
1602
1603static int
1604w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1605{
443850ce
WG		 1606 int word_sized, res;
1607
1608 word_sized = (((reg & 0xff00) == 0x100)
1609 || ((reg & 0xff00) == 0x200))
1610 && (((reg & 0x00ff) == 0x50)
1611 || ((reg & 0x00ff) == 0x53)
1612 || ((reg & 0x00ff) == 0x55));
1613 if (reg & 0xff00) {
1614 outb_p(W83781D_REG_BANK,
360782dd 1615 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1616 outb_p(reg >> 8,
360782dd 1617 data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce 1618 }
360782dd
JD		 1619 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1620 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1621 if (word_sized) {
1622 outb_p((reg & 0xff) + 1,
360782dd 1623 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1624 res =
360782dd 1625 (res << 8) + inb_p(data->isa_addr +
443850ce
WG		 1626 W83781D_DATA_REG_OFFSET);
1627 }
1628 if (reg & 0xff00) {
1629 outb_p(W83781D_REG_BANK,
360782dd
JD		 1630 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1631 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1632 }
1633 return res;
1634}
1635
1636static void
1637w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1638{
443850ce
WG		 1639 int word_sized;
1640
1641 word_sized = (((reg & 0xff00) == 0x100)
1642 || ((reg & 0xff00) == 0x200))
1643 && (((reg & 0x00ff) == 0x53)
1644 || ((reg & 0x00ff) == 0x55));
1645 if (reg & 0xff00) {
1646 outb_p(W83781D_REG_BANK,
360782dd 1647 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1648 outb_p(reg >> 8,
360782dd 1649 data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce 1650 }
360782dd 1651 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce
WG		 1652 if (word_sized) {
1653 outb_p(value >> 8,
360782dd 1654 data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce 1655 outb_p((reg & 0xff) + 1,
360782dd 1656 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1657 }
360782dd 1658 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1659 if (reg & 0xff00) {
1660 outb_p(W83781D_REG_BANK,
360782dd
JD		 1661 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1662 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1663 }
1664}
1665
1666/* The SMBus locks itself, usually, but nothing may access the Winbond between
1667 bank switches. ISA access must always be locked explicitly!
1668 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1669 would slow down the W83781D access and should not be necessary.
1670 There are some ugly typecasts here, but the good news is - they should
1671 nowhere else be necessary! */
1672static int
1673w83781d_read_value(struct w83781d_data *data, u16 reg)
1674{
0217eae3 1675 struct i2c_client *client = data->client;
443850ce
WG		 1676 int res;
1677
1678 mutex_lock(&data->lock);
0217eae3 1679 if (client)
443850ce
WG		 1680 res = w83781d_read_value_i2c(data, reg);
1681 else
1682 res = w83781d_read_value_isa(data, reg);
1683 mutex_unlock(&data->lock);
1684 return res;
1685}
1686
1687static int
1688w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1689{
0217eae3 1690 struct i2c_client *client = data->client;
443850ce
WG		 1691
1692 mutex_lock(&data->lock);
0217eae3 1693 if (client)
443850ce
WG		 1694 w83781d_write_value_i2c(data, reg, value);
1695 else
1696 w83781d_write_value_isa(data, reg, value);
1697 mutex_unlock(&data->lock);
1698 return 0;
1699}
1700
1701static int __devinit
1702w83781d_isa_probe(struct platform_device *pdev)
1703{
1704 int err, reg;
1705 struct w83781d_data *data;
1706 struct resource *res;
443850ce
WG		 1707
1708 /* Reserve the ISA region */
1709 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1710 if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
1711 "w83781d")) {
1712 err = -EBUSY;
1713 goto exit;
1714 }
1715
1716 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1717 if (!data) {
1718 err = -ENOMEM;
1719 goto exit_release_region;
1720 }
1721 mutex_init(&data->lock);
360782dd 1722 data->isa_addr = res->start;
443850ce
WG		 1723 platform_set_drvdata(pdev, data);
1724
1725 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1726 switch (reg) {
1727 case 0x30:
1728 data->type = w83782d;
360782dd 1729 data->name = "w83782d";
443850ce
WG		 1730 break;
1731 default:
1732 data->type = w83781d;
360782dd 1733 data->name = "w83781d";
443850ce 1734 }
443850ce
WG		 1735
1736 /* Initialize the W83781D chip */
1737 w83781d_init_device(&pdev->dev);
1738
1739 /* Register sysfs hooks */
1740 err = w83781d_create_files(&pdev->dev, data->type, 1);
1741 if (err)
1742 goto exit_remove_files;
1743
1744 err = device_create_file(&pdev->dev, &dev_attr_name);
1745 if (err)
1746 goto exit_remove_files;
1747
1748 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1749 if (IS_ERR(data->hwmon_dev)) {
1750 err = PTR_ERR(data->hwmon_dev);
1751 goto exit_remove_files;
1752 }
1753
1754 return 0;
1755
1756 exit_remove_files:
1757 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1758 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1759 device_remove_file(&pdev->dev, &dev_attr_name);
1760 kfree(data);
1761 exit_release_region:
1762 release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
1763 exit:
1764 return err;
1765}
1766
1767static int __devexit
1768w83781d_isa_remove(struct platform_device *pdev)
1769{
1770 struct w83781d_data *data = platform_get_drvdata(pdev);
1771
1772 hwmon_device_unregister(data->hwmon_dev);
1773 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1774 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1775 device_remove_file(&pdev->dev, &dev_attr_name);
360782dd 1776 release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2);
443850ce
WG		 1777 kfree(data);
1778
1779 return 0;
1780}
1781
1782static struct platform_driver w83781d_isa_driver = {
1783 .driver = {
1784 .owner = THIS_MODULE,
1785 .name = "w83781d",
1786 },
1787 .probe = w83781d_isa_probe,
1788 .remove = __devexit_p(w83781d_isa_remove),
1789};
1790
7666c13c
JD		 1791/* return 1 if a supported chip is found, 0 otherwise */
1792static int __init
1793w83781d_isa_found(unsigned short address)
1794{
1795 int val, save, found = 0;
b0bcdd3c
JD		 1796 int port;
1797
1798 /* Some boards declare base+0 to base+7 as a PNP device, some base+4
1799 * to base+7 and some base+5 to base+6. So we better request each port
1800 * individually for the probing phase. */
1801 for (port = address; port < address + W83781D_EXTENT; port++) {
1802 if (!request_region(port, 1, "w83781d")) {
1ca28218 1803 pr_debug("Failed to request port 0x%x\n", port);
b0bcdd3c
JD		 1804 goto release;
1805 }
2961cb22 1806 }
7666c13c
JD		 1807
1808#define REALLY_SLOW_IO
1809 /* We need the timeouts for at least some W83781D-like
1810 chips. But only if we read 'undefined' registers. */
1811 val = inb_p(address + 1);
1812 if (inb_p(address + 2) != val
1813 || inb_p(address + 3) != val
1814 || inb_p(address + 7) != val) {
1ca28218 1815 pr_debug("Detection failed at step %d\n", 1);
7666c13c
JD		 1816 goto release;
1817 }
1818#undef REALLY_SLOW_IO
1819
1820 /* We should be able to change the 7 LSB of the address port. The
1821 MSB (busy flag) should be clear initially, set after the write. */
1822 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1823 if (save & 0x80) {
1ca28218 1824 pr_debug("Detection failed at step %d\n", 2);
7666c13c
JD		 1825 goto release;
1826 }
1827 val = ~save & 0x7f;
1828 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1829 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1830 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1ca28218 1831 pr_debug("Detection failed at step %d\n", 3);
7666c13c
JD		 1832 goto release;
1833 }
1834
1835 /* We found a device, now see if it could be a W83781D */
1836 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1837 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1838 if (val & 0x80) {
1ca28218 1839 pr_debug("Detection failed at step %d\n", 4);
7666c13c
JD		 1840 goto release;
1841 }
1842 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1843 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1844 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1845 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1846 if ((!(save & 0x80) && (val != 0xa3))
1847 || ((save & 0x80) && (val != 0x5c))) {
1ca28218 1848 pr_debug("Detection failed at step %d\n", 5);
7666c13c
JD		 1849 goto release;
1850 }
1851 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1852 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1853 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1ca28218 1854 pr_debug("Detection failed at step %d\n", 6);
7666c13c
JD		 1855 goto release;
1856 }
1857
1858 /* The busy flag should be clear again */
1859 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1ca28218 1860 pr_debug("Detection failed at step %d\n", 7);
7666c13c
JD		 1861 goto release;
1862 }
1863
1864 /* Determine the chip type */
1865 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1866 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1867 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1868 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1869 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1870 if ((val & 0xfe) == 0x10 /* W83781D */
05663368 1871 || val == 0x30) /* W83782D */
7666c13c
JD		 1872 found = 1;
1873
1874 if (found)
1ca28218 1875 pr_info("Found a %s chip at %#x\n",
7666c13c
JD		 1876 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1877
1878 release:
b0bcdd3c
JD		 1879 for (port--; port >= address; port--)
1880 release_region(port, 1);
7666c13c
JD		 1881 return found;
1882}
1883
1884static int __init
1885w83781d_isa_device_add(unsigned short address)
1886{
1887 struct resource res = {
1888 .start = address,
15bde2f1 1889 .end = address + W83781D_EXTENT - 1,
7666c13c
JD		 1890 .name = "w83781d",
1891 .flags = IORESOURCE_IO,
1892 };
1893 int err;
1894
1895 pdev = platform_device_alloc("w83781d", address);
1896 if (!pdev) {
1897 err = -ENOMEM;
1ca28218 1898 pr_err("Device allocation failed\n");
7666c13c
JD		 1899 goto exit;
1900 }
1901
1902 err = platform_device_add_resources(pdev, &res, 1);
1903 if (err) {
1ca28218 1904 pr_err("Device resource addition failed (%d)\n", err);
7666c13c
JD		 1905 goto exit_device_put;
1906 }
1907
1908 err = platform_device_add(pdev);
1909 if (err) {
1ca28218 1910 pr_err("Device addition failed (%d)\n", err);
7666c13c
JD		 1911 goto exit_device_put;
1912 }
1913
1914 return 0;
1915
1916 exit_device_put:
1917 platform_device_put(pdev);
1918 exit:
1919 pdev = NULL;
1920 return err;
1921}
1922
1da177e4 1923static int __init
443850ce 1924w83781d_isa_register(void)
1da177e4 1925{
fde09509
JD		 1926 int res;
1927
7666c13c
JD		 1928 if (w83781d_isa_found(isa_address)) {
1929 res = platform_driver_register(&w83781d_isa_driver);
1930 if (res)
c6566206 1931 goto exit;
fde09509 1932
7666c13c
JD		 1933 /* Sets global pdev as a side effect */
1934 res = w83781d_isa_device_add(isa_address);
1935 if (res)
1936 goto exit_unreg_isa_driver;
1937 }
fde09509
JD		 1938
1939 return 0;
7666c13c 1940
443850ce 1941exit_unreg_isa_driver:
7666c13c 1942 platform_driver_unregister(&w83781d_isa_driver);
443850ce 1943exit:
7666c13c 1944 return res;
1da177e4
LT		 1945}
1946
dd56b638 1947static void
443850ce 1948w83781d_isa_unregister(void)
1da177e4 1949{
7666c13c
JD		 1950 if (pdev) {
1951 platform_device_unregister(pdev);
1952 platform_driver_unregister(&w83781d_isa_driver);
1953 }
443850ce
WG		 1954}
1955#else /* !CONFIG_ISA */
1956
1957static struct w83781d_data *w83781d_data_if_isa(void)
1958{
1959 return NULL;
1960}
1961
1962static int
1963w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1964{
1965 return 0;
1966}
1967
1968static int
1969w83781d_read_value(struct w83781d_data *data, u16 reg)
1970{
1971 int res;
1972
1973 mutex_lock(&data->lock);
1974 res = w83781d_read_value_i2c(data, reg);
1975 mutex_unlock(&data->lock);
1976
1977 return res;
1978}
1979
1980static int
1981w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1982{
1983 mutex_lock(&data->lock);
1984 w83781d_write_value_i2c(data, reg, value);
1985 mutex_unlock(&data->lock);
1986
1987 return 0;
1988}
1989
1990static int __init
1991w83781d_isa_register(void)
1992{
1993 return 0;
1994}
1995
dd56b638 1996static void
443850ce
WG		 1997w83781d_isa_unregister(void)
1998{
1999}
2000#endif /* CONFIG_ISA */
2001
2002static int __init
2003sensors_w83781d_init(void)
2004{
2005 int res;
2006
2007 /* We register the ISA device first, so that we can skip the
2008 * registration of an I2C interface to the same device. */
2009 res = w83781d_isa_register();
2010 if (res)
2011 goto exit;
2012
2013 res = i2c_add_driver(&w83781d_driver);
2014 if (res)
2015 goto exit_unreg_isa;
2016
2017 return 0;
2018
2019 exit_unreg_isa:
2020 w83781d_isa_unregister();
2021 exit:
2022 return res;
2023}
2024
2025static void __exit
2026sensors_w83781d_exit(void)
2027{
2028 w83781d_isa_unregister();
1da177e4
LT		 2029 i2c_del_driver(&w83781d_driver);
2030}
2031
2032MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2033 "Philip Edelbrock <phil@netroedge.com>, "
2034 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2035MODULE_DESCRIPTION("W83781D driver");
2036MODULE_LICENSE("GPL");
2037
2038module_init(sensors_w83781d_init);
2039module_exit(sensors_w83781d_exit);
Linux 6.x block layer and io_uring tree(s)