Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | w83781d.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, | |
7666c13c JD |
5 | Philip Edelbrock <phil@netroedge.com>, |
6 | and Mark Studebaker <mdsxyz123@yahoo.com> | |
360782dd | 7 | Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org> |
1da177e4 LT |
8 | |
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; if not, write to the Free Software | |
21 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | /* | |
25 | Supports following chips: | |
26 | ||
27 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
28 | as99127f 7 3 0 3 0x31 0x12c3 yes no | |
29 | as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no | |
30 | w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes | |
1da177e4 LT |
31 | w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes |
32 | w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no | |
1da177e4 LT |
33 | |
34 | */ | |
35 | ||
1da177e4 LT |
36 | #include <linux/module.h> |
37 | #include <linux/init.h> | |
38 | #include <linux/slab.h> | |
39 | #include <linux/jiffies.h> | |
40 | #include <linux/i2c.h> | |
943b0830 | 41 | #include <linux/hwmon.h> |
303760b4 | 42 | #include <linux/hwmon-vid.h> |
34875337 | 43 | #include <linux/hwmon-sysfs.h> |
311ce2ef | 44 | #include <linux/sysfs.h> |
943b0830 | 45 | #include <linux/err.h> |
9a61bf63 | 46 | #include <linux/mutex.h> |
443850ce WG |
47 | |
48 | #ifdef CONFIG_ISA | |
49 | #include <linux/platform_device.h> | |
50 | #include <linux/ioport.h> | |
1da177e4 | 51 | #include <asm/io.h> |
443850ce | 52 | #endif |
1da177e4 | 53 | |
443850ce | 54 | #include "lm75.h" |
7666c13c | 55 | |
1da177e4 | 56 | /* Addresses to scan */ |
25e9c86d MH |
57 | static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, |
58 | 0x2e, 0x2f, I2C_CLIENT_END }; | |
1da177e4 | 59 | /* Insmod parameters */ |
05663368 | 60 | I2C_CLIENT_INSMOD_4(w83781d, w83782d, w83783s, as99127f); |
1da177e4 LT |
61 | I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: " |
62 | "{bus, clientaddr, subclientaddr1, subclientaddr2}"); | |
63 | ||
fabddcd4 JD |
64 | static int reset; |
65 | module_param(reset, bool, 0); | |
66 | MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); | |
67 | ||
1da177e4 LT |
68 | static int init = 1; |
69 | module_param(init, bool, 0); | |
70 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
71 | ||
72 | /* Constants specified below */ | |
73 | ||
74 | /* Length of ISA address segment */ | |
75 | #define W83781D_EXTENT 8 | |
76 | ||
77 | /* Where are the ISA address/data registers relative to the base address */ | |
78 | #define W83781D_ADDR_REG_OFFSET 5 | |
79 | #define W83781D_DATA_REG_OFFSET 6 | |
80 | ||
34875337 JD |
81 | /* The device registers */ |
82 | /* in nr from 0 to 8 */ | |
1da177e4 LT |
83 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ |
84 | (0x554 + (((nr) - 7) * 2))) | |
85 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
86 | (0x555 + (((nr) - 7) * 2))) | |
87 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
88 | (0x550 + (nr) - 7)) | |
89 | ||
34875337 JD |
90 | /* fan nr from 0 to 2 */ |
91 | #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr)) | |
92 | #define W83781D_REG_FAN(nr) (0x28 + (nr)) | |
1da177e4 LT |
93 | |
94 | #define W83781D_REG_BANK 0x4E | |
95 | #define W83781D_REG_TEMP2_CONFIG 0x152 | |
96 | #define W83781D_REG_TEMP3_CONFIG 0x252 | |
34875337 | 97 | /* temp nr from 1 to 3 */ |
1da177e4 LT |
98 | #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ |
99 | ((nr == 2) ? (0x0150) : \ | |
100 | (0x27))) | |
101 | #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ | |
102 | ((nr == 2) ? (0x153) : \ | |
103 | (0x3A))) | |
104 | #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ | |
105 | ((nr == 2) ? (0x155) : \ | |
106 | (0x39))) | |
107 | ||
108 | #define W83781D_REG_CONFIG 0x40 | |
c7f5d7ed JD |
109 | |
110 | /* Interrupt status (W83781D, AS99127F) */ | |
1da177e4 LT |
111 | #define W83781D_REG_ALARM1 0x41 |
112 | #define W83781D_REG_ALARM2 0x42 | |
1da177e4 | 113 | |
05663368 | 114 | /* Real-time status (W83782D, W83783S) */ |
c7f5d7ed JD |
115 | #define W83782D_REG_ALARM1 0x459 |
116 | #define W83782D_REG_ALARM2 0x45A | |
117 | #define W83782D_REG_ALARM3 0x45B | |
118 | ||
1da177e4 LT |
119 | #define W83781D_REG_BEEP_CONFIG 0x4D |
120 | #define W83781D_REG_BEEP_INTS1 0x56 | |
121 | #define W83781D_REG_BEEP_INTS2 0x57 | |
122 | #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ | |
123 | ||
124 | #define W83781D_REG_VID_FANDIV 0x47 | |
125 | ||
126 | #define W83781D_REG_CHIPID 0x49 | |
127 | #define W83781D_REG_WCHIPID 0x58 | |
128 | #define W83781D_REG_CHIPMAN 0x4F | |
129 | #define W83781D_REG_PIN 0x4B | |
130 | ||
131 | /* 782D/783S only */ | |
132 | #define W83781D_REG_VBAT 0x5D | |
133 | ||
134 | /* PWM 782D (1-4) and 783S (1-2) only */ | |
34875337 | 135 | static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F }; |
1da177e4 LT |
136 | #define W83781D_REG_PWMCLK12 0x5C |
137 | #define W83781D_REG_PWMCLK34 0x45C | |
1da177e4 LT |
138 | |
139 | #define W83781D_REG_I2C_ADDR 0x48 | |
140 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
141 | ||
142 | /* The following are undocumented in the data sheets however we | |
143 | received the information in an email from Winbond tech support */ | |
144 | /* Sensor selection - not on 781d */ | |
145 | #define W83781D_REG_SCFG1 0x5D | |
146 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
147 | ||
148 | #define W83781D_REG_SCFG2 0x59 | |
149 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
150 | ||
151 | #define W83781D_DEFAULT_BETA 3435 | |
152 | ||
474d00a8 JD |
153 | /* Conversions */ |
154 | #define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255) | |
155 | #define IN_FROM_REG(val) ((val) * 16) | |
1da177e4 LT |
156 | |
157 | static inline u8 | |
158 | FAN_TO_REG(long rpm, int div) | |
159 | { | |
160 | if (rpm == 0) | |
161 | return 255; | |
162 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
163 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
164 | } | |
165 | ||
474d00a8 JD |
166 | static inline long |
167 | FAN_FROM_REG(u8 val, int div) | |
168 | { | |
169 | if (val == 0) | |
170 | return -1; | |
171 | if (val == 255) | |
172 | return 0; | |
173 | return 1350000 / (val * div); | |
174 | } | |
1da177e4 | 175 | |
474d00a8 JD |
176 | #define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128) |
177 | #define TEMP_FROM_REG(val) ((val) * 1000) | |
1da177e4 | 178 | |
1da177e4 | 179 | #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ |
2fbbbf14 | 180 | (~(val)) & 0x7fff : (val) & 0xff7fff) |
1da177e4 | 181 | #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ |
2fbbbf14 | 182 | (~(val)) & 0x7fff : (val) & 0xff7fff) |
1da177e4 | 183 | |
1da177e4 LT |
184 | #define DIV_FROM_REG(val) (1 << (val)) |
185 | ||
186 | static inline u8 | |
187 | DIV_TO_REG(long val, enum chips type) | |
188 | { | |
189 | int i; | |
190 | val = SENSORS_LIMIT(val, 1, | |
191 | ((type == w83781d | |
192 | || type == as99127f) ? 8 : 128)) >> 1; | |
abc01922 | 193 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
194 | if (val == 0) |
195 | break; | |
196 | val >>= 1; | |
197 | } | |
474d00a8 | 198 | return i; |
1da177e4 LT |
199 | } |
200 | ||
1da177e4 LT |
201 | struct w83781d_data { |
202 | struct i2c_client client; | |
1beeffe4 | 203 | struct device *hwmon_dev; |
9a61bf63 | 204 | struct mutex lock; |
1da177e4 LT |
205 | enum chips type; |
206 | ||
360782dd JD |
207 | /* For ISA device only */ |
208 | const char *name; | |
209 | int isa_addr; | |
210 | ||
9a61bf63 | 211 | struct mutex update_lock; |
1da177e4 LT |
212 | char valid; /* !=0 if following fields are valid */ |
213 | unsigned long last_updated; /* In jiffies */ | |
214 | ||
215 | struct i2c_client *lm75[2]; /* for secondary I2C addresses */ | |
216 | /* array of 2 pointers to subclients */ | |
217 | ||
218 | u8 in[9]; /* Register value - 8 & 9 for 782D only */ | |
219 | u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ | |
220 | u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ | |
221 | u8 fan[3]; /* Register value */ | |
222 | u8 fan_min[3]; /* Register value */ | |
474d00a8 JD |
223 | s8 temp; /* Register value */ |
224 | s8 temp_max; /* Register value */ | |
225 | s8 temp_max_hyst; /* Register value */ | |
1da177e4 LT |
226 | u16 temp_add[2]; /* Register value */ |
227 | u16 temp_max_add[2]; /* Register value */ | |
228 | u16 temp_max_hyst_add[2]; /* Register value */ | |
229 | u8 fan_div[3]; /* Register encoding, shifted right */ | |
230 | u8 vid; /* Register encoding, combined */ | |
231 | u32 alarms; /* Register encoding, combined */ | |
232 | u32 beep_mask; /* Register encoding, combined */ | |
1da177e4 | 233 | u8 pwm[4]; /* Register value */ |
34875337 | 234 | u8 pwm2_enable; /* Boolean */ |
1da177e4 LT |
235 | u16 sens[3]; /* 782D/783S only. |
236 | 1 = pentium diode; 2 = 3904 diode; | |
b26f9330 | 237 | 4 = thermistor */ |
1da177e4 LT |
238 | u8 vrm; |
239 | }; | |
240 | ||
443850ce WG |
241 | static struct w83781d_data *w83781d_data_if_isa(void); |
242 | static int w83781d_alias_detect(struct i2c_client *client, u8 chipid); | |
243 | ||
1da177e4 LT |
244 | static int w83781d_attach_adapter(struct i2c_adapter *adapter); |
245 | static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind); | |
246 | static int w83781d_detach_client(struct i2c_client *client); | |
247 | ||
31b8dc4d JD |
248 | static int w83781d_read_value(struct w83781d_data *data, u16 reg); |
249 | static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value); | |
1da177e4 | 250 | static struct w83781d_data *w83781d_update_device(struct device *dev); |
7666c13c | 251 | static void w83781d_init_device(struct device *dev); |
1da177e4 LT |
252 | |
253 | static struct i2c_driver w83781d_driver = { | |
cdaf7934 | 254 | .driver = { |
cdaf7934 LR |
255 | .name = "w83781d", |
256 | }, | |
1da177e4 LT |
257 | .attach_adapter = w83781d_attach_adapter, |
258 | .detach_client = w83781d_detach_client, | |
259 | }; | |
260 | ||
261 | /* following are the sysfs callback functions */ | |
262 | #define show_in_reg(reg) \ | |
34875337 JD |
263 | static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ |
264 | char *buf) \ | |
1da177e4 | 265 | { \ |
34875337 | 266 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
1da177e4 | 267 | struct w83781d_data *data = w83781d_update_device(dev); \ |
34875337 JD |
268 | return sprintf(buf, "%ld\n", \ |
269 | (long)IN_FROM_REG(data->reg[attr->index])); \ | |
1da177e4 LT |
270 | } |
271 | show_in_reg(in); | |
272 | show_in_reg(in_min); | |
273 | show_in_reg(in_max); | |
274 | ||
275 | #define store_in_reg(REG, reg) \ | |
34875337 JD |
276 | static ssize_t store_in_##reg (struct device *dev, struct device_attribute \ |
277 | *da, const char *buf, size_t count) \ | |
1da177e4 | 278 | { \ |
34875337 | 279 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
7666c13c | 280 | struct w83781d_data *data = dev_get_drvdata(dev); \ |
34875337 | 281 | int nr = attr->index; \ |
1da177e4 LT |
282 | u32 val; \ |
283 | \ | |
474d00a8 | 284 | val = simple_strtoul(buf, NULL, 10); \ |
1da177e4 | 285 | \ |
9a61bf63 | 286 | mutex_lock(&data->update_lock); \ |
1da177e4 | 287 | data->in_##reg[nr] = IN_TO_REG(val); \ |
31b8dc4d | 288 | w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ |
1da177e4 | 289 | \ |
9a61bf63 | 290 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
291 | return count; \ |
292 | } | |
293 | store_in_reg(MIN, min); | |
294 | store_in_reg(MAX, max); | |
295 | ||
1da177e4 | 296 | #define sysfs_in_offsets(offset) \ |
34875337 JD |
297 | static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ |
298 | show_in, NULL, offset); \ | |
299 | static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \ | |
300 | show_in_min, store_in_min, offset); \ | |
301 | static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \ | |
302 | show_in_max, store_in_max, offset) | |
1da177e4 LT |
303 | |
304 | sysfs_in_offsets(0); | |
305 | sysfs_in_offsets(1); | |
306 | sysfs_in_offsets(2); | |
307 | sysfs_in_offsets(3); | |
308 | sysfs_in_offsets(4); | |
309 | sysfs_in_offsets(5); | |
310 | sysfs_in_offsets(6); | |
311 | sysfs_in_offsets(7); | |
312 | sysfs_in_offsets(8); | |
313 | ||
1da177e4 | 314 | #define show_fan_reg(reg) \ |
34875337 JD |
315 | static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ |
316 | char *buf) \ | |
1da177e4 | 317 | { \ |
34875337 | 318 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
1da177e4 LT |
319 | struct w83781d_data *data = w83781d_update_device(dev); \ |
320 | return sprintf(buf,"%ld\n", \ | |
34875337 JD |
321 | FAN_FROM_REG(data->reg[attr->index], \ |
322 | DIV_FROM_REG(data->fan_div[attr->index]))); \ | |
1da177e4 LT |
323 | } |
324 | show_fan_reg(fan); | |
325 | show_fan_reg(fan_min); | |
326 | ||
327 | static ssize_t | |
34875337 JD |
328 | store_fan_min(struct device *dev, struct device_attribute *da, |
329 | const char *buf, size_t count) | |
1da177e4 | 330 | { |
34875337 | 331 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 332 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 333 | int nr = attr->index; |
1da177e4 LT |
334 | u32 val; |
335 | ||
336 | val = simple_strtoul(buf, NULL, 10); | |
337 | ||
9a61bf63 | 338 | mutex_lock(&data->update_lock); |
34875337 JD |
339 | data->fan_min[nr] = |
340 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); | |
31b8dc4d | 341 | w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), |
34875337 | 342 | data->fan_min[nr]); |
1da177e4 | 343 | |
9a61bf63 | 344 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
345 | return count; |
346 | } | |
347 | ||
34875337 JD |
348 | static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); |
349 | static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, | |
350 | show_fan_min, store_fan_min, 0); | |
351 | static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); | |
352 | static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, | |
353 | show_fan_min, store_fan_min, 1); | |
354 | static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); | |
355 | static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, | |
356 | show_fan_min, store_fan_min, 2); | |
1da177e4 | 357 | |
1da177e4 | 358 | #define show_temp_reg(reg) \ |
34875337 JD |
359 | static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ |
360 | char *buf) \ | |
1da177e4 | 361 | { \ |
34875337 | 362 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
1da177e4 | 363 | struct w83781d_data *data = w83781d_update_device(dev); \ |
34875337 | 364 | int nr = attr->index; \ |
1da177e4 LT |
365 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ |
366 | return sprintf(buf,"%d\n", \ | |
367 | LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ | |
368 | } else { /* TEMP1 */ \ | |
369 | return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ | |
370 | } \ | |
371 | } | |
372 | show_temp_reg(temp); | |
373 | show_temp_reg(temp_max); | |
374 | show_temp_reg(temp_max_hyst); | |
375 | ||
376 | #define store_temp_reg(REG, reg) \ | |
34875337 JD |
377 | static ssize_t store_temp_##reg (struct device *dev, \ |
378 | struct device_attribute *da, const char *buf, size_t count) \ | |
1da177e4 | 379 | { \ |
34875337 | 380 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
7666c13c | 381 | struct w83781d_data *data = dev_get_drvdata(dev); \ |
34875337 | 382 | int nr = attr->index; \ |
5bfedac0 | 383 | long val; \ |
1da177e4 LT |
384 | \ |
385 | val = simple_strtol(buf, NULL, 10); \ | |
386 | \ | |
9a61bf63 | 387 | mutex_lock(&data->update_lock); \ |
1da177e4 LT |
388 | \ |
389 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
390 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ | |
31b8dc4d | 391 | w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ |
1da177e4 LT |
392 | data->temp_##reg##_add[nr-2]); \ |
393 | } else { /* TEMP1 */ \ | |
394 | data->temp_##reg = TEMP_TO_REG(val); \ | |
31b8dc4d | 395 | w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ |
1da177e4 LT |
396 | data->temp_##reg); \ |
397 | } \ | |
398 | \ | |
9a61bf63 | 399 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
400 | return count; \ |
401 | } | |
402 | store_temp_reg(OVER, max); | |
403 | store_temp_reg(HYST, max_hyst); | |
404 | ||
1da177e4 | 405 | #define sysfs_temp_offsets(offset) \ |
34875337 JD |
406 | static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ |
407 | show_temp, NULL, offset); \ | |
408 | static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \ | |
409 | show_temp_max, store_temp_max, offset); \ | |
410 | static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \ | |
411 | show_temp_max_hyst, store_temp_max_hyst, offset); | |
1da177e4 LT |
412 | |
413 | sysfs_temp_offsets(1); | |
414 | sysfs_temp_offsets(2); | |
415 | sysfs_temp_offsets(3); | |
416 | ||
1da177e4 | 417 | static ssize_t |
e404e274 | 418 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
419 | { |
420 | struct w83781d_data *data = w83781d_update_device(dev); | |
421 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
422 | } | |
423 | ||
311ce2ef JC |
424 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); |
425 | ||
1da177e4 | 426 | static ssize_t |
e404e274 | 427 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 | 428 | { |
90d6619a | 429 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
430 | return sprintf(buf, "%ld\n", (long) data->vrm); |
431 | } | |
432 | ||
433 | static ssize_t | |
e404e274 | 434 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 | 435 | { |
7666c13c | 436 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
437 | u32 val; |
438 | ||
439 | val = simple_strtoul(buf, NULL, 10); | |
440 | data->vrm = val; | |
441 | ||
442 | return count; | |
443 | } | |
444 | ||
311ce2ef JC |
445 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); |
446 | ||
1da177e4 | 447 | static ssize_t |
e404e274 | 448 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
449 | { |
450 | struct w83781d_data *data = w83781d_update_device(dev); | |
68188ba7 | 451 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 LT |
452 | } |
453 | ||
311ce2ef JC |
454 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); |
455 | ||
7d4a1374 JD |
456 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, |
457 | char *buf) | |
458 | { | |
459 | struct w83781d_data *data = w83781d_update_device(dev); | |
460 | int bitnr = to_sensor_dev_attr(attr)->index; | |
461 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
462 | } | |
463 | ||
464 | /* The W83781D has a single alarm bit for temp2 and temp3 */ | |
465 | static ssize_t show_temp3_alarm(struct device *dev, | |
466 | struct device_attribute *attr, char *buf) | |
467 | { | |
468 | struct w83781d_data *data = w83781d_update_device(dev); | |
469 | int bitnr = (data->type == w83781d) ? 5 : 13; | |
470 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
471 | } | |
472 | ||
473 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); | |
474 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
475 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
476 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
477 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); | |
478 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); | |
479 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); | |
480 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); | |
481 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); | |
482 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); | |
483 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); | |
484 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
485 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); | |
486 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); | |
487 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0); | |
488 | ||
e404e274 | 489 | static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
490 | { |
491 | struct w83781d_data *data = w83781d_update_device(dev); | |
492 | return sprintf(buf, "%ld\n", | |
493 | (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); | |
494 | } | |
1da177e4 | 495 | |
1da177e4 | 496 | static ssize_t |
34875337 JD |
497 | store_beep_mask(struct device *dev, struct device_attribute *attr, |
498 | const char *buf, size_t count) | |
1da177e4 | 499 | { |
7666c13c | 500 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 501 | u32 val; |
1da177e4 LT |
502 | |
503 | val = simple_strtoul(buf, NULL, 10); | |
504 | ||
9a61bf63 | 505 | mutex_lock(&data->update_lock); |
2fbbbf14 JD |
506 | data->beep_mask &= 0x8000; /* preserve beep enable */ |
507 | data->beep_mask |= BEEP_MASK_TO_REG(val, data->type); | |
34875337 JD |
508 | w83781d_write_value(data, W83781D_REG_BEEP_INTS1, |
509 | data->beep_mask & 0xff); | |
510 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, | |
2fbbbf14 | 511 | (data->beep_mask >> 8) & 0xff); |
34875337 JD |
512 | if (data->type != w83781d && data->type != as99127f) { |
513 | w83781d_write_value(data, W83781D_REG_BEEP_INTS3, | |
514 | ((data->beep_mask) >> 16) & 0xff); | |
515 | } | |
516 | mutex_unlock(&data->update_lock); | |
1da177e4 | 517 | |
34875337 JD |
518 | return count; |
519 | } | |
1da177e4 | 520 | |
34875337 JD |
521 | static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR, |
522 | show_beep_mask, store_beep_mask); | |
1da177e4 | 523 | |
7d4a1374 JD |
524 | static ssize_t show_beep(struct device *dev, struct device_attribute *attr, |
525 | char *buf) | |
526 | { | |
527 | struct w83781d_data *data = w83781d_update_device(dev); | |
528 | int bitnr = to_sensor_dev_attr(attr)->index; | |
529 | return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); | |
530 | } | |
531 | ||
532 | static ssize_t | |
533 | store_beep(struct device *dev, struct device_attribute *attr, | |
534 | const char *buf, size_t count) | |
535 | { | |
536 | struct w83781d_data *data = dev_get_drvdata(dev); | |
537 | int bitnr = to_sensor_dev_attr(attr)->index; | |
538 | unsigned long bit; | |
539 | u8 reg; | |
540 | ||
541 | bit = simple_strtoul(buf, NULL, 10); | |
542 | if (bit & ~1) | |
543 | return -EINVAL; | |
544 | ||
545 | mutex_lock(&data->update_lock); | |
546 | if (bit) | |
547 | data->beep_mask |= (1 << bitnr); | |
548 | else | |
549 | data->beep_mask &= ~(1 << bitnr); | |
550 | ||
551 | if (bitnr < 8) { | |
552 | reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1); | |
553 | if (bit) | |
554 | reg |= (1 << bitnr); | |
555 | else | |
556 | reg &= ~(1 << bitnr); | |
557 | w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg); | |
558 | } else if (bitnr < 16) { | |
559 | reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); | |
560 | if (bit) | |
561 | reg |= (1 << (bitnr - 8)); | |
562 | else | |
563 | reg &= ~(1 << (bitnr - 8)); | |
564 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg); | |
565 | } else { | |
566 | reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3); | |
567 | if (bit) | |
568 | reg |= (1 << (bitnr - 16)); | |
569 | else | |
570 | reg &= ~(1 << (bitnr - 16)); | |
571 | w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg); | |
572 | } | |
573 | mutex_unlock(&data->update_lock); | |
574 | ||
575 | return count; | |
576 | } | |
577 | ||
578 | /* The W83781D has a single beep bit for temp2 and temp3 */ | |
579 | static ssize_t show_temp3_beep(struct device *dev, | |
580 | struct device_attribute *attr, char *buf) | |
581 | { | |
582 | struct w83781d_data *data = w83781d_update_device(dev); | |
583 | int bitnr = (data->type == w83781d) ? 5 : 13; | |
584 | return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); | |
585 | } | |
586 | ||
587 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
588 | show_beep, store_beep, 0); | |
589 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, | |
590 | show_beep, store_beep, 1); | |
591 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, | |
592 | show_beep, store_beep, 2); | |
593 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, | |
594 | show_beep, store_beep, 3); | |
595 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, | |
596 | show_beep, store_beep, 8); | |
597 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, | |
598 | show_beep, store_beep, 9); | |
599 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, | |
600 | show_beep, store_beep, 10); | |
601 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, | |
602 | show_beep, store_beep, 16); | |
603 | static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, | |
604 | show_beep, store_beep, 17); | |
605 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, | |
606 | show_beep, store_beep, 6); | |
607 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, | |
608 | show_beep, store_beep, 7); | |
609 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, | |
610 | show_beep, store_beep, 11); | |
611 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, | |
612 | show_beep, store_beep, 4); | |
613 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, | |
614 | show_beep, store_beep, 5); | |
615 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, | |
616 | show_temp3_beep, store_beep, 13); | |
2fbbbf14 JD |
617 | static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, |
618 | show_beep, store_beep, 15); | |
7d4a1374 | 619 | |
1da177e4 | 620 | static ssize_t |
34875337 | 621 | show_fan_div(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 | 622 | { |
34875337 | 623 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
1da177e4 LT |
624 | struct w83781d_data *data = w83781d_update_device(dev); |
625 | return sprintf(buf, "%ld\n", | |
34875337 | 626 | (long) DIV_FROM_REG(data->fan_div[attr->index])); |
1da177e4 LT |
627 | } |
628 | ||
629 | /* Note: we save and restore the fan minimum here, because its value is | |
630 | determined in part by the fan divisor. This follows the principle of | |
d6e05edc | 631 | least surprise; the user doesn't expect the fan minimum to change just |
1da177e4 LT |
632 | because the divisor changed. */ |
633 | static ssize_t | |
34875337 JD |
634 | store_fan_div(struct device *dev, struct device_attribute *da, |
635 | const char *buf, size_t count) | |
1da177e4 | 636 | { |
34875337 | 637 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 638 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 | 639 | unsigned long min; |
34875337 | 640 | int nr = attr->index; |
1da177e4 LT |
641 | u8 reg; |
642 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
643 | ||
9a61bf63 | 644 | mutex_lock(&data->update_lock); |
293c0997 | 645 | |
1da177e4 LT |
646 | /* Save fan_min */ |
647 | min = FAN_FROM_REG(data->fan_min[nr], | |
648 | DIV_FROM_REG(data->fan_div[nr])); | |
649 | ||
650 | data->fan_div[nr] = DIV_TO_REG(val, data->type); | |
651 | ||
31b8dc4d | 652 | reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) |
1da177e4 LT |
653 | & (nr==0 ? 0xcf : 0x3f)) |
654 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
31b8dc4d | 655 | w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); |
1da177e4 LT |
656 | |
657 | /* w83781d and as99127f don't have extended divisor bits */ | |
658 | if (data->type != w83781d && data->type != as99127f) { | |
31b8dc4d | 659 | reg = (w83781d_read_value(data, W83781D_REG_VBAT) |
1da177e4 LT |
660 | & ~(1 << (5 + nr))) |
661 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
31b8dc4d | 662 | w83781d_write_value(data, W83781D_REG_VBAT, reg); |
1da177e4 LT |
663 | } |
664 | ||
665 | /* Restore fan_min */ | |
666 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
34875337 | 667 | w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]); |
1da177e4 | 668 | |
9a61bf63 | 669 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
670 | return count; |
671 | } | |
672 | ||
34875337 JD |
673 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, |
674 | show_fan_div, store_fan_div, 0); | |
675 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, | |
676 | show_fan_div, store_fan_div, 1); | |
677 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, | |
678 | show_fan_div, store_fan_div, 2); | |
1da177e4 | 679 | |
1da177e4 | 680 | static ssize_t |
34875337 | 681 | show_pwm(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 | 682 | { |
34875337 | 683 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
1da177e4 | 684 | struct w83781d_data *data = w83781d_update_device(dev); |
34875337 | 685 | return sprintf(buf, "%d\n", (int)data->pwm[attr->index]); |
1da177e4 LT |
686 | } |
687 | ||
688 | static ssize_t | |
34875337 | 689 | show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 LT |
690 | { |
691 | struct w83781d_data *data = w83781d_update_device(dev); | |
34875337 | 692 | return sprintf(buf, "%d\n", (int)data->pwm2_enable); |
1da177e4 LT |
693 | } |
694 | ||
695 | static ssize_t | |
34875337 JD |
696 | store_pwm(struct device *dev, struct device_attribute *da, const char *buf, |
697 | size_t count) | |
1da177e4 | 698 | { |
34875337 | 699 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 700 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 701 | int nr = attr->index; |
1da177e4 LT |
702 | u32 val; |
703 | ||
704 | val = simple_strtoul(buf, NULL, 10); | |
705 | ||
9a61bf63 | 706 | mutex_lock(&data->update_lock); |
34875337 JD |
707 | data->pwm[nr] = SENSORS_LIMIT(val, 0, 255); |
708 | w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]); | |
9a61bf63 | 709 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
710 | return count; |
711 | } | |
712 | ||
713 | static ssize_t | |
34875337 JD |
714 | store_pwm2_enable(struct device *dev, struct device_attribute *da, |
715 | const char *buf, size_t count) | |
1da177e4 | 716 | { |
7666c13c | 717 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
718 | u32 val, reg; |
719 | ||
720 | val = simple_strtoul(buf, NULL, 10); | |
721 | ||
9a61bf63 | 722 | mutex_lock(&data->update_lock); |
1da177e4 LT |
723 | |
724 | switch (val) { | |
725 | case 0: | |
726 | case 1: | |
31b8dc4d JD |
727 | reg = w83781d_read_value(data, W83781D_REG_PWMCLK12); |
728 | w83781d_write_value(data, W83781D_REG_PWMCLK12, | |
1da177e4 LT |
729 | (reg & 0xf7) | (val << 3)); |
730 | ||
31b8dc4d JD |
731 | reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
732 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, | |
1da177e4 LT |
733 | (reg & 0xef) | (!val << 4)); |
734 | ||
34875337 | 735 | data->pwm2_enable = val; |
1da177e4 LT |
736 | break; |
737 | ||
738 | default: | |
9a61bf63 | 739 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
740 | return -EINVAL; |
741 | } | |
742 | ||
9a61bf63 | 743 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
744 | return count; |
745 | } | |
746 | ||
34875337 JD |
747 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0); |
748 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1); | |
749 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2); | |
750 | static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3); | |
751 | /* only PWM2 can be enabled/disabled */ | |
752 | static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
753 | show_pwm2_enable, store_pwm2_enable); | |
1da177e4 | 754 | |
1da177e4 | 755 | static ssize_t |
34875337 | 756 | show_sensor(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 | 757 | { |
34875337 | 758 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
1da177e4 | 759 | struct w83781d_data *data = w83781d_update_device(dev); |
34875337 | 760 | return sprintf(buf, "%d\n", (int)data->sens[attr->index]); |
1da177e4 LT |
761 | } |
762 | ||
763 | static ssize_t | |
34875337 JD |
764 | store_sensor(struct device *dev, struct device_attribute *da, |
765 | const char *buf, size_t count) | |
1da177e4 | 766 | { |
34875337 | 767 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 768 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 769 | int nr = attr->index; |
1da177e4 LT |
770 | u32 val, tmp; |
771 | ||
772 | val = simple_strtoul(buf, NULL, 10); | |
773 | ||
9a61bf63 | 774 | mutex_lock(&data->update_lock); |
1da177e4 LT |
775 | |
776 | switch (val) { | |
777 | case 1: /* PII/Celeron diode */ | |
31b8dc4d JD |
778 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
779 | w83781d_write_value(data, W83781D_REG_SCFG1, | |
34875337 | 780 | tmp | BIT_SCFG1[nr]); |
31b8dc4d JD |
781 | tmp = w83781d_read_value(data, W83781D_REG_SCFG2); |
782 | w83781d_write_value(data, W83781D_REG_SCFG2, | |
34875337 JD |
783 | tmp | BIT_SCFG2[nr]); |
784 | data->sens[nr] = val; | |
1da177e4 LT |
785 | break; |
786 | case 2: /* 3904 */ | |
31b8dc4d JD |
787 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
788 | w83781d_write_value(data, W83781D_REG_SCFG1, | |
34875337 | 789 | tmp | BIT_SCFG1[nr]); |
31b8dc4d JD |
790 | tmp = w83781d_read_value(data, W83781D_REG_SCFG2); |
791 | w83781d_write_value(data, W83781D_REG_SCFG2, | |
34875337 JD |
792 | tmp & ~BIT_SCFG2[nr]); |
793 | data->sens[nr] = val; | |
1da177e4 | 794 | break; |
b26f9330 JD |
795 | case W83781D_DEFAULT_BETA: |
796 | dev_warn(dev, "Sensor type %d is deprecated, please use 4 " | |
797 | "instead\n", W83781D_DEFAULT_BETA); | |
798 | /* fall through */ | |
799 | case 4: /* thermistor */ | |
31b8dc4d JD |
800 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
801 | w83781d_write_value(data, W83781D_REG_SCFG1, | |
34875337 JD |
802 | tmp & ~BIT_SCFG1[nr]); |
803 | data->sens[nr] = val; | |
1da177e4 LT |
804 | break; |
805 | default: | |
b26f9330 JD |
806 | dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n", |
807 | (long) val); | |
1da177e4 LT |
808 | break; |
809 | } | |
810 | ||
9a61bf63 | 811 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
812 | return count; |
813 | } | |
814 | ||
34875337 JD |
815 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, |
816 | show_sensor, store_sensor, 0); | |
817 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, | |
393cdad6 | 818 | show_sensor, store_sensor, 1); |
34875337 | 819 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, |
393cdad6 | 820 | show_sensor, store_sensor, 2); |
1da177e4 | 821 | |
1da177e4 LT |
822 | /* This function is called when: |
823 | * w83781d_driver is inserted (when this module is loaded), for each | |
824 | available adapter | |
c6566206 JD |
825 | * when a new adapter is inserted (and w83781d_driver is still present) |
826 | We block updates of the ISA device to minimize the risk of concurrent | |
827 | access to the same W83781D chip through different interfaces. */ | |
1da177e4 LT |
828 | static int |
829 | w83781d_attach_adapter(struct i2c_adapter *adapter) | |
830 | { | |
443850ce | 831 | struct w83781d_data *data = w83781d_data_if_isa(); |
c6566206 JD |
832 | int err; |
833 | ||
1da177e4 LT |
834 | if (!(adapter->class & I2C_CLASS_HWMON)) |
835 | return 0; | |
c6566206 | 836 | |
c6566206 JD |
837 | if (data) |
838 | mutex_lock(&data->update_lock); | |
839 | err = i2c_probe(adapter, &addr_data, w83781d_detect); | |
840 | if (data) | |
841 | mutex_unlock(&data->update_lock); | |
842 | return err; | |
1da177e4 LT |
843 | } |
844 | ||
845 | /* Assumes that adapter is of I2C, not ISA variety. | |
846 | * OTHERWISE DON'T CALL THIS | |
847 | */ | |
848 | static int | |
849 | w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind, | |
850 | struct i2c_client *new_client) | |
851 | { | |
852 | int i, val1 = 0, id; | |
853 | int err; | |
854 | const char *client_name = ""; | |
855 | struct w83781d_data *data = i2c_get_clientdata(new_client); | |
856 | ||
ba9c2e8d | 857 | data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); |
1da177e4 LT |
858 | if (!(data->lm75[0])) { |
859 | err = -ENOMEM; | |
860 | goto ERROR_SC_0; | |
861 | } | |
1da177e4 LT |
862 | |
863 | id = i2c_adapter_id(adapter); | |
864 | ||
865 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
866 | for (i = 2; i <= 3; i++) { | |
867 | if (force_subclients[i] < 0x48 || | |
868 | force_subclients[i] > 0x4f) { | |
869 | dev_err(&new_client->dev, "Invalid subclient " | |
870 | "address %d; must be 0x48-0x4f\n", | |
871 | force_subclients[i]); | |
872 | err = -EINVAL; | |
873 | goto ERROR_SC_1; | |
874 | } | |
875 | } | |
31b8dc4d | 876 | w83781d_write_value(data, W83781D_REG_I2C_SUBADDR, |
1da177e4 LT |
877 | (force_subclients[2] & 0x07) | |
878 | ((force_subclients[3] & 0x07) << 4)); | |
879 | data->lm75[0]->addr = force_subclients[2]; | |
880 | } else { | |
31b8dc4d | 881 | val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR); |
1da177e4 LT |
882 | data->lm75[0]->addr = 0x48 + (val1 & 0x07); |
883 | } | |
884 | ||
885 | if (kind != w83783s) { | |
ba9c2e8d | 886 | data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); |
1da177e4 LT |
887 | if (!(data->lm75[1])) { |
888 | err = -ENOMEM; | |
889 | goto ERROR_SC_1; | |
890 | } | |
1da177e4 LT |
891 | |
892 | if (force_subclients[0] == id && | |
893 | force_subclients[1] == address) { | |
894 | data->lm75[1]->addr = force_subclients[3]; | |
895 | } else { | |
896 | data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07); | |
897 | } | |
898 | if (data->lm75[0]->addr == data->lm75[1]->addr) { | |
899 | dev_err(&new_client->dev, | |
900 | "Duplicate addresses 0x%x for subclients.\n", | |
901 | data->lm75[0]->addr); | |
902 | err = -EBUSY; | |
903 | goto ERROR_SC_2; | |
904 | } | |
905 | } | |
906 | ||
907 | if (kind == w83781d) | |
908 | client_name = "w83781d subclient"; | |
909 | else if (kind == w83782d) | |
910 | client_name = "w83782d subclient"; | |
911 | else if (kind == w83783s) | |
912 | client_name = "w83783s subclient"; | |
1da177e4 LT |
913 | else if (kind == as99127f) |
914 | client_name = "as99127f subclient"; | |
915 | ||
916 | for (i = 0; i <= 1; i++) { | |
917 | /* store all data in w83781d */ | |
918 | i2c_set_clientdata(data->lm75[i], NULL); | |
919 | data->lm75[i]->adapter = adapter; | |
920 | data->lm75[i]->driver = &w83781d_driver; | |
921 | data->lm75[i]->flags = 0; | |
922 | strlcpy(data->lm75[i]->name, client_name, | |
923 | I2C_NAME_SIZE); | |
924 | if ((err = i2c_attach_client(data->lm75[i]))) { | |
925 | dev_err(&new_client->dev, "Subclient %d " | |
926 | "registration at address 0x%x " | |
927 | "failed.\n", i, data->lm75[i]->addr); | |
928 | if (i == 1) | |
929 | goto ERROR_SC_3; | |
930 | goto ERROR_SC_2; | |
931 | } | |
932 | if (kind == w83783s) | |
933 | break; | |
934 | } | |
935 | ||
936 | return 0; | |
937 | ||
938 | /* Undo inits in case of errors */ | |
939 | ERROR_SC_3: | |
940 | i2c_detach_client(data->lm75[0]); | |
941 | ERROR_SC_2: | |
6044ec88 | 942 | kfree(data->lm75[1]); |
1da177e4 | 943 | ERROR_SC_1: |
6044ec88 | 944 | kfree(data->lm75[0]); |
1da177e4 LT |
945 | ERROR_SC_0: |
946 | return err; | |
947 | } | |
948 | ||
34875337 JD |
949 | #define IN_UNIT_ATTRS(X) \ |
950 | &sensor_dev_attr_in##X##_input.dev_attr.attr, \ | |
951 | &sensor_dev_attr_in##X##_min.dev_attr.attr, \ | |
293c0997 | 952 | &sensor_dev_attr_in##X##_max.dev_attr.attr, \ |
7d4a1374 JD |
953 | &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \ |
954 | &sensor_dev_attr_in##X##_beep.dev_attr.attr | |
311ce2ef | 955 | |
34875337 JD |
956 | #define FAN_UNIT_ATTRS(X) \ |
957 | &sensor_dev_attr_fan##X##_input.dev_attr.attr, \ | |
958 | &sensor_dev_attr_fan##X##_min.dev_attr.attr, \ | |
7d4a1374 JD |
959 | &sensor_dev_attr_fan##X##_div.dev_attr.attr, \ |
960 | &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \ | |
961 | &sensor_dev_attr_fan##X##_beep.dev_attr.attr | |
311ce2ef | 962 | |
34875337 JD |
963 | #define TEMP_UNIT_ATTRS(X) \ |
964 | &sensor_dev_attr_temp##X##_input.dev_attr.attr, \ | |
965 | &sensor_dev_attr_temp##X##_max.dev_attr.attr, \ | |
7d4a1374 JD |
966 | &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \ |
967 | &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \ | |
968 | &sensor_dev_attr_temp##X##_beep.dev_attr.attr | |
311ce2ef JC |
969 | |
970 | static struct attribute* w83781d_attributes[] = { | |
971 | IN_UNIT_ATTRS(0), | |
972 | IN_UNIT_ATTRS(2), | |
973 | IN_UNIT_ATTRS(3), | |
974 | IN_UNIT_ATTRS(4), | |
975 | IN_UNIT_ATTRS(5), | |
976 | IN_UNIT_ATTRS(6), | |
977 | FAN_UNIT_ATTRS(1), | |
978 | FAN_UNIT_ATTRS(2), | |
979 | FAN_UNIT_ATTRS(3), | |
980 | TEMP_UNIT_ATTRS(1), | |
981 | TEMP_UNIT_ATTRS(2), | |
982 | &dev_attr_cpu0_vid.attr, | |
983 | &dev_attr_vrm.attr, | |
984 | &dev_attr_alarms.attr, | |
985 | &dev_attr_beep_mask.attr, | |
2fbbbf14 | 986 | &sensor_dev_attr_beep_enable.dev_attr.attr, |
311ce2ef JC |
987 | NULL |
988 | }; | |
989 | static const struct attribute_group w83781d_group = { | |
990 | .attrs = w83781d_attributes, | |
991 | }; | |
992 | ||
993 | static struct attribute *w83781d_attributes_opt[] = { | |
994 | IN_UNIT_ATTRS(1), | |
995 | IN_UNIT_ATTRS(7), | |
996 | IN_UNIT_ATTRS(8), | |
997 | TEMP_UNIT_ATTRS(3), | |
34875337 JD |
998 | &sensor_dev_attr_pwm1.dev_attr.attr, |
999 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1000 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1001 | &sensor_dev_attr_pwm4.dev_attr.attr, | |
311ce2ef | 1002 | &dev_attr_pwm2_enable.attr, |
34875337 JD |
1003 | &sensor_dev_attr_temp1_type.dev_attr.attr, |
1004 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
1005 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
311ce2ef JC |
1006 | NULL |
1007 | }; | |
1008 | static const struct attribute_group w83781d_group_opt = { | |
1009 | .attrs = w83781d_attributes_opt, | |
1010 | }; | |
1011 | ||
7666c13c | 1012 | /* No clean up is done on error, it's up to the caller */ |
1da177e4 | 1013 | static int |
7666c13c | 1014 | w83781d_create_files(struct device *dev, int kind, int is_isa) |
1da177e4 | 1015 | { |
1da177e4 | 1016 | int err; |
1da177e4 | 1017 | |
7666c13c JD |
1018 | if ((err = sysfs_create_group(&dev->kobj, &w83781d_group))) |
1019 | return err; | |
1020 | ||
1021 | if (kind != w83783s) { | |
34875337 JD |
1022 | if ((err = device_create_file(dev, |
1023 | &sensor_dev_attr_in1_input.dev_attr)) | |
1024 | || (err = device_create_file(dev, | |
1025 | &sensor_dev_attr_in1_min.dev_attr)) | |
1026 | || (err = device_create_file(dev, | |
7d4a1374 JD |
1027 | &sensor_dev_attr_in1_max.dev_attr)) |
1028 | || (err = device_create_file(dev, | |
1029 | &sensor_dev_attr_in1_alarm.dev_attr)) | |
1030 | || (err = device_create_file(dev, | |
1031 | &sensor_dev_attr_in1_beep.dev_attr))) | |
7666c13c JD |
1032 | return err; |
1033 | } | |
1034 | if (kind != as99127f && kind != w83781d && kind != w83783s) { | |
34875337 JD |
1035 | if ((err = device_create_file(dev, |
1036 | &sensor_dev_attr_in7_input.dev_attr)) | |
1037 | || (err = device_create_file(dev, | |
1038 | &sensor_dev_attr_in7_min.dev_attr)) | |
1039 | || (err = device_create_file(dev, | |
1040 | &sensor_dev_attr_in7_max.dev_attr)) | |
7d4a1374 JD |
1041 | || (err = device_create_file(dev, |
1042 | &sensor_dev_attr_in7_alarm.dev_attr)) | |
1043 | || (err = device_create_file(dev, | |
1044 | &sensor_dev_attr_in7_beep.dev_attr)) | |
34875337 JD |
1045 | || (err = device_create_file(dev, |
1046 | &sensor_dev_attr_in8_input.dev_attr)) | |
1047 | || (err = device_create_file(dev, | |
1048 | &sensor_dev_attr_in8_min.dev_attr)) | |
1049 | || (err = device_create_file(dev, | |
7d4a1374 JD |
1050 | &sensor_dev_attr_in8_max.dev_attr)) |
1051 | || (err = device_create_file(dev, | |
1052 | &sensor_dev_attr_in8_alarm.dev_attr)) | |
1053 | || (err = device_create_file(dev, | |
1054 | &sensor_dev_attr_in8_beep.dev_attr))) | |
7666c13c JD |
1055 | return err; |
1056 | } | |
1057 | if (kind != w83783s) { | |
34875337 JD |
1058 | if ((err = device_create_file(dev, |
1059 | &sensor_dev_attr_temp3_input.dev_attr)) | |
1060 | || (err = device_create_file(dev, | |
1061 | &sensor_dev_attr_temp3_max.dev_attr)) | |
7666c13c | 1062 | || (err = device_create_file(dev, |
7d4a1374 JD |
1063 | &sensor_dev_attr_temp3_max_hyst.dev_attr)) |
1064 | || (err = device_create_file(dev, | |
1065 | &sensor_dev_attr_temp3_alarm.dev_attr)) | |
1066 | || (err = device_create_file(dev, | |
1067 | &sensor_dev_attr_temp3_beep.dev_attr))) | |
7666c13c | 1068 | return err; |
7d4a1374 | 1069 | |
7768aa76 | 1070 | if (kind != w83781d) { |
7d4a1374 JD |
1071 | err = sysfs_chmod_file(&dev->kobj, |
1072 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, | |
1073 | S_IRUGO | S_IWUSR); | |
1074 | if (err) | |
1075 | return err; | |
7768aa76 | 1076 | } |
1da177e4 LT |
1077 | } |
1078 | ||
7666c13c | 1079 | if (kind != w83781d && kind != as99127f) { |
34875337 JD |
1080 | if ((err = device_create_file(dev, |
1081 | &sensor_dev_attr_pwm1.dev_attr)) | |
1082 | || (err = device_create_file(dev, | |
1083 | &sensor_dev_attr_pwm2.dev_attr)) | |
7666c13c JD |
1084 | || (err = device_create_file(dev, &dev_attr_pwm2_enable))) |
1085 | return err; | |
1da177e4 | 1086 | } |
7666c13c | 1087 | if (kind == w83782d && !is_isa) { |
34875337 JD |
1088 | if ((err = device_create_file(dev, |
1089 | &sensor_dev_attr_pwm3.dev_attr)) | |
1090 | || (err = device_create_file(dev, | |
1091 | &sensor_dev_attr_pwm4.dev_attr))) | |
7666c13c JD |
1092 | return err; |
1093 | } | |
1094 | ||
1095 | if (kind != as99127f && kind != w83781d) { | |
34875337 JD |
1096 | if ((err = device_create_file(dev, |
1097 | &sensor_dev_attr_temp1_type.dev_attr)) | |
7666c13c | 1098 | || (err = device_create_file(dev, |
34875337 | 1099 | &sensor_dev_attr_temp2_type.dev_attr))) |
7666c13c JD |
1100 | return err; |
1101 | if (kind != w83783s) { | |
1102 | if ((err = device_create_file(dev, | |
34875337 | 1103 | &sensor_dev_attr_temp3_type.dev_attr))) |
7666c13c | 1104 | return err; |
1da177e4 | 1105 | } |
7666c13c | 1106 | } |
1da177e4 | 1107 | |
7666c13c JD |
1108 | return 0; |
1109 | } | |
1da177e4 | 1110 | |
7666c13c JD |
1111 | static int |
1112 | w83781d_detect(struct i2c_adapter *adapter, int address, int kind) | |
1113 | { | |
1114 | int val1 = 0, val2; | |
1115 | struct i2c_client *client; | |
1116 | struct device *dev; | |
1117 | struct w83781d_data *data; | |
1118 | int err; | |
1119 | const char *client_name = ""; | |
1120 | enum vendor { winbond, asus } vendid; | |
1121 | ||
1122 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | |
1123 | err = -EINVAL; | |
1124 | goto ERROR1; | |
1da177e4 LT |
1125 | } |
1126 | ||
1127 | /* OK. For now, we presume we have a valid client. We now create the | |
1128 | client structure, even though we cannot fill it completely yet. | |
1129 | But it allows us to access w83781d_{read,write}_value. */ | |
1130 | ||
ba9c2e8d | 1131 | if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) { |
1da177e4 LT |
1132 | err = -ENOMEM; |
1133 | goto ERROR1; | |
1134 | } | |
1da177e4 | 1135 | |
311ce2ef JC |
1136 | client = &data->client; |
1137 | i2c_set_clientdata(client, data); | |
1138 | client->addr = address; | |
9a61bf63 | 1139 | mutex_init(&data->lock); |
311ce2ef | 1140 | client->adapter = adapter; |
7666c13c | 1141 | client->driver = &w83781d_driver; |
311ce2ef | 1142 | dev = &client->dev; |
1da177e4 LT |
1143 | |
1144 | /* Now, we do the remaining detection. */ | |
1145 | ||
1146 | /* The w8378?d may be stuck in some other bank than bank 0. This may | |
1147 | make reading other information impossible. Specify a force=... or | |
1148 | force_*=... parameter, and the Winbond will be reset to the right | |
1149 | bank. */ | |
1150 | if (kind < 0) { | |
31b8dc4d | 1151 | if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) { |
bd452e6f JD |
1152 | dev_dbg(&adapter->dev, "Detection of w83781d chip " |
1153 | "failed at step 3\n"); | |
1da177e4 LT |
1154 | err = -ENODEV; |
1155 | goto ERROR2; | |
1156 | } | |
31b8dc4d JD |
1157 | val1 = w83781d_read_value(data, W83781D_REG_BANK); |
1158 | val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN); | |
1da177e4 LT |
1159 | /* Check for Winbond or Asus ID if in bank 0 */ |
1160 | if ((!(val1 & 0x07)) && | |
1161 | (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) | |
1162 | || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) { | |
bd452e6f JD |
1163 | dev_dbg(&adapter->dev, "Detection of w83781d chip " |
1164 | "failed at step 4\n"); | |
1da177e4 LT |
1165 | err = -ENODEV; |
1166 | goto ERROR2; | |
1167 | } | |
1168 | /* If Winbond SMBus, check address at 0x48. | |
1169 | Asus doesn't support, except for as99127f rev.2 */ | |
7666c13c JD |
1170 | if ((!(val1 & 0x80) && (val2 == 0xa3)) || |
1171 | ((val1 & 0x80) && (val2 == 0x5c))) { | |
1da177e4 | 1172 | if (w83781d_read_value |
31b8dc4d | 1173 | (data, W83781D_REG_I2C_ADDR) != address) { |
bd452e6f JD |
1174 | dev_dbg(&adapter->dev, "Detection of w83781d " |
1175 | "chip failed at step 5\n"); | |
1da177e4 LT |
1176 | err = -ENODEV; |
1177 | goto ERROR2; | |
1178 | } | |
1179 | } | |
1180 | } | |
1181 | ||
1182 | /* We have either had a force parameter, or we have already detected the | |
1183 | Winbond. Put it now into bank 0 and Vendor ID High Byte */ | |
31b8dc4d JD |
1184 | w83781d_write_value(data, W83781D_REG_BANK, |
1185 | (w83781d_read_value(data, W83781D_REG_BANK) | |
311ce2ef | 1186 | & 0x78) | 0x80); |
1da177e4 LT |
1187 | |
1188 | /* Determine the chip type. */ | |
1189 | if (kind <= 0) { | |
1190 | /* get vendor ID */ | |
31b8dc4d | 1191 | val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN); |
1da177e4 LT |
1192 | if (val2 == 0x5c) |
1193 | vendid = winbond; | |
1194 | else if (val2 == 0x12) | |
1195 | vendid = asus; | |
1196 | else { | |
bd452e6f JD |
1197 | dev_dbg(&adapter->dev, "w83781d chip vendor is " |
1198 | "neither Winbond nor Asus\n"); | |
1da177e4 LT |
1199 | err = -ENODEV; |
1200 | goto ERROR2; | |
1201 | } | |
1202 | ||
31b8dc4d | 1203 | val1 = w83781d_read_value(data, W83781D_REG_WCHIPID); |
1da177e4 LT |
1204 | if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) |
1205 | kind = w83781d; | |
1206 | else if (val1 == 0x30 && vendid == winbond) | |
1207 | kind = w83782d; | |
7666c13c | 1208 | else if (val1 == 0x40 && vendid == winbond && address == 0x2d) |
1da177e4 | 1209 | kind = w83783s; |
6722fead | 1210 | else if (val1 == 0x31) |
1da177e4 | 1211 | kind = as99127f; |
1da177e4 LT |
1212 | else { |
1213 | if (kind == 0) | |
bd452e6f | 1214 | dev_warn(&adapter->dev, "Ignoring 'force' " |
1da177e4 | 1215 | "parameter for unknown chip at " |
bd452e6f | 1216 | "address 0x%02x\n", address); |
1da177e4 LT |
1217 | err = -EINVAL; |
1218 | goto ERROR2; | |
1219 | } | |
c6566206 JD |
1220 | |
1221 | if ((kind == w83781d || kind == w83782d) | |
1222 | && w83781d_alias_detect(client, val1)) { | |
1223 | dev_dbg(&adapter->dev, "Device at 0x%02x appears to " | |
1224 | "be the same as ISA device\n", address); | |
1225 | err = -ENODEV; | |
1226 | goto ERROR2; | |
1227 | } | |
1da177e4 LT |
1228 | } |
1229 | ||
1230 | if (kind == w83781d) { | |
1231 | client_name = "w83781d"; | |
1232 | } else if (kind == w83782d) { | |
1233 | client_name = "w83782d"; | |
1234 | } else if (kind == w83783s) { | |
1235 | client_name = "w83783s"; | |
1da177e4 LT |
1236 | } else if (kind == as99127f) { |
1237 | client_name = "as99127f"; | |
1da177e4 LT |
1238 | } |
1239 | ||
1240 | /* Fill in the remaining client fields and put into the global list */ | |
311ce2ef | 1241 | strlcpy(client->name, client_name, I2C_NAME_SIZE); |
1da177e4 LT |
1242 | data->type = kind; |
1243 | ||
1da177e4 | 1244 | /* Tell the I2C layer a new client has arrived */ |
311ce2ef | 1245 | if ((err = i2c_attach_client(client))) |
1da177e4 LT |
1246 | goto ERROR2; |
1247 | ||
1248 | /* attach secondary i2c lm75-like clients */ | |
7666c13c JD |
1249 | if ((err = w83781d_detect_subclients(adapter, address, |
1250 | kind, client))) | |
1251 | goto ERROR3; | |
1da177e4 LT |
1252 | |
1253 | /* Initialize the chip */ | |
7666c13c | 1254 | w83781d_init_device(dev); |
1da177e4 LT |
1255 | |
1256 | /* Register sysfs hooks */ | |
7666c13c JD |
1257 | err = w83781d_create_files(dev, kind, 0); |
1258 | if (err) | |
943b0830 | 1259 | goto ERROR4; |
943b0830 | 1260 | |
1beeffe4 TJ |
1261 | data->hwmon_dev = hwmon_device_register(dev); |
1262 | if (IS_ERR(data->hwmon_dev)) { | |
1263 | err = PTR_ERR(data->hwmon_dev); | |
311ce2ef | 1264 | goto ERROR4; |
1da177e4 LT |
1265 | } |
1266 | ||
1267 | return 0; | |
1268 | ||
943b0830 | 1269 | ERROR4: |
311ce2ef JC |
1270 | sysfs_remove_group(&dev->kobj, &w83781d_group); |
1271 | sysfs_remove_group(&dev->kobj, &w83781d_group_opt); | |
1272 | ||
943b0830 MH |
1273 | if (data->lm75[1]) { |
1274 | i2c_detach_client(data->lm75[1]); | |
1275 | kfree(data->lm75[1]); | |
1276 | } | |
1277 | if (data->lm75[0]) { | |
1278 | i2c_detach_client(data->lm75[0]); | |
1279 | kfree(data->lm75[0]); | |
1280 | } | |
1da177e4 | 1281 | ERROR3: |
311ce2ef | 1282 | i2c_detach_client(client); |
1da177e4 LT |
1283 | ERROR2: |
1284 | kfree(data); | |
1285 | ERROR1: | |
1da177e4 LT |
1286 | return err; |
1287 | } | |
1288 | ||
1289 | static int | |
1290 | w83781d_detach_client(struct i2c_client *client) | |
1291 | { | |
943b0830 | 1292 | struct w83781d_data *data = i2c_get_clientdata(client); |
1da177e4 LT |
1293 | int err; |
1294 | ||
943b0830 | 1295 | /* main client */ |
311ce2ef | 1296 | if (data) { |
1beeffe4 | 1297 | hwmon_device_unregister(data->hwmon_dev); |
311ce2ef JC |
1298 | sysfs_remove_group(&client->dev.kobj, &w83781d_group); |
1299 | sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt); | |
1300 | } | |
1da177e4 | 1301 | |
7bef5594 | 1302 | if ((err = i2c_detach_client(client))) |
1da177e4 | 1303 | return err; |
1da177e4 | 1304 | |
943b0830 MH |
1305 | /* main client */ |
1306 | if (data) | |
1307 | kfree(data); | |
1308 | ||
1309 | /* subclient */ | |
1310 | else | |
1da177e4 | 1311 | kfree(client); |
1da177e4 LT |
1312 | |
1313 | return 0; | |
1314 | } | |
1315 | ||
1da177e4 | 1316 | static int |
443850ce | 1317 | w83781d_read_value_i2c(struct w83781d_data *data, u16 reg) |
1da177e4 | 1318 | { |
31b8dc4d | 1319 | struct i2c_client *client = &data->client; |
443850ce | 1320 | int res, bank; |
1da177e4 LT |
1321 | struct i2c_client *cl; |
1322 | ||
443850ce WG |
1323 | bank = (reg >> 8) & 0x0f; |
1324 | if (bank > 2) | |
1325 | /* switch banks */ | |
1326 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1327 | bank); | |
1328 | if (bank == 0 || bank > 2) { | |
1329 | res = i2c_smbus_read_byte_data(client, reg & 0xff); | |
1da177e4 | 1330 | } else { |
443850ce WG |
1331 | /* switch to subclient */ |
1332 | cl = data->lm75[bank - 1]; | |
1333 | /* convert from ISA to LM75 I2C addresses */ | |
1334 | switch (reg & 0xff) { | |
1335 | case 0x50: /* TEMP */ | |
1336 | res = swab16(i2c_smbus_read_word_data(cl, 0)); | |
1337 | break; | |
1338 | case 0x52: /* CONFIG */ | |
1339 | res = i2c_smbus_read_byte_data(cl, 1); | |
1340 | break; | |
1341 | case 0x53: /* HYST */ | |
1342 | res = swab16(i2c_smbus_read_word_data(cl, 2)); | |
1343 | break; | |
1344 | case 0x55: /* OVER */ | |
1345 | default: | |
1346 | res = swab16(i2c_smbus_read_word_data(cl, 3)); | |
1347 | break; | |
1da177e4 | 1348 | } |
1da177e4 | 1349 | } |
443850ce WG |
1350 | if (bank > 2) |
1351 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1352 | ||
1da177e4 LT |
1353 | return res; |
1354 | } | |
1355 | ||
1356 | static int | |
443850ce | 1357 | w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value) |
1da177e4 | 1358 | { |
31b8dc4d | 1359 | struct i2c_client *client = &data->client; |
443850ce | 1360 | int bank; |
1da177e4 LT |
1361 | struct i2c_client *cl; |
1362 | ||
443850ce WG |
1363 | bank = (reg >> 8) & 0x0f; |
1364 | if (bank > 2) | |
1365 | /* switch banks */ | |
1366 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1367 | bank); | |
1368 | if (bank == 0 || bank > 2) { | |
1369 | i2c_smbus_write_byte_data(client, reg & 0xff, | |
1370 | value & 0xff); | |
1da177e4 | 1371 | } else { |
443850ce WG |
1372 | /* switch to subclient */ |
1373 | cl = data->lm75[bank - 1]; | |
1374 | /* convert from ISA to LM75 I2C addresses */ | |
1375 | switch (reg & 0xff) { | |
1376 | case 0x52: /* CONFIG */ | |
1377 | i2c_smbus_write_byte_data(cl, 1, value & 0xff); | |
1378 | break; | |
1379 | case 0x53: /* HYST */ | |
1380 | i2c_smbus_write_word_data(cl, 2, swab16(value)); | |
1381 | break; | |
1382 | case 0x55: /* OVER */ | |
1383 | i2c_smbus_write_word_data(cl, 3, swab16(value)); | |
1384 | break; | |
1da177e4 | 1385 | } |
1da177e4 | 1386 | } |
443850ce WG |
1387 | if (bank > 2) |
1388 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1389 | ||
1da177e4 LT |
1390 | return 0; |
1391 | } | |
1392 | ||
1da177e4 | 1393 | static void |
7666c13c | 1394 | w83781d_init_device(struct device *dev) |
1da177e4 | 1395 | { |
7666c13c | 1396 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
1397 | int i, p; |
1398 | int type = data->type; | |
1399 | u8 tmp; | |
1400 | ||
fabddcd4 | 1401 | if (reset && type != as99127f) { /* this resets registers we don't have |
1da177e4 | 1402 | documentation for on the as99127f */ |
fabddcd4 JD |
1403 | /* Resetting the chip has been the default for a long time, |
1404 | but it causes the BIOS initializations (fan clock dividers, | |
1405 | thermal sensor types...) to be lost, so it is now optional. | |
1406 | It might even go away if nobody reports it as being useful, | |
1407 | as I see very little reason why this would be needed at | |
1408 | all. */ | |
7666c13c | 1409 | dev_info(dev, "If reset=1 solved a problem you were " |
fabddcd4 JD |
1410 | "having, please report!\n"); |
1411 | ||
1da177e4 | 1412 | /* save these registers */ |
31b8dc4d JD |
1413 | i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
1414 | p = w83781d_read_value(data, W83781D_REG_PWMCLK12); | |
1da177e4 LT |
1415 | /* Reset all except Watchdog values and last conversion values |
1416 | This sets fan-divs to 2, among others */ | |
31b8dc4d | 1417 | w83781d_write_value(data, W83781D_REG_CONFIG, 0x80); |
1da177e4 LT |
1418 | /* Restore the registers and disable power-on abnormal beep. |
1419 | This saves FAN 1/2/3 input/output values set by BIOS. */ | |
31b8dc4d JD |
1420 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); |
1421 | w83781d_write_value(data, W83781D_REG_PWMCLK12, p); | |
1da177e4 LT |
1422 | /* Disable master beep-enable (reset turns it on). |
1423 | Individual beep_mask should be reset to off but for some reason | |
1424 | disabling this bit helps some people not get beeped */ | |
31b8dc4d | 1425 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0); |
1da177e4 LT |
1426 | } |
1427 | ||
fabddcd4 JD |
1428 | /* Disable power-on abnormal beep, as advised by the datasheet. |
1429 | Already done if reset=1. */ | |
1430 | if (init && !reset && type != as99127f) { | |
31b8dc4d JD |
1431 | i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
1432 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); | |
fabddcd4 JD |
1433 | } |
1434 | ||
303760b4 | 1435 | data->vrm = vid_which_vrm(); |
1da177e4 LT |
1436 | |
1437 | if ((type != w83781d) && (type != as99127f)) { | |
31b8dc4d | 1438 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
1da177e4 LT |
1439 | for (i = 1; i <= 3; i++) { |
1440 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
b26f9330 | 1441 | data->sens[i - 1] = 4; |
1da177e4 LT |
1442 | } else { |
1443 | if (w83781d_read_value | |
31b8dc4d | 1444 | (data, |
1da177e4 LT |
1445 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) |
1446 | data->sens[i - 1] = 1; | |
1447 | else | |
1448 | data->sens[i - 1] = 2; | |
1449 | } | |
7c7a5304 | 1450 | if (type == w83783s && i == 2) |
1da177e4 LT |
1451 | break; |
1452 | } | |
1453 | } | |
1454 | ||
1455 | if (init && type != as99127f) { | |
1456 | /* Enable temp2 */ | |
31b8dc4d | 1457 | tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG); |
1da177e4 | 1458 | if (tmp & 0x01) { |
7666c13c | 1459 | dev_warn(dev, "Enabling temp2, readings " |
1da177e4 | 1460 | "might not make sense\n"); |
31b8dc4d | 1461 | w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG, |
1da177e4 LT |
1462 | tmp & 0xfe); |
1463 | } | |
1464 | ||
1465 | /* Enable temp3 */ | |
7c7a5304 | 1466 | if (type != w83783s) { |
31b8dc4d | 1467 | tmp = w83781d_read_value(data, |
1da177e4 LT |
1468 | W83781D_REG_TEMP3_CONFIG); |
1469 | if (tmp & 0x01) { | |
7666c13c | 1470 | dev_warn(dev, "Enabling temp3, " |
1da177e4 | 1471 | "readings might not make sense\n"); |
31b8dc4d | 1472 | w83781d_write_value(data, |
1da177e4 LT |
1473 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); |
1474 | } | |
1475 | } | |
1da177e4 LT |
1476 | } |
1477 | ||
1478 | /* Start monitoring */ | |
31b8dc4d JD |
1479 | w83781d_write_value(data, W83781D_REG_CONFIG, |
1480 | (w83781d_read_value(data, | |
1da177e4 LT |
1481 | W83781D_REG_CONFIG) & 0xf7) |
1482 | | 0x01); | |
7666c13c JD |
1483 | |
1484 | /* A few vars need to be filled upon startup */ | |
34875337 JD |
1485 | for (i = 0; i < 3; i++) { |
1486 | data->fan_min[i] = w83781d_read_value(data, | |
7666c13c JD |
1487 | W83781D_REG_FAN_MIN(i)); |
1488 | } | |
7666c13c JD |
1489 | |
1490 | mutex_init(&data->update_lock); | |
1da177e4 LT |
1491 | } |
1492 | ||
1493 | static struct w83781d_data *w83781d_update_device(struct device *dev) | |
1494 | { | |
7666c13c JD |
1495 | struct w83781d_data *data = dev_get_drvdata(dev); |
1496 | struct i2c_client *client = &data->client; | |
1da177e4 LT |
1497 | int i; |
1498 | ||
9a61bf63 | 1499 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1500 | |
1501 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1502 | || !data->valid) { | |
1503 | dev_dbg(dev, "Starting device update\n"); | |
1504 | ||
1505 | for (i = 0; i <= 8; i++) { | |
7c7a5304 | 1506 | if (data->type == w83783s && i == 1) |
1da177e4 LT |
1507 | continue; /* 783S has no in1 */ |
1508 | data->in[i] = | |
31b8dc4d | 1509 | w83781d_read_value(data, W83781D_REG_IN(i)); |
1da177e4 | 1510 | data->in_min[i] = |
31b8dc4d | 1511 | w83781d_read_value(data, W83781D_REG_IN_MIN(i)); |
1da177e4 | 1512 | data->in_max[i] = |
31b8dc4d | 1513 | w83781d_read_value(data, W83781D_REG_IN_MAX(i)); |
05663368 | 1514 | if ((data->type != w83782d) && (i == 6)) |
1da177e4 LT |
1515 | break; |
1516 | } | |
34875337 JD |
1517 | for (i = 0; i < 3; i++) { |
1518 | data->fan[i] = | |
31b8dc4d | 1519 | w83781d_read_value(data, W83781D_REG_FAN(i)); |
34875337 | 1520 | data->fan_min[i] = |
31b8dc4d | 1521 | w83781d_read_value(data, W83781D_REG_FAN_MIN(i)); |
1da177e4 LT |
1522 | } |
1523 | if (data->type != w83781d && data->type != as99127f) { | |
34875337 JD |
1524 | for (i = 0; i < 4; i++) { |
1525 | data->pwm[i] = | |
31b8dc4d | 1526 | w83781d_read_value(data, |
34875337 | 1527 | W83781D_REG_PWM[i]); |
7666c13c | 1528 | if ((data->type != w83782d || !client->driver) |
34875337 | 1529 | && i == 1) |
1da177e4 LT |
1530 | break; |
1531 | } | |
1532 | /* Only PWM2 can be disabled */ | |
34875337 | 1533 | data->pwm2_enable = (w83781d_read_value(data, |
1da177e4 LT |
1534 | W83781D_REG_PWMCLK12) & 0x08) >> 3; |
1535 | } | |
1536 | ||
31b8dc4d | 1537 | data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1)); |
1da177e4 | 1538 | data->temp_max = |
31b8dc4d | 1539 | w83781d_read_value(data, W83781D_REG_TEMP_OVER(1)); |
1da177e4 | 1540 | data->temp_max_hyst = |
31b8dc4d | 1541 | w83781d_read_value(data, W83781D_REG_TEMP_HYST(1)); |
1da177e4 | 1542 | data->temp_add[0] = |
31b8dc4d | 1543 | w83781d_read_value(data, W83781D_REG_TEMP(2)); |
1da177e4 | 1544 | data->temp_max_add[0] = |
31b8dc4d | 1545 | w83781d_read_value(data, W83781D_REG_TEMP_OVER(2)); |
1da177e4 | 1546 | data->temp_max_hyst_add[0] = |
31b8dc4d | 1547 | w83781d_read_value(data, W83781D_REG_TEMP_HYST(2)); |
7c7a5304 | 1548 | if (data->type != w83783s) { |
1da177e4 | 1549 | data->temp_add[1] = |
31b8dc4d | 1550 | w83781d_read_value(data, W83781D_REG_TEMP(3)); |
1da177e4 | 1551 | data->temp_max_add[1] = |
31b8dc4d | 1552 | w83781d_read_value(data, |
1da177e4 LT |
1553 | W83781D_REG_TEMP_OVER(3)); |
1554 | data->temp_max_hyst_add[1] = | |
31b8dc4d | 1555 | w83781d_read_value(data, |
1da177e4 LT |
1556 | W83781D_REG_TEMP_HYST(3)); |
1557 | } | |
31b8dc4d | 1558 | i = w83781d_read_value(data, W83781D_REG_VID_FANDIV); |
7c7a5304 | 1559 | data->vid = i & 0x0f; |
31b8dc4d | 1560 | data->vid |= (w83781d_read_value(data, |
7c7a5304 | 1561 | W83781D_REG_CHIPID) & 0x01) << 4; |
1da177e4 LT |
1562 | data->fan_div[0] = (i >> 4) & 0x03; |
1563 | data->fan_div[1] = (i >> 6) & 0x03; | |
31b8dc4d | 1564 | data->fan_div[2] = (w83781d_read_value(data, |
7c7a5304 | 1565 | W83781D_REG_PIN) >> 6) & 0x03; |
1da177e4 | 1566 | if ((data->type != w83781d) && (data->type != as99127f)) { |
31b8dc4d | 1567 | i = w83781d_read_value(data, W83781D_REG_VBAT); |
1da177e4 LT |
1568 | data->fan_div[0] |= (i >> 3) & 0x04; |
1569 | data->fan_div[1] |= (i >> 4) & 0x04; | |
7c7a5304 | 1570 | data->fan_div[2] |= (i >> 5) & 0x04; |
1da177e4 | 1571 | } |
05663368 | 1572 | if (data->type == w83782d) { |
31b8dc4d | 1573 | data->alarms = w83781d_read_value(data, |
c7f5d7ed | 1574 | W83782D_REG_ALARM1) |
31b8dc4d | 1575 | | (w83781d_read_value(data, |
c7f5d7ed | 1576 | W83782D_REG_ALARM2) << 8) |
31b8dc4d | 1577 | | (w83781d_read_value(data, |
c7f5d7ed JD |
1578 | W83782D_REG_ALARM3) << 16); |
1579 | } else if (data->type == w83783s) { | |
31b8dc4d | 1580 | data->alarms = w83781d_read_value(data, |
c7f5d7ed | 1581 | W83782D_REG_ALARM1) |
31b8dc4d | 1582 | | (w83781d_read_value(data, |
c7f5d7ed JD |
1583 | W83782D_REG_ALARM2) << 8); |
1584 | } else { | |
1585 | /* No real-time status registers, fall back to | |
1586 | interrupt status registers */ | |
31b8dc4d | 1587 | data->alarms = w83781d_read_value(data, |
c7f5d7ed | 1588 | W83781D_REG_ALARM1) |
31b8dc4d | 1589 | | (w83781d_read_value(data, |
c7f5d7ed | 1590 | W83781D_REG_ALARM2) << 8); |
1da177e4 | 1591 | } |
31b8dc4d | 1592 | i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); |
2fbbbf14 | 1593 | data->beep_mask = (i << 8) + |
31b8dc4d | 1594 | w83781d_read_value(data, W83781D_REG_BEEP_INTS1); |
1da177e4 LT |
1595 | if ((data->type != w83781d) && (data->type != as99127f)) { |
1596 | data->beep_mask |= | |
31b8dc4d | 1597 | w83781d_read_value(data, |
1da177e4 LT |
1598 | W83781D_REG_BEEP_INTS3) << 16; |
1599 | } | |
1600 | data->last_updated = jiffies; | |
1601 | data->valid = 1; | |
1602 | } | |
1603 | ||
9a61bf63 | 1604 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1605 | |
1606 | return data; | |
1607 | } | |
1608 | ||
443850ce WG |
1609 | #ifdef CONFIG_ISA |
1610 | ||
1611 | /* ISA device, if found */ | |
1612 | static struct platform_device *pdev; | |
1613 | ||
1614 | static unsigned short isa_address = 0x290; | |
1615 | ||
1616 | /* I2C devices get this name attribute automatically, but for ISA devices | |
1617 | we must create it by ourselves. */ | |
1618 | static ssize_t | |
1619 | show_name(struct device *dev, struct device_attribute *devattr, char *buf) | |
1620 | { | |
1621 | struct w83781d_data *data = dev_get_drvdata(dev); | |
360782dd | 1622 | return sprintf(buf, "%s\n", data->name); |
443850ce WG |
1623 | } |
1624 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1625 | ||
1626 | static struct w83781d_data *w83781d_data_if_isa(void) | |
1627 | { | |
1628 | return pdev ? platform_get_drvdata(pdev) : NULL; | |
1629 | } | |
1630 | ||
1631 | /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */ | |
1632 | static int w83781d_alias_detect(struct i2c_client *client, u8 chipid) | |
1633 | { | |
1634 | struct w83781d_data *i2c, *isa; | |
1635 | int i; | |
1636 | ||
1637 | if (!pdev) /* No ISA chip */ | |
1638 | return 0; | |
1639 | ||
1640 | i2c = i2c_get_clientdata(client); | |
1641 | isa = platform_get_drvdata(pdev); | |
1642 | ||
1643 | if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr) | |
1644 | return 0; /* Address doesn't match */ | |
1645 | if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid) | |
1646 | return 0; /* Chip type doesn't match */ | |
1647 | ||
1648 | /* We compare all the limit registers, the config register and the | |
1649 | * interrupt mask registers */ | |
1650 | for (i = 0x2b; i <= 0x3d; i++) { | |
1651 | if (w83781d_read_value(isa, i) != w83781d_read_value(i2c, i)) | |
1652 | return 0; | |
1653 | } | |
1654 | if (w83781d_read_value(isa, W83781D_REG_CONFIG) != | |
1655 | w83781d_read_value(i2c, W83781D_REG_CONFIG)) | |
1656 | return 0; | |
1657 | for (i = 0x43; i <= 0x46; i++) { | |
1658 | if (w83781d_read_value(isa, i) != w83781d_read_value(i2c, i)) | |
1659 | return 0; | |
1660 | } | |
1661 | ||
1662 | return 1; | |
1663 | } | |
1664 | ||
1665 | static int | |
1666 | w83781d_read_value_isa(struct w83781d_data *data, u16 reg) | |
1667 | { | |
443850ce WG |
1668 | int word_sized, res; |
1669 | ||
1670 | word_sized = (((reg & 0xff00) == 0x100) | |
1671 | || ((reg & 0xff00) == 0x200)) | |
1672 | && (((reg & 0x00ff) == 0x50) | |
1673 | || ((reg & 0x00ff) == 0x53) | |
1674 | || ((reg & 0x00ff) == 0x55)); | |
1675 | if (reg & 0xff00) { | |
1676 | outb_p(W83781D_REG_BANK, | |
360782dd | 1677 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1678 | outb_p(reg >> 8, |
360782dd | 1679 | data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce | 1680 | } |
360782dd JD |
1681 | outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); |
1682 | res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET); | |
443850ce WG |
1683 | if (word_sized) { |
1684 | outb_p((reg & 0xff) + 1, | |
360782dd | 1685 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1686 | res = |
360782dd | 1687 | (res << 8) + inb_p(data->isa_addr + |
443850ce WG |
1688 | W83781D_DATA_REG_OFFSET); |
1689 | } | |
1690 | if (reg & 0xff00) { | |
1691 | outb_p(W83781D_REG_BANK, | |
360782dd JD |
1692 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
1693 | outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); | |
443850ce WG |
1694 | } |
1695 | return res; | |
1696 | } | |
1697 | ||
1698 | static void | |
1699 | w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value) | |
1700 | { | |
443850ce WG |
1701 | int word_sized; |
1702 | ||
1703 | word_sized = (((reg & 0xff00) == 0x100) | |
1704 | || ((reg & 0xff00) == 0x200)) | |
1705 | && (((reg & 0x00ff) == 0x53) | |
1706 | || ((reg & 0x00ff) == 0x55)); | |
1707 | if (reg & 0xff00) { | |
1708 | outb_p(W83781D_REG_BANK, | |
360782dd | 1709 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1710 | outb_p(reg >> 8, |
360782dd | 1711 | data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce | 1712 | } |
360782dd | 1713 | outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce WG |
1714 | if (word_sized) { |
1715 | outb_p(value >> 8, | |
360782dd | 1716 | data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce | 1717 | outb_p((reg & 0xff) + 1, |
360782dd | 1718 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1719 | } |
360782dd | 1720 | outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce WG |
1721 | if (reg & 0xff00) { |
1722 | outb_p(W83781D_REG_BANK, | |
360782dd JD |
1723 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
1724 | outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); | |
443850ce WG |
1725 | } |
1726 | } | |
1727 | ||
1728 | /* The SMBus locks itself, usually, but nothing may access the Winbond between | |
1729 | bank switches. ISA access must always be locked explicitly! | |
1730 | We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, | |
1731 | would slow down the W83781D access and should not be necessary. | |
1732 | There are some ugly typecasts here, but the good news is - they should | |
1733 | nowhere else be necessary! */ | |
1734 | static int | |
1735 | w83781d_read_value(struct w83781d_data *data, u16 reg) | |
1736 | { | |
1737 | struct i2c_client *client = &data->client; | |
1738 | int res; | |
1739 | ||
1740 | mutex_lock(&data->lock); | |
1741 | if (client->driver) | |
1742 | res = w83781d_read_value_i2c(data, reg); | |
1743 | else | |
1744 | res = w83781d_read_value_isa(data, reg); | |
1745 | mutex_unlock(&data->lock); | |
1746 | return res; | |
1747 | } | |
1748 | ||
1749 | static int | |
1750 | w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) | |
1751 | { | |
1752 | struct i2c_client *client = &data->client; | |
1753 | ||
1754 | mutex_lock(&data->lock); | |
1755 | if (client->driver) | |
1756 | w83781d_write_value_i2c(data, reg, value); | |
1757 | else | |
1758 | w83781d_write_value_isa(data, reg, value); | |
1759 | mutex_unlock(&data->lock); | |
1760 | return 0; | |
1761 | } | |
1762 | ||
1763 | static int __devinit | |
1764 | w83781d_isa_probe(struct platform_device *pdev) | |
1765 | { | |
1766 | int err, reg; | |
1767 | struct w83781d_data *data; | |
1768 | struct resource *res; | |
443850ce WG |
1769 | |
1770 | /* Reserve the ISA region */ | |
1771 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
1772 | if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2, | |
1773 | "w83781d")) { | |
1774 | err = -EBUSY; | |
1775 | goto exit; | |
1776 | } | |
1777 | ||
1778 | data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL); | |
1779 | if (!data) { | |
1780 | err = -ENOMEM; | |
1781 | goto exit_release_region; | |
1782 | } | |
1783 | mutex_init(&data->lock); | |
360782dd | 1784 | data->isa_addr = res->start; |
443850ce WG |
1785 | platform_set_drvdata(pdev, data); |
1786 | ||
1787 | reg = w83781d_read_value(data, W83781D_REG_WCHIPID); | |
1788 | switch (reg) { | |
1789 | case 0x30: | |
1790 | data->type = w83782d; | |
360782dd | 1791 | data->name = "w83782d"; |
443850ce WG |
1792 | break; |
1793 | default: | |
1794 | data->type = w83781d; | |
360782dd | 1795 | data->name = "w83781d"; |
443850ce | 1796 | } |
443850ce WG |
1797 | |
1798 | /* Initialize the W83781D chip */ | |
1799 | w83781d_init_device(&pdev->dev); | |
1800 | ||
1801 | /* Register sysfs hooks */ | |
1802 | err = w83781d_create_files(&pdev->dev, data->type, 1); | |
1803 | if (err) | |
1804 | goto exit_remove_files; | |
1805 | ||
1806 | err = device_create_file(&pdev->dev, &dev_attr_name); | |
1807 | if (err) | |
1808 | goto exit_remove_files; | |
1809 | ||
1810 | data->hwmon_dev = hwmon_device_register(&pdev->dev); | |
1811 | if (IS_ERR(data->hwmon_dev)) { | |
1812 | err = PTR_ERR(data->hwmon_dev); | |
1813 | goto exit_remove_files; | |
1814 | } | |
1815 | ||
1816 | return 0; | |
1817 | ||
1818 | exit_remove_files: | |
1819 | sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); | |
1820 | sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); | |
1821 | device_remove_file(&pdev->dev, &dev_attr_name); | |
1822 | kfree(data); | |
1823 | exit_release_region: | |
1824 | release_region(res->start + W83781D_ADDR_REG_OFFSET, 2); | |
1825 | exit: | |
1826 | return err; | |
1827 | } | |
1828 | ||
1829 | static int __devexit | |
1830 | w83781d_isa_remove(struct platform_device *pdev) | |
1831 | { | |
1832 | struct w83781d_data *data = platform_get_drvdata(pdev); | |
1833 | ||
1834 | hwmon_device_unregister(data->hwmon_dev); | |
1835 | sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); | |
1836 | sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); | |
1837 | device_remove_file(&pdev->dev, &dev_attr_name); | |
360782dd | 1838 | release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2); |
443850ce WG |
1839 | kfree(data); |
1840 | ||
1841 | return 0; | |
1842 | } | |
1843 | ||
1844 | static struct platform_driver w83781d_isa_driver = { | |
1845 | .driver = { | |
1846 | .owner = THIS_MODULE, | |
1847 | .name = "w83781d", | |
1848 | }, | |
1849 | .probe = w83781d_isa_probe, | |
1850 | .remove = __devexit_p(w83781d_isa_remove), | |
1851 | }; | |
1852 | ||
7666c13c JD |
1853 | /* return 1 if a supported chip is found, 0 otherwise */ |
1854 | static int __init | |
1855 | w83781d_isa_found(unsigned short address) | |
1856 | { | |
1857 | int val, save, found = 0; | |
1858 | ||
2961cb22 JD |
1859 | /* We have to request the region in two parts because some |
1860 | boards declare base+4 to base+7 as a PNP device */ | |
1861 | if (!request_region(address, 4, "w83781d")) { | |
1862 | pr_debug("w83781d: Failed to request low part of region\n"); | |
7666c13c | 1863 | return 0; |
2961cb22 JD |
1864 | } |
1865 | if (!request_region(address + 4, 4, "w83781d")) { | |
1866 | pr_debug("w83781d: Failed to request high part of region\n"); | |
1867 | release_region(address, 4); | |
1868 | return 0; | |
1869 | } | |
7666c13c JD |
1870 | |
1871 | #define REALLY_SLOW_IO | |
1872 | /* We need the timeouts for at least some W83781D-like | |
1873 | chips. But only if we read 'undefined' registers. */ | |
1874 | val = inb_p(address + 1); | |
1875 | if (inb_p(address + 2) != val | |
1876 | || inb_p(address + 3) != val | |
1877 | || inb_p(address + 7) != val) { | |
1878 | pr_debug("w83781d: Detection failed at step 1\n"); | |
1879 | goto release; | |
1880 | } | |
1881 | #undef REALLY_SLOW_IO | |
1882 | ||
1883 | /* We should be able to change the 7 LSB of the address port. The | |
1884 | MSB (busy flag) should be clear initially, set after the write. */ | |
1885 | save = inb_p(address + W83781D_ADDR_REG_OFFSET); | |
1886 | if (save & 0x80) { | |
1887 | pr_debug("w83781d: Detection failed at step 2\n"); | |
1888 | goto release; | |
1889 | } | |
1890 | val = ~save & 0x7f; | |
1891 | outb_p(val, address + W83781D_ADDR_REG_OFFSET); | |
1892 | if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) { | |
1893 | outb_p(save, address + W83781D_ADDR_REG_OFFSET); | |
1894 | pr_debug("w83781d: Detection failed at step 3\n"); | |
1895 | goto release; | |
1896 | } | |
1897 | ||
1898 | /* We found a device, now see if it could be a W83781D */ | |
1899 | outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET); | |
1900 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1901 | if (val & 0x80) { | |
1902 | pr_debug("w83781d: Detection failed at step 4\n"); | |
1903 | goto release; | |
1904 | } | |
1905 | outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); | |
1906 | save = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1907 | outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET); | |
1908 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1909 | if ((!(save & 0x80) && (val != 0xa3)) | |
1910 | || ((save & 0x80) && (val != 0x5c))) { | |
1911 | pr_debug("w83781d: Detection failed at step 5\n"); | |
1912 | goto release; | |
1913 | } | |
1914 | outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET); | |
1915 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1916 | if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */ | |
1917 | pr_debug("w83781d: Detection failed at step 6\n"); | |
1918 | goto release; | |
1919 | } | |
1920 | ||
1921 | /* The busy flag should be clear again */ | |
1922 | if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) { | |
1923 | pr_debug("w83781d: Detection failed at step 7\n"); | |
1924 | goto release; | |
1925 | } | |
1926 | ||
1927 | /* Determine the chip type */ | |
1928 | outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); | |
1929 | save = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1930 | outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET); | |
1931 | outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET); | |
1932 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1933 | if ((val & 0xfe) == 0x10 /* W83781D */ | |
05663368 | 1934 | || val == 0x30) /* W83782D */ |
7666c13c JD |
1935 | found = 1; |
1936 | ||
1937 | if (found) | |
1938 | pr_info("w83781d: Found a %s chip at %#x\n", | |
7666c13c JD |
1939 | val == 0x30 ? "W83782D" : "W83781D", (int)address); |
1940 | ||
1941 | release: | |
2961cb22 JD |
1942 | release_region(address + 4, 4); |
1943 | release_region(address, 4); | |
7666c13c JD |
1944 | return found; |
1945 | } | |
1946 | ||
1947 | static int __init | |
1948 | w83781d_isa_device_add(unsigned short address) | |
1949 | { | |
1950 | struct resource res = { | |
1951 | .start = address, | |
15bde2f1 | 1952 | .end = address + W83781D_EXTENT - 1, |
7666c13c JD |
1953 | .name = "w83781d", |
1954 | .flags = IORESOURCE_IO, | |
1955 | }; | |
1956 | int err; | |
1957 | ||
1958 | pdev = platform_device_alloc("w83781d", address); | |
1959 | if (!pdev) { | |
1960 | err = -ENOMEM; | |
1961 | printk(KERN_ERR "w83781d: Device allocation failed\n"); | |
1962 | goto exit; | |
1963 | } | |
1964 | ||
1965 | err = platform_device_add_resources(pdev, &res, 1); | |
1966 | if (err) { | |
1967 | printk(KERN_ERR "w83781d: Device resource addition failed " | |
1968 | "(%d)\n", err); | |
1969 | goto exit_device_put; | |
1970 | } | |
1971 | ||
1972 | err = platform_device_add(pdev); | |
1973 | if (err) { | |
1974 | printk(KERN_ERR "w83781d: Device addition failed (%d)\n", | |
1975 | err); | |
1976 | goto exit_device_put; | |
1977 | } | |
1978 | ||
1979 | return 0; | |
1980 | ||
1981 | exit_device_put: | |
1982 | platform_device_put(pdev); | |
1983 | exit: | |
1984 | pdev = NULL; | |
1985 | return err; | |
1986 | } | |
1987 | ||
1da177e4 | 1988 | static int __init |
443850ce | 1989 | w83781d_isa_register(void) |
1da177e4 | 1990 | { |
fde09509 JD |
1991 | int res; |
1992 | ||
7666c13c JD |
1993 | if (w83781d_isa_found(isa_address)) { |
1994 | res = platform_driver_register(&w83781d_isa_driver); | |
1995 | if (res) | |
c6566206 | 1996 | goto exit; |
fde09509 | 1997 | |
7666c13c JD |
1998 | /* Sets global pdev as a side effect */ |
1999 | res = w83781d_isa_device_add(isa_address); | |
2000 | if (res) | |
2001 | goto exit_unreg_isa_driver; | |
2002 | } | |
fde09509 JD |
2003 | |
2004 | return 0; | |
7666c13c | 2005 | |
443850ce | 2006 | exit_unreg_isa_driver: |
7666c13c | 2007 | platform_driver_unregister(&w83781d_isa_driver); |
443850ce | 2008 | exit: |
7666c13c | 2009 | return res; |
1da177e4 LT |
2010 | } |
2011 | ||
2012 | static void __exit | |
443850ce | 2013 | w83781d_isa_unregister(void) |
1da177e4 | 2014 | { |
7666c13c JD |
2015 | if (pdev) { |
2016 | platform_device_unregister(pdev); | |
2017 | platform_driver_unregister(&w83781d_isa_driver); | |
2018 | } | |
443850ce WG |
2019 | } |
2020 | #else /* !CONFIG_ISA */ | |
2021 | ||
2022 | static struct w83781d_data *w83781d_data_if_isa(void) | |
2023 | { | |
2024 | return NULL; | |
2025 | } | |
2026 | ||
2027 | static int | |
2028 | w83781d_alias_detect(struct i2c_client *client, u8 chipid) | |
2029 | { | |
2030 | return 0; | |
2031 | } | |
2032 | ||
2033 | static int | |
2034 | w83781d_read_value(struct w83781d_data *data, u16 reg) | |
2035 | { | |
2036 | int res; | |
2037 | ||
2038 | mutex_lock(&data->lock); | |
2039 | res = w83781d_read_value_i2c(data, reg); | |
2040 | mutex_unlock(&data->lock); | |
2041 | ||
2042 | return res; | |
2043 | } | |
2044 | ||
2045 | static int | |
2046 | w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) | |
2047 | { | |
2048 | mutex_lock(&data->lock); | |
2049 | w83781d_write_value_i2c(data, reg, value); | |
2050 | mutex_unlock(&data->lock); | |
2051 | ||
2052 | return 0; | |
2053 | } | |
2054 | ||
2055 | static int __init | |
2056 | w83781d_isa_register(void) | |
2057 | { | |
2058 | return 0; | |
2059 | } | |
2060 | ||
2061 | static void __exit | |
2062 | w83781d_isa_unregister(void) | |
2063 | { | |
2064 | } | |
2065 | #endif /* CONFIG_ISA */ | |
2066 | ||
2067 | static int __init | |
2068 | sensors_w83781d_init(void) | |
2069 | { | |
2070 | int res; | |
2071 | ||
2072 | /* We register the ISA device first, so that we can skip the | |
2073 | * registration of an I2C interface to the same device. */ | |
2074 | res = w83781d_isa_register(); | |
2075 | if (res) | |
2076 | goto exit; | |
2077 | ||
2078 | res = i2c_add_driver(&w83781d_driver); | |
2079 | if (res) | |
2080 | goto exit_unreg_isa; | |
2081 | ||
2082 | return 0; | |
2083 | ||
2084 | exit_unreg_isa: | |
2085 | w83781d_isa_unregister(); | |
2086 | exit: | |
2087 | return res; | |
2088 | } | |
2089 | ||
2090 | static void __exit | |
2091 | sensors_w83781d_exit(void) | |
2092 | { | |
2093 | w83781d_isa_unregister(); | |
1da177e4 LT |
2094 | i2c_del_driver(&w83781d_driver); |
2095 | } | |
2096 | ||
2097 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
2098 | "Philip Edelbrock <phil@netroedge.com>, " | |
2099 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
2100 | MODULE_DESCRIPTION("W83781D driver"); | |
2101 | MODULE_LICENSE("GPL"); | |
2102 | ||
2103 | module_init(sensors_w83781d_init); | |
2104 | module_exit(sensors_w83781d_exit); |