projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
hwmon: (smsc47b397) Fix multi-line comments
[linux-2.6-block.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT		 1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
c531eb3f 3 monitoring
1da177e4 4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
c531eb3f
GR		 5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
360782dd 7 Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org>
1da177e4
LT		 8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
1da177e4
LT		 31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
LT		 33
34*/
35
1ca28218
JP		 36#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
37
1da177e4
LT		 38#include <linux/module.h>
39#include <linux/init.h>
40#include <linux/slab.h>
41#include <linux/jiffies.h>
42#include <linux/i2c.h>
943b0830 43#include <linux/hwmon.h>
303760b4 44#include <linux/hwmon-vid.h>
34875337 45#include <linux/hwmon-sysfs.h>
311ce2ef 46#include <linux/sysfs.h>
943b0830 47#include <linux/err.h>
9a61bf63 48#include <linux/mutex.h>
443850ce
WG		 49
50#ifdef CONFIG_ISA
51#include <linux/platform_device.h>
52#include <linux/ioport.h>
6055fae8 53#include <linux/io.h>
443850ce 54#endif
1da177e4 55
443850ce 56#include "lm75.h"
7666c13c 57
1da177e4 58/* Addresses to scan */
25e9c86d
MH		 59static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
60 0x2e, 0x2f, I2C_CLIENT_END };
3aed198c 61
e5e9f44c
JD		 62enum chips { w83781d, w83782d, w83783s, as99127f };
63
64/* Insmod parameters */
3aed198c
JD		 65static unsigned short force_subclients[4];
66module_param_array(force_subclients, short, NULL, 0);
67MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
1da177e4
LT		 68 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
69
90ab5ee9 70static bool reset;
fabddcd4
JD		 71module_param(reset, bool, 0);
72MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
73
90ab5ee9 74static bool init = 1;
1da177e4
LT		 75module_param(init, bool, 0);
76MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
78/* Constants specified below */
79
80/* Length of ISA address segment */
81#define W83781D_EXTENT 8
82
83/* Where are the ISA address/data registers relative to the base address */
84#define W83781D_ADDR_REG_OFFSET 5
85#define W83781D_DATA_REG_OFFSET 6
86
34875337
JD		 87/* The device registers */
88/* in nr from 0 to 8 */
1da177e4
LT		 89#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
90 (0x554 + (((nr) - 7) * 2)))
91#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
92 (0x555 + (((nr) - 7) * 2)))
93#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
94 (0x550 + (nr) - 7))
95
34875337
JD		 96/* fan nr from 0 to 2 */
97#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
98#define W83781D_REG_FAN(nr) (0x28 + (nr))
1da177e4
LT		 99
100#define W83781D_REG_BANK 0x4E
101#define W83781D_REG_TEMP2_CONFIG 0x152
102#define W83781D_REG_TEMP3_CONFIG 0x252
34875337 103/* temp nr from 1 to 3 */
1da177e4
LT		 104#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
105 ((nr == 2) ? (0x0150) : \
106 (0x27)))
107#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
108 ((nr == 2) ? (0x153) : \
109 (0x3A)))
110#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
111 ((nr == 2) ? (0x155) : \
112 (0x39)))
113
114#define W83781D_REG_CONFIG 0x40
c7f5d7ed
JD		 115
116/* Interrupt status (W83781D, AS99127F) */
1da177e4
LT		 117#define W83781D_REG_ALARM1 0x41
118#define W83781D_REG_ALARM2 0x42
1da177e4 119
05663368 120/* Real-time status (W83782D, W83783S) */
c7f5d7ed
JD		 121#define W83782D_REG_ALARM1 0x459
122#define W83782D_REG_ALARM2 0x45A
123#define W83782D_REG_ALARM3 0x45B
124
1da177e4
LT		 125#define W83781D_REG_BEEP_CONFIG 0x4D
126#define W83781D_REG_BEEP_INTS1 0x56
127#define W83781D_REG_BEEP_INTS2 0x57
128#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
129
130#define W83781D_REG_VID_FANDIV 0x47
131
132#define W83781D_REG_CHIPID 0x49
133#define W83781D_REG_WCHIPID 0x58
134#define W83781D_REG_CHIPMAN 0x4F
135#define W83781D_REG_PIN 0x4B
136
137/* 782D/783S only */
138#define W83781D_REG_VBAT 0x5D
139
140/* PWM 782D (1-4) and 783S (1-2) only */
34875337 141static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
1da177e4
LT		 142#define W83781D_REG_PWMCLK12 0x5C
143#define W83781D_REG_PWMCLK34 0x45C
1da177e4
LT		 144
145#define W83781D_REG_I2C_ADDR 0x48
146#define W83781D_REG_I2C_SUBADDR 0x4A
147
148/* The following are undocumented in the data sheets however we
149 received the information in an email from Winbond tech support */
150/* Sensor selection - not on 781d */
151#define W83781D_REG_SCFG1 0x5D
152static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
153
154#define W83781D_REG_SCFG2 0x59
155static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
156
157#define W83781D_DEFAULT_BETA 3435
158
474d00a8
JD		 159/* Conversions */
160#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
161#define IN_FROM_REG(val) ((val) * 16)
1da177e4
LT		 162
163static inline u8
164FAN_TO_REG(long rpm, int div)
165{
166 if (rpm == 0)
167 return 255;
168 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
169 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
170}
171
474d00a8
JD		 172static inline long
173FAN_FROM_REG(u8 val, int div)
174{
175 if (val == 0)
176 return -1;
177 if (val == 255)
178 return 0;
179 return 1350000 / (val * div);
180}
1da177e4 181
474d00a8
JD		 182#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
183#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 184
c531eb3f 185#define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
2fbbbf14 186 (~(val)) & 0x7fff : (val) & 0xff7fff)
c531eb3f 187#define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
2fbbbf14 188 (~(val)) & 0x7fff : (val) & 0xff7fff)
1da177e4 189
1da177e4
LT		 190#define DIV_FROM_REG(val) (1 << (val))
191
192static inline u8
193DIV_TO_REG(long val, enum chips type)
194{
195 int i;
196 val = SENSORS_LIMIT(val, 1,
197 ((type == w83781d
198 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 199 for (i = 0; i < 7; i++) {
1da177e4
LT		 200 if (val == 0)
201 break;
202 val >>= 1;
203 }
474d00a8 204 return i;
1da177e4
LT		 205}
206
1da177e4 207struct w83781d_data {
0217eae3 208 struct i2c_client *client;
1beeffe4 209 struct device *hwmon_dev;
9a61bf63 210 struct mutex lock;
1da177e4
LT		 211 enum chips type;
212
360782dd
JD		 213 /* For ISA device only */
214 const char *name;
215 int isa_addr;
216
9a61bf63 217 struct mutex update_lock;
1da177e4
LT		 218 char valid; /* !=0 if following fields are valid */
219 unsigned long last_updated; /* In jiffies */
220
221 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
222 /* array of 2 pointers to subclients */
223
224 u8 in[9]; /* Register value - 8 & 9 for 782D only */
225 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
226 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
227 u8 fan[3]; /* Register value */
228 u8 fan_min[3]; /* Register value */
474d00a8
JD		 229 s8 temp; /* Register value */
230 s8 temp_max; /* Register value */
231 s8 temp_max_hyst; /* Register value */
1da177e4
LT		 232 u16 temp_add[2]; /* Register value */
233 u16 temp_max_add[2]; /* Register value */
234 u16 temp_max_hyst_add[2]; /* Register value */
235 u8 fan_div[3]; /* Register encoding, shifted right */
236 u8 vid; /* Register encoding, combined */
237 u32 alarms; /* Register encoding, combined */
238 u32 beep_mask; /* Register encoding, combined */
1da177e4 239 u8 pwm[4]; /* Register value */
34875337 240 u8 pwm2_enable; /* Boolean */
1da177e4
LT		 241 u16 sens[3]; /* 782D/783S only.
242 1 = pentium diode; 2 = 3904 diode;
b26f9330 243 4 = thermistor */
1da177e4
LT		 244 u8 vrm;
245};
246
443850ce
WG		 247static struct w83781d_data *w83781d_data_if_isa(void);
248static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
249
31b8dc4d
JD		 250static int w83781d_read_value(struct w83781d_data *data, u16 reg);
251static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
1da177e4 252static struct w83781d_data *w83781d_update_device(struct device *dev);
7666c13c 253static void w83781d_init_device(struct device *dev);
1da177e4 254
1da177e4
LT		 255/* following are the sysfs callback functions */
256#define show_in_reg(reg) \
c531eb3f 257static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
34875337 258 char *buf) \
1da177e4 259{ \
34875337 260 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 261 struct w83781d_data *data = w83781d_update_device(dev); \
34875337
JD		 262 return sprintf(buf, "%ld\n", \
263 (long)IN_FROM_REG(data->reg[attr->index])); \
1da177e4
LT		 264}
265show_in_reg(in);
266show_in_reg(in_min);
267show_in_reg(in_max);
268
269#define store_in_reg(REG, reg) \
c531eb3f 270static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
34875337 271 *da, const char *buf, size_t count) \
1da177e4 272{ \
34875337 273 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 274 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 275 int nr = attr->index; \
c531eb3f
GR		 276 unsigned long val; \
277 int err = kstrtoul(buf, 10, &val); \
278 if (err) \
279 return err; \
9a61bf63 280 mutex_lock(&data->update_lock); \
1da177e4 281 data->in_##reg[nr] = IN_TO_REG(val); \
c531eb3f
GR		 282 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
283 data->in_##reg[nr]); \
284 \
9a61bf63 285 mutex_unlock(&data->update_lock); \
1da177e4
LT		 286 return count; \
287}
288store_in_reg(MIN, min);
289store_in_reg(MAX, max);
290
1da177e4 291#define sysfs_in_offsets(offset) \
34875337
JD		 292static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
293 show_in, NULL, offset); \
294static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
295 show_in_min, store_in_min, offset); \
296static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
297 show_in_max, store_in_max, offset)
1da177e4
LT		 298
299sysfs_in_offsets(0);
300sysfs_in_offsets(1);
301sysfs_in_offsets(2);
302sysfs_in_offsets(3);
303sysfs_in_offsets(4);
304sysfs_in_offsets(5);
305sysfs_in_offsets(6);
306sysfs_in_offsets(7);
307sysfs_in_offsets(8);
308
1da177e4 309#define show_fan_reg(reg) \
c531eb3f 310static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
34875337 311 char *buf) \
1da177e4 312{ \
34875337 313 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 314 struct w83781d_data *data = w83781d_update_device(dev); \
c531eb3f 315 return sprintf(buf, "%ld\n", \
34875337
JD		 316 FAN_FROM_REG(data->reg[attr->index], \
317 DIV_FROM_REG(data->fan_div[attr->index]))); \
1da177e4
LT		 318}
319show_fan_reg(fan);
320show_fan_reg(fan_min);
321
322static ssize_t
34875337
JD		 323store_fan_min(struct device *dev, struct device_attribute *da,
324 const char *buf, size_t count)
1da177e4 325{
34875337 326 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 327 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 328 int nr = attr->index;
c531eb3f
GR		 329 unsigned long val;
330 int err;
1da177e4 331
c531eb3f
GR		 332 err = kstrtoul(buf, 10, &val);
333 if (err)
334 return err;
1da177e4 335
9a61bf63 336 mutex_lock(&data->update_lock);
34875337
JD		 337 data->fan_min[nr] =
338 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
31b8dc4d 339 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
34875337 340 data->fan_min[nr]);
1da177e4 341
9a61bf63 342 mutex_unlock(&data->update_lock);
1da177e4
LT		 343 return count;
344}
345
34875337
JD		 346static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
347static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
348 show_fan_min, store_fan_min, 0);
349static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
350static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
351 show_fan_min, store_fan_min, 1);
352static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
353static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
354 show_fan_min, store_fan_min, 2);
1da177e4 355
1da177e4 356#define show_temp_reg(reg) \
c531eb3f 357static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
34875337 358 char *buf) \
1da177e4 359{ \
34875337 360 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 361 struct w83781d_data *data = w83781d_update_device(dev); \
34875337 362 int nr = attr->index; \
1da177e4 363 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
c531eb3f 364 return sprintf(buf, "%d\n", \
1da177e4
LT		 365 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
366 } else { /* TEMP1 */ \
c531eb3f 367 return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
1da177e4
LT		 368 } \
369}
370show_temp_reg(temp);
371show_temp_reg(temp_max);
372show_temp_reg(temp_max_hyst);
373
374#define store_temp_reg(REG, reg) \
c531eb3f 375static ssize_t store_temp_##reg(struct device *dev, \
34875337 376 struct device_attribute *da, const char *buf, size_t count) \
1da177e4 377{ \
34875337 378 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 379 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 380 int nr = attr->index; \
5bfedac0 381 long val; \
c531eb3f
GR		 382 int err = kstrtol(buf, 10, &val); \
383 if (err) \
384 return err; \
9a61bf63 385 mutex_lock(&data->update_lock); \
1da177e4
LT		 386 \
387 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
388 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
31b8dc4d 389 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT		 390 data->temp_##reg##_add[nr-2]); \
391 } else { /* TEMP1 */ \
392 data->temp_##reg = TEMP_TO_REG(val); \
31b8dc4d 393 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT		 394 data->temp_##reg); \
395 } \
396 \
9a61bf63 397 mutex_unlock(&data->update_lock); \
1da177e4
LT		 398 return count; \
399}
400store_temp_reg(OVER, max);
401store_temp_reg(HYST, max_hyst);
402
1da177e4 403#define sysfs_temp_offsets(offset) \
34875337
JD		 404static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
405 show_temp, NULL, offset); \
406static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
407 show_temp_max, store_temp_max, offset); \
408static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
409 show_temp_max_hyst, store_temp_max_hyst, offset);
1da177e4
LT		 410
411sysfs_temp_offsets(1);
412sysfs_temp_offsets(2);
413sysfs_temp_offsets(3);
414
1da177e4 415static ssize_t
e404e274 416show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 417{
418 struct w83781d_data *data = w83781d_update_device(dev);
419 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
420}
421
311ce2ef
JC		 422static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
423
1da177e4 424static ssize_t
e404e274 425show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 426{
90d6619a 427 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 428 return sprintf(buf, "%ld\n", (long) data->vrm);
429}
430
431static ssize_t
c531eb3f
GR		 432store_vrm_reg(struct device *dev, struct device_attribute *attr,
433 const char *buf, size_t count)
1da177e4 434{
7666c13c 435 struct w83781d_data *data = dev_get_drvdata(dev);
c531eb3f
GR		 436 unsigned long val;
437 int err;
1da177e4 438
c531eb3f
GR		 439 err = kstrtoul(buf, 10, &val);
440 if (err)
441 return err;
442 data->vrm = SENSORS_LIMIT(val, 0, 255);
1da177e4
LT		 443
444 return count;
445}
446
311ce2ef
JC		 447static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
448
1da177e4 449static ssize_t
e404e274 450show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 451{
452 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 453 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT		 454}
455
311ce2ef
JC		 456static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
457
7d4a1374
JD		 458static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
459 char *buf)
460{
461 struct w83781d_data *data = w83781d_update_device(dev);
462 int bitnr = to_sensor_dev_attr(attr)->index;
463 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
464}
465
466/* The W83781D has a single alarm bit for temp2 and temp3 */
467static ssize_t show_temp3_alarm(struct device *dev,
468 struct device_attribute *attr, char *buf)
469{
470 struct w83781d_data *data = w83781d_update_device(dev);
471 int bitnr = (data->type == w83781d) ? 5 : 13;
472 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
473}
474
475static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
476static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
477static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
478static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
479static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
480static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
481static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
482static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
483static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
484static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
485static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
486static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
487static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
488static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
489static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
490
c531eb3f
GR		 491static ssize_t show_beep_mask(struct device *dev,
492 struct device_attribute *attr, char *buf)
1da177e4
LT		 493{
494 struct w83781d_data *data = w83781d_update_device(dev);
495 return sprintf(buf, "%ld\n",
496 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
497}
1da177e4 498
1da177e4 499static ssize_t
34875337
JD		 500store_beep_mask(struct device *dev, struct device_attribute *attr,
501 const char *buf, size_t count)
1da177e4 502{
7666c13c 503 struct w83781d_data *data = dev_get_drvdata(dev);
c531eb3f
GR		 504 unsigned long val;
505 int err;
1da177e4 506
c531eb3f
GR		 507 err = kstrtoul(buf, 10, &val);
508 if (err)
509 return err;
1da177e4 510
9a61bf63 511 mutex_lock(&data->update_lock);
2fbbbf14
JD		 512 data->beep_mask &= 0x8000; /* preserve beep enable */
513 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
34875337
JD		 514 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
515 data->beep_mask & 0xff);
516 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
2fbbbf14 517 (data->beep_mask >> 8) & 0xff);
34875337
JD		 518 if (data->type != w83781d && data->type != as99127f) {
519 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
520 ((data->beep_mask) >> 16) & 0xff);
521 }
522 mutex_unlock(&data->update_lock);
1da177e4 523
34875337
JD		 524 return count;
525}
1da177e4 526
34875337
JD		 527static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
528 show_beep_mask, store_beep_mask);
1da177e4 529
7d4a1374
JD		 530static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
531 char *buf)
532{
533 struct w83781d_data *data = w83781d_update_device(dev);
534 int bitnr = to_sensor_dev_attr(attr)->index;
535 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
536}
537
538static ssize_t
539store_beep(struct device *dev, struct device_attribute *attr,
540 const char *buf, size_t count)
541{
542 struct w83781d_data *data = dev_get_drvdata(dev);
543 int bitnr = to_sensor_dev_attr(attr)->index;
7d4a1374 544 u8 reg;
c531eb3f
GR		 545 unsigned long bit;
546 int err;
547
548 err = kstrtoul(buf, 10, &bit);
549 if (err)
550 return err;
7d4a1374 551
7d4a1374
JD		 552 if (bit & ~1)
553 return -EINVAL;
554
555 mutex_lock(&data->update_lock);
556 if (bit)
557 data->beep_mask |= (1 << bitnr);
558 else
559 data->beep_mask &= ~(1 << bitnr);
560
561 if (bitnr < 8) {
562 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
563 if (bit)
564 reg |= (1 << bitnr);
565 else
566 reg &= ~(1 << bitnr);
567 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
568 } else if (bitnr < 16) {
569 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
570 if (bit)
571 reg |= (1 << (bitnr - 8));
572 else
573 reg &= ~(1 << (bitnr - 8));
574 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
575 } else {
576 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
577 if (bit)
578 reg |= (1 << (bitnr - 16));
579 else
580 reg &= ~(1 << (bitnr - 16));
581 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
582 }
583 mutex_unlock(&data->update_lock);
584
585 return count;
586}
587
588/* The W83781D has a single beep bit for temp2 and temp3 */
589static ssize_t show_temp3_beep(struct device *dev,
590 struct device_attribute *attr, char *buf)
591{
592 struct w83781d_data *data = w83781d_update_device(dev);
593 int bitnr = (data->type == w83781d) ? 5 : 13;
594 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
595}
596
597static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
598 show_beep, store_beep, 0);
599static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
600 show_beep, store_beep, 1);
601static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
602 show_beep, store_beep, 2);
603static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
604 show_beep, store_beep, 3);
605static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
606 show_beep, store_beep, 8);
607static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
608 show_beep, store_beep, 9);
609static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
610 show_beep, store_beep, 10);
611static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
612 show_beep, store_beep, 16);
613static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
614 show_beep, store_beep, 17);
615static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
616 show_beep, store_beep, 6);
617static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
618 show_beep, store_beep, 7);
619static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
620 show_beep, store_beep, 11);
621static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
622 show_beep, store_beep, 4);
623static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
624 show_beep, store_beep, 5);
625static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
626 show_temp3_beep, store_beep, 13);
2fbbbf14
JD		 627static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
628 show_beep, store_beep, 15);
7d4a1374 629
1da177e4 630static ssize_t
34875337 631show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 632{
34875337 633 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4
LT		 634 struct w83781d_data *data = w83781d_update_device(dev);
635 return sprintf(buf, "%ld\n",
34875337 636 (long) DIV_FROM_REG(data->fan_div[attr->index]));
1da177e4
LT		 637}
638
639/* Note: we save and restore the fan minimum here, because its value is
640 determined in part by the fan divisor. This follows the principle of
d6e05edc 641 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT		 642 because the divisor changed. */
643static ssize_t
34875337
JD		 644store_fan_div(struct device *dev, struct device_attribute *da,
645 const char *buf, size_t count)
1da177e4 646{
34875337 647 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 648 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4 649 unsigned long min;
34875337 650 int nr = attr->index;
1da177e4 651 u8 reg;
c531eb3f
GR		 652 unsigned long val;
653 int err;
654
655 err = kstrtoul(buf, 10, &val);
656 if (err)
657 return err;
1da177e4 658
9a61bf63 659 mutex_lock(&data->update_lock);
293c0997 660
1da177e4
LT		 661 /* Save fan_min */
662 min = FAN_FROM_REG(data->fan_min[nr],
663 DIV_FROM_REG(data->fan_div[nr]));
664
665 data->fan_div[nr] = DIV_TO_REG(val, data->type);
666
c531eb3f
GR		 667 reg = (w83781d_read_value(data, nr == 2 ?
668 W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
669 & (nr == 0 ? 0xcf : 0x3f))
670 | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
671 w83781d_write_value(data, nr == 2 ?
672 W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4
LT		 673
674 /* w83781d and as99127f don't have extended divisor bits */
675 if (data->type != w83781d && data->type != as99127f) {
31b8dc4d 676 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
1da177e4
LT		 677 & ~(1 << (5 + nr)))
678 | ((data->fan_div[nr] & 0x04) << (3 + nr));
31b8dc4d 679 w83781d_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT		 680 }
681
682 /* Restore fan_min */
683 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
34875337 684 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 685
9a61bf63 686 mutex_unlock(&data->update_lock);
1da177e4
LT		 687 return count;
688}
689
34875337
JD		 690static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
691 show_fan_div, store_fan_div, 0);
692static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
693 show_fan_div, store_fan_div, 1);
694static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
695 show_fan_div, store_fan_div, 2);
1da177e4 696
1da177e4 697static ssize_t
34875337 698show_pwm(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 699{
34875337 700 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 701 struct w83781d_data *data = w83781d_update_device(dev);
34875337 702 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
1da177e4
LT		 703}
704
705static ssize_t
34875337 706show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
1da177e4
LT		 707{
708 struct w83781d_data *data = w83781d_update_device(dev);
34875337 709 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
1da177e4
LT		 710}
711
712static ssize_t
34875337
JD		 713store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
714 size_t count)
1da177e4 715{
34875337 716 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 717 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 718 int nr = attr->index;
c531eb3f
GR		 719 unsigned long val;
720 int err;
1da177e4 721
c531eb3f
GR		 722 err = kstrtoul(buf, 10, &val);
723 if (err)
724 return err;
1da177e4 725
9a61bf63 726 mutex_lock(&data->update_lock);
34875337
JD		 727 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
728 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
9a61bf63 729 mutex_unlock(&data->update_lock);
1da177e4
LT		 730 return count;
731}
732
733static ssize_t
34875337
JD		 734store_pwm2_enable(struct device *dev, struct device_attribute *da,
735 const char *buf, size_t count)
1da177e4 736{
7666c13c 737 struct w83781d_data *data = dev_get_drvdata(dev);
c531eb3f
GR		 738 unsigned long val;
739 u32 reg;
740 int err;
1da177e4 741
c531eb3f
GR		 742 err = kstrtoul(buf, 10, &val);
743 if (err)
744 return err;
1da177e4 745
9a61bf63 746 mutex_lock(&data->update_lock);
1da177e4
LT		 747
748 switch (val) {
749 case 0:
750 case 1:
31b8dc4d
JD		 751 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
752 w83781d_write_value(data, W83781D_REG_PWMCLK12,
1da177e4
LT		 753 (reg & 0xf7) | (val << 3));
754
31b8dc4d
JD		 755 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
756 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
1da177e4
LT		 757 (reg & 0xef) | (!val << 4));
758
34875337 759 data->pwm2_enable = val;
1da177e4
LT		 760 break;
761
762 default:
9a61bf63 763 mutex_unlock(&data->update_lock);
1da177e4
LT		 764 return -EINVAL;
765 }
766
9a61bf63 767 mutex_unlock(&data->update_lock);
1da177e4
LT		 768 return count;
769}
770
34875337
JD		 771static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
772static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
773static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
774static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
775/* only PWM2 can be enabled/disabled */
776static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
777 show_pwm2_enable, store_pwm2_enable);
1da177e4 778
1da177e4 779static ssize_t
34875337 780show_sensor(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 781{
34875337 782 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 783 struct w83781d_data *data = w83781d_update_device(dev);
34875337 784 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
1da177e4
LT		 785}
786
787static ssize_t
34875337
JD		 788store_sensor(struct device *dev, struct device_attribute *da,
789 const char *buf, size_t count)
1da177e4 790{
34875337 791 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 792 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 793 int nr = attr->index;
c531eb3f
GR		 794 unsigned long val;
795 u32 tmp;
796 int err;
1da177e4 797
c531eb3f
GR		 798 err = kstrtoul(buf, 10, &val);
799 if (err)
800 return err;
1da177e4 801
9a61bf63 802 mutex_lock(&data->update_lock);
1da177e4
LT		 803
804 switch (val) {
805 case 1: /* PII/Celeron diode */
31b8dc4d
JD		 806 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
807 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 808 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD		 809 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
810 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD		 811 tmp | BIT_SCFG2[nr]);
812 data->sens[nr] = val;
1da177e4
LT		 813 break;
814 case 2: /* 3904 */
31b8dc4d
JD		 815 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
816 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 817 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD		 818 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
819 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD		 820 tmp & ~BIT_SCFG2[nr]);
821 data->sens[nr] = val;
1da177e4 822 break;
b26f9330
JD		 823 case W83781D_DEFAULT_BETA:
824 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
825 "instead\n", W83781D_DEFAULT_BETA);
826 /* fall through */
827 case 4: /* thermistor */
31b8dc4d
JD		 828 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
829 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337
JD		 830 tmp & ~BIT_SCFG1[nr]);
831 data->sens[nr] = val;
1da177e4
LT		 832 break;
833 default:
b26f9330
JD		 834 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
835 (long) val);
1da177e4
LT		 836 break;
837 }
838
9a61bf63 839 mutex_unlock(&data->update_lock);
1da177e4
LT		 840 return count;
841}
842
34875337
JD		 843static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
844 show_sensor, store_sensor, 0);
845static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
393cdad6 846 show_sensor, store_sensor, 1);
34875337 847static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
393cdad6 848 show_sensor, store_sensor, 2);
1da177e4 849
1da177e4
LT		 850/* Assumes that adapter is of I2C, not ISA variety.
851 * OTHERWISE DON'T CALL THIS
852 */
853static int
0217eae3 854w83781d_detect_subclients(struct i2c_client *new_client)
1da177e4
LT		 855{
856 int i, val1 = 0, id;
857 int err;
0217eae3
WG		 858 int address = new_client->addr;
859 unsigned short sc_addr[2];
860 struct i2c_adapter *adapter = new_client->adapter;
1da177e4 861 struct w83781d_data *data = i2c_get_clientdata(new_client);
0217eae3 862 enum chips kind = data->type;
1da177e4
LT		 863
864 id = i2c_adapter_id(adapter);
865
866 if (force_subclients[0] == id && force_subclients[1] == address) {
867 for (i = 2; i <= 3; i++) {
868 if (force_subclients[i] < 0x48 ||
869 force_subclients[i] > 0x4f) {
870 dev_err(&new_client->dev, "Invalid subclient "
871 "address %d; must be 0x48-0x4f\n",
872 force_subclients[i]);
873 err = -EINVAL;
874 goto ERROR_SC_1;
875 }
876 }
31b8dc4d 877 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
1da177e4
LT		 878 (force_subclients[2] & 0x07) |
879 ((force_subclients[3] & 0x07) << 4));
0217eae3 880 sc_addr[0] = force_subclients[2];
1da177e4 881 } else {
31b8dc4d 882 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
0217eae3 883 sc_addr[0] = 0x48 + (val1 & 0x07);
1da177e4
LT		 884 }
885
886 if (kind != w83783s) {
1da177e4
LT		 887 if (force_subclients[0] == id &&
888 force_subclients[1] == address) {
0217eae3 889 sc_addr[1] = force_subclients[3];
1da177e4 890 } else {
0217eae3 891 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
1da177e4 892 }
0217eae3 893 if (sc_addr[0] == sc_addr[1]) {
1da177e4
LT		 894 dev_err(&new_client->dev,
895 "Duplicate addresses 0x%x for subclients.\n",
0217eae3 896 sc_addr[0]);
1da177e4
LT		 897 err = -EBUSY;
898 goto ERROR_SC_2;
899 }
900 }
901
1da177e4 902 for (i = 0; i <= 1; i++) {
0217eae3
WG		 903 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
904 if (!data->lm75[i]) {
1da177e4
LT		 905 dev_err(&new_client->dev, "Subclient %d "
906 "registration at address 0x%x "
0217eae3
WG		 907 "failed.\n", i, sc_addr[i]);
908 err = -ENOMEM;
1da177e4
LT		 909 if (i == 1)
910 goto ERROR_SC_3;
911 goto ERROR_SC_2;
912 }
913 if (kind == w83783s)
914 break;
915 }
916
917 return 0;
918
919/* Undo inits in case of errors */
920ERROR_SC_3:
0217eae3 921 i2c_unregister_device(data->lm75[0]);
1da177e4 922ERROR_SC_2:
1da177e4 923ERROR_SC_1:
1da177e4
LT		 924 return err;
925}
926
34875337
JD		 927#define IN_UNIT_ATTRS(X) \
928 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
929 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
293c0997 930 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
7d4a1374
JD		 931 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
932 &sensor_dev_attr_in##X##_beep.dev_attr.attr
311ce2ef 933
34875337
JD		 934#define FAN_UNIT_ATTRS(X) \
935 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
936 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
7d4a1374
JD		 937 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
938 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
939 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
311ce2ef 940
34875337
JD		 941#define TEMP_UNIT_ATTRS(X) \
942 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
943 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
7d4a1374
JD		 944 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
945 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
946 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
311ce2ef 947
c531eb3f 948static struct attribute *w83781d_attributes[] = {
311ce2ef
JC		 949 IN_UNIT_ATTRS(0),
950 IN_UNIT_ATTRS(2),
951 IN_UNIT_ATTRS(3),
952 IN_UNIT_ATTRS(4),
953 IN_UNIT_ATTRS(5),
954 IN_UNIT_ATTRS(6),
955 FAN_UNIT_ATTRS(1),
956 FAN_UNIT_ATTRS(2),
957 FAN_UNIT_ATTRS(3),
958 TEMP_UNIT_ATTRS(1),
959 TEMP_UNIT_ATTRS(2),
960 &dev_attr_cpu0_vid.attr,
961 &dev_attr_vrm.attr,
962 &dev_attr_alarms.attr,
963 &dev_attr_beep_mask.attr,
2fbbbf14 964 &sensor_dev_attr_beep_enable.dev_attr.attr,
311ce2ef
JC		 965 NULL
966};
967static const struct attribute_group w83781d_group = {
968 .attrs = w83781d_attributes,
969};
970
971static struct attribute *w83781d_attributes_opt[] = {
972 IN_UNIT_ATTRS(1),
973 IN_UNIT_ATTRS(7),
974 IN_UNIT_ATTRS(8),
975 TEMP_UNIT_ATTRS(3),
34875337
JD		 976 &sensor_dev_attr_pwm1.dev_attr.attr,
977 &sensor_dev_attr_pwm2.dev_attr.attr,
978 &sensor_dev_attr_pwm3.dev_attr.attr,
979 &sensor_dev_attr_pwm4.dev_attr.attr,
311ce2ef 980 &dev_attr_pwm2_enable.attr,
34875337
JD		 981 &sensor_dev_attr_temp1_type.dev_attr.attr,
982 &sensor_dev_attr_temp2_type.dev_attr.attr,
983 &sensor_dev_attr_temp3_type.dev_attr.attr,
311ce2ef
JC		 984 NULL
985};
986static const struct attribute_group w83781d_group_opt = {
987 .attrs = w83781d_attributes_opt,
988};
989
7666c13c 990/* No clean up is done on error, it's up to the caller */
1da177e4 991static int
7666c13c 992w83781d_create_files(struct device *dev, int kind, int is_isa)
1da177e4 993{
1da177e4 994 int err;
1da177e4 995
c531eb3f
GR		 996 err = sysfs_create_group(&dev->kobj, &w83781d_group);
997 if (err)
7666c13c
JD		 998 return err;
999
1000 if (kind != w83783s) {
34875337
JD		 1001 if ((err = device_create_file(dev,
1002 &sensor_dev_attr_in1_input.dev_attr))
1003 || (err = device_create_file(dev,
1004 &sensor_dev_attr_in1_min.dev_attr))
1005 || (err = device_create_file(dev,
7d4a1374
JD		 1006 &sensor_dev_attr_in1_max.dev_attr))
1007 || (err = device_create_file(dev,
1008 &sensor_dev_attr_in1_alarm.dev_attr))
1009 || (err = device_create_file(dev,
1010 &sensor_dev_attr_in1_beep.dev_attr)))
7666c13c
JD		 1011 return err;
1012 }
1013 if (kind != as99127f && kind != w83781d && kind != w83783s) {
34875337
JD		 1014 if ((err = device_create_file(dev,
1015 &sensor_dev_attr_in7_input.dev_attr))
1016 || (err = device_create_file(dev,
1017 &sensor_dev_attr_in7_min.dev_attr))
1018 || (err = device_create_file(dev,
1019 &sensor_dev_attr_in7_max.dev_attr))
7d4a1374
JD		 1020 || (err = device_create_file(dev,
1021 &sensor_dev_attr_in7_alarm.dev_attr))
1022 || (err = device_create_file(dev,
1023 &sensor_dev_attr_in7_beep.dev_attr))
34875337
JD		 1024 || (err = device_create_file(dev,
1025 &sensor_dev_attr_in8_input.dev_attr))
1026 || (err = device_create_file(dev,
1027 &sensor_dev_attr_in8_min.dev_attr))
1028 || (err = device_create_file(dev,
7d4a1374
JD		 1029 &sensor_dev_attr_in8_max.dev_attr))
1030 || (err = device_create_file(dev,
1031 &sensor_dev_attr_in8_alarm.dev_attr))
1032 || (err = device_create_file(dev,
1033 &sensor_dev_attr_in8_beep.dev_attr)))
7666c13c
JD		 1034 return err;
1035 }
1036 if (kind != w83783s) {
34875337
JD		 1037 if ((err = device_create_file(dev,
1038 &sensor_dev_attr_temp3_input.dev_attr))
1039 || (err = device_create_file(dev,
1040 &sensor_dev_attr_temp3_max.dev_attr))
7666c13c 1041 || (err = device_create_file(dev,
7d4a1374
JD		 1042 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1043 || (err = device_create_file(dev,
1044 &sensor_dev_attr_temp3_alarm.dev_attr))
1045 || (err = device_create_file(dev,
1046 &sensor_dev_attr_temp3_beep.dev_attr)))
7666c13c 1047 return err;
7d4a1374 1048
7768aa76 1049 if (kind != w83781d) {
7d4a1374
JD		 1050 err = sysfs_chmod_file(&dev->kobj,
1051 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1052 S_IRUGO | S_IWUSR);
1053 if (err)
1054 return err;
7768aa76 1055 }
1da177e4
LT		 1056 }
1057
7666c13c 1058 if (kind != w83781d && kind != as99127f) {
34875337
JD		 1059 if ((err = device_create_file(dev,
1060 &sensor_dev_attr_pwm1.dev_attr))
1061 || (err = device_create_file(dev,
1062 &sensor_dev_attr_pwm2.dev_attr))
7666c13c
JD		 1063 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1064 return err;
1da177e4 1065 }
7666c13c 1066 if (kind == w83782d && !is_isa) {
34875337
JD		 1067 if ((err = device_create_file(dev,
1068 &sensor_dev_attr_pwm3.dev_attr))
1069 || (err = device_create_file(dev,
1070 &sensor_dev_attr_pwm4.dev_attr)))
7666c13c
JD		 1071 return err;
1072 }
1073
1074 if (kind != as99127f && kind != w83781d) {
34875337
JD		 1075 if ((err = device_create_file(dev,
1076 &sensor_dev_attr_temp1_type.dev_attr))
7666c13c 1077 || (err = device_create_file(dev,
34875337 1078 &sensor_dev_attr_temp2_type.dev_attr)))
7666c13c
JD		 1079 return err;
1080 if (kind != w83783s) {
c531eb3f
GR		 1081 err = device_create_file(dev,
1082 &sensor_dev_attr_temp3_type.dev_attr);
1083 if (err)
7666c13c 1084 return err;
1da177e4 1085 }
7666c13c 1086 }
1da177e4 1087
7666c13c
JD		 1088 return 0;
1089}
1da177e4 1090
0217eae3 1091/* Return 0 if detection is successful, -ENODEV otherwise */
7666c13c 1092static int
310ec792 1093w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
7666c13c 1094{
bab2bf44 1095 int val1, val2;
0217eae3
WG		 1096 struct w83781d_data *isa = w83781d_data_if_isa();
1097 struct i2c_adapter *adapter = client->adapter;
1098 int address = client->addr;
bab2bf44 1099 const char *client_name;
7666c13c
JD		 1100 enum vendor { winbond, asus } vendid;
1101
0217eae3
WG		 1102 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1103 return -ENODEV;
1da177e4 1104
0217eae3
WG		 1105 /* We block updates of the ISA device to minimize the risk of
1106 concurrent access to the same W83781D chip through different
1107 interfaces. */
1108 if (isa)
1109 mutex_lock(&isa->update_lock);
1da177e4 1110
bab2bf44
JD		 1111 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
1112 dev_dbg(&adapter->dev,
1113 "Detection of w83781d chip failed at step 3\n");
1114 goto err_nodev;
1115 }
1116
1117 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1118 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1119 /* Check for Winbond or Asus ID if in bank 0 */
1120 if (!(val1 & 0x07) &&
1121 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
c531eb3f 1122 ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
bab2bf44
JD		 1123 dev_dbg(&adapter->dev,
1124 "Detection of w83781d chip failed at step 4\n");
1125 goto err_nodev;
1126 }
1127 /* If Winbond SMBus, check address at 0x48.
1128 Asus doesn't support, except for as99127f rev.2 */
1129 if ((!(val1 & 0x80) && val2 == 0xa3) ||
c531eb3f 1130 ((val1 & 0x80) && val2 == 0x5c)) {
bab2bf44
JD		 1131 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
1132 != address) {
1133 dev_dbg(&adapter->dev,
1134 "Detection of w83781d chip failed at step 5\n");
0217eae3 1135 goto err_nodev;
1da177e4 1136 }
1da177e4
LT		 1137 }
1138
bab2bf44 1139 /* Put it now into bank 0 and Vendor ID High Byte */
0217eae3
WG		 1140 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1141 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1142 & 0x78) | 0x80);
1da177e4 1143
bab2bf44
JD		 1144 /* Get the vendor ID */
1145 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1146 if (val2 == 0x5c)
1147 vendid = winbond;
1148 else if (val2 == 0x12)
1149 vendid = asus;
1150 else {
1151 dev_dbg(&adapter->dev,
1152 "w83781d chip vendor is neither Winbond nor Asus\n");
1153 goto err_nodev;
1da177e4
LT		 1154 }
1155
bab2bf44
JD		 1156 /* Determine the chip type. */
1157 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1158 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1da177e4 1159 client_name = "w83781d";
bab2bf44 1160 else if (val1 == 0x30 && vendid == winbond)
1da177e4 1161 client_name = "w83782d";
bab2bf44 1162 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1da177e4 1163 client_name = "w83783s";
bab2bf44 1164 else if (val1 == 0x31)
1da177e4 1165 client_name = "as99127f";
bab2bf44
JD		 1166 else
1167 goto err_nodev;
1168
1169 if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
1170 dev_dbg(&adapter->dev, "Device at 0x%02x appears to "
1171 "be the same as ISA device\n", address);
1172 goto err_nodev;
1da177e4
LT		 1173 }
1174
bab2bf44
JD		 1175 if (isa)
1176 mutex_unlock(&isa->update_lock);
1177
0217eae3
WG		 1178 strlcpy(info->type, client_name, I2C_NAME_SIZE);
1179
1180 return 0;
1181
1182 err_nodev:
1183 if (isa)
1184 mutex_unlock(&isa->update_lock);
1185 return -ENODEV;
1186}
1187
1188static int
1189w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
1190{
1191 struct device *dev = &client->dev;
1192 struct w83781d_data *data;
1193 int err;
1194
1195 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1196 if (!data) {
1197 err = -ENOMEM;
1198 goto ERROR1;
1199 }
1200
1201 i2c_set_clientdata(client, data);
1202 mutex_init(&data->lock);
1203 mutex_init(&data->update_lock);
1da177e4 1204
0217eae3
WG		 1205 data->type = id->driver_data;
1206 data->client = client;
1da177e4
LT		 1207
1208 /* attach secondary i2c lm75-like clients */
0217eae3
WG		 1209 err = w83781d_detect_subclients(client);
1210 if (err)
7666c13c 1211 goto ERROR3;
1da177e4
LT		 1212
1213 /* Initialize the chip */
7666c13c 1214 w83781d_init_device(dev);
1da177e4
LT		 1215
1216 /* Register sysfs hooks */
0217eae3 1217 err = w83781d_create_files(dev, data->type, 0);
7666c13c 1218 if (err)
943b0830 1219 goto ERROR4;
943b0830 1220
1beeffe4
TJ		 1221 data->hwmon_dev = hwmon_device_register(dev);
1222 if (IS_ERR(data->hwmon_dev)) {
1223 err = PTR_ERR(data->hwmon_dev);
311ce2ef 1224 goto ERROR4;
1da177e4
LT		 1225 }
1226
1227 return 0;
1228
943b0830 1229ERROR4:
311ce2ef
JC		 1230 sysfs_remove_group(&dev->kobj, &w83781d_group);
1231 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1232
0217eae3
WG		 1233 if (data->lm75[0])
1234 i2c_unregister_device(data->lm75[0]);
1235 if (data->lm75[1])
1236 i2c_unregister_device(data->lm75[1]);
1da177e4 1237ERROR3:
1da177e4
LT		 1238 kfree(data);
1239ERROR1:
1da177e4
LT		 1240 return err;
1241}
1242
1243static int
0217eae3 1244w83781d_remove(struct i2c_client *client)
1da177e4 1245{
943b0830 1246 struct w83781d_data *data = i2c_get_clientdata(client);
0217eae3 1247 struct device *dev = &client->dev;
1da177e4 1248
0217eae3 1249 hwmon_device_unregister(data->hwmon_dev);
1da177e4 1250
0217eae3
WG		 1251 sysfs_remove_group(&dev->kobj, &w83781d_group);
1252 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1da177e4 1253
0217eae3
WG		 1254 if (data->lm75[0])
1255 i2c_unregister_device(data->lm75[0]);
1256 if (data->lm75[1])
1257 i2c_unregister_device(data->lm75[1]);
943b0830 1258
0217eae3 1259 kfree(data);
1da177e4
LT		 1260
1261 return 0;
1262}
1263
1da177e4 1264static int
443850ce 1265w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1da177e4 1266{
0217eae3 1267 struct i2c_client *client = data->client;
443850ce 1268 int res, bank;
1da177e4
LT		 1269 struct i2c_client *cl;
1270
443850ce
WG		 1271 bank = (reg >> 8) & 0x0f;
1272 if (bank > 2)
1273 /* switch banks */
1274 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1275 bank);
1276 if (bank == 0 || bank > 2) {
1277 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1da177e4 1278 } else {
443850ce
WG		 1279 /* switch to subclient */
1280 cl = data->lm75[bank - 1];
1281 /* convert from ISA to LM75 I2C addresses */
1282 switch (reg & 0xff) {
1283 case 0x50: /* TEMP */
90f4102c 1284 res = i2c_smbus_read_word_swapped(cl, 0);
443850ce
WG		 1285 break;
1286 case 0x52: /* CONFIG */
1287 res = i2c_smbus_read_byte_data(cl, 1);
1288 break;
1289 case 0x53: /* HYST */
90f4102c 1290 res = i2c_smbus_read_word_swapped(cl, 2);
443850ce
WG		 1291 break;
1292 case 0x55: /* OVER */
1293 default:
90f4102c 1294 res = i2c_smbus_read_word_swapped(cl, 3);
443850ce 1295 break;
1da177e4 1296 }
1da177e4 1297 }
443850ce
WG		 1298 if (bank > 2)
1299 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1300
1da177e4
LT		 1301 return res;
1302}
1303
1304static int
443850ce 1305w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1da177e4 1306{
0217eae3 1307 struct i2c_client *client = data->client;
443850ce 1308 int bank;
1da177e4
LT		 1309 struct i2c_client *cl;
1310
443850ce
WG		 1311 bank = (reg >> 8) & 0x0f;
1312 if (bank > 2)
1313 /* switch banks */
1314 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1315 bank);
1316 if (bank == 0 || bank > 2) {
1317 i2c_smbus_write_byte_data(client, reg & 0xff,
1318 value & 0xff);
1da177e4 1319 } else {
443850ce
WG		 1320 /* switch to subclient */
1321 cl = data->lm75[bank - 1];
1322 /* convert from ISA to LM75 I2C addresses */
1323 switch (reg & 0xff) {
1324 case 0x52: /* CONFIG */
1325 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1326 break;
1327 case 0x53: /* HYST */
90f4102c 1328 i2c_smbus_write_word_swapped(cl, 2, value);
443850ce
WG		 1329 break;
1330 case 0x55: /* OVER */
90f4102c 1331 i2c_smbus_write_word_swapped(cl, 3, value);
443850ce 1332 break;
1da177e4 1333 }
1da177e4 1334 }
443850ce
WG		 1335 if (bank > 2)
1336 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1337
1da177e4
LT		 1338 return 0;
1339}
1340
1da177e4 1341static void
7666c13c 1342w83781d_init_device(struct device *dev)
1da177e4 1343{
7666c13c 1344 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1345 int i, p;
1346 int type = data->type;
1347 u8 tmp;
1348
fabddcd4 1349 if (reset && type != as99127f) { /* this resets registers we don't have
1da177e4 1350 documentation for on the as99127f */
fabddcd4
JD		 1351 /* Resetting the chip has been the default for a long time,
1352 but it causes the BIOS initializations (fan clock dividers,
1353 thermal sensor types...) to be lost, so it is now optional.
1354 It might even go away if nobody reports it as being useful,
1355 as I see very little reason why this would be needed at
1356 all. */
7666c13c 1357 dev_info(dev, "If reset=1 solved a problem you were "
fabddcd4
JD		 1358 "having, please report!\n");
1359
1da177e4 1360 /* save these registers */
31b8dc4d
JD		 1361 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1362 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1da177e4
LT		 1363 /* Reset all except Watchdog values and last conversion values
1364 This sets fan-divs to 2, among others */
31b8dc4d 1365 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1da177e4
LT		 1366 /* Restore the registers and disable power-on abnormal beep.
1367 This saves FAN 1/2/3 input/output values set by BIOS. */
31b8dc4d
JD		 1368 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1369 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
c531eb3f
GR		 1370 /*
1371 * Disable master beep-enable (reset turns it on).
1372 * Individual beep_mask should be reset to off but for some
1373 * reason disabling this bit helps some people not get beeped
1374 */
31b8dc4d 1375 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1da177e4
LT		 1376 }
1377
fabddcd4
JD		 1378 /* Disable power-on abnormal beep, as advised by the datasheet.
1379 Already done if reset=1. */
1380 if (init && !reset && type != as99127f) {
31b8dc4d
JD		 1381 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1382 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
fabddcd4
JD		 1383 }
1384
303760b4 1385 data->vrm = vid_which_vrm();
1da177e4
LT		 1386
1387 if ((type != w83781d) && (type != as99127f)) {
31b8dc4d 1388 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT		 1389 for (i = 1; i <= 3; i++) {
1390 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1391 data->sens[i - 1] = 4;
1da177e4
LT		 1392 } else {
1393 if (w83781d_read_value
31b8dc4d 1394 (data,
1da177e4
LT		 1395 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1396 data->sens[i - 1] = 1;
1397 else
1398 data->sens[i - 1] = 2;
1399 }
7c7a5304 1400 if (type == w83783s && i == 2)
1da177e4
LT		 1401 break;
1402 }
1403 }
1404
1405 if (init && type != as99127f) {
1406 /* Enable temp2 */
31b8dc4d 1407 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1da177e4 1408 if (tmp & 0x01) {
7666c13c 1409 dev_warn(dev, "Enabling temp2, readings "
1da177e4 1410 "might not make sense\n");
31b8dc4d 1411 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1da177e4
LT		 1412 tmp & 0xfe);
1413 }
1414
1415 /* Enable temp3 */
7c7a5304 1416 if (type != w83783s) {
31b8dc4d 1417 tmp = w83781d_read_value(data,
1da177e4
LT		 1418 W83781D_REG_TEMP3_CONFIG);
1419 if (tmp & 0x01) {
7666c13c 1420 dev_warn(dev, "Enabling temp3, "
1da177e4 1421 "readings might not make sense\n");
31b8dc4d 1422 w83781d_write_value(data,
1da177e4
LT		 1423 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1424 }
1425 }
1da177e4
LT		 1426 }
1427
1428 /* Start monitoring */
31b8dc4d
JD		 1429 w83781d_write_value(data, W83781D_REG_CONFIG,
1430 (w83781d_read_value(data,
1da177e4
LT		 1431 W83781D_REG_CONFIG) & 0xf7)
1432 | 0x01);
7666c13c
JD		 1433
1434 /* A few vars need to be filled upon startup */
34875337
JD		 1435 for (i = 0; i < 3; i++) {
1436 data->fan_min[i] = w83781d_read_value(data,
7666c13c
JD		 1437 W83781D_REG_FAN_MIN(i));
1438 }
7666c13c
JD		 1439
1440 mutex_init(&data->update_lock);
1da177e4
LT		 1441}
1442
1443static struct w83781d_data *w83781d_update_device(struct device *dev)
1444{
7666c13c 1445 struct w83781d_data *data = dev_get_drvdata(dev);
0217eae3 1446 struct i2c_client *client = data->client;
1da177e4
LT		 1447 int i;
1448
9a61bf63 1449 mutex_lock(&data->update_lock);
1da177e4
LT		 1450
1451 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1452 || !data->valid) {
1453 dev_dbg(dev, "Starting device update\n");
1454
1455 for (i = 0; i <= 8; i++) {
7c7a5304 1456 if (data->type == w83783s && i == 1)
1da177e4
LT		 1457 continue; /* 783S has no in1 */
1458 data->in[i] =
31b8dc4d 1459 w83781d_read_value(data, W83781D_REG_IN(i));
1da177e4 1460 data->in_min[i] =
31b8dc4d 1461 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1da177e4 1462 data->in_max[i] =
31b8dc4d 1463 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
05663368 1464 if ((data->type != w83782d) && (i == 6))
1da177e4
LT		 1465 break;
1466 }
34875337
JD		 1467 for (i = 0; i < 3; i++) {
1468 data->fan[i] =
31b8dc4d 1469 w83781d_read_value(data, W83781D_REG_FAN(i));
34875337 1470 data->fan_min[i] =
31b8dc4d 1471 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1da177e4
LT		 1472 }
1473 if (data->type != w83781d && data->type != as99127f) {
34875337
JD		 1474 for (i = 0; i < 4; i++) {
1475 data->pwm[i] =
31b8dc4d 1476 w83781d_read_value(data,
34875337 1477 W83781D_REG_PWM[i]);
848ddf11
JD		 1478 /* Only W83782D on SMBus has PWM3 and PWM4 */
1479 if ((data->type != w83782d || !client)
34875337 1480 && i == 1)
1da177e4
LT		 1481 break;
1482 }
1483 /* Only PWM2 can be disabled */
34875337 1484 data->pwm2_enable = (w83781d_read_value(data,
c531eb3f 1485 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1da177e4
LT		 1486 }
1487
31b8dc4d 1488 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1da177e4 1489 data->temp_max =
31b8dc4d 1490 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1da177e4 1491 data->temp_max_hyst =
31b8dc4d 1492 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1da177e4 1493 data->temp_add[0] =
31b8dc4d 1494 w83781d_read_value(data, W83781D_REG_TEMP(2));
1da177e4 1495 data->temp_max_add[0] =
31b8dc4d 1496 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1da177e4 1497 data->temp_max_hyst_add[0] =
31b8dc4d 1498 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
7c7a5304 1499 if (data->type != w83783s) {
1da177e4 1500 data->temp_add[1] =
31b8dc4d 1501 w83781d_read_value(data, W83781D_REG_TEMP(3));
1da177e4 1502 data->temp_max_add[1] =
31b8dc4d 1503 w83781d_read_value(data,
1da177e4
LT		 1504 W83781D_REG_TEMP_OVER(3));
1505 data->temp_max_hyst_add[1] =
31b8dc4d 1506 w83781d_read_value(data,
1da177e4
LT		 1507 W83781D_REG_TEMP_HYST(3));
1508 }
31b8dc4d 1509 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
7c7a5304 1510 data->vid = i & 0x0f;
31b8dc4d 1511 data->vid |= (w83781d_read_value(data,
7c7a5304 1512 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT		 1513 data->fan_div[0] = (i >> 4) & 0x03;
1514 data->fan_div[1] = (i >> 6) & 0x03;
31b8dc4d 1515 data->fan_div[2] = (w83781d_read_value(data,
7c7a5304 1516 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4 1517 if ((data->type != w83781d) && (data->type != as99127f)) {
31b8dc4d 1518 i = w83781d_read_value(data, W83781D_REG_VBAT);
1da177e4
LT		 1519 data->fan_div[0] |= (i >> 3) & 0x04;
1520 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1521 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4 1522 }
05663368 1523 if (data->type == w83782d) {
31b8dc4d 1524 data->alarms = w83781d_read_value(data,
c7f5d7ed 1525 W83782D_REG_ALARM1)
31b8dc4d 1526 | (w83781d_read_value(data,
c7f5d7ed 1527 W83782D_REG_ALARM2) << 8)
31b8dc4d 1528 | (w83781d_read_value(data,
c7f5d7ed
JD		 1529 W83782D_REG_ALARM3) << 16);
1530 } else if (data->type == w83783s) {
31b8dc4d 1531 data->alarms = w83781d_read_value(data,
c7f5d7ed 1532 W83782D_REG_ALARM1)
31b8dc4d 1533 | (w83781d_read_value(data,
c7f5d7ed
JD		 1534 W83782D_REG_ALARM2) << 8);
1535 } else {
1536 /* No real-time status registers, fall back to
1537 interrupt status registers */
31b8dc4d 1538 data->alarms = w83781d_read_value(data,
c7f5d7ed 1539 W83781D_REG_ALARM1)
31b8dc4d 1540 | (w83781d_read_value(data,
c7f5d7ed 1541 W83781D_REG_ALARM2) << 8);
1da177e4 1542 }
31b8dc4d 1543 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
2fbbbf14 1544 data->beep_mask = (i << 8) +
31b8dc4d 1545 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1da177e4
LT		 1546 if ((data->type != w83781d) && (data->type != as99127f)) {
1547 data->beep_mask |=
31b8dc4d 1548 w83781d_read_value(data,
1da177e4
LT		 1549 W83781D_REG_BEEP_INTS3) << 16;
1550 }
1551 data->last_updated = jiffies;
1552 data->valid = 1;
1553 }
1554
9a61bf63 1555 mutex_unlock(&data->update_lock);
1da177e4
LT		 1556
1557 return data;
1558}
1559
0217eae3
WG		 1560static const struct i2c_device_id w83781d_ids[] = {
1561 { "w83781d", w83781d, },
1562 { "w83782d", w83782d, },
1563 { "w83783s", w83783s, },
1564 { "as99127f", as99127f },
1565 { /* LIST END */ }
1566};
1567MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1568
1569static struct i2c_driver w83781d_driver = {
1570 .class = I2C_CLASS_HWMON,
1571 .driver = {
1572 .name = "w83781d",
1573 },
1574 .probe = w83781d_probe,
1575 .remove = w83781d_remove,
1576 .id_table = w83781d_ids,
1577 .detect = w83781d_detect,
c3813d6a 1578 .address_list = normal_i2c,
0217eae3
WG		 1579};
1580
1581/*
1582 * ISA related code
1583 */
443850ce
WG		 1584#ifdef CONFIG_ISA
1585
1586/* ISA device, if found */
1587static struct platform_device *pdev;
1588
1589static unsigned short isa_address = 0x290;
1590
1591/* I2C devices get this name attribute automatically, but for ISA devices
1592 we must create it by ourselves. */
1593static ssize_t
1594show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1595{
1596 struct w83781d_data *data = dev_get_drvdata(dev);
360782dd 1597 return sprintf(buf, "%s\n", data->name);
443850ce
WG		 1598}
1599static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1600
1601static struct w83781d_data *w83781d_data_if_isa(void)
1602{
1603 return pdev ? platform_get_drvdata(pdev) : NULL;
1604}
1605
1606/* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1607static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1608{
0217eae3 1609 struct w83781d_data *isa;
443850ce
WG		 1610 int i;
1611
1612 if (!pdev) /* No ISA chip */
1613 return 0;
1614
443850ce
WG		 1615 isa = platform_get_drvdata(pdev);
1616
1617 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1618 return 0; /* Address doesn't match */
1619 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1620 return 0; /* Chip type doesn't match */
1621
1622 /* We compare all the limit registers, the config register and the
1623 * interrupt mask registers */
1624 for (i = 0x2b; i <= 0x3d; i++) {
0217eae3
WG		 1625 if (w83781d_read_value(isa, i) !=
1626 i2c_smbus_read_byte_data(client, i))
443850ce
WG		 1627 return 0;
1628 }
1629 if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
0217eae3 1630 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
443850ce
WG		 1631 return 0;
1632 for (i = 0x43; i <= 0x46; i++) {
0217eae3
WG		 1633 if (w83781d_read_value(isa, i) !=
1634 i2c_smbus_read_byte_data(client, i))
443850ce
WG		 1635 return 0;
1636 }
1637
1638 return 1;
1639}
1640
1641static int
1642w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1643{
443850ce
WG		 1644 int word_sized, res;
1645
1646 word_sized = (((reg & 0xff00) == 0x100)
1647 || ((reg & 0xff00) == 0x200))
1648 && (((reg & 0x00ff) == 0x50)
1649 || ((reg & 0x00ff) == 0x53)
1650 || ((reg & 0x00ff) == 0x55));
1651 if (reg & 0xff00) {
1652 outb_p(W83781D_REG_BANK,
360782dd 1653 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1654 outb_p(reg >> 8,
360782dd 1655 data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce 1656 }
360782dd
JD		 1657 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1658 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1659 if (word_sized) {
1660 outb_p((reg & 0xff) + 1,
360782dd 1661 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1662 res =
360782dd 1663 (res << 8) + inb_p(data->isa_addr +
443850ce
WG		 1664 W83781D_DATA_REG_OFFSET);
1665 }
1666 if (reg & 0xff00) {
1667 outb_p(W83781D_REG_BANK,
360782dd
JD		 1668 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1669 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1670 }
1671 return res;
1672}
1673
1674static void
1675w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1676{
443850ce
WG		 1677 int word_sized;
1678
1679 word_sized = (((reg & 0xff00) == 0x100)
1680 || ((reg & 0xff00) == 0x200))
1681 && (((reg & 0x00ff) == 0x53)
1682 || ((reg & 0x00ff) == 0x55));
1683 if (reg & 0xff00) {
1684 outb_p(W83781D_REG_BANK,
360782dd 1685 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1686 outb_p(reg >> 8,
360782dd 1687 data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce 1688 }
360782dd 1689 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce
WG		 1690 if (word_sized) {
1691 outb_p(value >> 8,
360782dd 1692 data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce 1693 outb_p((reg & 0xff) + 1,
360782dd 1694 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1695 }
360782dd 1696 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1697 if (reg & 0xff00) {
1698 outb_p(W83781D_REG_BANK,
360782dd
JD		 1699 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1700 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1701 }
1702}
1703
1704/* The SMBus locks itself, usually, but nothing may access the Winbond between
1705 bank switches. ISA access must always be locked explicitly!
1706 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1707 would slow down the W83781D access and should not be necessary.
1708 There are some ugly typecasts here, but the good news is - they should
1709 nowhere else be necessary! */
1710static int
1711w83781d_read_value(struct w83781d_data *data, u16 reg)
1712{
0217eae3 1713 struct i2c_client *client = data->client;
443850ce
WG		 1714 int res;
1715
1716 mutex_lock(&data->lock);
0217eae3 1717 if (client)
443850ce
WG		 1718 res = w83781d_read_value_i2c(data, reg);
1719 else
1720 res = w83781d_read_value_isa(data, reg);
1721 mutex_unlock(&data->lock);
1722 return res;
1723}
1724
1725static int
1726w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1727{
0217eae3 1728 struct i2c_client *client = data->client;
443850ce
WG		 1729
1730 mutex_lock(&data->lock);
0217eae3 1731 if (client)
443850ce
WG		 1732 w83781d_write_value_i2c(data, reg, value);
1733 else
1734 w83781d_write_value_isa(data, reg, value);
1735 mutex_unlock(&data->lock);
1736 return 0;
1737}
1738
1739static int __devinit
1740w83781d_isa_probe(struct platform_device *pdev)
1741{
1742 int err, reg;
1743 struct w83781d_data *data;
1744 struct resource *res;
443850ce
WG		 1745
1746 /* Reserve the ISA region */
1747 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1748 if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
1749 "w83781d")) {
1750 err = -EBUSY;
1751 goto exit;
1752 }
1753
1754 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1755 if (!data) {
1756 err = -ENOMEM;
1757 goto exit_release_region;
1758 }
1759 mutex_init(&data->lock);
360782dd 1760 data->isa_addr = res->start;
443850ce
WG		 1761 platform_set_drvdata(pdev, data);
1762
1763 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1764 switch (reg) {
1765 case 0x30:
1766 data->type = w83782d;
360782dd 1767 data->name = "w83782d";
443850ce
WG		 1768 break;
1769 default:
1770 data->type = w83781d;
360782dd 1771 data->name = "w83781d";
443850ce 1772 }
443850ce
WG		 1773
1774 /* Initialize the W83781D chip */
1775 w83781d_init_device(&pdev->dev);
1776
1777 /* Register sysfs hooks */
1778 err = w83781d_create_files(&pdev->dev, data->type, 1);
1779 if (err)
1780 goto exit_remove_files;
1781
1782 err = device_create_file(&pdev->dev, &dev_attr_name);
1783 if (err)
1784 goto exit_remove_files;
1785
1786 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1787 if (IS_ERR(data->hwmon_dev)) {
1788 err = PTR_ERR(data->hwmon_dev);
1789 goto exit_remove_files;
1790 }
1791
1792 return 0;
1793
1794 exit_remove_files:
1795 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1796 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1797 device_remove_file(&pdev->dev, &dev_attr_name);
1798 kfree(data);
1799 exit_release_region:
1800 release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
1801 exit:
1802 return err;
1803}
1804
1805static int __devexit
1806w83781d_isa_remove(struct platform_device *pdev)
1807{
1808 struct w83781d_data *data = platform_get_drvdata(pdev);
1809
1810 hwmon_device_unregister(data->hwmon_dev);
1811 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1812 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1813 device_remove_file(&pdev->dev, &dev_attr_name);
360782dd 1814 release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2);
443850ce
WG		 1815 kfree(data);
1816
1817 return 0;
1818}
1819
1820static struct platform_driver w83781d_isa_driver = {
1821 .driver = {
1822 .owner = THIS_MODULE,
1823 .name = "w83781d",
1824 },
1825 .probe = w83781d_isa_probe,
1826 .remove = __devexit_p(w83781d_isa_remove),
1827};
1828
7666c13c
JD		 1829/* return 1 if a supported chip is found, 0 otherwise */
1830static int __init
1831w83781d_isa_found(unsigned short address)
1832{
1833 int val, save, found = 0;
b0bcdd3c
JD		 1834 int port;
1835
1836 /* Some boards declare base+0 to base+7 as a PNP device, some base+4
1837 * to base+7 and some base+5 to base+6. So we better request each port
1838 * individually for the probing phase. */
1839 for (port = address; port < address + W83781D_EXTENT; port++) {
1840 if (!request_region(port, 1, "w83781d")) {
1ca28218 1841 pr_debug("Failed to request port 0x%x\n", port);
b0bcdd3c
JD		 1842 goto release;
1843 }
2961cb22 1844 }
7666c13c
JD		 1845
1846#define REALLY_SLOW_IO
1847 /* We need the timeouts for at least some W83781D-like
1848 chips. But only if we read 'undefined' registers. */
1849 val = inb_p(address + 1);
1850 if (inb_p(address + 2) != val
1851 || inb_p(address + 3) != val
1852 || inb_p(address + 7) != val) {
1ca28218 1853 pr_debug("Detection failed at step %d\n", 1);
7666c13c
JD		 1854 goto release;
1855 }
1856#undef REALLY_SLOW_IO
1857
1858 /* We should be able to change the 7 LSB of the address port. The
1859 MSB (busy flag) should be clear initially, set after the write. */
1860 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1861 if (save & 0x80) {
1ca28218 1862 pr_debug("Detection failed at step %d\n", 2);
7666c13c
JD		 1863 goto release;
1864 }
1865 val = ~save & 0x7f;
1866 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1867 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1868 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1ca28218 1869 pr_debug("Detection failed at step %d\n", 3);
7666c13c
JD		 1870 goto release;
1871 }
1872
1873 /* We found a device, now see if it could be a W83781D */
1874 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1875 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1876 if (val & 0x80) {
1ca28218 1877 pr_debug("Detection failed at step %d\n", 4);
7666c13c
JD		 1878 goto release;
1879 }
1880 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1881 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1882 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1883 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1884 if ((!(save & 0x80) && (val != 0xa3))
1885 || ((save & 0x80) && (val != 0x5c))) {
1ca28218 1886 pr_debug("Detection failed at step %d\n", 5);
7666c13c
JD		 1887 goto release;
1888 }
1889 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1890 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1891 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1ca28218 1892 pr_debug("Detection failed at step %d\n", 6);
7666c13c
JD		 1893 goto release;
1894 }
1895
1896 /* The busy flag should be clear again */
1897 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1ca28218 1898 pr_debug("Detection failed at step %d\n", 7);
7666c13c
JD		 1899 goto release;
1900 }
1901
1902 /* Determine the chip type */
1903 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1904 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1905 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1906 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1907 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1908 if ((val & 0xfe) == 0x10 /* W83781D */
05663368 1909 || val == 0x30) /* W83782D */
7666c13c
JD		 1910 found = 1;
1911
1912 if (found)
1ca28218 1913 pr_info("Found a %s chip at %#x\n",
7666c13c
JD		 1914 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1915
1916 release:
b0bcdd3c
JD		 1917 for (port--; port >= address; port--)
1918 release_region(port, 1);
7666c13c
JD		 1919 return found;
1920}
1921
1922static int __init
1923w83781d_isa_device_add(unsigned short address)
1924{
1925 struct resource res = {
1926 .start = address,
15bde2f1 1927 .end = address + W83781D_EXTENT - 1,
7666c13c
JD		 1928 .name = "w83781d",
1929 .flags = IORESOURCE_IO,
1930 };
1931 int err;
1932
1933 pdev = platform_device_alloc("w83781d", address);
1934 if (!pdev) {
1935 err = -ENOMEM;
1ca28218 1936 pr_err("Device allocation failed\n");
7666c13c
JD		 1937 goto exit;
1938 }
1939
1940 err = platform_device_add_resources(pdev, &res, 1);
1941 if (err) {
1ca28218 1942 pr_err("Device resource addition failed (%d)\n", err);
7666c13c
JD		 1943 goto exit_device_put;
1944 }
1945
1946 err = platform_device_add(pdev);
1947 if (err) {
1ca28218 1948 pr_err("Device addition failed (%d)\n", err);
7666c13c
JD		 1949 goto exit_device_put;
1950 }
1951
1952 return 0;
1953
1954 exit_device_put:
1955 platform_device_put(pdev);
1956 exit:
1957 pdev = NULL;
1958 return err;
1959}
1960
1da177e4 1961static int __init
443850ce 1962w83781d_isa_register(void)
1da177e4 1963{
fde09509
JD		 1964 int res;
1965
7666c13c
JD		 1966 if (w83781d_isa_found(isa_address)) {
1967 res = platform_driver_register(&w83781d_isa_driver);
1968 if (res)
c6566206 1969 goto exit;
fde09509 1970
7666c13c
JD		 1971 /* Sets global pdev as a side effect */
1972 res = w83781d_isa_device_add(isa_address);
1973 if (res)
1974 goto exit_unreg_isa_driver;
1975 }
fde09509
JD		 1976
1977 return 0;
7666c13c 1978
443850ce 1979exit_unreg_isa_driver:
7666c13c 1980 platform_driver_unregister(&w83781d_isa_driver);
443850ce 1981exit:
7666c13c 1982 return res;
1da177e4
LT		 1983}
1984
dd56b638 1985static void
443850ce 1986w83781d_isa_unregister(void)
1da177e4 1987{
7666c13c
JD		 1988 if (pdev) {
1989 platform_device_unregister(pdev);
1990 platform_driver_unregister(&w83781d_isa_driver);
1991 }
443850ce
WG		 1992}
1993#else /* !CONFIG_ISA */
1994
1995static struct w83781d_data *w83781d_data_if_isa(void)
1996{
1997 return NULL;
1998}
1999
2000static int
2001w83781d_alias_detect(struct i2c_client *client, u8 chipid)
2002{
2003 return 0;
2004}
2005
2006static int
2007w83781d_read_value(struct w83781d_data *data, u16 reg)
2008{
2009 int res;
2010
2011 mutex_lock(&data->lock);
2012 res = w83781d_read_value_i2c(data, reg);
2013 mutex_unlock(&data->lock);
2014
2015 return res;
2016}
2017
2018static int
2019w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
2020{
2021 mutex_lock(&data->lock);
2022 w83781d_write_value_i2c(data, reg, value);
2023 mutex_unlock(&data->lock);
2024
2025 return 0;
2026}
2027
2028static int __init
2029w83781d_isa_register(void)
2030{
2031 return 0;
2032}
2033
dd56b638 2034static void
443850ce
WG		 2035w83781d_isa_unregister(void)
2036{
2037}
2038#endif /* CONFIG_ISA */
2039
2040static int __init
2041sensors_w83781d_init(void)
2042{
2043 int res;
2044
2045 /* We register the ISA device first, so that we can skip the
2046 * registration of an I2C interface to the same device. */
2047 res = w83781d_isa_register();
2048 if (res)
2049 goto exit;
2050
2051 res = i2c_add_driver(&w83781d_driver);
2052 if (res)
2053 goto exit_unreg_isa;
2054
2055 return 0;
2056
2057 exit_unreg_isa:
2058 w83781d_isa_unregister();
2059 exit:
2060 return res;
2061}
2062
2063static void __exit
2064sensors_w83781d_exit(void)
2065{
2066 w83781d_isa_unregister();
1da177e4
LT		 2067 i2c_del_driver(&w83781d_driver);
2068}
2069
2070MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2071 "Philip Edelbrock <phil@netroedge.com>, "
2072 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2073MODULE_DESCRIPTION("W83781D driver");
2074MODULE_LICENSE("GPL");
2075
2076module_init(sensors_w83781d_init);
2077module_exit(sensors_w83781d_exit);
Linux 6.x block layer and io_uring tree(s)