Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | w83781d.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, | |
7666c13c JD |
5 | Philip Edelbrock <phil@netroedge.com>, |
6 | and Mark Studebaker <mdsxyz123@yahoo.com> | |
360782dd | 7 | Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org> |
1da177e4 LT |
8 | |
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; if not, write to the Free Software | |
21 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | /* | |
25 | Supports following chips: | |
26 | ||
27 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
28 | as99127f 7 3 0 3 0x31 0x12c3 yes no | |
29 | as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no | |
30 | w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes | |
1da177e4 LT |
31 | w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes |
32 | w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no | |
1da177e4 LT |
33 | |
34 | */ | |
35 | ||
1da177e4 LT |
36 | #include <linux/module.h> |
37 | #include <linux/init.h> | |
38 | #include <linux/slab.h> | |
39 | #include <linux/jiffies.h> | |
40 | #include <linux/i2c.h> | |
943b0830 | 41 | #include <linux/hwmon.h> |
303760b4 | 42 | #include <linux/hwmon-vid.h> |
34875337 | 43 | #include <linux/hwmon-sysfs.h> |
311ce2ef | 44 | #include <linux/sysfs.h> |
943b0830 | 45 | #include <linux/err.h> |
9a61bf63 | 46 | #include <linux/mutex.h> |
443850ce WG |
47 | |
48 | #ifdef CONFIG_ISA | |
49 | #include <linux/platform_device.h> | |
50 | #include <linux/ioport.h> | |
6055fae8 | 51 | #include <linux/io.h> |
443850ce | 52 | #endif |
1da177e4 | 53 | |
443850ce | 54 | #include "lm75.h" |
7666c13c | 55 | |
1da177e4 | 56 | /* Addresses to scan */ |
25e9c86d MH |
57 | static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, |
58 | 0x2e, 0x2f, I2C_CLIENT_END }; | |
1da177e4 | 59 | /* Insmod parameters */ |
05663368 | 60 | I2C_CLIENT_INSMOD_4(w83781d, w83782d, w83783s, as99127f); |
3aed198c JD |
61 | |
62 | static unsigned short force_subclients[4]; | |
63 | module_param_array(force_subclients, short, NULL, 0); | |
64 | MODULE_PARM_DESC(force_subclients, "List of subclient addresses: " | |
1da177e4 LT |
65 | "{bus, clientaddr, subclientaddr1, subclientaddr2}"); |
66 | ||
fabddcd4 JD |
67 | static int reset; |
68 | module_param(reset, bool, 0); | |
69 | MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); | |
70 | ||
1da177e4 LT |
71 | static int init = 1; |
72 | module_param(init, bool, 0); | |
73 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
74 | ||
75 | /* Constants specified below */ | |
76 | ||
77 | /* Length of ISA address segment */ | |
78 | #define W83781D_EXTENT 8 | |
79 | ||
80 | /* Where are the ISA address/data registers relative to the base address */ | |
81 | #define W83781D_ADDR_REG_OFFSET 5 | |
82 | #define W83781D_DATA_REG_OFFSET 6 | |
83 | ||
34875337 JD |
84 | /* The device registers */ |
85 | /* in nr from 0 to 8 */ | |
1da177e4 LT |
86 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ |
87 | (0x554 + (((nr) - 7) * 2))) | |
88 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
89 | (0x555 + (((nr) - 7) * 2))) | |
90 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
91 | (0x550 + (nr) - 7)) | |
92 | ||
34875337 JD |
93 | /* fan nr from 0 to 2 */ |
94 | #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr)) | |
95 | #define W83781D_REG_FAN(nr) (0x28 + (nr)) | |
1da177e4 LT |
96 | |
97 | #define W83781D_REG_BANK 0x4E | |
98 | #define W83781D_REG_TEMP2_CONFIG 0x152 | |
99 | #define W83781D_REG_TEMP3_CONFIG 0x252 | |
34875337 | 100 | /* temp nr from 1 to 3 */ |
1da177e4 LT |
101 | #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ |
102 | ((nr == 2) ? (0x0150) : \ | |
103 | (0x27))) | |
104 | #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ | |
105 | ((nr == 2) ? (0x153) : \ | |
106 | (0x3A))) | |
107 | #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ | |
108 | ((nr == 2) ? (0x155) : \ | |
109 | (0x39))) | |
110 | ||
111 | #define W83781D_REG_CONFIG 0x40 | |
c7f5d7ed JD |
112 | |
113 | /* Interrupt status (W83781D, AS99127F) */ | |
1da177e4 LT |
114 | #define W83781D_REG_ALARM1 0x41 |
115 | #define W83781D_REG_ALARM2 0x42 | |
1da177e4 | 116 | |
05663368 | 117 | /* Real-time status (W83782D, W83783S) */ |
c7f5d7ed JD |
118 | #define W83782D_REG_ALARM1 0x459 |
119 | #define W83782D_REG_ALARM2 0x45A | |
120 | #define W83782D_REG_ALARM3 0x45B | |
121 | ||
1da177e4 LT |
122 | #define W83781D_REG_BEEP_CONFIG 0x4D |
123 | #define W83781D_REG_BEEP_INTS1 0x56 | |
124 | #define W83781D_REG_BEEP_INTS2 0x57 | |
125 | #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ | |
126 | ||
127 | #define W83781D_REG_VID_FANDIV 0x47 | |
128 | ||
129 | #define W83781D_REG_CHIPID 0x49 | |
130 | #define W83781D_REG_WCHIPID 0x58 | |
131 | #define W83781D_REG_CHIPMAN 0x4F | |
132 | #define W83781D_REG_PIN 0x4B | |
133 | ||
134 | /* 782D/783S only */ | |
135 | #define W83781D_REG_VBAT 0x5D | |
136 | ||
137 | /* PWM 782D (1-4) and 783S (1-2) only */ | |
34875337 | 138 | static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F }; |
1da177e4 LT |
139 | #define W83781D_REG_PWMCLK12 0x5C |
140 | #define W83781D_REG_PWMCLK34 0x45C | |
1da177e4 LT |
141 | |
142 | #define W83781D_REG_I2C_ADDR 0x48 | |
143 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
144 | ||
145 | /* The following are undocumented in the data sheets however we | |
146 | received the information in an email from Winbond tech support */ | |
147 | /* Sensor selection - not on 781d */ | |
148 | #define W83781D_REG_SCFG1 0x5D | |
149 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
150 | ||
151 | #define W83781D_REG_SCFG2 0x59 | |
152 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
153 | ||
154 | #define W83781D_DEFAULT_BETA 3435 | |
155 | ||
474d00a8 JD |
156 | /* Conversions */ |
157 | #define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255) | |
158 | #define IN_FROM_REG(val) ((val) * 16) | |
1da177e4 LT |
159 | |
160 | static inline u8 | |
161 | FAN_TO_REG(long rpm, int div) | |
162 | { | |
163 | if (rpm == 0) | |
164 | return 255; | |
165 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
166 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
167 | } | |
168 | ||
474d00a8 JD |
169 | static inline long |
170 | FAN_FROM_REG(u8 val, int div) | |
171 | { | |
172 | if (val == 0) | |
173 | return -1; | |
174 | if (val == 255) | |
175 | return 0; | |
176 | return 1350000 / (val * div); | |
177 | } | |
1da177e4 | 178 | |
474d00a8 JD |
179 | #define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128) |
180 | #define TEMP_FROM_REG(val) ((val) * 1000) | |
1da177e4 | 181 | |
1da177e4 | 182 | #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ |
2fbbbf14 | 183 | (~(val)) & 0x7fff : (val) & 0xff7fff) |
1da177e4 | 184 | #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ |
2fbbbf14 | 185 | (~(val)) & 0x7fff : (val) & 0xff7fff) |
1da177e4 | 186 | |
1da177e4 LT |
187 | #define DIV_FROM_REG(val) (1 << (val)) |
188 | ||
189 | static inline u8 | |
190 | DIV_TO_REG(long val, enum chips type) | |
191 | { | |
192 | int i; | |
193 | val = SENSORS_LIMIT(val, 1, | |
194 | ((type == w83781d | |
195 | || type == as99127f) ? 8 : 128)) >> 1; | |
abc01922 | 196 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
197 | if (val == 0) |
198 | break; | |
199 | val >>= 1; | |
200 | } | |
474d00a8 | 201 | return i; |
1da177e4 LT |
202 | } |
203 | ||
1da177e4 | 204 | struct w83781d_data { |
0217eae3 | 205 | struct i2c_client *client; |
1beeffe4 | 206 | struct device *hwmon_dev; |
9a61bf63 | 207 | struct mutex lock; |
1da177e4 LT |
208 | enum chips type; |
209 | ||
360782dd JD |
210 | /* For ISA device only */ |
211 | const char *name; | |
212 | int isa_addr; | |
213 | ||
9a61bf63 | 214 | struct mutex update_lock; |
1da177e4 LT |
215 | char valid; /* !=0 if following fields are valid */ |
216 | unsigned long last_updated; /* In jiffies */ | |
217 | ||
218 | struct i2c_client *lm75[2]; /* for secondary I2C addresses */ | |
219 | /* array of 2 pointers to subclients */ | |
220 | ||
221 | u8 in[9]; /* Register value - 8 & 9 for 782D only */ | |
222 | u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ | |
223 | u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ | |
224 | u8 fan[3]; /* Register value */ | |
225 | u8 fan_min[3]; /* Register value */ | |
474d00a8 JD |
226 | s8 temp; /* Register value */ |
227 | s8 temp_max; /* Register value */ | |
228 | s8 temp_max_hyst; /* Register value */ | |
1da177e4 LT |
229 | u16 temp_add[2]; /* Register value */ |
230 | u16 temp_max_add[2]; /* Register value */ | |
231 | u16 temp_max_hyst_add[2]; /* Register value */ | |
232 | u8 fan_div[3]; /* Register encoding, shifted right */ | |
233 | u8 vid; /* Register encoding, combined */ | |
234 | u32 alarms; /* Register encoding, combined */ | |
235 | u32 beep_mask; /* Register encoding, combined */ | |
1da177e4 | 236 | u8 pwm[4]; /* Register value */ |
34875337 | 237 | u8 pwm2_enable; /* Boolean */ |
1da177e4 LT |
238 | u16 sens[3]; /* 782D/783S only. |
239 | 1 = pentium diode; 2 = 3904 diode; | |
b26f9330 | 240 | 4 = thermistor */ |
1da177e4 LT |
241 | u8 vrm; |
242 | }; | |
243 | ||
443850ce WG |
244 | static struct w83781d_data *w83781d_data_if_isa(void); |
245 | static int w83781d_alias_detect(struct i2c_client *client, u8 chipid); | |
246 | ||
31b8dc4d JD |
247 | static int w83781d_read_value(struct w83781d_data *data, u16 reg); |
248 | static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value); | |
1da177e4 | 249 | static struct w83781d_data *w83781d_update_device(struct device *dev); |
7666c13c | 250 | static void w83781d_init_device(struct device *dev); |
1da177e4 | 251 | |
1da177e4 LT |
252 | /* following are the sysfs callback functions */ |
253 | #define show_in_reg(reg) \ | |
34875337 JD |
254 | static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ |
255 | char *buf) \ | |
1da177e4 | 256 | { \ |
34875337 | 257 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
1da177e4 | 258 | struct w83781d_data *data = w83781d_update_device(dev); \ |
34875337 JD |
259 | return sprintf(buf, "%ld\n", \ |
260 | (long)IN_FROM_REG(data->reg[attr->index])); \ | |
1da177e4 LT |
261 | } |
262 | show_in_reg(in); | |
263 | show_in_reg(in_min); | |
264 | show_in_reg(in_max); | |
265 | ||
266 | #define store_in_reg(REG, reg) \ | |
34875337 JD |
267 | static ssize_t store_in_##reg (struct device *dev, struct device_attribute \ |
268 | *da, const char *buf, size_t count) \ | |
1da177e4 | 269 | { \ |
34875337 | 270 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
7666c13c | 271 | struct w83781d_data *data = dev_get_drvdata(dev); \ |
34875337 | 272 | int nr = attr->index; \ |
1da177e4 LT |
273 | u32 val; \ |
274 | \ | |
474d00a8 | 275 | val = simple_strtoul(buf, NULL, 10); \ |
1da177e4 | 276 | \ |
9a61bf63 | 277 | mutex_lock(&data->update_lock); \ |
1da177e4 | 278 | data->in_##reg[nr] = IN_TO_REG(val); \ |
31b8dc4d | 279 | w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ |
1da177e4 | 280 | \ |
9a61bf63 | 281 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
282 | return count; \ |
283 | } | |
284 | store_in_reg(MIN, min); | |
285 | store_in_reg(MAX, max); | |
286 | ||
1da177e4 | 287 | #define sysfs_in_offsets(offset) \ |
34875337 JD |
288 | static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ |
289 | show_in, NULL, offset); \ | |
290 | static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \ | |
291 | show_in_min, store_in_min, offset); \ | |
292 | static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \ | |
293 | show_in_max, store_in_max, offset) | |
1da177e4 LT |
294 | |
295 | sysfs_in_offsets(0); | |
296 | sysfs_in_offsets(1); | |
297 | sysfs_in_offsets(2); | |
298 | sysfs_in_offsets(3); | |
299 | sysfs_in_offsets(4); | |
300 | sysfs_in_offsets(5); | |
301 | sysfs_in_offsets(6); | |
302 | sysfs_in_offsets(7); | |
303 | sysfs_in_offsets(8); | |
304 | ||
1da177e4 | 305 | #define show_fan_reg(reg) \ |
34875337 JD |
306 | static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ |
307 | char *buf) \ | |
1da177e4 | 308 | { \ |
34875337 | 309 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
1da177e4 LT |
310 | struct w83781d_data *data = w83781d_update_device(dev); \ |
311 | return sprintf(buf,"%ld\n", \ | |
34875337 JD |
312 | FAN_FROM_REG(data->reg[attr->index], \ |
313 | DIV_FROM_REG(data->fan_div[attr->index]))); \ | |
1da177e4 LT |
314 | } |
315 | show_fan_reg(fan); | |
316 | show_fan_reg(fan_min); | |
317 | ||
318 | static ssize_t | |
34875337 JD |
319 | store_fan_min(struct device *dev, struct device_attribute *da, |
320 | const char *buf, size_t count) | |
1da177e4 | 321 | { |
34875337 | 322 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 323 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 324 | int nr = attr->index; |
1da177e4 LT |
325 | u32 val; |
326 | ||
327 | val = simple_strtoul(buf, NULL, 10); | |
328 | ||
9a61bf63 | 329 | mutex_lock(&data->update_lock); |
34875337 JD |
330 | data->fan_min[nr] = |
331 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); | |
31b8dc4d | 332 | w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), |
34875337 | 333 | data->fan_min[nr]); |
1da177e4 | 334 | |
9a61bf63 | 335 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
336 | return count; |
337 | } | |
338 | ||
34875337 JD |
339 | static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); |
340 | static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, | |
341 | show_fan_min, store_fan_min, 0); | |
342 | static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); | |
343 | static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, | |
344 | show_fan_min, store_fan_min, 1); | |
345 | static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); | |
346 | static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, | |
347 | show_fan_min, store_fan_min, 2); | |
1da177e4 | 348 | |
1da177e4 | 349 | #define show_temp_reg(reg) \ |
34875337 JD |
350 | static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ |
351 | char *buf) \ | |
1da177e4 | 352 | { \ |
34875337 | 353 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
1da177e4 | 354 | struct w83781d_data *data = w83781d_update_device(dev); \ |
34875337 | 355 | int nr = attr->index; \ |
1da177e4 LT |
356 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ |
357 | return sprintf(buf,"%d\n", \ | |
358 | LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ | |
359 | } else { /* TEMP1 */ \ | |
360 | return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ | |
361 | } \ | |
362 | } | |
363 | show_temp_reg(temp); | |
364 | show_temp_reg(temp_max); | |
365 | show_temp_reg(temp_max_hyst); | |
366 | ||
367 | #define store_temp_reg(REG, reg) \ | |
34875337 JD |
368 | static ssize_t store_temp_##reg (struct device *dev, \ |
369 | struct device_attribute *da, const char *buf, size_t count) \ | |
1da177e4 | 370 | { \ |
34875337 | 371 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
7666c13c | 372 | struct w83781d_data *data = dev_get_drvdata(dev); \ |
34875337 | 373 | int nr = attr->index; \ |
5bfedac0 | 374 | long val; \ |
1da177e4 LT |
375 | \ |
376 | val = simple_strtol(buf, NULL, 10); \ | |
377 | \ | |
9a61bf63 | 378 | mutex_lock(&data->update_lock); \ |
1da177e4 LT |
379 | \ |
380 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
381 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ | |
31b8dc4d | 382 | w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ |
1da177e4 LT |
383 | data->temp_##reg##_add[nr-2]); \ |
384 | } else { /* TEMP1 */ \ | |
385 | data->temp_##reg = TEMP_TO_REG(val); \ | |
31b8dc4d | 386 | w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ |
1da177e4 LT |
387 | data->temp_##reg); \ |
388 | } \ | |
389 | \ | |
9a61bf63 | 390 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
391 | return count; \ |
392 | } | |
393 | store_temp_reg(OVER, max); | |
394 | store_temp_reg(HYST, max_hyst); | |
395 | ||
1da177e4 | 396 | #define sysfs_temp_offsets(offset) \ |
34875337 JD |
397 | static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ |
398 | show_temp, NULL, offset); \ | |
399 | static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \ | |
400 | show_temp_max, store_temp_max, offset); \ | |
401 | static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \ | |
402 | show_temp_max_hyst, store_temp_max_hyst, offset); | |
1da177e4 LT |
403 | |
404 | sysfs_temp_offsets(1); | |
405 | sysfs_temp_offsets(2); | |
406 | sysfs_temp_offsets(3); | |
407 | ||
1da177e4 | 408 | static ssize_t |
e404e274 | 409 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
410 | { |
411 | struct w83781d_data *data = w83781d_update_device(dev); | |
412 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
413 | } | |
414 | ||
311ce2ef JC |
415 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); |
416 | ||
1da177e4 | 417 | static ssize_t |
e404e274 | 418 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 | 419 | { |
90d6619a | 420 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
421 | return sprintf(buf, "%ld\n", (long) data->vrm); |
422 | } | |
423 | ||
424 | static ssize_t | |
e404e274 | 425 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 | 426 | { |
7666c13c | 427 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
428 | u32 val; |
429 | ||
430 | val = simple_strtoul(buf, NULL, 10); | |
431 | data->vrm = val; | |
432 | ||
433 | return count; | |
434 | } | |
435 | ||
311ce2ef JC |
436 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); |
437 | ||
1da177e4 | 438 | static ssize_t |
e404e274 | 439 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
440 | { |
441 | struct w83781d_data *data = w83781d_update_device(dev); | |
68188ba7 | 442 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 LT |
443 | } |
444 | ||
311ce2ef JC |
445 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); |
446 | ||
7d4a1374 JD |
447 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, |
448 | char *buf) | |
449 | { | |
450 | struct w83781d_data *data = w83781d_update_device(dev); | |
451 | int bitnr = to_sensor_dev_attr(attr)->index; | |
452 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
453 | } | |
454 | ||
455 | /* The W83781D has a single alarm bit for temp2 and temp3 */ | |
456 | static ssize_t show_temp3_alarm(struct device *dev, | |
457 | struct device_attribute *attr, char *buf) | |
458 | { | |
459 | struct w83781d_data *data = w83781d_update_device(dev); | |
460 | int bitnr = (data->type == w83781d) ? 5 : 13; | |
461 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
462 | } | |
463 | ||
464 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); | |
465 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
466 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
467 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
468 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); | |
469 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); | |
470 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); | |
471 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); | |
472 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); | |
473 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); | |
474 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); | |
475 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
476 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); | |
477 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); | |
478 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0); | |
479 | ||
e404e274 | 480 | static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
481 | { |
482 | struct w83781d_data *data = w83781d_update_device(dev); | |
483 | return sprintf(buf, "%ld\n", | |
484 | (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); | |
485 | } | |
1da177e4 | 486 | |
1da177e4 | 487 | static ssize_t |
34875337 JD |
488 | store_beep_mask(struct device *dev, struct device_attribute *attr, |
489 | const char *buf, size_t count) | |
1da177e4 | 490 | { |
7666c13c | 491 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 492 | u32 val; |
1da177e4 LT |
493 | |
494 | val = simple_strtoul(buf, NULL, 10); | |
495 | ||
9a61bf63 | 496 | mutex_lock(&data->update_lock); |
2fbbbf14 JD |
497 | data->beep_mask &= 0x8000; /* preserve beep enable */ |
498 | data->beep_mask |= BEEP_MASK_TO_REG(val, data->type); | |
34875337 JD |
499 | w83781d_write_value(data, W83781D_REG_BEEP_INTS1, |
500 | data->beep_mask & 0xff); | |
501 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, | |
2fbbbf14 | 502 | (data->beep_mask >> 8) & 0xff); |
34875337 JD |
503 | if (data->type != w83781d && data->type != as99127f) { |
504 | w83781d_write_value(data, W83781D_REG_BEEP_INTS3, | |
505 | ((data->beep_mask) >> 16) & 0xff); | |
506 | } | |
507 | mutex_unlock(&data->update_lock); | |
1da177e4 | 508 | |
34875337 JD |
509 | return count; |
510 | } | |
1da177e4 | 511 | |
34875337 JD |
512 | static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR, |
513 | show_beep_mask, store_beep_mask); | |
1da177e4 | 514 | |
7d4a1374 JD |
515 | static ssize_t show_beep(struct device *dev, struct device_attribute *attr, |
516 | char *buf) | |
517 | { | |
518 | struct w83781d_data *data = w83781d_update_device(dev); | |
519 | int bitnr = to_sensor_dev_attr(attr)->index; | |
520 | return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); | |
521 | } | |
522 | ||
523 | static ssize_t | |
524 | store_beep(struct device *dev, struct device_attribute *attr, | |
525 | const char *buf, size_t count) | |
526 | { | |
527 | struct w83781d_data *data = dev_get_drvdata(dev); | |
528 | int bitnr = to_sensor_dev_attr(attr)->index; | |
529 | unsigned long bit; | |
530 | u8 reg; | |
531 | ||
532 | bit = simple_strtoul(buf, NULL, 10); | |
533 | if (bit & ~1) | |
534 | return -EINVAL; | |
535 | ||
536 | mutex_lock(&data->update_lock); | |
537 | if (bit) | |
538 | data->beep_mask |= (1 << bitnr); | |
539 | else | |
540 | data->beep_mask &= ~(1 << bitnr); | |
541 | ||
542 | if (bitnr < 8) { | |
543 | reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1); | |
544 | if (bit) | |
545 | reg |= (1 << bitnr); | |
546 | else | |
547 | reg &= ~(1 << bitnr); | |
548 | w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg); | |
549 | } else if (bitnr < 16) { | |
550 | reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); | |
551 | if (bit) | |
552 | reg |= (1 << (bitnr - 8)); | |
553 | else | |
554 | reg &= ~(1 << (bitnr - 8)); | |
555 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg); | |
556 | } else { | |
557 | reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3); | |
558 | if (bit) | |
559 | reg |= (1 << (bitnr - 16)); | |
560 | else | |
561 | reg &= ~(1 << (bitnr - 16)); | |
562 | w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg); | |
563 | } | |
564 | mutex_unlock(&data->update_lock); | |
565 | ||
566 | return count; | |
567 | } | |
568 | ||
569 | /* The W83781D has a single beep bit for temp2 and temp3 */ | |
570 | static ssize_t show_temp3_beep(struct device *dev, | |
571 | struct device_attribute *attr, char *buf) | |
572 | { | |
573 | struct w83781d_data *data = w83781d_update_device(dev); | |
574 | int bitnr = (data->type == w83781d) ? 5 : 13; | |
575 | return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); | |
576 | } | |
577 | ||
578 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
579 | show_beep, store_beep, 0); | |
580 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, | |
581 | show_beep, store_beep, 1); | |
582 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, | |
583 | show_beep, store_beep, 2); | |
584 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, | |
585 | show_beep, store_beep, 3); | |
586 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, | |
587 | show_beep, store_beep, 8); | |
588 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, | |
589 | show_beep, store_beep, 9); | |
590 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, | |
591 | show_beep, store_beep, 10); | |
592 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, | |
593 | show_beep, store_beep, 16); | |
594 | static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, | |
595 | show_beep, store_beep, 17); | |
596 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, | |
597 | show_beep, store_beep, 6); | |
598 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, | |
599 | show_beep, store_beep, 7); | |
600 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, | |
601 | show_beep, store_beep, 11); | |
602 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, | |
603 | show_beep, store_beep, 4); | |
604 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, | |
605 | show_beep, store_beep, 5); | |
606 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, | |
607 | show_temp3_beep, store_beep, 13); | |
2fbbbf14 JD |
608 | static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, |
609 | show_beep, store_beep, 15); | |
7d4a1374 | 610 | |
1da177e4 | 611 | static ssize_t |
34875337 | 612 | show_fan_div(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 | 613 | { |
34875337 | 614 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
1da177e4 LT |
615 | struct w83781d_data *data = w83781d_update_device(dev); |
616 | return sprintf(buf, "%ld\n", | |
34875337 | 617 | (long) DIV_FROM_REG(data->fan_div[attr->index])); |
1da177e4 LT |
618 | } |
619 | ||
620 | /* Note: we save and restore the fan minimum here, because its value is | |
621 | determined in part by the fan divisor. This follows the principle of | |
d6e05edc | 622 | least surprise; the user doesn't expect the fan minimum to change just |
1da177e4 LT |
623 | because the divisor changed. */ |
624 | static ssize_t | |
34875337 JD |
625 | store_fan_div(struct device *dev, struct device_attribute *da, |
626 | const char *buf, size_t count) | |
1da177e4 | 627 | { |
34875337 | 628 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 629 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 | 630 | unsigned long min; |
34875337 | 631 | int nr = attr->index; |
1da177e4 LT |
632 | u8 reg; |
633 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
634 | ||
9a61bf63 | 635 | mutex_lock(&data->update_lock); |
293c0997 | 636 | |
1da177e4 LT |
637 | /* Save fan_min */ |
638 | min = FAN_FROM_REG(data->fan_min[nr], | |
639 | DIV_FROM_REG(data->fan_div[nr])); | |
640 | ||
641 | data->fan_div[nr] = DIV_TO_REG(val, data->type); | |
642 | ||
31b8dc4d | 643 | reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) |
1da177e4 LT |
644 | & (nr==0 ? 0xcf : 0x3f)) |
645 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
31b8dc4d | 646 | w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); |
1da177e4 LT |
647 | |
648 | /* w83781d and as99127f don't have extended divisor bits */ | |
649 | if (data->type != w83781d && data->type != as99127f) { | |
31b8dc4d | 650 | reg = (w83781d_read_value(data, W83781D_REG_VBAT) |
1da177e4 LT |
651 | & ~(1 << (5 + nr))) |
652 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
31b8dc4d | 653 | w83781d_write_value(data, W83781D_REG_VBAT, reg); |
1da177e4 LT |
654 | } |
655 | ||
656 | /* Restore fan_min */ | |
657 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
34875337 | 658 | w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]); |
1da177e4 | 659 | |
9a61bf63 | 660 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
661 | return count; |
662 | } | |
663 | ||
34875337 JD |
664 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, |
665 | show_fan_div, store_fan_div, 0); | |
666 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, | |
667 | show_fan_div, store_fan_div, 1); | |
668 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, | |
669 | show_fan_div, store_fan_div, 2); | |
1da177e4 | 670 | |
1da177e4 | 671 | static ssize_t |
34875337 | 672 | show_pwm(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 | 673 | { |
34875337 | 674 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
1da177e4 | 675 | struct w83781d_data *data = w83781d_update_device(dev); |
34875337 | 676 | return sprintf(buf, "%d\n", (int)data->pwm[attr->index]); |
1da177e4 LT |
677 | } |
678 | ||
679 | static ssize_t | |
34875337 | 680 | show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 LT |
681 | { |
682 | struct w83781d_data *data = w83781d_update_device(dev); | |
34875337 | 683 | return sprintf(buf, "%d\n", (int)data->pwm2_enable); |
1da177e4 LT |
684 | } |
685 | ||
686 | static ssize_t | |
34875337 JD |
687 | store_pwm(struct device *dev, struct device_attribute *da, const char *buf, |
688 | size_t count) | |
1da177e4 | 689 | { |
34875337 | 690 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 691 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 692 | int nr = attr->index; |
1da177e4 LT |
693 | u32 val; |
694 | ||
695 | val = simple_strtoul(buf, NULL, 10); | |
696 | ||
9a61bf63 | 697 | mutex_lock(&data->update_lock); |
34875337 JD |
698 | data->pwm[nr] = SENSORS_LIMIT(val, 0, 255); |
699 | w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]); | |
9a61bf63 | 700 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
701 | return count; |
702 | } | |
703 | ||
704 | static ssize_t | |
34875337 JD |
705 | store_pwm2_enable(struct device *dev, struct device_attribute *da, |
706 | const char *buf, size_t count) | |
1da177e4 | 707 | { |
7666c13c | 708 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
709 | u32 val, reg; |
710 | ||
711 | val = simple_strtoul(buf, NULL, 10); | |
712 | ||
9a61bf63 | 713 | mutex_lock(&data->update_lock); |
1da177e4 LT |
714 | |
715 | switch (val) { | |
716 | case 0: | |
717 | case 1: | |
31b8dc4d JD |
718 | reg = w83781d_read_value(data, W83781D_REG_PWMCLK12); |
719 | w83781d_write_value(data, W83781D_REG_PWMCLK12, | |
1da177e4 LT |
720 | (reg & 0xf7) | (val << 3)); |
721 | ||
31b8dc4d JD |
722 | reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
723 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, | |
1da177e4 LT |
724 | (reg & 0xef) | (!val << 4)); |
725 | ||
34875337 | 726 | data->pwm2_enable = val; |
1da177e4 LT |
727 | break; |
728 | ||
729 | default: | |
9a61bf63 | 730 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
731 | return -EINVAL; |
732 | } | |
733 | ||
9a61bf63 | 734 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
735 | return count; |
736 | } | |
737 | ||
34875337 JD |
738 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0); |
739 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1); | |
740 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2); | |
741 | static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3); | |
742 | /* only PWM2 can be enabled/disabled */ | |
743 | static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
744 | show_pwm2_enable, store_pwm2_enable); | |
1da177e4 | 745 | |
1da177e4 | 746 | static ssize_t |
34875337 | 747 | show_sensor(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 | 748 | { |
34875337 | 749 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
1da177e4 | 750 | struct w83781d_data *data = w83781d_update_device(dev); |
34875337 | 751 | return sprintf(buf, "%d\n", (int)data->sens[attr->index]); |
1da177e4 LT |
752 | } |
753 | ||
754 | static ssize_t | |
34875337 JD |
755 | store_sensor(struct device *dev, struct device_attribute *da, |
756 | const char *buf, size_t count) | |
1da177e4 | 757 | { |
34875337 | 758 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 759 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 760 | int nr = attr->index; |
1da177e4 LT |
761 | u32 val, tmp; |
762 | ||
763 | val = simple_strtoul(buf, NULL, 10); | |
764 | ||
9a61bf63 | 765 | mutex_lock(&data->update_lock); |
1da177e4 LT |
766 | |
767 | switch (val) { | |
768 | case 1: /* PII/Celeron diode */ | |
31b8dc4d JD |
769 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
770 | w83781d_write_value(data, W83781D_REG_SCFG1, | |
34875337 | 771 | tmp | BIT_SCFG1[nr]); |
31b8dc4d JD |
772 | tmp = w83781d_read_value(data, W83781D_REG_SCFG2); |
773 | w83781d_write_value(data, W83781D_REG_SCFG2, | |
34875337 JD |
774 | tmp | BIT_SCFG2[nr]); |
775 | data->sens[nr] = val; | |
1da177e4 LT |
776 | break; |
777 | case 2: /* 3904 */ | |
31b8dc4d JD |
778 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
779 | w83781d_write_value(data, W83781D_REG_SCFG1, | |
34875337 | 780 | tmp | BIT_SCFG1[nr]); |
31b8dc4d JD |
781 | tmp = w83781d_read_value(data, W83781D_REG_SCFG2); |
782 | w83781d_write_value(data, W83781D_REG_SCFG2, | |
34875337 JD |
783 | tmp & ~BIT_SCFG2[nr]); |
784 | data->sens[nr] = val; | |
1da177e4 | 785 | break; |
b26f9330 JD |
786 | case W83781D_DEFAULT_BETA: |
787 | dev_warn(dev, "Sensor type %d is deprecated, please use 4 " | |
788 | "instead\n", W83781D_DEFAULT_BETA); | |
789 | /* fall through */ | |
790 | case 4: /* thermistor */ | |
31b8dc4d JD |
791 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
792 | w83781d_write_value(data, W83781D_REG_SCFG1, | |
34875337 JD |
793 | tmp & ~BIT_SCFG1[nr]); |
794 | data->sens[nr] = val; | |
1da177e4 LT |
795 | break; |
796 | default: | |
b26f9330 JD |
797 | dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n", |
798 | (long) val); | |
1da177e4 LT |
799 | break; |
800 | } | |
801 | ||
9a61bf63 | 802 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
803 | return count; |
804 | } | |
805 | ||
34875337 JD |
806 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, |
807 | show_sensor, store_sensor, 0); | |
808 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, | |
393cdad6 | 809 | show_sensor, store_sensor, 1); |
34875337 | 810 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, |
393cdad6 | 811 | show_sensor, store_sensor, 2); |
1da177e4 | 812 | |
1da177e4 LT |
813 | /* Assumes that adapter is of I2C, not ISA variety. |
814 | * OTHERWISE DON'T CALL THIS | |
815 | */ | |
816 | static int | |
0217eae3 | 817 | w83781d_detect_subclients(struct i2c_client *new_client) |
1da177e4 LT |
818 | { |
819 | int i, val1 = 0, id; | |
820 | int err; | |
0217eae3 WG |
821 | int address = new_client->addr; |
822 | unsigned short sc_addr[2]; | |
823 | struct i2c_adapter *adapter = new_client->adapter; | |
1da177e4 | 824 | struct w83781d_data *data = i2c_get_clientdata(new_client); |
0217eae3 | 825 | enum chips kind = data->type; |
1da177e4 LT |
826 | |
827 | id = i2c_adapter_id(adapter); | |
828 | ||
829 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
830 | for (i = 2; i <= 3; i++) { | |
831 | if (force_subclients[i] < 0x48 || | |
832 | force_subclients[i] > 0x4f) { | |
833 | dev_err(&new_client->dev, "Invalid subclient " | |
834 | "address %d; must be 0x48-0x4f\n", | |
835 | force_subclients[i]); | |
836 | err = -EINVAL; | |
837 | goto ERROR_SC_1; | |
838 | } | |
839 | } | |
31b8dc4d | 840 | w83781d_write_value(data, W83781D_REG_I2C_SUBADDR, |
1da177e4 LT |
841 | (force_subclients[2] & 0x07) | |
842 | ((force_subclients[3] & 0x07) << 4)); | |
0217eae3 | 843 | sc_addr[0] = force_subclients[2]; |
1da177e4 | 844 | } else { |
31b8dc4d | 845 | val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR); |
0217eae3 | 846 | sc_addr[0] = 0x48 + (val1 & 0x07); |
1da177e4 LT |
847 | } |
848 | ||
849 | if (kind != w83783s) { | |
1da177e4 LT |
850 | if (force_subclients[0] == id && |
851 | force_subclients[1] == address) { | |
0217eae3 | 852 | sc_addr[1] = force_subclients[3]; |
1da177e4 | 853 | } else { |
0217eae3 | 854 | sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07); |
1da177e4 | 855 | } |
0217eae3 | 856 | if (sc_addr[0] == sc_addr[1]) { |
1da177e4 LT |
857 | dev_err(&new_client->dev, |
858 | "Duplicate addresses 0x%x for subclients.\n", | |
0217eae3 | 859 | sc_addr[0]); |
1da177e4 LT |
860 | err = -EBUSY; |
861 | goto ERROR_SC_2; | |
862 | } | |
863 | } | |
864 | ||
1da177e4 | 865 | for (i = 0; i <= 1; i++) { |
0217eae3 WG |
866 | data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]); |
867 | if (!data->lm75[i]) { | |
1da177e4 LT |
868 | dev_err(&new_client->dev, "Subclient %d " |
869 | "registration at address 0x%x " | |
0217eae3 WG |
870 | "failed.\n", i, sc_addr[i]); |
871 | err = -ENOMEM; | |
1da177e4 LT |
872 | if (i == 1) |
873 | goto ERROR_SC_3; | |
874 | goto ERROR_SC_2; | |
875 | } | |
876 | if (kind == w83783s) | |
877 | break; | |
878 | } | |
879 | ||
880 | return 0; | |
881 | ||
882 | /* Undo inits in case of errors */ | |
883 | ERROR_SC_3: | |
0217eae3 | 884 | i2c_unregister_device(data->lm75[0]); |
1da177e4 | 885 | ERROR_SC_2: |
1da177e4 | 886 | ERROR_SC_1: |
1da177e4 LT |
887 | return err; |
888 | } | |
889 | ||
34875337 JD |
890 | #define IN_UNIT_ATTRS(X) \ |
891 | &sensor_dev_attr_in##X##_input.dev_attr.attr, \ | |
892 | &sensor_dev_attr_in##X##_min.dev_attr.attr, \ | |
293c0997 | 893 | &sensor_dev_attr_in##X##_max.dev_attr.attr, \ |
7d4a1374 JD |
894 | &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \ |
895 | &sensor_dev_attr_in##X##_beep.dev_attr.attr | |
311ce2ef | 896 | |
34875337 JD |
897 | #define FAN_UNIT_ATTRS(X) \ |
898 | &sensor_dev_attr_fan##X##_input.dev_attr.attr, \ | |
899 | &sensor_dev_attr_fan##X##_min.dev_attr.attr, \ | |
7d4a1374 JD |
900 | &sensor_dev_attr_fan##X##_div.dev_attr.attr, \ |
901 | &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \ | |
902 | &sensor_dev_attr_fan##X##_beep.dev_attr.attr | |
311ce2ef | 903 | |
34875337 JD |
904 | #define TEMP_UNIT_ATTRS(X) \ |
905 | &sensor_dev_attr_temp##X##_input.dev_attr.attr, \ | |
906 | &sensor_dev_attr_temp##X##_max.dev_attr.attr, \ | |
7d4a1374 JD |
907 | &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \ |
908 | &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \ | |
909 | &sensor_dev_attr_temp##X##_beep.dev_attr.attr | |
311ce2ef JC |
910 | |
911 | static struct attribute* w83781d_attributes[] = { | |
912 | IN_UNIT_ATTRS(0), | |
913 | IN_UNIT_ATTRS(2), | |
914 | IN_UNIT_ATTRS(3), | |
915 | IN_UNIT_ATTRS(4), | |
916 | IN_UNIT_ATTRS(5), | |
917 | IN_UNIT_ATTRS(6), | |
918 | FAN_UNIT_ATTRS(1), | |
919 | FAN_UNIT_ATTRS(2), | |
920 | FAN_UNIT_ATTRS(3), | |
921 | TEMP_UNIT_ATTRS(1), | |
922 | TEMP_UNIT_ATTRS(2), | |
923 | &dev_attr_cpu0_vid.attr, | |
924 | &dev_attr_vrm.attr, | |
925 | &dev_attr_alarms.attr, | |
926 | &dev_attr_beep_mask.attr, | |
2fbbbf14 | 927 | &sensor_dev_attr_beep_enable.dev_attr.attr, |
311ce2ef JC |
928 | NULL |
929 | }; | |
930 | static const struct attribute_group w83781d_group = { | |
931 | .attrs = w83781d_attributes, | |
932 | }; | |
933 | ||
934 | static struct attribute *w83781d_attributes_opt[] = { | |
935 | IN_UNIT_ATTRS(1), | |
936 | IN_UNIT_ATTRS(7), | |
937 | IN_UNIT_ATTRS(8), | |
938 | TEMP_UNIT_ATTRS(3), | |
34875337 JD |
939 | &sensor_dev_attr_pwm1.dev_attr.attr, |
940 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
941 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
942 | &sensor_dev_attr_pwm4.dev_attr.attr, | |
311ce2ef | 943 | &dev_attr_pwm2_enable.attr, |
34875337 JD |
944 | &sensor_dev_attr_temp1_type.dev_attr.attr, |
945 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
946 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
311ce2ef JC |
947 | NULL |
948 | }; | |
949 | static const struct attribute_group w83781d_group_opt = { | |
950 | .attrs = w83781d_attributes_opt, | |
951 | }; | |
952 | ||
7666c13c | 953 | /* No clean up is done on error, it's up to the caller */ |
1da177e4 | 954 | static int |
7666c13c | 955 | w83781d_create_files(struct device *dev, int kind, int is_isa) |
1da177e4 | 956 | { |
1da177e4 | 957 | int err; |
1da177e4 | 958 | |
7666c13c JD |
959 | if ((err = sysfs_create_group(&dev->kobj, &w83781d_group))) |
960 | return err; | |
961 | ||
962 | if (kind != w83783s) { | |
34875337 JD |
963 | if ((err = device_create_file(dev, |
964 | &sensor_dev_attr_in1_input.dev_attr)) | |
965 | || (err = device_create_file(dev, | |
966 | &sensor_dev_attr_in1_min.dev_attr)) | |
967 | || (err = device_create_file(dev, | |
7d4a1374 JD |
968 | &sensor_dev_attr_in1_max.dev_attr)) |
969 | || (err = device_create_file(dev, | |
970 | &sensor_dev_attr_in1_alarm.dev_attr)) | |
971 | || (err = device_create_file(dev, | |
972 | &sensor_dev_attr_in1_beep.dev_attr))) | |
7666c13c JD |
973 | return err; |
974 | } | |
975 | if (kind != as99127f && kind != w83781d && kind != w83783s) { | |
34875337 JD |
976 | if ((err = device_create_file(dev, |
977 | &sensor_dev_attr_in7_input.dev_attr)) | |
978 | || (err = device_create_file(dev, | |
979 | &sensor_dev_attr_in7_min.dev_attr)) | |
980 | || (err = device_create_file(dev, | |
981 | &sensor_dev_attr_in7_max.dev_attr)) | |
7d4a1374 JD |
982 | || (err = device_create_file(dev, |
983 | &sensor_dev_attr_in7_alarm.dev_attr)) | |
984 | || (err = device_create_file(dev, | |
985 | &sensor_dev_attr_in7_beep.dev_attr)) | |
34875337 JD |
986 | || (err = device_create_file(dev, |
987 | &sensor_dev_attr_in8_input.dev_attr)) | |
988 | || (err = device_create_file(dev, | |
989 | &sensor_dev_attr_in8_min.dev_attr)) | |
990 | || (err = device_create_file(dev, | |
7d4a1374 JD |
991 | &sensor_dev_attr_in8_max.dev_attr)) |
992 | || (err = device_create_file(dev, | |
993 | &sensor_dev_attr_in8_alarm.dev_attr)) | |
994 | || (err = device_create_file(dev, | |
995 | &sensor_dev_attr_in8_beep.dev_attr))) | |
7666c13c JD |
996 | return err; |
997 | } | |
998 | if (kind != w83783s) { | |
34875337 JD |
999 | if ((err = device_create_file(dev, |
1000 | &sensor_dev_attr_temp3_input.dev_attr)) | |
1001 | || (err = device_create_file(dev, | |
1002 | &sensor_dev_attr_temp3_max.dev_attr)) | |
7666c13c | 1003 | || (err = device_create_file(dev, |
7d4a1374 JD |
1004 | &sensor_dev_attr_temp3_max_hyst.dev_attr)) |
1005 | || (err = device_create_file(dev, | |
1006 | &sensor_dev_attr_temp3_alarm.dev_attr)) | |
1007 | || (err = device_create_file(dev, | |
1008 | &sensor_dev_attr_temp3_beep.dev_attr))) | |
7666c13c | 1009 | return err; |
7d4a1374 | 1010 | |
7768aa76 | 1011 | if (kind != w83781d) { |
7d4a1374 JD |
1012 | err = sysfs_chmod_file(&dev->kobj, |
1013 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, | |
1014 | S_IRUGO | S_IWUSR); | |
1015 | if (err) | |
1016 | return err; | |
7768aa76 | 1017 | } |
1da177e4 LT |
1018 | } |
1019 | ||
7666c13c | 1020 | if (kind != w83781d && kind != as99127f) { |
34875337 JD |
1021 | if ((err = device_create_file(dev, |
1022 | &sensor_dev_attr_pwm1.dev_attr)) | |
1023 | || (err = device_create_file(dev, | |
1024 | &sensor_dev_attr_pwm2.dev_attr)) | |
7666c13c JD |
1025 | || (err = device_create_file(dev, &dev_attr_pwm2_enable))) |
1026 | return err; | |
1da177e4 | 1027 | } |
7666c13c | 1028 | if (kind == w83782d && !is_isa) { |
34875337 JD |
1029 | if ((err = device_create_file(dev, |
1030 | &sensor_dev_attr_pwm3.dev_attr)) | |
1031 | || (err = device_create_file(dev, | |
1032 | &sensor_dev_attr_pwm4.dev_attr))) | |
7666c13c JD |
1033 | return err; |
1034 | } | |
1035 | ||
1036 | if (kind != as99127f && kind != w83781d) { | |
34875337 JD |
1037 | if ((err = device_create_file(dev, |
1038 | &sensor_dev_attr_temp1_type.dev_attr)) | |
7666c13c | 1039 | || (err = device_create_file(dev, |
34875337 | 1040 | &sensor_dev_attr_temp2_type.dev_attr))) |
7666c13c JD |
1041 | return err; |
1042 | if (kind != w83783s) { | |
1043 | if ((err = device_create_file(dev, | |
34875337 | 1044 | &sensor_dev_attr_temp3_type.dev_attr))) |
7666c13c | 1045 | return err; |
1da177e4 | 1046 | } |
7666c13c | 1047 | } |
1da177e4 | 1048 | |
7666c13c JD |
1049 | return 0; |
1050 | } | |
1da177e4 | 1051 | |
0217eae3 | 1052 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
7666c13c | 1053 | static int |
310ec792 | 1054 | w83781d_detect(struct i2c_client *client, struct i2c_board_info *info) |
7666c13c | 1055 | { |
bab2bf44 | 1056 | int val1, val2; |
0217eae3 WG |
1057 | struct w83781d_data *isa = w83781d_data_if_isa(); |
1058 | struct i2c_adapter *adapter = client->adapter; | |
1059 | int address = client->addr; | |
bab2bf44 | 1060 | const char *client_name; |
7666c13c JD |
1061 | enum vendor { winbond, asus } vendid; |
1062 | ||
0217eae3 WG |
1063 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) |
1064 | return -ENODEV; | |
1da177e4 | 1065 | |
0217eae3 WG |
1066 | /* We block updates of the ISA device to minimize the risk of |
1067 | concurrent access to the same W83781D chip through different | |
1068 | interfaces. */ | |
1069 | if (isa) | |
1070 | mutex_lock(&isa->update_lock); | |
1da177e4 | 1071 | |
bab2bf44 JD |
1072 | if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) { |
1073 | dev_dbg(&adapter->dev, | |
1074 | "Detection of w83781d chip failed at step 3\n"); | |
1075 | goto err_nodev; | |
1076 | } | |
1077 | ||
1078 | val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK); | |
1079 | val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); | |
1080 | /* Check for Winbond or Asus ID if in bank 0 */ | |
1081 | if (!(val1 & 0x07) && | |
1082 | ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) || | |
1083 | ( (val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) { | |
1084 | dev_dbg(&adapter->dev, | |
1085 | "Detection of w83781d chip failed at step 4\n"); | |
1086 | goto err_nodev; | |
1087 | } | |
1088 | /* If Winbond SMBus, check address at 0x48. | |
1089 | Asus doesn't support, except for as99127f rev.2 */ | |
1090 | if ((!(val1 & 0x80) && val2 == 0xa3) || | |
1091 | ( (val1 & 0x80) && val2 == 0x5c)) { | |
1092 | if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR) | |
1093 | != address) { | |
1094 | dev_dbg(&adapter->dev, | |
1095 | "Detection of w83781d chip failed at step 5\n"); | |
0217eae3 | 1096 | goto err_nodev; |
1da177e4 | 1097 | } |
1da177e4 LT |
1098 | } |
1099 | ||
bab2bf44 | 1100 | /* Put it now into bank 0 and Vendor ID High Byte */ |
0217eae3 WG |
1101 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, |
1102 | (i2c_smbus_read_byte_data(client, W83781D_REG_BANK) | |
1103 | & 0x78) | 0x80); | |
1da177e4 | 1104 | |
bab2bf44 JD |
1105 | /* Get the vendor ID */ |
1106 | val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); | |
1107 | if (val2 == 0x5c) | |
1108 | vendid = winbond; | |
1109 | else if (val2 == 0x12) | |
1110 | vendid = asus; | |
1111 | else { | |
1112 | dev_dbg(&adapter->dev, | |
1113 | "w83781d chip vendor is neither Winbond nor Asus\n"); | |
1114 | goto err_nodev; | |
1da177e4 LT |
1115 | } |
1116 | ||
bab2bf44 JD |
1117 | /* Determine the chip type. */ |
1118 | val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID); | |
1119 | if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) | |
1da177e4 | 1120 | client_name = "w83781d"; |
bab2bf44 | 1121 | else if (val1 == 0x30 && vendid == winbond) |
1da177e4 | 1122 | client_name = "w83782d"; |
bab2bf44 | 1123 | else if (val1 == 0x40 && vendid == winbond && address == 0x2d) |
1da177e4 | 1124 | client_name = "w83783s"; |
bab2bf44 | 1125 | else if (val1 == 0x31) |
1da177e4 | 1126 | client_name = "as99127f"; |
bab2bf44 JD |
1127 | else |
1128 | goto err_nodev; | |
1129 | ||
1130 | if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) { | |
1131 | dev_dbg(&adapter->dev, "Device at 0x%02x appears to " | |
1132 | "be the same as ISA device\n", address); | |
1133 | goto err_nodev; | |
1da177e4 LT |
1134 | } |
1135 | ||
bab2bf44 JD |
1136 | if (isa) |
1137 | mutex_unlock(&isa->update_lock); | |
1138 | ||
0217eae3 WG |
1139 | strlcpy(info->type, client_name, I2C_NAME_SIZE); |
1140 | ||
1141 | return 0; | |
1142 | ||
1143 | err_nodev: | |
1144 | if (isa) | |
1145 | mutex_unlock(&isa->update_lock); | |
1146 | return -ENODEV; | |
1147 | } | |
1148 | ||
1149 | static int | |
1150 | w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id) | |
1151 | { | |
1152 | struct device *dev = &client->dev; | |
1153 | struct w83781d_data *data; | |
1154 | int err; | |
1155 | ||
1156 | data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL); | |
1157 | if (!data) { | |
1158 | err = -ENOMEM; | |
1159 | goto ERROR1; | |
1160 | } | |
1161 | ||
1162 | i2c_set_clientdata(client, data); | |
1163 | mutex_init(&data->lock); | |
1164 | mutex_init(&data->update_lock); | |
1da177e4 | 1165 | |
0217eae3 WG |
1166 | data->type = id->driver_data; |
1167 | data->client = client; | |
1da177e4 LT |
1168 | |
1169 | /* attach secondary i2c lm75-like clients */ | |
0217eae3 WG |
1170 | err = w83781d_detect_subclients(client); |
1171 | if (err) | |
7666c13c | 1172 | goto ERROR3; |
1da177e4 LT |
1173 | |
1174 | /* Initialize the chip */ | |
7666c13c | 1175 | w83781d_init_device(dev); |
1da177e4 LT |
1176 | |
1177 | /* Register sysfs hooks */ | |
0217eae3 | 1178 | err = w83781d_create_files(dev, data->type, 0); |
7666c13c | 1179 | if (err) |
943b0830 | 1180 | goto ERROR4; |
943b0830 | 1181 | |
1beeffe4 TJ |
1182 | data->hwmon_dev = hwmon_device_register(dev); |
1183 | if (IS_ERR(data->hwmon_dev)) { | |
1184 | err = PTR_ERR(data->hwmon_dev); | |
311ce2ef | 1185 | goto ERROR4; |
1da177e4 LT |
1186 | } |
1187 | ||
1188 | return 0; | |
1189 | ||
943b0830 | 1190 | ERROR4: |
311ce2ef JC |
1191 | sysfs_remove_group(&dev->kobj, &w83781d_group); |
1192 | sysfs_remove_group(&dev->kobj, &w83781d_group_opt); | |
1193 | ||
0217eae3 WG |
1194 | if (data->lm75[0]) |
1195 | i2c_unregister_device(data->lm75[0]); | |
1196 | if (data->lm75[1]) | |
1197 | i2c_unregister_device(data->lm75[1]); | |
1da177e4 | 1198 | ERROR3: |
0217eae3 | 1199 | i2c_set_clientdata(client, NULL); |
1da177e4 LT |
1200 | kfree(data); |
1201 | ERROR1: | |
1da177e4 LT |
1202 | return err; |
1203 | } | |
1204 | ||
1205 | static int | |
0217eae3 | 1206 | w83781d_remove(struct i2c_client *client) |
1da177e4 | 1207 | { |
943b0830 | 1208 | struct w83781d_data *data = i2c_get_clientdata(client); |
0217eae3 | 1209 | struct device *dev = &client->dev; |
1da177e4 | 1210 | |
0217eae3 | 1211 | hwmon_device_unregister(data->hwmon_dev); |
1da177e4 | 1212 | |
0217eae3 WG |
1213 | sysfs_remove_group(&dev->kobj, &w83781d_group); |
1214 | sysfs_remove_group(&dev->kobj, &w83781d_group_opt); | |
1da177e4 | 1215 | |
0217eae3 WG |
1216 | if (data->lm75[0]) |
1217 | i2c_unregister_device(data->lm75[0]); | |
1218 | if (data->lm75[1]) | |
1219 | i2c_unregister_device(data->lm75[1]); | |
943b0830 | 1220 | |
0217eae3 WG |
1221 | i2c_set_clientdata(client, NULL); |
1222 | kfree(data); | |
1da177e4 LT |
1223 | |
1224 | return 0; | |
1225 | } | |
1226 | ||
1da177e4 | 1227 | static int |
443850ce | 1228 | w83781d_read_value_i2c(struct w83781d_data *data, u16 reg) |
1da177e4 | 1229 | { |
0217eae3 | 1230 | struct i2c_client *client = data->client; |
443850ce | 1231 | int res, bank; |
1da177e4 LT |
1232 | struct i2c_client *cl; |
1233 | ||
443850ce WG |
1234 | bank = (reg >> 8) & 0x0f; |
1235 | if (bank > 2) | |
1236 | /* switch banks */ | |
1237 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1238 | bank); | |
1239 | if (bank == 0 || bank > 2) { | |
1240 | res = i2c_smbus_read_byte_data(client, reg & 0xff); | |
1da177e4 | 1241 | } else { |
443850ce WG |
1242 | /* switch to subclient */ |
1243 | cl = data->lm75[bank - 1]; | |
1244 | /* convert from ISA to LM75 I2C addresses */ | |
1245 | switch (reg & 0xff) { | |
1246 | case 0x50: /* TEMP */ | |
1247 | res = swab16(i2c_smbus_read_word_data(cl, 0)); | |
1248 | break; | |
1249 | case 0x52: /* CONFIG */ | |
1250 | res = i2c_smbus_read_byte_data(cl, 1); | |
1251 | break; | |
1252 | case 0x53: /* HYST */ | |
1253 | res = swab16(i2c_smbus_read_word_data(cl, 2)); | |
1254 | break; | |
1255 | case 0x55: /* OVER */ | |
1256 | default: | |
1257 | res = swab16(i2c_smbus_read_word_data(cl, 3)); | |
1258 | break; | |
1da177e4 | 1259 | } |
1da177e4 | 1260 | } |
443850ce WG |
1261 | if (bank > 2) |
1262 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1263 | ||
1da177e4 LT |
1264 | return res; |
1265 | } | |
1266 | ||
1267 | static int | |
443850ce | 1268 | w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value) |
1da177e4 | 1269 | { |
0217eae3 | 1270 | struct i2c_client *client = data->client; |
443850ce | 1271 | int bank; |
1da177e4 LT |
1272 | struct i2c_client *cl; |
1273 | ||
443850ce WG |
1274 | bank = (reg >> 8) & 0x0f; |
1275 | if (bank > 2) | |
1276 | /* switch banks */ | |
1277 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1278 | bank); | |
1279 | if (bank == 0 || bank > 2) { | |
1280 | i2c_smbus_write_byte_data(client, reg & 0xff, | |
1281 | value & 0xff); | |
1da177e4 | 1282 | } else { |
443850ce WG |
1283 | /* switch to subclient */ |
1284 | cl = data->lm75[bank - 1]; | |
1285 | /* convert from ISA to LM75 I2C addresses */ | |
1286 | switch (reg & 0xff) { | |
1287 | case 0x52: /* CONFIG */ | |
1288 | i2c_smbus_write_byte_data(cl, 1, value & 0xff); | |
1289 | break; | |
1290 | case 0x53: /* HYST */ | |
1291 | i2c_smbus_write_word_data(cl, 2, swab16(value)); | |
1292 | break; | |
1293 | case 0x55: /* OVER */ | |
1294 | i2c_smbus_write_word_data(cl, 3, swab16(value)); | |
1295 | break; | |
1da177e4 | 1296 | } |
1da177e4 | 1297 | } |
443850ce WG |
1298 | if (bank > 2) |
1299 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1300 | ||
1da177e4 LT |
1301 | return 0; |
1302 | } | |
1303 | ||
1da177e4 | 1304 | static void |
7666c13c | 1305 | w83781d_init_device(struct device *dev) |
1da177e4 | 1306 | { |
7666c13c | 1307 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
1308 | int i, p; |
1309 | int type = data->type; | |
1310 | u8 tmp; | |
1311 | ||
fabddcd4 | 1312 | if (reset && type != as99127f) { /* this resets registers we don't have |
1da177e4 | 1313 | documentation for on the as99127f */ |
fabddcd4 JD |
1314 | /* Resetting the chip has been the default for a long time, |
1315 | but it causes the BIOS initializations (fan clock dividers, | |
1316 | thermal sensor types...) to be lost, so it is now optional. | |
1317 | It might even go away if nobody reports it as being useful, | |
1318 | as I see very little reason why this would be needed at | |
1319 | all. */ | |
7666c13c | 1320 | dev_info(dev, "If reset=1 solved a problem you were " |
fabddcd4 JD |
1321 | "having, please report!\n"); |
1322 | ||
1da177e4 | 1323 | /* save these registers */ |
31b8dc4d JD |
1324 | i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
1325 | p = w83781d_read_value(data, W83781D_REG_PWMCLK12); | |
1da177e4 LT |
1326 | /* Reset all except Watchdog values and last conversion values |
1327 | This sets fan-divs to 2, among others */ | |
31b8dc4d | 1328 | w83781d_write_value(data, W83781D_REG_CONFIG, 0x80); |
1da177e4 LT |
1329 | /* Restore the registers and disable power-on abnormal beep. |
1330 | This saves FAN 1/2/3 input/output values set by BIOS. */ | |
31b8dc4d JD |
1331 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); |
1332 | w83781d_write_value(data, W83781D_REG_PWMCLK12, p); | |
1da177e4 LT |
1333 | /* Disable master beep-enable (reset turns it on). |
1334 | Individual beep_mask should be reset to off but for some reason | |
1335 | disabling this bit helps some people not get beeped */ | |
31b8dc4d | 1336 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0); |
1da177e4 LT |
1337 | } |
1338 | ||
fabddcd4 JD |
1339 | /* Disable power-on abnormal beep, as advised by the datasheet. |
1340 | Already done if reset=1. */ | |
1341 | if (init && !reset && type != as99127f) { | |
31b8dc4d JD |
1342 | i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
1343 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); | |
fabddcd4 JD |
1344 | } |
1345 | ||
303760b4 | 1346 | data->vrm = vid_which_vrm(); |
1da177e4 LT |
1347 | |
1348 | if ((type != w83781d) && (type != as99127f)) { | |
31b8dc4d | 1349 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
1da177e4 LT |
1350 | for (i = 1; i <= 3; i++) { |
1351 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
b26f9330 | 1352 | data->sens[i - 1] = 4; |
1da177e4 LT |
1353 | } else { |
1354 | if (w83781d_read_value | |
31b8dc4d | 1355 | (data, |
1da177e4 LT |
1356 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) |
1357 | data->sens[i - 1] = 1; | |
1358 | else | |
1359 | data->sens[i - 1] = 2; | |
1360 | } | |
7c7a5304 | 1361 | if (type == w83783s && i == 2) |
1da177e4 LT |
1362 | break; |
1363 | } | |
1364 | } | |
1365 | ||
1366 | if (init && type != as99127f) { | |
1367 | /* Enable temp2 */ | |
31b8dc4d | 1368 | tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG); |
1da177e4 | 1369 | if (tmp & 0x01) { |
7666c13c | 1370 | dev_warn(dev, "Enabling temp2, readings " |
1da177e4 | 1371 | "might not make sense\n"); |
31b8dc4d | 1372 | w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG, |
1da177e4 LT |
1373 | tmp & 0xfe); |
1374 | } | |
1375 | ||
1376 | /* Enable temp3 */ | |
7c7a5304 | 1377 | if (type != w83783s) { |
31b8dc4d | 1378 | tmp = w83781d_read_value(data, |
1da177e4 LT |
1379 | W83781D_REG_TEMP3_CONFIG); |
1380 | if (tmp & 0x01) { | |
7666c13c | 1381 | dev_warn(dev, "Enabling temp3, " |
1da177e4 | 1382 | "readings might not make sense\n"); |
31b8dc4d | 1383 | w83781d_write_value(data, |
1da177e4 LT |
1384 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); |
1385 | } | |
1386 | } | |
1da177e4 LT |
1387 | } |
1388 | ||
1389 | /* Start monitoring */ | |
31b8dc4d JD |
1390 | w83781d_write_value(data, W83781D_REG_CONFIG, |
1391 | (w83781d_read_value(data, | |
1da177e4 LT |
1392 | W83781D_REG_CONFIG) & 0xf7) |
1393 | | 0x01); | |
7666c13c JD |
1394 | |
1395 | /* A few vars need to be filled upon startup */ | |
34875337 JD |
1396 | for (i = 0; i < 3; i++) { |
1397 | data->fan_min[i] = w83781d_read_value(data, | |
7666c13c JD |
1398 | W83781D_REG_FAN_MIN(i)); |
1399 | } | |
7666c13c JD |
1400 | |
1401 | mutex_init(&data->update_lock); | |
1da177e4 LT |
1402 | } |
1403 | ||
1404 | static struct w83781d_data *w83781d_update_device(struct device *dev) | |
1405 | { | |
7666c13c | 1406 | struct w83781d_data *data = dev_get_drvdata(dev); |
0217eae3 | 1407 | struct i2c_client *client = data->client; |
1da177e4 LT |
1408 | int i; |
1409 | ||
9a61bf63 | 1410 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1411 | |
1412 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1413 | || !data->valid) { | |
1414 | dev_dbg(dev, "Starting device update\n"); | |
1415 | ||
1416 | for (i = 0; i <= 8; i++) { | |
7c7a5304 | 1417 | if (data->type == w83783s && i == 1) |
1da177e4 LT |
1418 | continue; /* 783S has no in1 */ |
1419 | data->in[i] = | |
31b8dc4d | 1420 | w83781d_read_value(data, W83781D_REG_IN(i)); |
1da177e4 | 1421 | data->in_min[i] = |
31b8dc4d | 1422 | w83781d_read_value(data, W83781D_REG_IN_MIN(i)); |
1da177e4 | 1423 | data->in_max[i] = |
31b8dc4d | 1424 | w83781d_read_value(data, W83781D_REG_IN_MAX(i)); |
05663368 | 1425 | if ((data->type != w83782d) && (i == 6)) |
1da177e4 LT |
1426 | break; |
1427 | } | |
34875337 JD |
1428 | for (i = 0; i < 3; i++) { |
1429 | data->fan[i] = | |
31b8dc4d | 1430 | w83781d_read_value(data, W83781D_REG_FAN(i)); |
34875337 | 1431 | data->fan_min[i] = |
31b8dc4d | 1432 | w83781d_read_value(data, W83781D_REG_FAN_MIN(i)); |
1da177e4 LT |
1433 | } |
1434 | if (data->type != w83781d && data->type != as99127f) { | |
34875337 JD |
1435 | for (i = 0; i < 4; i++) { |
1436 | data->pwm[i] = | |
31b8dc4d | 1437 | w83781d_read_value(data, |
34875337 | 1438 | W83781D_REG_PWM[i]); |
848ddf11 JD |
1439 | /* Only W83782D on SMBus has PWM3 and PWM4 */ |
1440 | if ((data->type != w83782d || !client) | |
34875337 | 1441 | && i == 1) |
1da177e4 LT |
1442 | break; |
1443 | } | |
1444 | /* Only PWM2 can be disabled */ | |
34875337 | 1445 | data->pwm2_enable = (w83781d_read_value(data, |
1da177e4 LT |
1446 | W83781D_REG_PWMCLK12) & 0x08) >> 3; |
1447 | } | |
1448 | ||
31b8dc4d | 1449 | data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1)); |
1da177e4 | 1450 | data->temp_max = |
31b8dc4d | 1451 | w83781d_read_value(data, W83781D_REG_TEMP_OVER(1)); |
1da177e4 | 1452 | data->temp_max_hyst = |
31b8dc4d | 1453 | w83781d_read_value(data, W83781D_REG_TEMP_HYST(1)); |
1da177e4 | 1454 | data->temp_add[0] = |
31b8dc4d | 1455 | w83781d_read_value(data, W83781D_REG_TEMP(2)); |
1da177e4 | 1456 | data->temp_max_add[0] = |
31b8dc4d | 1457 | w83781d_read_value(data, W83781D_REG_TEMP_OVER(2)); |
1da177e4 | 1458 | data->temp_max_hyst_add[0] = |
31b8dc4d | 1459 | w83781d_read_value(data, W83781D_REG_TEMP_HYST(2)); |
7c7a5304 | 1460 | if (data->type != w83783s) { |
1da177e4 | 1461 | data->temp_add[1] = |
31b8dc4d | 1462 | w83781d_read_value(data, W83781D_REG_TEMP(3)); |
1da177e4 | 1463 | data->temp_max_add[1] = |
31b8dc4d | 1464 | w83781d_read_value(data, |
1da177e4 LT |
1465 | W83781D_REG_TEMP_OVER(3)); |
1466 | data->temp_max_hyst_add[1] = | |
31b8dc4d | 1467 | w83781d_read_value(data, |
1da177e4 LT |
1468 | W83781D_REG_TEMP_HYST(3)); |
1469 | } | |
31b8dc4d | 1470 | i = w83781d_read_value(data, W83781D_REG_VID_FANDIV); |
7c7a5304 | 1471 | data->vid = i & 0x0f; |
31b8dc4d | 1472 | data->vid |= (w83781d_read_value(data, |
7c7a5304 | 1473 | W83781D_REG_CHIPID) & 0x01) << 4; |
1da177e4 LT |
1474 | data->fan_div[0] = (i >> 4) & 0x03; |
1475 | data->fan_div[1] = (i >> 6) & 0x03; | |
31b8dc4d | 1476 | data->fan_div[2] = (w83781d_read_value(data, |
7c7a5304 | 1477 | W83781D_REG_PIN) >> 6) & 0x03; |
1da177e4 | 1478 | if ((data->type != w83781d) && (data->type != as99127f)) { |
31b8dc4d | 1479 | i = w83781d_read_value(data, W83781D_REG_VBAT); |
1da177e4 LT |
1480 | data->fan_div[0] |= (i >> 3) & 0x04; |
1481 | data->fan_div[1] |= (i >> 4) & 0x04; | |
7c7a5304 | 1482 | data->fan_div[2] |= (i >> 5) & 0x04; |
1da177e4 | 1483 | } |
05663368 | 1484 | if (data->type == w83782d) { |
31b8dc4d | 1485 | data->alarms = w83781d_read_value(data, |
c7f5d7ed | 1486 | W83782D_REG_ALARM1) |
31b8dc4d | 1487 | | (w83781d_read_value(data, |
c7f5d7ed | 1488 | W83782D_REG_ALARM2) << 8) |
31b8dc4d | 1489 | | (w83781d_read_value(data, |
c7f5d7ed JD |
1490 | W83782D_REG_ALARM3) << 16); |
1491 | } else if (data->type == w83783s) { | |
31b8dc4d | 1492 | data->alarms = w83781d_read_value(data, |
c7f5d7ed | 1493 | W83782D_REG_ALARM1) |
31b8dc4d | 1494 | | (w83781d_read_value(data, |
c7f5d7ed JD |
1495 | W83782D_REG_ALARM2) << 8); |
1496 | } else { | |
1497 | /* No real-time status registers, fall back to | |
1498 | interrupt status registers */ | |
31b8dc4d | 1499 | data->alarms = w83781d_read_value(data, |
c7f5d7ed | 1500 | W83781D_REG_ALARM1) |
31b8dc4d | 1501 | | (w83781d_read_value(data, |
c7f5d7ed | 1502 | W83781D_REG_ALARM2) << 8); |
1da177e4 | 1503 | } |
31b8dc4d | 1504 | i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); |
2fbbbf14 | 1505 | data->beep_mask = (i << 8) + |
31b8dc4d | 1506 | w83781d_read_value(data, W83781D_REG_BEEP_INTS1); |
1da177e4 LT |
1507 | if ((data->type != w83781d) && (data->type != as99127f)) { |
1508 | data->beep_mask |= | |
31b8dc4d | 1509 | w83781d_read_value(data, |
1da177e4 LT |
1510 | W83781D_REG_BEEP_INTS3) << 16; |
1511 | } | |
1512 | data->last_updated = jiffies; | |
1513 | data->valid = 1; | |
1514 | } | |
1515 | ||
9a61bf63 | 1516 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1517 | |
1518 | return data; | |
1519 | } | |
1520 | ||
0217eae3 WG |
1521 | static const struct i2c_device_id w83781d_ids[] = { |
1522 | { "w83781d", w83781d, }, | |
1523 | { "w83782d", w83782d, }, | |
1524 | { "w83783s", w83783s, }, | |
1525 | { "as99127f", as99127f }, | |
1526 | { /* LIST END */ } | |
1527 | }; | |
1528 | MODULE_DEVICE_TABLE(i2c, w83781d_ids); | |
1529 | ||
1530 | static struct i2c_driver w83781d_driver = { | |
1531 | .class = I2C_CLASS_HWMON, | |
1532 | .driver = { | |
1533 | .name = "w83781d", | |
1534 | }, | |
1535 | .probe = w83781d_probe, | |
1536 | .remove = w83781d_remove, | |
1537 | .id_table = w83781d_ids, | |
1538 | .detect = w83781d_detect, | |
c3813d6a | 1539 | .address_list = normal_i2c, |
0217eae3 WG |
1540 | }; |
1541 | ||
1542 | /* | |
1543 | * ISA related code | |
1544 | */ | |
443850ce WG |
1545 | #ifdef CONFIG_ISA |
1546 | ||
1547 | /* ISA device, if found */ | |
1548 | static struct platform_device *pdev; | |
1549 | ||
1550 | static unsigned short isa_address = 0x290; | |
1551 | ||
1552 | /* I2C devices get this name attribute automatically, but for ISA devices | |
1553 | we must create it by ourselves. */ | |
1554 | static ssize_t | |
1555 | show_name(struct device *dev, struct device_attribute *devattr, char *buf) | |
1556 | { | |
1557 | struct w83781d_data *data = dev_get_drvdata(dev); | |
360782dd | 1558 | return sprintf(buf, "%s\n", data->name); |
443850ce WG |
1559 | } |
1560 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1561 | ||
1562 | static struct w83781d_data *w83781d_data_if_isa(void) | |
1563 | { | |
1564 | return pdev ? platform_get_drvdata(pdev) : NULL; | |
1565 | } | |
1566 | ||
1567 | /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */ | |
1568 | static int w83781d_alias_detect(struct i2c_client *client, u8 chipid) | |
1569 | { | |
0217eae3 | 1570 | struct w83781d_data *isa; |
443850ce WG |
1571 | int i; |
1572 | ||
1573 | if (!pdev) /* No ISA chip */ | |
1574 | return 0; | |
1575 | ||
443850ce WG |
1576 | isa = platform_get_drvdata(pdev); |
1577 | ||
1578 | if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr) | |
1579 | return 0; /* Address doesn't match */ | |
1580 | if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid) | |
1581 | return 0; /* Chip type doesn't match */ | |
1582 | ||
1583 | /* We compare all the limit registers, the config register and the | |
1584 | * interrupt mask registers */ | |
1585 | for (i = 0x2b; i <= 0x3d; i++) { | |
0217eae3 WG |
1586 | if (w83781d_read_value(isa, i) != |
1587 | i2c_smbus_read_byte_data(client, i)) | |
443850ce WG |
1588 | return 0; |
1589 | } | |
1590 | if (w83781d_read_value(isa, W83781D_REG_CONFIG) != | |
0217eae3 | 1591 | i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG)) |
443850ce WG |
1592 | return 0; |
1593 | for (i = 0x43; i <= 0x46; i++) { | |
0217eae3 WG |
1594 | if (w83781d_read_value(isa, i) != |
1595 | i2c_smbus_read_byte_data(client, i)) | |
443850ce WG |
1596 | return 0; |
1597 | } | |
1598 | ||
1599 | return 1; | |
1600 | } | |
1601 | ||
1602 | static int | |
1603 | w83781d_read_value_isa(struct w83781d_data *data, u16 reg) | |
1604 | { | |
443850ce WG |
1605 | int word_sized, res; |
1606 | ||
1607 | word_sized = (((reg & 0xff00) == 0x100) | |
1608 | || ((reg & 0xff00) == 0x200)) | |
1609 | && (((reg & 0x00ff) == 0x50) | |
1610 | || ((reg & 0x00ff) == 0x53) | |
1611 | || ((reg & 0x00ff) == 0x55)); | |
1612 | if (reg & 0xff00) { | |
1613 | outb_p(W83781D_REG_BANK, | |
360782dd | 1614 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1615 | outb_p(reg >> 8, |
360782dd | 1616 | data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce | 1617 | } |
360782dd JD |
1618 | outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); |
1619 | res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET); | |
443850ce WG |
1620 | if (word_sized) { |
1621 | outb_p((reg & 0xff) + 1, | |
360782dd | 1622 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1623 | res = |
360782dd | 1624 | (res << 8) + inb_p(data->isa_addr + |
443850ce WG |
1625 | W83781D_DATA_REG_OFFSET); |
1626 | } | |
1627 | if (reg & 0xff00) { | |
1628 | outb_p(W83781D_REG_BANK, | |
360782dd JD |
1629 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
1630 | outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); | |
443850ce WG |
1631 | } |
1632 | return res; | |
1633 | } | |
1634 | ||
1635 | static void | |
1636 | w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value) | |
1637 | { | |
443850ce WG |
1638 | int word_sized; |
1639 | ||
1640 | word_sized = (((reg & 0xff00) == 0x100) | |
1641 | || ((reg & 0xff00) == 0x200)) | |
1642 | && (((reg & 0x00ff) == 0x53) | |
1643 | || ((reg & 0x00ff) == 0x55)); | |
1644 | if (reg & 0xff00) { | |
1645 | outb_p(W83781D_REG_BANK, | |
360782dd | 1646 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1647 | outb_p(reg >> 8, |
360782dd | 1648 | data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce | 1649 | } |
360782dd | 1650 | outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce WG |
1651 | if (word_sized) { |
1652 | outb_p(value >> 8, | |
360782dd | 1653 | data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce | 1654 | outb_p((reg & 0xff) + 1, |
360782dd | 1655 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1656 | } |
360782dd | 1657 | outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce WG |
1658 | if (reg & 0xff00) { |
1659 | outb_p(W83781D_REG_BANK, | |
360782dd JD |
1660 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
1661 | outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); | |
443850ce WG |
1662 | } |
1663 | } | |
1664 | ||
1665 | /* The SMBus locks itself, usually, but nothing may access the Winbond between | |
1666 | bank switches. ISA access must always be locked explicitly! | |
1667 | We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, | |
1668 | would slow down the W83781D access and should not be necessary. | |
1669 | There are some ugly typecasts here, but the good news is - they should | |
1670 | nowhere else be necessary! */ | |
1671 | static int | |
1672 | w83781d_read_value(struct w83781d_data *data, u16 reg) | |
1673 | { | |
0217eae3 | 1674 | struct i2c_client *client = data->client; |
443850ce WG |
1675 | int res; |
1676 | ||
1677 | mutex_lock(&data->lock); | |
0217eae3 | 1678 | if (client) |
443850ce WG |
1679 | res = w83781d_read_value_i2c(data, reg); |
1680 | else | |
1681 | res = w83781d_read_value_isa(data, reg); | |
1682 | mutex_unlock(&data->lock); | |
1683 | return res; | |
1684 | } | |
1685 | ||
1686 | static int | |
1687 | w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) | |
1688 | { | |
0217eae3 | 1689 | struct i2c_client *client = data->client; |
443850ce WG |
1690 | |
1691 | mutex_lock(&data->lock); | |
0217eae3 | 1692 | if (client) |
443850ce WG |
1693 | w83781d_write_value_i2c(data, reg, value); |
1694 | else | |
1695 | w83781d_write_value_isa(data, reg, value); | |
1696 | mutex_unlock(&data->lock); | |
1697 | return 0; | |
1698 | } | |
1699 | ||
1700 | static int __devinit | |
1701 | w83781d_isa_probe(struct platform_device *pdev) | |
1702 | { | |
1703 | int err, reg; | |
1704 | struct w83781d_data *data; | |
1705 | struct resource *res; | |
443850ce WG |
1706 | |
1707 | /* Reserve the ISA region */ | |
1708 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
1709 | if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2, | |
1710 | "w83781d")) { | |
1711 | err = -EBUSY; | |
1712 | goto exit; | |
1713 | } | |
1714 | ||
1715 | data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL); | |
1716 | if (!data) { | |
1717 | err = -ENOMEM; | |
1718 | goto exit_release_region; | |
1719 | } | |
1720 | mutex_init(&data->lock); | |
360782dd | 1721 | data->isa_addr = res->start; |
443850ce WG |
1722 | platform_set_drvdata(pdev, data); |
1723 | ||
1724 | reg = w83781d_read_value(data, W83781D_REG_WCHIPID); | |
1725 | switch (reg) { | |
1726 | case 0x30: | |
1727 | data->type = w83782d; | |
360782dd | 1728 | data->name = "w83782d"; |
443850ce WG |
1729 | break; |
1730 | default: | |
1731 | data->type = w83781d; | |
360782dd | 1732 | data->name = "w83781d"; |
443850ce | 1733 | } |
443850ce WG |
1734 | |
1735 | /* Initialize the W83781D chip */ | |
1736 | w83781d_init_device(&pdev->dev); | |
1737 | ||
1738 | /* Register sysfs hooks */ | |
1739 | err = w83781d_create_files(&pdev->dev, data->type, 1); | |
1740 | if (err) | |
1741 | goto exit_remove_files; | |
1742 | ||
1743 | err = device_create_file(&pdev->dev, &dev_attr_name); | |
1744 | if (err) | |
1745 | goto exit_remove_files; | |
1746 | ||
1747 | data->hwmon_dev = hwmon_device_register(&pdev->dev); | |
1748 | if (IS_ERR(data->hwmon_dev)) { | |
1749 | err = PTR_ERR(data->hwmon_dev); | |
1750 | goto exit_remove_files; | |
1751 | } | |
1752 | ||
1753 | return 0; | |
1754 | ||
1755 | exit_remove_files: | |
1756 | sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); | |
1757 | sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); | |
1758 | device_remove_file(&pdev->dev, &dev_attr_name); | |
1759 | kfree(data); | |
1760 | exit_release_region: | |
1761 | release_region(res->start + W83781D_ADDR_REG_OFFSET, 2); | |
1762 | exit: | |
1763 | return err; | |
1764 | } | |
1765 | ||
1766 | static int __devexit | |
1767 | w83781d_isa_remove(struct platform_device *pdev) | |
1768 | { | |
1769 | struct w83781d_data *data = platform_get_drvdata(pdev); | |
1770 | ||
1771 | hwmon_device_unregister(data->hwmon_dev); | |
1772 | sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); | |
1773 | sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); | |
1774 | device_remove_file(&pdev->dev, &dev_attr_name); | |
360782dd | 1775 | release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2); |
443850ce WG |
1776 | kfree(data); |
1777 | ||
1778 | return 0; | |
1779 | } | |
1780 | ||
1781 | static struct platform_driver w83781d_isa_driver = { | |
1782 | .driver = { | |
1783 | .owner = THIS_MODULE, | |
1784 | .name = "w83781d", | |
1785 | }, | |
1786 | .probe = w83781d_isa_probe, | |
1787 | .remove = __devexit_p(w83781d_isa_remove), | |
1788 | }; | |
1789 | ||
7666c13c JD |
1790 | /* return 1 if a supported chip is found, 0 otherwise */ |
1791 | static int __init | |
1792 | w83781d_isa_found(unsigned short address) | |
1793 | { | |
1794 | int val, save, found = 0; | |
1795 | ||
2961cb22 JD |
1796 | /* We have to request the region in two parts because some |
1797 | boards declare base+4 to base+7 as a PNP device */ | |
1798 | if (!request_region(address, 4, "w83781d")) { | |
1799 | pr_debug("w83781d: Failed to request low part of region\n"); | |
7666c13c | 1800 | return 0; |
2961cb22 JD |
1801 | } |
1802 | if (!request_region(address + 4, 4, "w83781d")) { | |
1803 | pr_debug("w83781d: Failed to request high part of region\n"); | |
1804 | release_region(address, 4); | |
1805 | return 0; | |
1806 | } | |
7666c13c JD |
1807 | |
1808 | #define REALLY_SLOW_IO | |
1809 | /* We need the timeouts for at least some W83781D-like | |
1810 | chips. But only if we read 'undefined' registers. */ | |
1811 | val = inb_p(address + 1); | |
1812 | if (inb_p(address + 2) != val | |
1813 | || inb_p(address + 3) != val | |
1814 | || inb_p(address + 7) != val) { | |
1815 | pr_debug("w83781d: Detection failed at step 1\n"); | |
1816 | goto release; | |
1817 | } | |
1818 | #undef REALLY_SLOW_IO | |
1819 | ||
1820 | /* We should be able to change the 7 LSB of the address port. The | |
1821 | MSB (busy flag) should be clear initially, set after the write. */ | |
1822 | save = inb_p(address + W83781D_ADDR_REG_OFFSET); | |
1823 | if (save & 0x80) { | |
1824 | pr_debug("w83781d: Detection failed at step 2\n"); | |
1825 | goto release; | |
1826 | } | |
1827 | val = ~save & 0x7f; | |
1828 | outb_p(val, address + W83781D_ADDR_REG_OFFSET); | |
1829 | if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) { | |
1830 | outb_p(save, address + W83781D_ADDR_REG_OFFSET); | |
1831 | pr_debug("w83781d: Detection failed at step 3\n"); | |
1832 | goto release; | |
1833 | } | |
1834 | ||
1835 | /* We found a device, now see if it could be a W83781D */ | |
1836 | outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET); | |
1837 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1838 | if (val & 0x80) { | |
1839 | pr_debug("w83781d: Detection failed at step 4\n"); | |
1840 | goto release; | |
1841 | } | |
1842 | outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); | |
1843 | save = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1844 | outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET); | |
1845 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1846 | if ((!(save & 0x80) && (val != 0xa3)) | |
1847 | || ((save & 0x80) && (val != 0x5c))) { | |
1848 | pr_debug("w83781d: Detection failed at step 5\n"); | |
1849 | goto release; | |
1850 | } | |
1851 | outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET); | |
1852 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1853 | if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */ | |
1854 | pr_debug("w83781d: Detection failed at step 6\n"); | |
1855 | goto release; | |
1856 | } | |
1857 | ||
1858 | /* The busy flag should be clear again */ | |
1859 | if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) { | |
1860 | pr_debug("w83781d: Detection failed at step 7\n"); | |
1861 | goto release; | |
1862 | } | |
1863 | ||
1864 | /* Determine the chip type */ | |
1865 | outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); | |
1866 | save = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1867 | outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET); | |
1868 | outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET); | |
1869 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1870 | if ((val & 0xfe) == 0x10 /* W83781D */ | |
05663368 | 1871 | || val == 0x30) /* W83782D */ |
7666c13c JD |
1872 | found = 1; |
1873 | ||
1874 | if (found) | |
1875 | pr_info("w83781d: Found a %s chip at %#x\n", | |
7666c13c JD |
1876 | val == 0x30 ? "W83782D" : "W83781D", (int)address); |
1877 | ||
1878 | release: | |
2961cb22 JD |
1879 | release_region(address + 4, 4); |
1880 | release_region(address, 4); | |
7666c13c JD |
1881 | return found; |
1882 | } | |
1883 | ||
1884 | static int __init | |
1885 | w83781d_isa_device_add(unsigned short address) | |
1886 | { | |
1887 | struct resource res = { | |
1888 | .start = address, | |
15bde2f1 | 1889 | .end = address + W83781D_EXTENT - 1, |
7666c13c JD |
1890 | .name = "w83781d", |
1891 | .flags = IORESOURCE_IO, | |
1892 | }; | |
1893 | int err; | |
1894 | ||
1895 | pdev = platform_device_alloc("w83781d", address); | |
1896 | if (!pdev) { | |
1897 | err = -ENOMEM; | |
1898 | printk(KERN_ERR "w83781d: Device allocation failed\n"); | |
1899 | goto exit; | |
1900 | } | |
1901 | ||
1902 | err = platform_device_add_resources(pdev, &res, 1); | |
1903 | if (err) { | |
1904 | printk(KERN_ERR "w83781d: Device resource addition failed " | |
1905 | "(%d)\n", err); | |
1906 | goto exit_device_put; | |
1907 | } | |
1908 | ||
1909 | err = platform_device_add(pdev); | |
1910 | if (err) { | |
1911 | printk(KERN_ERR "w83781d: Device addition failed (%d)\n", | |
1912 | err); | |
1913 | goto exit_device_put; | |
1914 | } | |
1915 | ||
1916 | return 0; | |
1917 | ||
1918 | exit_device_put: | |
1919 | platform_device_put(pdev); | |
1920 | exit: | |
1921 | pdev = NULL; | |
1922 | return err; | |
1923 | } | |
1924 | ||
1da177e4 | 1925 | static int __init |
443850ce | 1926 | w83781d_isa_register(void) |
1da177e4 | 1927 | { |
fde09509 JD |
1928 | int res; |
1929 | ||
7666c13c JD |
1930 | if (w83781d_isa_found(isa_address)) { |
1931 | res = platform_driver_register(&w83781d_isa_driver); | |
1932 | if (res) | |
c6566206 | 1933 | goto exit; |
fde09509 | 1934 | |
7666c13c JD |
1935 | /* Sets global pdev as a side effect */ |
1936 | res = w83781d_isa_device_add(isa_address); | |
1937 | if (res) | |
1938 | goto exit_unreg_isa_driver; | |
1939 | } | |
fde09509 JD |
1940 | |
1941 | return 0; | |
7666c13c | 1942 | |
443850ce | 1943 | exit_unreg_isa_driver: |
7666c13c | 1944 | platform_driver_unregister(&w83781d_isa_driver); |
443850ce | 1945 | exit: |
7666c13c | 1946 | return res; |
1da177e4 LT |
1947 | } |
1948 | ||
dd56b638 | 1949 | static void |
443850ce | 1950 | w83781d_isa_unregister(void) |
1da177e4 | 1951 | { |
7666c13c JD |
1952 | if (pdev) { |
1953 | platform_device_unregister(pdev); | |
1954 | platform_driver_unregister(&w83781d_isa_driver); | |
1955 | } | |
443850ce WG |
1956 | } |
1957 | #else /* !CONFIG_ISA */ | |
1958 | ||
1959 | static struct w83781d_data *w83781d_data_if_isa(void) | |
1960 | { | |
1961 | return NULL; | |
1962 | } | |
1963 | ||
1964 | static int | |
1965 | w83781d_alias_detect(struct i2c_client *client, u8 chipid) | |
1966 | { | |
1967 | return 0; | |
1968 | } | |
1969 | ||
1970 | static int | |
1971 | w83781d_read_value(struct w83781d_data *data, u16 reg) | |
1972 | { | |
1973 | int res; | |
1974 | ||
1975 | mutex_lock(&data->lock); | |
1976 | res = w83781d_read_value_i2c(data, reg); | |
1977 | mutex_unlock(&data->lock); | |
1978 | ||
1979 | return res; | |
1980 | } | |
1981 | ||
1982 | static int | |
1983 | w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) | |
1984 | { | |
1985 | mutex_lock(&data->lock); | |
1986 | w83781d_write_value_i2c(data, reg, value); | |
1987 | mutex_unlock(&data->lock); | |
1988 | ||
1989 | return 0; | |
1990 | } | |
1991 | ||
1992 | static int __init | |
1993 | w83781d_isa_register(void) | |
1994 | { | |
1995 | return 0; | |
1996 | } | |
1997 | ||
dd56b638 | 1998 | static void |
443850ce WG |
1999 | w83781d_isa_unregister(void) |
2000 | { | |
2001 | } | |
2002 | #endif /* CONFIG_ISA */ | |
2003 | ||
2004 | static int __init | |
2005 | sensors_w83781d_init(void) | |
2006 | { | |
2007 | int res; | |
2008 | ||
2009 | /* We register the ISA device first, so that we can skip the | |
2010 | * registration of an I2C interface to the same device. */ | |
2011 | res = w83781d_isa_register(); | |
2012 | if (res) | |
2013 | goto exit; | |
2014 | ||
2015 | res = i2c_add_driver(&w83781d_driver); | |
2016 | if (res) | |
2017 | goto exit_unreg_isa; | |
2018 | ||
2019 | return 0; | |
2020 | ||
2021 | exit_unreg_isa: | |
2022 | w83781d_isa_unregister(); | |
2023 | exit: | |
2024 | return res; | |
2025 | } | |
2026 | ||
2027 | static void __exit | |
2028 | sensors_w83781d_exit(void) | |
2029 | { | |
2030 | w83781d_isa_unregister(); | |
1da177e4 LT |
2031 | i2c_del_driver(&w83781d_driver); |
2032 | } | |
2033 | ||
2034 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
2035 | "Philip Edelbrock <phil@netroedge.com>, " | |
2036 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
2037 | MODULE_DESCRIPTION("W83781D driver"); | |
2038 | MODULE_LICENSE("GPL"); | |
2039 | ||
2040 | module_init(sensors_w83781d_init); | |
2041 | module_exit(sensors_w83781d_exit); |