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Linux 2.6.25-rc7
[linux-2.6-block.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT		 1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
7666c13c
JD		 5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
1da177e4
LT		 8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
1da177e4
LT		 31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
LT		 33
34*/
35
1da177e4
LT		 36#include <linux/module.h>
37#include <linux/init.h>
38#include <linux/slab.h>
39#include <linux/jiffies.h>
40#include <linux/i2c.h>
7666c13c
JD		 41#include <linux/platform_device.h>
42#include <linux/ioport.h>
943b0830 43#include <linux/hwmon.h>
303760b4 44#include <linux/hwmon-vid.h>
34875337 45#include <linux/hwmon-sysfs.h>
311ce2ef 46#include <linux/sysfs.h>
943b0830 47#include <linux/err.h>
9a61bf63 48#include <linux/mutex.h>
1da177e4
LT		 49#include <asm/io.h>
50#include "lm75.h"
51
7666c13c
JD		 52/* ISA device, if found */
53static struct platform_device *pdev;
54
1da177e4 55/* Addresses to scan */
25e9c86d
MH		 56static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
57 0x2e, 0x2f, I2C_CLIENT_END };
2d8672c5 58static unsigned short isa_address = 0x290;
1da177e4
LT		 59
60/* Insmod parameters */
05663368 61I2C_CLIENT_INSMOD_4(w83781d, w83782d, w83783s, as99127f);
1da177e4
LT		 62I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
63 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
64
fabddcd4
JD		 65static int reset;
66module_param(reset, bool, 0);
67MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
68
1da177e4
LT		 69static int init = 1;
70module_param(init, bool, 0);
71MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
72
73/* Constants specified below */
74
75/* Length of ISA address segment */
76#define W83781D_EXTENT 8
77
78/* Where are the ISA address/data registers relative to the base address */
79#define W83781D_ADDR_REG_OFFSET 5
80#define W83781D_DATA_REG_OFFSET 6
81
34875337
JD		 82/* The device registers */
83/* in nr from 0 to 8 */
1da177e4
LT		 84#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
85 (0x554 + (((nr) - 7) * 2)))
86#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
87 (0x555 + (((nr) - 7) * 2)))
88#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
89 (0x550 + (nr) - 7))
90
34875337
JD		 91/* fan nr from 0 to 2 */
92#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
93#define W83781D_REG_FAN(nr) (0x28 + (nr))
1da177e4
LT		 94
95#define W83781D_REG_BANK 0x4E
96#define W83781D_REG_TEMP2_CONFIG 0x152
97#define W83781D_REG_TEMP3_CONFIG 0x252
34875337 98/* temp nr from 1 to 3 */
1da177e4
LT		 99#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
100 ((nr == 2) ? (0x0150) : \
101 (0x27)))
102#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
103 ((nr == 2) ? (0x153) : \
104 (0x3A)))
105#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
106 ((nr == 2) ? (0x155) : \
107 (0x39)))
108
109#define W83781D_REG_CONFIG 0x40
c7f5d7ed
JD		 110
111/* Interrupt status (W83781D, AS99127F) */
1da177e4
LT		 112#define W83781D_REG_ALARM1 0x41
113#define W83781D_REG_ALARM2 0x42
1da177e4 114
05663368 115/* Real-time status (W83782D, W83783S) */
c7f5d7ed
JD		 116#define W83782D_REG_ALARM1 0x459
117#define W83782D_REG_ALARM2 0x45A
118#define W83782D_REG_ALARM3 0x45B
119
1da177e4
LT		 120#define W83781D_REG_BEEP_CONFIG 0x4D
121#define W83781D_REG_BEEP_INTS1 0x56
122#define W83781D_REG_BEEP_INTS2 0x57
123#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
124
125#define W83781D_REG_VID_FANDIV 0x47
126
127#define W83781D_REG_CHIPID 0x49
128#define W83781D_REG_WCHIPID 0x58
129#define W83781D_REG_CHIPMAN 0x4F
130#define W83781D_REG_PIN 0x4B
131
132/* 782D/783S only */
133#define W83781D_REG_VBAT 0x5D
134
135/* PWM 782D (1-4) and 783S (1-2) only */
34875337 136static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
1da177e4
LT		 137#define W83781D_REG_PWMCLK12 0x5C
138#define W83781D_REG_PWMCLK34 0x45C
1da177e4
LT		 139
140#define W83781D_REG_I2C_ADDR 0x48
141#define W83781D_REG_I2C_SUBADDR 0x4A
142
143/* The following are undocumented in the data sheets however we
144 received the information in an email from Winbond tech support */
145/* Sensor selection - not on 781d */
146#define W83781D_REG_SCFG1 0x5D
147static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
148
149#define W83781D_REG_SCFG2 0x59
150static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
151
152#define W83781D_DEFAULT_BETA 3435
153
474d00a8
JD		 154/* Conversions */
155#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
156#define IN_FROM_REG(val) ((val) * 16)
1da177e4
LT		 157
158static inline u8
159FAN_TO_REG(long rpm, int div)
160{
161 if (rpm == 0)
162 return 255;
163 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
164 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
165}
166
474d00a8
JD		 167static inline long
168FAN_FROM_REG(u8 val, int div)
169{
170 if (val == 0)
171 return -1;
172 if (val == 255)
173 return 0;
174 return 1350000 / (val * div);
175}
1da177e4 176
474d00a8
JD		 177#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
178#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 179
1da177e4
LT		 180#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
181 (val) ^ 0x7fff : (val))
182#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
183 (~(val)) & 0x7fff : (val) & 0xffffff)
184
1da177e4
LT		 185#define DIV_FROM_REG(val) (1 << (val))
186
187static inline u8
188DIV_TO_REG(long val, enum chips type)
189{
190 int i;
191 val = SENSORS_LIMIT(val, 1,
192 ((type == w83781d
193 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 194 for (i = 0; i < 7; i++) {
1da177e4
LT		 195 if (val == 0)
196 break;
197 val >>= 1;
198 }
474d00a8 199 return i;
1da177e4
LT		 200}
201
202/* There are some complications in a module like this. First off, W83781D chips
203 may be both present on the SMBus and the ISA bus, and we have to handle
204 those cases separately at some places. Second, there might be several
205 W83781D chips available (well, actually, that is probably never done; but
206 it is a clean illustration of how to handle a case like that). Finally,
207 a specific chip may be attached to *both* ISA and SMBus, and we would
208 not like to detect it double. Fortunately, in the case of the W83781D at
209 least, a register tells us what SMBus address we are on, so that helps
210 a bit - except if there could be more than one SMBus. Groan. No solution
211 for this yet. */
212
7666c13c
JD		 213/* For ISA chips, we abuse the i2c_client addr and name fields. We also use
214 the driver field to differentiate between I2C and ISA chips. */
1da177e4
LT		 215struct w83781d_data {
216 struct i2c_client client;
1beeffe4 217 struct device *hwmon_dev;
9a61bf63 218 struct mutex lock;
1da177e4
LT		 219 enum chips type;
220
9a61bf63 221 struct mutex update_lock;
1da177e4
LT		 222 char valid; /* !=0 if following fields are valid */
223 unsigned long last_updated; /* In jiffies */
224
225 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
226 /* array of 2 pointers to subclients */
227
228 u8 in[9]; /* Register value - 8 & 9 for 782D only */
229 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
230 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
231 u8 fan[3]; /* Register value */
232 u8 fan_min[3]; /* Register value */
474d00a8
JD		 233 s8 temp; /* Register value */
234 s8 temp_max; /* Register value */
235 s8 temp_max_hyst; /* Register value */
1da177e4
LT		 236 u16 temp_add[2]; /* Register value */
237 u16 temp_max_add[2]; /* Register value */
238 u16 temp_max_hyst_add[2]; /* Register value */
239 u8 fan_div[3]; /* Register encoding, shifted right */
240 u8 vid; /* Register encoding, combined */
241 u32 alarms; /* Register encoding, combined */
242 u32 beep_mask; /* Register encoding, combined */
243 u8 beep_enable; /* Boolean */
244 u8 pwm[4]; /* Register value */
34875337 245 u8 pwm2_enable; /* Boolean */
1da177e4
LT		 246 u16 sens[3]; /* 782D/783S only.
247 1 = pentium diode; 2 = 3904 diode;
b26f9330 248 4 = thermistor */
1da177e4
LT		 249 u8 vrm;
250};
251
252static int w83781d_attach_adapter(struct i2c_adapter *adapter);
253static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
254static int w83781d_detach_client(struct i2c_client *client);
255
7666c13c
JD		 256static int __devinit w83781d_isa_probe(struct platform_device *pdev);
257static int __devexit w83781d_isa_remove(struct platform_device *pdev);
258
31b8dc4d
JD		 259static int w83781d_read_value(struct w83781d_data *data, u16 reg);
260static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
1da177e4 261static struct w83781d_data *w83781d_update_device(struct device *dev);
7666c13c 262static void w83781d_init_device(struct device *dev);
1da177e4
LT		 263
264static struct i2c_driver w83781d_driver = {
cdaf7934 265 .driver = {
cdaf7934
LR		 266 .name = "w83781d",
267 },
1da177e4
LT		 268 .attach_adapter = w83781d_attach_adapter,
269 .detach_client = w83781d_detach_client,
270};
271
7666c13c 272static struct platform_driver w83781d_isa_driver = {
cdaf7934 273 .driver = {
87218842 274 .owner = THIS_MODULE,
7666c13c 275 .name = "w83781d",
cdaf7934 276 },
7666c13c
JD		 277 .probe = w83781d_isa_probe,
278 .remove = w83781d_isa_remove,
fde09509
JD		 279};
280
281
1da177e4
LT		 282/* following are the sysfs callback functions */
283#define show_in_reg(reg) \
34875337
JD		 284static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
285 char *buf) \
1da177e4 286{ \
34875337 287 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 288 struct w83781d_data *data = w83781d_update_device(dev); \
34875337
JD		 289 return sprintf(buf, "%ld\n", \
290 (long)IN_FROM_REG(data->reg[attr->index])); \
1da177e4
LT		 291}
292show_in_reg(in);
293show_in_reg(in_min);
294show_in_reg(in_max);
295
296#define store_in_reg(REG, reg) \
34875337
JD		 297static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
298 *da, const char *buf, size_t count) \
1da177e4 299{ \
34875337 300 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 301 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 302 int nr = attr->index; \
1da177e4
LT		 303 u32 val; \
304 \
474d00a8 305 val = simple_strtoul(buf, NULL, 10); \
1da177e4 306 \
9a61bf63 307 mutex_lock(&data->update_lock); \
1da177e4 308 data->in_##reg[nr] = IN_TO_REG(val); \
31b8dc4d 309 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
1da177e4 310 \
9a61bf63 311 mutex_unlock(&data->update_lock); \
1da177e4
LT		 312 return count; \
313}
314store_in_reg(MIN, min);
315store_in_reg(MAX, max);
316
1da177e4 317#define sysfs_in_offsets(offset) \
34875337
JD		 318static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
319 show_in, NULL, offset); \
320static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
321 show_in_min, store_in_min, offset); \
322static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
323 show_in_max, store_in_max, offset)
1da177e4
LT		 324
325sysfs_in_offsets(0);
326sysfs_in_offsets(1);
327sysfs_in_offsets(2);
328sysfs_in_offsets(3);
329sysfs_in_offsets(4);
330sysfs_in_offsets(5);
331sysfs_in_offsets(6);
332sysfs_in_offsets(7);
333sysfs_in_offsets(8);
334
1da177e4 335#define show_fan_reg(reg) \
34875337
JD		 336static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
337 char *buf) \
1da177e4 338{ \
34875337 339 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4
LT		 340 struct w83781d_data *data = w83781d_update_device(dev); \
341 return sprintf(buf,"%ld\n", \
34875337
JD		 342 FAN_FROM_REG(data->reg[attr->index], \
343 DIV_FROM_REG(data->fan_div[attr->index]))); \
1da177e4
LT		 344}
345show_fan_reg(fan);
346show_fan_reg(fan_min);
347
348static ssize_t
34875337
JD		 349store_fan_min(struct device *dev, struct device_attribute *da,
350 const char *buf, size_t count)
1da177e4 351{
34875337 352 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 353 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 354 int nr = attr->index;
1da177e4
LT		 355 u32 val;
356
357 val = simple_strtoul(buf, NULL, 10);
358
9a61bf63 359 mutex_lock(&data->update_lock);
34875337
JD		 360 data->fan_min[nr] =
361 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
31b8dc4d 362 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
34875337 363 data->fan_min[nr]);
1da177e4 364
9a61bf63 365 mutex_unlock(&data->update_lock);
1da177e4
LT		 366 return count;
367}
368
34875337
JD		 369static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
370static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
371 show_fan_min, store_fan_min, 0);
372static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
373static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
374 show_fan_min, store_fan_min, 1);
375static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
376static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
377 show_fan_min, store_fan_min, 2);
1da177e4 378
1da177e4 379#define show_temp_reg(reg) \
34875337
JD		 380static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
381 char *buf) \
1da177e4 382{ \
34875337 383 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 384 struct w83781d_data *data = w83781d_update_device(dev); \
34875337 385 int nr = attr->index; \
1da177e4
LT		 386 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
387 return sprintf(buf,"%d\n", \
388 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
389 } else { /* TEMP1 */ \
390 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
391 } \
392}
393show_temp_reg(temp);
394show_temp_reg(temp_max);
395show_temp_reg(temp_max_hyst);
396
397#define store_temp_reg(REG, reg) \
34875337
JD		 398static ssize_t store_temp_##reg (struct device *dev, \
399 struct device_attribute *da, const char *buf, size_t count) \
1da177e4 400{ \
34875337 401 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 402 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 403 int nr = attr->index; \
5bfedac0 404 long val; \
1da177e4
LT		 405 \
406 val = simple_strtol(buf, NULL, 10); \
407 \
9a61bf63 408 mutex_lock(&data->update_lock); \
1da177e4
LT		 409 \
410 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
411 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
31b8dc4d 412 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT		 413 data->temp_##reg##_add[nr-2]); \
414 } else { /* TEMP1 */ \
415 data->temp_##reg = TEMP_TO_REG(val); \
31b8dc4d 416 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT		 417 data->temp_##reg); \
418 } \
419 \
9a61bf63 420 mutex_unlock(&data->update_lock); \
1da177e4
LT		 421 return count; \
422}
423store_temp_reg(OVER, max);
424store_temp_reg(HYST, max_hyst);
425
1da177e4 426#define sysfs_temp_offsets(offset) \
34875337
JD		 427static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
428 show_temp, NULL, offset); \
429static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
430 show_temp_max, store_temp_max, offset); \
431static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
432 show_temp_max_hyst, store_temp_max_hyst, offset);
1da177e4
LT		 433
434sysfs_temp_offsets(1);
435sysfs_temp_offsets(2);
436sysfs_temp_offsets(3);
437
1da177e4 438static ssize_t
e404e274 439show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 440{
441 struct w83781d_data *data = w83781d_update_device(dev);
442 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
443}
444
311ce2ef
JC		 445static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
446
1da177e4 447static ssize_t
e404e274 448show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 449{
90d6619a 450 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 451 return sprintf(buf, "%ld\n", (long) data->vrm);
452}
453
454static ssize_t
e404e274 455store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 456{
7666c13c 457 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 458 u32 val;
459
460 val = simple_strtoul(buf, NULL, 10);
461 data->vrm = val;
462
463 return count;
464}
465
311ce2ef
JC		 466static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
467
1da177e4 468static ssize_t
e404e274 469show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 470{
471 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 472 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT		 473}
474
311ce2ef
JC		 475static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
476
7d4a1374
JD		 477static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
478 char *buf)
479{
480 struct w83781d_data *data = w83781d_update_device(dev);
481 int bitnr = to_sensor_dev_attr(attr)->index;
482 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
483}
484
485/* The W83781D has a single alarm bit for temp2 and temp3 */
486static ssize_t show_temp3_alarm(struct device *dev,
487 struct device_attribute *attr, char *buf)
488{
489 struct w83781d_data *data = w83781d_update_device(dev);
490 int bitnr = (data->type == w83781d) ? 5 : 13;
491 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
492}
493
494static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
495static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
496static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
497static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
498static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
499static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
500static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
501static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
502static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
503static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
504static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
505static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
506static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
507static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
508static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
509
e404e274 510static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 511{
512 struct w83781d_data *data = w83781d_update_device(dev);
513 return sprintf(buf, "%ld\n",
514 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
515}
e404e274 516static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 517{
518 struct w83781d_data *data = w83781d_update_device(dev);
474d00a8 519 return sprintf(buf, "%ld\n", (long)data->beep_enable);
1da177e4
LT		 520}
521
1da177e4 522static ssize_t
34875337
JD		 523store_beep_mask(struct device *dev, struct device_attribute *attr,
524 const char *buf, size_t count)
1da177e4 525{
7666c13c 526 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 527 u32 val;
1da177e4
LT		 528
529 val = simple_strtoul(buf, NULL, 10);
530
9a61bf63 531 mutex_lock(&data->update_lock);
34875337
JD		 532 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
533 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
534 data->beep_mask & 0xff);
535 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
536 ((data->beep_mask >> 8) & 0x7f)
537 | data->beep_enable << 7);
538 if (data->type != w83781d && data->type != as99127f) {
539 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
540 ((data->beep_mask) >> 16) & 0xff);
541 }
542 mutex_unlock(&data->update_lock);
1da177e4 543
34875337
JD		 544 return count;
545}
1da177e4 546
34875337
JD		 547static ssize_t
548store_beep_enable(struct device *dev, struct device_attribute *attr,
549 const char *buf, size_t count)
550{
551 struct w83781d_data *data = dev_get_drvdata(dev);
552 u32 val;
1da177e4 553
34875337
JD		 554 val = simple_strtoul(buf, NULL, 10);
555 if (val != 0 && val != 1)
556 return -EINVAL;
1da177e4 557
34875337
JD		 558 mutex_lock(&data->update_lock);
559 data->beep_enable = val;
560 val = w83781d_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
561 val |= data->beep_enable << 7;
562 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, val);
9a61bf63 563 mutex_unlock(&data->update_lock);
34875337 564
1da177e4
LT		 565 return count;
566}
567
34875337
JD		 568static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
569 show_beep_mask, store_beep_mask);
570static DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
571 show_beep_enable, store_beep_enable);
1da177e4 572
7d4a1374
JD		 573static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
574 char *buf)
575{
576 struct w83781d_data *data = w83781d_update_device(dev);
577 int bitnr = to_sensor_dev_attr(attr)->index;
578 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
579}
580
581static ssize_t
582store_beep(struct device *dev, struct device_attribute *attr,
583 const char *buf, size_t count)
584{
585 struct w83781d_data *data = dev_get_drvdata(dev);
586 int bitnr = to_sensor_dev_attr(attr)->index;
587 unsigned long bit;
588 u8 reg;
589
590 bit = simple_strtoul(buf, NULL, 10);
591 if (bit & ~1)
592 return -EINVAL;
593
594 mutex_lock(&data->update_lock);
595 if (bit)
596 data->beep_mask |= (1 << bitnr);
597 else
598 data->beep_mask &= ~(1 << bitnr);
599
600 if (bitnr < 8) {
601 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
602 if (bit)
603 reg |= (1 << bitnr);
604 else
605 reg &= ~(1 << bitnr);
606 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
607 } else if (bitnr < 16) {
608 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
609 if (bit)
610 reg |= (1 << (bitnr - 8));
611 else
612 reg &= ~(1 << (bitnr - 8));
613 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
614 } else {
615 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
616 if (bit)
617 reg |= (1 << (bitnr - 16));
618 else
619 reg &= ~(1 << (bitnr - 16));
620 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
621 }
622 mutex_unlock(&data->update_lock);
623
624 return count;
625}
626
627/* The W83781D has a single beep bit for temp2 and temp3 */
628static ssize_t show_temp3_beep(struct device *dev,
629 struct device_attribute *attr, char *buf)
630{
631 struct w83781d_data *data = w83781d_update_device(dev);
632 int bitnr = (data->type == w83781d) ? 5 : 13;
633 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
634}
635
636static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
637 show_beep, store_beep, 0);
638static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
639 show_beep, store_beep, 1);
640static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
641 show_beep, store_beep, 2);
642static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
643 show_beep, store_beep, 3);
644static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
645 show_beep, store_beep, 8);
646static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
647 show_beep, store_beep, 9);
648static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
649 show_beep, store_beep, 10);
650static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
651 show_beep, store_beep, 16);
652static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
653 show_beep, store_beep, 17);
654static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
655 show_beep, store_beep, 6);
656static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
657 show_beep, store_beep, 7);
658static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
659 show_beep, store_beep, 11);
660static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
661 show_beep, store_beep, 4);
662static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
663 show_beep, store_beep, 5);
664static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
665 show_temp3_beep, store_beep, 13);
666
1da177e4 667static ssize_t
34875337 668show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 669{
34875337 670 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4
LT		 671 struct w83781d_data *data = w83781d_update_device(dev);
672 return sprintf(buf, "%ld\n",
34875337 673 (long) DIV_FROM_REG(data->fan_div[attr->index]));
1da177e4
LT		 674}
675
676/* Note: we save and restore the fan minimum here, because its value is
677 determined in part by the fan divisor. This follows the principle of
d6e05edc 678 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT		 679 because the divisor changed. */
680static ssize_t
34875337
JD		 681store_fan_div(struct device *dev, struct device_attribute *da,
682 const char *buf, size_t count)
1da177e4 683{
34875337 684 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 685 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4 686 unsigned long min;
34875337 687 int nr = attr->index;
1da177e4
LT		 688 u8 reg;
689 unsigned long val = simple_strtoul(buf, NULL, 10);
690
9a61bf63 691 mutex_lock(&data->update_lock);
293c0997 692
1da177e4
LT		 693 /* Save fan_min */
694 min = FAN_FROM_REG(data->fan_min[nr],
695 DIV_FROM_REG(data->fan_div[nr]));
696
697 data->fan_div[nr] = DIV_TO_REG(val, data->type);
698
31b8dc4d 699 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT		 700 & (nr==0 ? 0xcf : 0x3f))
701 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
31b8dc4d 702 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4
LT		 703
704 /* w83781d and as99127f don't have extended divisor bits */
705 if (data->type != w83781d && data->type != as99127f) {
31b8dc4d 706 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
1da177e4
LT		 707 & ~(1 << (5 + nr)))
708 | ((data->fan_div[nr] & 0x04) << (3 + nr));
31b8dc4d 709 w83781d_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT		 710 }
711
712 /* Restore fan_min */
713 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
34875337 714 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 715
9a61bf63 716 mutex_unlock(&data->update_lock);
1da177e4
LT		 717 return count;
718}
719
34875337
JD		 720static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
721 show_fan_div, store_fan_div, 0);
722static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
723 show_fan_div, store_fan_div, 1);
724static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
725 show_fan_div, store_fan_div, 2);
1da177e4 726
1da177e4 727static ssize_t
34875337 728show_pwm(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 729{
34875337 730 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 731 struct w83781d_data *data = w83781d_update_device(dev);
34875337 732 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
1da177e4
LT		 733}
734
735static ssize_t
34875337 736show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
1da177e4
LT		 737{
738 struct w83781d_data *data = w83781d_update_device(dev);
34875337 739 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
1da177e4
LT		 740}
741
742static ssize_t
34875337
JD		 743store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
744 size_t count)
1da177e4 745{
34875337 746 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 747 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 748 int nr = attr->index;
1da177e4
LT		 749 u32 val;
750
751 val = simple_strtoul(buf, NULL, 10);
752
9a61bf63 753 mutex_lock(&data->update_lock);
34875337
JD		 754 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
755 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
9a61bf63 756 mutex_unlock(&data->update_lock);
1da177e4
LT		 757 return count;
758}
759
760static ssize_t
34875337
JD		 761store_pwm2_enable(struct device *dev, struct device_attribute *da,
762 const char *buf, size_t count)
1da177e4 763{
7666c13c 764 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 765 u32 val, reg;
766
767 val = simple_strtoul(buf, NULL, 10);
768
9a61bf63 769 mutex_lock(&data->update_lock);
1da177e4
LT		 770
771 switch (val) {
772 case 0:
773 case 1:
31b8dc4d
JD		 774 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
775 w83781d_write_value(data, W83781D_REG_PWMCLK12,
1da177e4
LT		 776 (reg & 0xf7) | (val << 3));
777
31b8dc4d
JD		 778 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
779 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
1da177e4
LT		 780 (reg & 0xef) | (!val << 4));
781
34875337 782 data->pwm2_enable = val;
1da177e4
LT		 783 break;
784
785 default:
9a61bf63 786 mutex_unlock(&data->update_lock);
1da177e4
LT		 787 return -EINVAL;
788 }
789
9a61bf63 790 mutex_unlock(&data->update_lock);
1da177e4
LT		 791 return count;
792}
793
34875337
JD		 794static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
795static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
796static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
797static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
798/* only PWM2 can be enabled/disabled */
799static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
800 show_pwm2_enable, store_pwm2_enable);
1da177e4 801
1da177e4 802static ssize_t
34875337 803show_sensor(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 804{
34875337 805 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 806 struct w83781d_data *data = w83781d_update_device(dev);
34875337 807 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
1da177e4
LT		 808}
809
810static ssize_t
34875337
JD		 811store_sensor(struct device *dev, struct device_attribute *da,
812 const char *buf, size_t count)
1da177e4 813{
34875337 814 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 815 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 816 int nr = attr->index;
1da177e4
LT		 817 u32 val, tmp;
818
819 val = simple_strtoul(buf, NULL, 10);
820
9a61bf63 821 mutex_lock(&data->update_lock);
1da177e4
LT		 822
823 switch (val) {
824 case 1: /* PII/Celeron diode */
31b8dc4d
JD		 825 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
826 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 827 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD		 828 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
829 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD		 830 tmp | BIT_SCFG2[nr]);
831 data->sens[nr] = val;
1da177e4
LT		 832 break;
833 case 2: /* 3904 */
31b8dc4d
JD		 834 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
835 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 836 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD		 837 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
838 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD		 839 tmp & ~BIT_SCFG2[nr]);
840 data->sens[nr] = val;
1da177e4 841 break;
b26f9330
JD		 842 case W83781D_DEFAULT_BETA:
843 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
844 "instead\n", W83781D_DEFAULT_BETA);
845 /* fall through */
846 case 4: /* thermistor */
31b8dc4d
JD		 847 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
848 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337
JD		 849 tmp & ~BIT_SCFG1[nr]);
850 data->sens[nr] = val;
1da177e4
LT		 851 break;
852 default:
b26f9330
JD		 853 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
854 (long) val);
1da177e4
LT		 855 break;
856 }
857
9a61bf63 858 mutex_unlock(&data->update_lock);
1da177e4
LT		 859 return count;
860}
861
34875337
JD		 862static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
863 show_sensor, store_sensor, 0);
864static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
393cdad6 865 show_sensor, store_sensor, 1);
34875337 866static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
393cdad6 867 show_sensor, store_sensor, 2);
1da177e4 868
7666c13c
JD		 869/* I2C devices get this name attribute automatically, but for ISA devices
870 we must create it by ourselves. */
871static ssize_t
872show_name(struct device *dev, struct device_attribute *devattr, char *buf)
873{
874 struct w83781d_data *data = dev_get_drvdata(dev);
875 return sprintf(buf, "%s\n", data->client.name);
876}
877static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
878
1da177e4
LT		 879/* This function is called when:
880 * w83781d_driver is inserted (when this module is loaded), for each
881 available adapter
882 * when a new adapter is inserted (and w83781d_driver is still present) */
883static int
884w83781d_attach_adapter(struct i2c_adapter *adapter)
885{
886 if (!(adapter->class & I2C_CLASS_HWMON))
887 return 0;
2ed2dc3c 888 return i2c_probe(adapter, &addr_data, w83781d_detect);
1da177e4
LT		 889}
890
891/* Assumes that adapter is of I2C, not ISA variety.
892 * OTHERWISE DON'T CALL THIS
893 */
894static int
895w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
896 struct i2c_client *new_client)
897{
898 int i, val1 = 0, id;
899 int err;
900 const char *client_name = "";
901 struct w83781d_data *data = i2c_get_clientdata(new_client);
902
ba9c2e8d 903 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT		 904 if (!(data->lm75[0])) {
905 err = -ENOMEM;
906 goto ERROR_SC_0;
907 }
1da177e4
LT		 908
909 id = i2c_adapter_id(adapter);
910
911 if (force_subclients[0] == id && force_subclients[1] == address) {
912 for (i = 2; i <= 3; i++) {
913 if (force_subclients[i] < 0x48 ||
914 force_subclients[i] > 0x4f) {
915 dev_err(&new_client->dev, "Invalid subclient "
916 "address %d; must be 0x48-0x4f\n",
917 force_subclients[i]);
918 err = -EINVAL;
919 goto ERROR_SC_1;
920 }
921 }
31b8dc4d 922 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
1da177e4
LT		 923 (force_subclients[2] & 0x07) |
924 ((force_subclients[3] & 0x07) << 4));
925 data->lm75[0]->addr = force_subclients[2];
926 } else {
31b8dc4d 927 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
1da177e4
LT		 928 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
929 }
930
931 if (kind != w83783s) {
ba9c2e8d 932 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT		 933 if (!(data->lm75[1])) {
934 err = -ENOMEM;
935 goto ERROR_SC_1;
936 }
1da177e4
LT		 937
938 if (force_subclients[0] == id &&
939 force_subclients[1] == address) {
940 data->lm75[1]->addr = force_subclients[3];
941 } else {
942 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
943 }
944 if (data->lm75[0]->addr == data->lm75[1]->addr) {
945 dev_err(&new_client->dev,
946 "Duplicate addresses 0x%x for subclients.\n",
947 data->lm75[0]->addr);
948 err = -EBUSY;
949 goto ERROR_SC_2;
950 }
951 }
952
953 if (kind == w83781d)
954 client_name = "w83781d subclient";
955 else if (kind == w83782d)
956 client_name = "w83782d subclient";
957 else if (kind == w83783s)
958 client_name = "w83783s subclient";
1da177e4
LT		 959 else if (kind == as99127f)
960 client_name = "as99127f subclient";
961
962 for (i = 0; i <= 1; i++) {
963 /* store all data in w83781d */
964 i2c_set_clientdata(data->lm75[i], NULL);
965 data->lm75[i]->adapter = adapter;
966 data->lm75[i]->driver = &w83781d_driver;
967 data->lm75[i]->flags = 0;
968 strlcpy(data->lm75[i]->name, client_name,
969 I2C_NAME_SIZE);
970 if ((err = i2c_attach_client(data->lm75[i]))) {
971 dev_err(&new_client->dev, "Subclient %d "
972 "registration at address 0x%x "
973 "failed.\n", i, data->lm75[i]->addr);
974 if (i == 1)
975 goto ERROR_SC_3;
976 goto ERROR_SC_2;
977 }
978 if (kind == w83783s)
979 break;
980 }
981
982 return 0;
983
984/* Undo inits in case of errors */
985ERROR_SC_3:
986 i2c_detach_client(data->lm75[0]);
987ERROR_SC_2:
6044ec88 988 kfree(data->lm75[1]);
1da177e4 989ERROR_SC_1:
6044ec88 990 kfree(data->lm75[0]);
1da177e4
LT		 991ERROR_SC_0:
992 return err;
993}
994
34875337
JD		 995#define IN_UNIT_ATTRS(X) \
996 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
997 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
293c0997 998 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
7d4a1374
JD		 999 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
1000 &sensor_dev_attr_in##X##_beep.dev_attr.attr
311ce2ef 1001
34875337
JD		 1002#define FAN_UNIT_ATTRS(X) \
1003 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
1004 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
7d4a1374
JD		 1005 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
1006 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
1007 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
311ce2ef 1008
34875337
JD		 1009#define TEMP_UNIT_ATTRS(X) \
1010 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
1011 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
7d4a1374
JD		 1012 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
1013 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
1014 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
311ce2ef
JC		 1015
1016static struct attribute* w83781d_attributes[] = {
1017 IN_UNIT_ATTRS(0),
1018 IN_UNIT_ATTRS(2),
1019 IN_UNIT_ATTRS(3),
1020 IN_UNIT_ATTRS(4),
1021 IN_UNIT_ATTRS(5),
1022 IN_UNIT_ATTRS(6),
1023 FAN_UNIT_ATTRS(1),
1024 FAN_UNIT_ATTRS(2),
1025 FAN_UNIT_ATTRS(3),
1026 TEMP_UNIT_ATTRS(1),
1027 TEMP_UNIT_ATTRS(2),
1028 &dev_attr_cpu0_vid.attr,
1029 &dev_attr_vrm.attr,
1030 &dev_attr_alarms.attr,
1031 &dev_attr_beep_mask.attr,
1032 &dev_attr_beep_enable.attr,
1033 NULL
1034};
1035static const struct attribute_group w83781d_group = {
1036 .attrs = w83781d_attributes,
1037};
1038
1039static struct attribute *w83781d_attributes_opt[] = {
1040 IN_UNIT_ATTRS(1),
1041 IN_UNIT_ATTRS(7),
1042 IN_UNIT_ATTRS(8),
1043 TEMP_UNIT_ATTRS(3),
34875337
JD		 1044 &sensor_dev_attr_pwm1.dev_attr.attr,
1045 &sensor_dev_attr_pwm2.dev_attr.attr,
1046 &sensor_dev_attr_pwm3.dev_attr.attr,
1047 &sensor_dev_attr_pwm4.dev_attr.attr,
311ce2ef 1048 &dev_attr_pwm2_enable.attr,
34875337
JD		 1049 &sensor_dev_attr_temp1_type.dev_attr.attr,
1050 &sensor_dev_attr_temp2_type.dev_attr.attr,
1051 &sensor_dev_attr_temp3_type.dev_attr.attr,
311ce2ef
JC		 1052 NULL
1053};
1054static const struct attribute_group w83781d_group_opt = {
1055 .attrs = w83781d_attributes_opt,
1056};
1057
7666c13c 1058/* No clean up is done on error, it's up to the caller */
1da177e4 1059static int
7666c13c 1060w83781d_create_files(struct device *dev, int kind, int is_isa)
1da177e4 1061{
1da177e4 1062 int err;
1da177e4 1063
7666c13c
JD		 1064 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
1065 return err;
1066
1067 if (kind != w83783s) {
34875337
JD		 1068 if ((err = device_create_file(dev,
1069 &sensor_dev_attr_in1_input.dev_attr))
1070 || (err = device_create_file(dev,
1071 &sensor_dev_attr_in1_min.dev_attr))
1072 || (err = device_create_file(dev,
7d4a1374
JD		 1073 &sensor_dev_attr_in1_max.dev_attr))
1074 || (err = device_create_file(dev,
1075 &sensor_dev_attr_in1_alarm.dev_attr))
1076 || (err = device_create_file(dev,
1077 &sensor_dev_attr_in1_beep.dev_attr)))
7666c13c
JD		 1078 return err;
1079 }
1080 if (kind != as99127f && kind != w83781d && kind != w83783s) {
34875337
JD		 1081 if ((err = device_create_file(dev,
1082 &sensor_dev_attr_in7_input.dev_attr))
1083 || (err = device_create_file(dev,
1084 &sensor_dev_attr_in7_min.dev_attr))
1085 || (err = device_create_file(dev,
1086 &sensor_dev_attr_in7_max.dev_attr))
7d4a1374
JD		 1087 || (err = device_create_file(dev,
1088 &sensor_dev_attr_in7_alarm.dev_attr))
1089 || (err = device_create_file(dev,
1090 &sensor_dev_attr_in7_beep.dev_attr))
34875337
JD		 1091 || (err = device_create_file(dev,
1092 &sensor_dev_attr_in8_input.dev_attr))
1093 || (err = device_create_file(dev,
1094 &sensor_dev_attr_in8_min.dev_attr))
1095 || (err = device_create_file(dev,
7d4a1374
JD		 1096 &sensor_dev_attr_in8_max.dev_attr))
1097 || (err = device_create_file(dev,
1098 &sensor_dev_attr_in8_alarm.dev_attr))
1099 || (err = device_create_file(dev,
1100 &sensor_dev_attr_in8_beep.dev_attr)))
7666c13c
JD		 1101 return err;
1102 }
1103 if (kind != w83783s) {
34875337
JD		 1104 if ((err = device_create_file(dev,
1105 &sensor_dev_attr_temp3_input.dev_attr))
1106 || (err = device_create_file(dev,
1107 &sensor_dev_attr_temp3_max.dev_attr))
7666c13c 1108 || (err = device_create_file(dev,
7d4a1374
JD		 1109 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1110 || (err = device_create_file(dev,
1111 &sensor_dev_attr_temp3_alarm.dev_attr))
1112 || (err = device_create_file(dev,
1113 &sensor_dev_attr_temp3_beep.dev_attr)))
7666c13c 1114 return err;
7d4a1374 1115
7768aa76 1116 if (kind != w83781d) {
7d4a1374
JD		 1117 err = sysfs_chmod_file(&dev->kobj,
1118 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1119 S_IRUGO | S_IWUSR);
1120 if (err)
1121 return err;
7768aa76 1122 }
1da177e4
LT		 1123 }
1124
7666c13c 1125 if (kind != w83781d && kind != as99127f) {
34875337
JD		 1126 if ((err = device_create_file(dev,
1127 &sensor_dev_attr_pwm1.dev_attr))
1128 || (err = device_create_file(dev,
1129 &sensor_dev_attr_pwm2.dev_attr))
7666c13c
JD		 1130 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1131 return err;
1da177e4 1132 }
7666c13c 1133 if (kind == w83782d && !is_isa) {
34875337
JD		 1134 if ((err = device_create_file(dev,
1135 &sensor_dev_attr_pwm3.dev_attr))
1136 || (err = device_create_file(dev,
1137 &sensor_dev_attr_pwm4.dev_attr)))
7666c13c
JD		 1138 return err;
1139 }
1140
1141 if (kind != as99127f && kind != w83781d) {
34875337
JD		 1142 if ((err = device_create_file(dev,
1143 &sensor_dev_attr_temp1_type.dev_attr))
7666c13c 1144 || (err = device_create_file(dev,
34875337 1145 &sensor_dev_attr_temp2_type.dev_attr)))
7666c13c
JD		 1146 return err;
1147 if (kind != w83783s) {
1148 if ((err = device_create_file(dev,
34875337 1149 &sensor_dev_attr_temp3_type.dev_attr)))
7666c13c 1150 return err;
1da177e4 1151 }
7666c13c 1152 }
1da177e4 1153
7666c13c
JD		 1154 if (is_isa) {
1155 err = device_create_file(&pdev->dev, &dev_attr_name);
1156 if (err)
1157 return err;
1158 }
1da177e4 1159
7666c13c
JD		 1160 return 0;
1161}
1da177e4 1162
7666c13c
JD		 1163static int
1164w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1165{
1166 int val1 = 0, val2;
1167 struct i2c_client *client;
1168 struct device *dev;
1169 struct w83781d_data *data;
1170 int err;
1171 const char *client_name = "";
1172 enum vendor { winbond, asus } vendid;
1173
1174 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1175 err = -EINVAL;
1176 goto ERROR1;
1da177e4
LT		 1177 }
1178
1179 /* OK. For now, we presume we have a valid client. We now create the
1180 client structure, even though we cannot fill it completely yet.
1181 But it allows us to access w83781d_{read,write}_value. */
1182
ba9c2e8d 1183 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1da177e4
LT		 1184 err = -ENOMEM;
1185 goto ERROR1;
1186 }
1da177e4 1187
311ce2ef
JC		 1188 client = &data->client;
1189 i2c_set_clientdata(client, data);
1190 client->addr = address;
9a61bf63 1191 mutex_init(&data->lock);
311ce2ef 1192 client->adapter = adapter;
7666c13c 1193 client->driver = &w83781d_driver;
311ce2ef 1194 dev = &client->dev;
1da177e4
LT		 1195
1196 /* Now, we do the remaining detection. */
1197
1198 /* The w8378?d may be stuck in some other bank than bank 0. This may
1199 make reading other information impossible. Specify a force=... or
1200 force_*=... parameter, and the Winbond will be reset to the right
1201 bank. */
1202 if (kind < 0) {
31b8dc4d 1203 if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) {
bd452e6f
JD		 1204 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1205 "failed at step 3\n");
1da177e4
LT		 1206 err = -ENODEV;
1207 goto ERROR2;
1208 }
31b8dc4d
JD		 1209 val1 = w83781d_read_value(data, W83781D_REG_BANK);
1210 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1da177e4
LT		 1211 /* Check for Winbond or Asus ID if in bank 0 */
1212 if ((!(val1 & 0x07)) &&
1213 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1214 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
bd452e6f
JD		 1215 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1216 "failed at step 4\n");
1da177e4
LT		 1217 err = -ENODEV;
1218 goto ERROR2;
1219 }
1220 /* If Winbond SMBus, check address at 0x48.
1221 Asus doesn't support, except for as99127f rev.2 */
7666c13c
JD		 1222 if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1223 ((val1 & 0x80) && (val2 == 0x5c))) {
1da177e4 1224 if (w83781d_read_value
31b8dc4d 1225 (data, W83781D_REG_I2C_ADDR) != address) {
bd452e6f
JD		 1226 dev_dbg(&adapter->dev, "Detection of w83781d "
1227 "chip failed at step 5\n");
1da177e4
LT		 1228 err = -ENODEV;
1229 goto ERROR2;
1230 }
1231 }
1232 }
1233
1234 /* We have either had a force parameter, or we have already detected the
1235 Winbond. Put it now into bank 0 and Vendor ID High Byte */
31b8dc4d
JD		 1236 w83781d_write_value(data, W83781D_REG_BANK,
1237 (w83781d_read_value(data, W83781D_REG_BANK)
311ce2ef 1238 & 0x78) | 0x80);
1da177e4
LT		 1239
1240 /* Determine the chip type. */
1241 if (kind <= 0) {
1242 /* get vendor ID */
31b8dc4d 1243 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1da177e4
LT		 1244 if (val2 == 0x5c)
1245 vendid = winbond;
1246 else if (val2 == 0x12)
1247 vendid = asus;
1248 else {
bd452e6f
JD		 1249 dev_dbg(&adapter->dev, "w83781d chip vendor is "
1250 "neither Winbond nor Asus\n");
1da177e4
LT		 1251 err = -ENODEV;
1252 goto ERROR2;
1253 }
1254
31b8dc4d 1255 val1 = w83781d_read_value(data, W83781D_REG_WCHIPID);
1da177e4
LT		 1256 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1257 kind = w83781d;
1258 else if (val1 == 0x30 && vendid == winbond)
1259 kind = w83782d;
7666c13c 1260 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1da177e4 1261 kind = w83783s;
6722fead 1262 else if (val1 == 0x31)
1da177e4 1263 kind = as99127f;
1da177e4
LT		 1264 else {
1265 if (kind == 0)
bd452e6f 1266 dev_warn(&adapter->dev, "Ignoring 'force' "
1da177e4 1267 "parameter for unknown chip at "
bd452e6f 1268 "address 0x%02x\n", address);
1da177e4
LT		 1269 err = -EINVAL;
1270 goto ERROR2;
1271 }
1272 }
1273
1274 if (kind == w83781d) {
1275 client_name = "w83781d";
1276 } else if (kind == w83782d) {
1277 client_name = "w83782d";
1278 } else if (kind == w83783s) {
1279 client_name = "w83783s";
1da177e4
LT		 1280 } else if (kind == as99127f) {
1281 client_name = "as99127f";
1da177e4
LT		 1282 }
1283
1284 /* Fill in the remaining client fields and put into the global list */
311ce2ef 1285 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1da177e4
LT		 1286 data->type = kind;
1287
1da177e4 1288 /* Tell the I2C layer a new client has arrived */
311ce2ef 1289 if ((err = i2c_attach_client(client)))
1da177e4
LT		 1290 goto ERROR2;
1291
1292 /* attach secondary i2c lm75-like clients */
7666c13c
JD		 1293 if ((err = w83781d_detect_subclients(adapter, address,
1294 kind, client)))
1295 goto ERROR3;
1da177e4
LT		 1296
1297 /* Initialize the chip */
7666c13c 1298 w83781d_init_device(dev);
1da177e4
LT		 1299
1300 /* Register sysfs hooks */
7666c13c
JD		 1301 err = w83781d_create_files(dev, kind, 0);
1302 if (err)
943b0830 1303 goto ERROR4;
943b0830 1304
1beeffe4
TJ		 1305 data->hwmon_dev = hwmon_device_register(dev);
1306 if (IS_ERR(data->hwmon_dev)) {
1307 err = PTR_ERR(data->hwmon_dev);
311ce2ef 1308 goto ERROR4;
1da177e4
LT		 1309 }
1310
1311 return 0;
1312
943b0830 1313ERROR4:
311ce2ef
JC		 1314 sysfs_remove_group(&dev->kobj, &w83781d_group);
1315 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1316
943b0830
MH		 1317 if (data->lm75[1]) {
1318 i2c_detach_client(data->lm75[1]);
1319 kfree(data->lm75[1]);
1320 }
1321 if (data->lm75[0]) {
1322 i2c_detach_client(data->lm75[0]);
1323 kfree(data->lm75[0]);
1324 }
1da177e4 1325ERROR3:
311ce2ef 1326 i2c_detach_client(client);
1da177e4
LT		 1327ERROR2:
1328 kfree(data);
1329ERROR1:
1da177e4
LT		 1330 return err;
1331}
1332
1333static int
1334w83781d_detach_client(struct i2c_client *client)
1335{
943b0830 1336 struct w83781d_data *data = i2c_get_clientdata(client);
1da177e4
LT		 1337 int err;
1338
943b0830 1339 /* main client */
311ce2ef 1340 if (data) {
1beeffe4 1341 hwmon_device_unregister(data->hwmon_dev);
311ce2ef
JC		 1342 sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1343 sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1344 }
1da177e4 1345
7bef5594 1346 if ((err = i2c_detach_client(client)))
1da177e4 1347 return err;
1da177e4 1348
943b0830
MH		 1349 /* main client */
1350 if (data)
1351 kfree(data);
1352
1353 /* subclient */
1354 else
1da177e4 1355 kfree(client);
1da177e4
LT		 1356
1357 return 0;
1358}
1359
7666c13c
JD		 1360static int __devinit
1361w83781d_isa_probe(struct platform_device *pdev)
1362{
1363 int err, reg;
1364 struct w83781d_data *data;
1365 struct resource *res;
1366 const char *name;
1367
1368 /* Reserve the ISA region */
1369 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1370 if (!request_region(res->start, W83781D_EXTENT, "w83781d")) {
1371 err = -EBUSY;
1372 goto exit;
1373 }
1374
1375 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1376 err = -ENOMEM;
1377 goto exit_release_region;
1378 }
1379 mutex_init(&data->lock);
1380 data->client.addr = res->start;
1381 i2c_set_clientdata(&data->client, data);
1382 platform_set_drvdata(pdev, data);
1383
31b8dc4d 1384 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
7666c13c 1385 switch (reg) {
7666c13c
JD		 1386 case 0x30:
1387 data->type = w83782d;
1388 name = "w83782d";
1389 break;
1390 default:
1391 data->type = w83781d;
1392 name = "w83781d";
1393 }
1394 strlcpy(data->client.name, name, I2C_NAME_SIZE);
1395
1396 /* Initialize the W83781D chip */
1397 w83781d_init_device(&pdev->dev);
1398
1399 /* Register sysfs hooks */
1400 err = w83781d_create_files(&pdev->dev, data->type, 1);
1401 if (err)
1402 goto exit_remove_files;
1403
1beeffe4
TJ		 1404 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1405 if (IS_ERR(data->hwmon_dev)) {
1406 err = PTR_ERR(data->hwmon_dev);
7666c13c
JD		 1407 goto exit_remove_files;
1408 }
1409
1410 return 0;
1411
1412 exit_remove_files:
1413 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1414 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1415 device_remove_file(&pdev->dev, &dev_attr_name);
1416 kfree(data);
1417 exit_release_region:
1418 release_region(res->start, W83781D_EXTENT);
1419 exit:
1420 return err;
1421}
1422
1423static int __devexit
1424w83781d_isa_remove(struct platform_device *pdev)
1425{
1426 struct w83781d_data *data = platform_get_drvdata(pdev);
1427
1beeffe4 1428 hwmon_device_unregister(data->hwmon_dev);
7666c13c
JD		 1429 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1430 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1431 device_remove_file(&pdev->dev, &dev_attr_name);
1432 release_region(data->client.addr, W83781D_EXTENT);
1433 kfree(data);
1434
1435 return 0;
1436}
1437
1da177e4 1438/* The SMBus locks itself, usually, but nothing may access the Winbond between
293c0997 1439 bank switches. ISA access must always be locked explicitly!
1da177e4 1440 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
293c0997 1441 would slow down the W83781D access and should not be necessary.
1da177e4
LT		 1442 There are some ugly typecasts here, but the good news is - they should
1443 nowhere else be necessary! */
1444static int
31b8dc4d 1445w83781d_read_value(struct w83781d_data *data, u16 reg)
1da177e4 1446{
31b8dc4d 1447 struct i2c_client *client = &data->client;
1da177e4
LT		 1448 int res, word_sized, bank;
1449 struct i2c_client *cl;
1450
9a61bf63 1451 mutex_lock(&data->lock);
7666c13c 1452 if (!client->driver) { /* ISA device */
1da177e4
LT		 1453 word_sized = (((reg & 0xff00) == 0x100)
1454 || ((reg & 0xff00) == 0x200))
1455 && (((reg & 0x00ff) == 0x50)
1456 || ((reg & 0x00ff) == 0x53)
1457 || ((reg & 0x00ff) == 0x55));
1458 if (reg & 0xff00) {
1459 outb_p(W83781D_REG_BANK,
1460 client->addr + W83781D_ADDR_REG_OFFSET);
1461 outb_p(reg >> 8,
1462 client->addr + W83781D_DATA_REG_OFFSET);
1463 }
1464 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1465 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1466 if (word_sized) {
1467 outb_p((reg & 0xff) + 1,
1468 client->addr + W83781D_ADDR_REG_OFFSET);
1469 res =
1470 (res << 8) + inb_p(client->addr +
1471 W83781D_DATA_REG_OFFSET);
1472 }
1473 if (reg & 0xff00) {
1474 outb_p(W83781D_REG_BANK,
1475 client->addr + W83781D_ADDR_REG_OFFSET);
1476 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1477 }
1478 } else {
1479 bank = (reg >> 8) & 0x0f;
1480 if (bank > 2)
1481 /* switch banks */
1482 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1483 bank);
1484 if (bank == 0 || bank > 2) {
1485 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1486 } else {
1487 /* switch to subclient */
1488 cl = data->lm75[bank - 1];
1489 /* convert from ISA to LM75 I2C addresses */
1490 switch (reg & 0xff) {
1491 case 0x50: /* TEMP */
1492 res = swab16(i2c_smbus_read_word_data(cl, 0));
1493 break;
1494 case 0x52: /* CONFIG */
1495 res = i2c_smbus_read_byte_data(cl, 1);
1496 break;
1497 case 0x53: /* HYST */
1498 res = swab16(i2c_smbus_read_word_data(cl, 2));
1499 break;
1500 case 0x55: /* OVER */
1501 default:
1502 res = swab16(i2c_smbus_read_word_data(cl, 3));
1503 break;
1504 }
1505 }
1506 if (bank > 2)
1507 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1508 }
9a61bf63 1509 mutex_unlock(&data->lock);
1da177e4
LT		 1510 return res;
1511}
1512
1513static int
31b8dc4d 1514w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1da177e4 1515{
31b8dc4d 1516 struct i2c_client *client = &data->client;
1da177e4
LT		 1517 int word_sized, bank;
1518 struct i2c_client *cl;
1519
9a61bf63 1520 mutex_lock(&data->lock);
7666c13c 1521 if (!client->driver) { /* ISA device */
1da177e4
LT		 1522 word_sized = (((reg & 0xff00) == 0x100)
1523 || ((reg & 0xff00) == 0x200))
1524 && (((reg & 0x00ff) == 0x53)
1525 || ((reg & 0x00ff) == 0x55));
1526 if (reg & 0xff00) {
1527 outb_p(W83781D_REG_BANK,
1528 client->addr + W83781D_ADDR_REG_OFFSET);
1529 outb_p(reg >> 8,
1530 client->addr + W83781D_DATA_REG_OFFSET);
1531 }
1532 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1533 if (word_sized) {
1534 outb_p(value >> 8,
1535 client->addr + W83781D_DATA_REG_OFFSET);
1536 outb_p((reg & 0xff) + 1,
1537 client->addr + W83781D_ADDR_REG_OFFSET);
1538 }
1539 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1540 if (reg & 0xff00) {
1541 outb_p(W83781D_REG_BANK,
1542 client->addr + W83781D_ADDR_REG_OFFSET);
1543 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1544 }
1545 } else {
1546 bank = (reg >> 8) & 0x0f;
1547 if (bank > 2)
1548 /* switch banks */
1549 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1550 bank);
1551 if (bank == 0 || bank > 2) {
1552 i2c_smbus_write_byte_data(client, reg & 0xff,
1553 value & 0xff);
1554 } else {
1555 /* switch to subclient */
1556 cl = data->lm75[bank - 1];
1557 /* convert from ISA to LM75 I2C addresses */
1558 switch (reg & 0xff) {
1559 case 0x52: /* CONFIG */
1560 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1561 break;
1562 case 0x53: /* HYST */
1563 i2c_smbus_write_word_data(cl, 2, swab16(value));
1564 break;
1565 case 0x55: /* OVER */
1566 i2c_smbus_write_word_data(cl, 3, swab16(value));
1567 break;
1568 }
1569 }
1570 if (bank > 2)
1571 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1572 }
9a61bf63 1573 mutex_unlock(&data->lock);
1da177e4
LT		 1574 return 0;
1575}
1576
1da177e4 1577static void
7666c13c 1578w83781d_init_device(struct device *dev)
1da177e4 1579{
7666c13c 1580 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1581 int i, p;
1582 int type = data->type;
1583 u8 tmp;
1584
fabddcd4 1585 if (reset && type != as99127f) { /* this resets registers we don't have
1da177e4 1586 documentation for on the as99127f */
fabddcd4
JD		 1587 /* Resetting the chip has been the default for a long time,
1588 but it causes the BIOS initializations (fan clock dividers,
1589 thermal sensor types...) to be lost, so it is now optional.
1590 It might even go away if nobody reports it as being useful,
1591 as I see very little reason why this would be needed at
1592 all. */
7666c13c 1593 dev_info(dev, "If reset=1 solved a problem you were "
fabddcd4
JD		 1594 "having, please report!\n");
1595
1da177e4 1596 /* save these registers */
31b8dc4d
JD		 1597 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1598 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1da177e4
LT		 1599 /* Reset all except Watchdog values and last conversion values
1600 This sets fan-divs to 2, among others */
31b8dc4d 1601 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1da177e4
LT		 1602 /* Restore the registers and disable power-on abnormal beep.
1603 This saves FAN 1/2/3 input/output values set by BIOS. */
31b8dc4d
JD		 1604 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1605 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1da177e4
LT		 1606 /* Disable master beep-enable (reset turns it on).
1607 Individual beep_mask should be reset to off but for some reason
1608 disabling this bit helps some people not get beeped */
31b8dc4d 1609 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1da177e4
LT		 1610 }
1611
fabddcd4
JD		 1612 /* Disable power-on abnormal beep, as advised by the datasheet.
1613 Already done if reset=1. */
1614 if (init && !reset && type != as99127f) {
31b8dc4d
JD		 1615 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1616 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
fabddcd4
JD		 1617 }
1618
303760b4 1619 data->vrm = vid_which_vrm();
1da177e4
LT		 1620
1621 if ((type != w83781d) && (type != as99127f)) {
31b8dc4d 1622 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT		 1623 for (i = 1; i <= 3; i++) {
1624 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1625 data->sens[i - 1] = 4;
1da177e4
LT		 1626 } else {
1627 if (w83781d_read_value
31b8dc4d 1628 (data,
1da177e4
LT		 1629 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1630 data->sens[i - 1] = 1;
1631 else
1632 data->sens[i - 1] = 2;
1633 }
7c7a5304 1634 if (type == w83783s && i == 2)
1da177e4
LT		 1635 break;
1636 }
1637 }
1638
1639 if (init && type != as99127f) {
1640 /* Enable temp2 */
31b8dc4d 1641 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1da177e4 1642 if (tmp & 0x01) {
7666c13c 1643 dev_warn(dev, "Enabling temp2, readings "
1da177e4 1644 "might not make sense\n");
31b8dc4d 1645 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1da177e4
LT		 1646 tmp & 0xfe);
1647 }
1648
1649 /* Enable temp3 */
7c7a5304 1650 if (type != w83783s) {
31b8dc4d 1651 tmp = w83781d_read_value(data,
1da177e4
LT		 1652 W83781D_REG_TEMP3_CONFIG);
1653 if (tmp & 0x01) {
7666c13c 1654 dev_warn(dev, "Enabling temp3, "
1da177e4 1655 "readings might not make sense\n");
31b8dc4d 1656 w83781d_write_value(data,
1da177e4
LT		 1657 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1658 }
1659 }
1da177e4
LT		 1660 }
1661
1662 /* Start monitoring */
31b8dc4d
JD		 1663 w83781d_write_value(data, W83781D_REG_CONFIG,
1664 (w83781d_read_value(data,
1da177e4
LT		 1665 W83781D_REG_CONFIG) & 0xf7)
1666 | 0x01);
7666c13c
JD		 1667
1668 /* A few vars need to be filled upon startup */
34875337
JD		 1669 for (i = 0; i < 3; i++) {
1670 data->fan_min[i] = w83781d_read_value(data,
7666c13c
JD		 1671 W83781D_REG_FAN_MIN(i));
1672 }
7666c13c
JD		 1673
1674 mutex_init(&data->update_lock);
1da177e4
LT		 1675}
1676
1677static struct w83781d_data *w83781d_update_device(struct device *dev)
1678{
7666c13c
JD		 1679 struct w83781d_data *data = dev_get_drvdata(dev);
1680 struct i2c_client *client = &data->client;
1da177e4
LT		 1681 int i;
1682
9a61bf63 1683 mutex_lock(&data->update_lock);
1da177e4
LT		 1684
1685 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1686 || !data->valid) {
1687 dev_dbg(dev, "Starting device update\n");
1688
1689 for (i = 0; i <= 8; i++) {
7c7a5304 1690 if (data->type == w83783s && i == 1)
1da177e4
LT		 1691 continue; /* 783S has no in1 */
1692 data->in[i] =
31b8dc4d 1693 w83781d_read_value(data, W83781D_REG_IN(i));
1da177e4 1694 data->in_min[i] =
31b8dc4d 1695 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1da177e4 1696 data->in_max[i] =
31b8dc4d 1697 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
05663368 1698 if ((data->type != w83782d) && (i == 6))
1da177e4
LT		 1699 break;
1700 }
34875337
JD		 1701 for (i = 0; i < 3; i++) {
1702 data->fan[i] =
31b8dc4d 1703 w83781d_read_value(data, W83781D_REG_FAN(i));
34875337 1704 data->fan_min[i] =
31b8dc4d 1705 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1da177e4
LT		 1706 }
1707 if (data->type != w83781d && data->type != as99127f) {
34875337
JD		 1708 for (i = 0; i < 4; i++) {
1709 data->pwm[i] =
31b8dc4d 1710 w83781d_read_value(data,
34875337 1711 W83781D_REG_PWM[i]);
7666c13c 1712 if ((data->type != w83782d || !client->driver)
34875337 1713 && i == 1)
1da177e4
LT		 1714 break;
1715 }
1716 /* Only PWM2 can be disabled */
34875337 1717 data->pwm2_enable = (w83781d_read_value(data,
1da177e4
LT		 1718 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1719 }
1720
31b8dc4d 1721 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1da177e4 1722 data->temp_max =
31b8dc4d 1723 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1da177e4 1724 data->temp_max_hyst =
31b8dc4d 1725 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1da177e4 1726 data->temp_add[0] =
31b8dc4d 1727 w83781d_read_value(data, W83781D_REG_TEMP(2));
1da177e4 1728 data->temp_max_add[0] =
31b8dc4d 1729 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1da177e4 1730 data->temp_max_hyst_add[0] =
31b8dc4d 1731 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
7c7a5304 1732 if (data->type != w83783s) {
1da177e4 1733 data->temp_add[1] =
31b8dc4d 1734 w83781d_read_value(data, W83781D_REG_TEMP(3));
1da177e4 1735 data->temp_max_add[1] =
31b8dc4d 1736 w83781d_read_value(data,
1da177e4
LT		 1737 W83781D_REG_TEMP_OVER(3));
1738 data->temp_max_hyst_add[1] =
31b8dc4d 1739 w83781d_read_value(data,
1da177e4
LT		 1740 W83781D_REG_TEMP_HYST(3));
1741 }
31b8dc4d 1742 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
7c7a5304 1743 data->vid = i & 0x0f;
31b8dc4d 1744 data->vid |= (w83781d_read_value(data,
7c7a5304 1745 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT		 1746 data->fan_div[0] = (i >> 4) & 0x03;
1747 data->fan_div[1] = (i >> 6) & 0x03;
31b8dc4d 1748 data->fan_div[2] = (w83781d_read_value(data,
7c7a5304 1749 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4 1750 if ((data->type != w83781d) && (data->type != as99127f)) {
31b8dc4d 1751 i = w83781d_read_value(data, W83781D_REG_VBAT);
1da177e4
LT		 1752 data->fan_div[0] |= (i >> 3) & 0x04;
1753 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1754 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4 1755 }
05663368 1756 if (data->type == w83782d) {
31b8dc4d 1757 data->alarms = w83781d_read_value(data,
c7f5d7ed 1758 W83782D_REG_ALARM1)
31b8dc4d 1759 | (w83781d_read_value(data,
c7f5d7ed 1760 W83782D_REG_ALARM2) << 8)
31b8dc4d 1761 | (w83781d_read_value(data,
c7f5d7ed
JD		 1762 W83782D_REG_ALARM3) << 16);
1763 } else if (data->type == w83783s) {
31b8dc4d 1764 data->alarms = w83781d_read_value(data,
c7f5d7ed 1765 W83782D_REG_ALARM1)
31b8dc4d 1766 | (w83781d_read_value(data,
c7f5d7ed
JD		 1767 W83782D_REG_ALARM2) << 8);
1768 } else {
1769 /* No real-time status registers, fall back to
1770 interrupt status registers */
31b8dc4d 1771 data->alarms = w83781d_read_value(data,
c7f5d7ed 1772 W83781D_REG_ALARM1)
31b8dc4d 1773 | (w83781d_read_value(data,
c7f5d7ed 1774 W83781D_REG_ALARM2) << 8);
1da177e4 1775 }
31b8dc4d 1776 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1da177e4
LT		 1777 data->beep_enable = i >> 7;
1778 data->beep_mask = ((i & 0x7f) << 8) +
31b8dc4d 1779 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1da177e4
LT		 1780 if ((data->type != w83781d) && (data->type != as99127f)) {
1781 data->beep_mask |=
31b8dc4d 1782 w83781d_read_value(data,
1da177e4
LT		 1783 W83781D_REG_BEEP_INTS3) << 16;
1784 }
1785 data->last_updated = jiffies;
1786 data->valid = 1;
1787 }
1788
9a61bf63 1789 mutex_unlock(&data->update_lock);
1da177e4
LT		 1790
1791 return data;
1792}
1793
7666c13c
JD		 1794/* return 1 if a supported chip is found, 0 otherwise */
1795static int __init
1796w83781d_isa_found(unsigned short address)
1797{
1798 int val, save, found = 0;
1799
1800 if (!request_region(address, W83781D_EXTENT, "w83781d"))
1801 return 0;
1802
1803#define REALLY_SLOW_IO
1804 /* We need the timeouts for at least some W83781D-like
1805 chips. But only if we read 'undefined' registers. */
1806 val = inb_p(address + 1);
1807 if (inb_p(address + 2) != val
1808 || inb_p(address + 3) != val
1809 || inb_p(address + 7) != val) {
1810 pr_debug("w83781d: Detection failed at step 1\n");
1811 goto release;
1812 }
1813#undef REALLY_SLOW_IO
1814
1815 /* We should be able to change the 7 LSB of the address port. The
1816 MSB (busy flag) should be clear initially, set after the write. */
1817 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1818 if (save & 0x80) {
1819 pr_debug("w83781d: Detection failed at step 2\n");
1820 goto release;
1821 }
1822 val = ~save & 0x7f;
1823 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1824 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1825 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1826 pr_debug("w83781d: Detection failed at step 3\n");
1827 goto release;
1828 }
1829
1830 /* We found a device, now see if it could be a W83781D */
1831 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1832 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1833 if (val & 0x80) {
1834 pr_debug("w83781d: Detection failed at step 4\n");
1835 goto release;
1836 }
1837 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1838 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1839 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1840 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1841 if ((!(save & 0x80) && (val != 0xa3))
1842 || ((save & 0x80) && (val != 0x5c))) {
1843 pr_debug("w83781d: Detection failed at step 5\n");
1844 goto release;
1845 }
1846 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1847 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1848 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1849 pr_debug("w83781d: Detection failed at step 6\n");
1850 goto release;
1851 }
1852
1853 /* The busy flag should be clear again */
1854 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1855 pr_debug("w83781d: Detection failed at step 7\n");
1856 goto release;
1857 }
1858
1859 /* Determine the chip type */
1860 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1861 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1862 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1863 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1864 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1865 if ((val & 0xfe) == 0x10 /* W83781D */
05663368 1866 || val == 0x30) /* W83782D */
7666c13c
JD		 1867 found = 1;
1868
1869 if (found)
1870 pr_info("w83781d: Found a %s chip at %#x\n",
7666c13c
JD		 1871 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1872
1873 release:
1874 release_region(address, W83781D_EXTENT);
1875 return found;
1876}
1877
1878static int __init
1879w83781d_isa_device_add(unsigned short address)
1880{
1881 struct resource res = {
1882 .start = address,
15bde2f1 1883 .end = address + W83781D_EXTENT - 1,
7666c13c
JD		 1884 .name = "w83781d",
1885 .flags = IORESOURCE_IO,
1886 };
1887 int err;
1888
1889 pdev = platform_device_alloc("w83781d", address);
1890 if (!pdev) {
1891 err = -ENOMEM;
1892 printk(KERN_ERR "w83781d: Device allocation failed\n");
1893 goto exit;
1894 }
1895
1896 err = platform_device_add_resources(pdev, &res, 1);
1897 if (err) {
1898 printk(KERN_ERR "w83781d: Device resource addition failed "
1899 "(%d)\n", err);
1900 goto exit_device_put;
1901 }
1902
1903 err = platform_device_add(pdev);
1904 if (err) {
1905 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1906 err);
1907 goto exit_device_put;
1908 }
1909
1910 return 0;
1911
1912 exit_device_put:
1913 platform_device_put(pdev);
1914 exit:
1915 pdev = NULL;
1916 return err;
1917}
1918
1da177e4
LT		 1919static int __init
1920sensors_w83781d_init(void)
1921{
fde09509
JD		 1922 int res;
1923
1924 res = i2c_add_driver(&w83781d_driver);
1925 if (res)
7666c13c
JD		 1926 goto exit;
1927
1928 if (w83781d_isa_found(isa_address)) {
1929 res = platform_driver_register(&w83781d_isa_driver);
1930 if (res)
1931 goto exit_unreg_i2c_driver;
fde09509 1932
7666c13c
JD		 1933 /* Sets global pdev as a side effect */
1934 res = w83781d_isa_device_add(isa_address);
1935 if (res)
1936 goto exit_unreg_isa_driver;
1937 }
fde09509
JD		 1938
1939 return 0;
7666c13c
JD		 1940
1941 exit_unreg_isa_driver:
1942 platform_driver_unregister(&w83781d_isa_driver);
1943 exit_unreg_i2c_driver:
1944 i2c_del_driver(&w83781d_driver);
1945 exit:
1946 return res;
1da177e4
LT		 1947}
1948
1949static void __exit
1950sensors_w83781d_exit(void)
1951{
7666c13c
JD		 1952 if (pdev) {
1953 platform_device_unregister(pdev);
1954 platform_driver_unregister(&w83781d_isa_driver);
1955 }
1da177e4
LT		 1956 i2c_del_driver(&w83781d_driver);
1957}
1958
1959MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1960 "Philip Edelbrock <phil@netroedge.com>, "
1961 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1962MODULE_DESCRIPTION("W83781D driver");
1963MODULE_LICENSE("GPL");
1964
1965module_init(sensors_w83781d_init);
1966module_exit(sensors_w83781d_exit);
Linux 6.x block layer and io_uring tree(s)